JP2003168783A - Manufacturing method for semiconductor memory - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a manufacturing method for a semiconductor memory capable of forming a ferroelectric capacitor for which the boundary of a ferroelectric film and the upper and lower electrodes is steep in order to realize a highly integrated device. <P>SOLUTION: The manufacturing method for the semiconductor memory which is provided with a ferroelectric substance between a pair of electrodes and stores data by polarization of the ferroelectric substance corresponding to an application voltage to both electrodes comprises a process of forming a first electrode 35 on a substrate, a process of forming a ferroelectric substance layer 23 on an upper layer of the first electrode 35, and a process of forming a second electrode 37 on the upper layer of the ferroelectric substance layer 23. The process of forming the ferroelectric substance layer 23 includes at least a process of irradiating a ferroelectric precursor layer or the ferroelectric substance layer with light of an ultraviolet region. The ferroelectric precursor layer is irradiated and crystallized, or the ferroelectric substance layer is irradiated and an impurity layer or the like of a surface layer is removed. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor memory device, and more particularly to a method for manufacturing a semiconductor memory device having a ferroelectric capacitor utilizing polarization reversal of a ferroelectric substance.

[0002]

2. Description of the Related Art As one of semiconductor memory devices, a ferroelectric capacitor having a ferroelectric between a pair of electrodes and storing data by polarization of the ferroelectric according to a voltage applied to both electrodes is known. A ferroelectric memory using the same is known. In a ferroelectric memory, since the magnitude of the polarization charge value of the ferroelectric layer is proportional to the magnitude of the read signal amount, stable polarization is achieved by improving the film quality of the ferroelectric layer in order to improve the reliability of the device. It is important to secure the charge value.

In the method of manufacturing the ferroelectric memory described above, for example, a MOS transistor is formed on a semiconductor substrate, and a lower electrode (first electrode is formed so as to be connected to one of the source / drain diffusion layers and an upper layer thereof is formed). Forming a ferroelectric layer on
An upper electrode (second electrode) is formed on the upper layer.

Here, the lower electrode is formed so as to extend in the first direction, and the second electrode is formed so as to extend in the second direction orthogonal to the first direction, whereby the first electrode is formed. It is possible to form a cross-point type memory device in which a region where the and the second electrode intersect is a memory region for storing data by polarization of the ferroelectric layer.

In the conventional process of forming the above ferroelectric layer, light in the visible region or infrared region has been used to crystallize the ferroelectric substance.

[0006]

However, in the above-described method for manufacturing a ferroelectric capacitor, light in the visible region or infrared region is used to crystallize the ferroelectric substance, and the ferroelectric substance is used. The lower electrode and the part to be heated are heated at the same time, so that a mutual reaction between them occurs, and it may be difficult to form a structure with a steep interface between the ferroelectric film and the lower electrode. In forming the film, a ferroelectric film having an undesired crystal orientation may be formed in some cases due to the influence of the structure of the base including the lower electrode.

Further, a thin film having a composition different from the stoichiometric composition of the ferroelectric substance may be formed for the purpose of lowering the crystallization temperature and reducing the total heat required for manufacturing the semiconductor memory device. In this case, an excessive additive element is deposited on the outermost surface of the film as an impurity film, which makes it impossible to form a steep interface between the upper electrode and the ferroelectric layer. Each of the above problems is an obstacle to realizing the characteristics originally possessed by the ferroelectric thin film, and is an obstacle to realizing a highly integrated device.

The present invention has been made in view of the above situation. Therefore, in order to realize a highly integrated device, an object of the present invention is to reduce the interface between the ferroelectric film and the electrodes above and below the ferroelectric film. It is an object of the present invention to provide a method for manufacturing a semiconductor memory device capable of forming a steep ferroelectric capacitor.

[0009]

In order to achieve the above object, a method of manufacturing a semiconductor memory device according to the present invention has a ferroelectric substance between a pair of electrodes and responds to a voltage applied to both electrodes. A method of manufacturing a semiconductor memory device, which stores data by polarization of a ferroelectric, comprising: forming a first electrode on a substrate; forming a ferroelectric layer on the upper layer of the first electrode; Forming a second electrode on the upper layer of the dielectric layer, wherein the step of forming the ferroelectric layer comprises the step of irradiating the ferroelectric precursor layer or the ferroelectric layer with light in the ultraviolet region. At least include.

In the method of manufacturing a semiconductor memory device according to the present invention, preferably, in the step of forming the first electrode, the second electrode is formed so as to extend in the first direction. In the step, the region is formed so as to extend in a second direction different from the first direction, and a region where the first electrode and the second electrode intersect is a region for storing data by polarization of the ferroelectric substance. Becomes

In the method for manufacturing a semiconductor memory device according to the present invention, the light in the ultraviolet region is preferably 300 nm or less,
It is light having a wavelength of 193 nm or more.

In the method for manufacturing a semiconductor memory device according to the present invention, preferably, the step of forming the ferroelectric layer includes the step of forming a ferroelectric precursor layer on the first electrode, Irradiating the ferroelectric precursor layer with light in the ultraviolet region to form a ferroelectric seed crystal layer. More preferably,
The ferroelectric precursor layer has a thickness of 50 nm or less.
Further, more preferably, in the step of irradiating the ferroelectric precursor layer with light in the ultraviolet range, the ultraviolet range is intermittently changed in an atmosphere containing 90% or more of the saturated vapor amount of water vapor at 25 ° C. Irradiate with light.

In the method of manufacturing a semiconductor memory device according to the present invention, preferably, the step of forming the ferroelectric layer forms a ferroelectric precursor layer on the ferroelectric seed crystal layer. And a step of irradiating the ferroelectric precursor layer with light in the ultraviolet region to form a ferroelectric layer. More preferably,
The ferroelectric precursor layer has a thickness of 50 nm or less.
Further, more preferably, in the step of irradiating the ferroelectric precursor layer with light in the ultraviolet range, the ultraviolet range is intermittently changed in an atmosphere containing 90% or more of the saturated vapor amount of water vapor at 25 ° C. Irradiate with light.

The method for manufacturing a semiconductor memory device according to the present invention is preferably performed while heating the substrate to a temperature of room temperature or higher and 500 ° C. or lower in the step of irradiating with light in the ultraviolet region. Preferably, the first electrode is a noble metal,
It contains either an alloy containing a noble metal or a conductive oxide. Further, preferably, part or all of the outermost surface of the first electrode contains iridium oxide. In addition, preferably, the ferroelectric layer is a ferroelectric crystal having a layered structure as a main component (Bi, Ma) Bi ₂ (T).
i, Mb) ₂ O ₉ (Ma is any of Bi, Ca, Sr and Ba, and Mb is Ta or Nb).

The method of manufacturing a semiconductor memory device according to the present invention preferably includes the first electrode after the step of forming the first electrode and before the step of forming the ferroelectric layer. The method further includes the step of planarizing a layer that is a base of the ferroelectric layer. More preferably, the flattening step is performed by chemical mechanical polishing.

In the method of manufacturing a semiconductor memory device according to the present invention, preferably, the step of forming the ferroelectric layer is performed on the outermost surface layer of the ferroelectric precursor layer or the ferroelectric layer. It includes the step of irradiating with light in the ultraviolet region to evaporate and remove. More preferably, the step of forming the ferroelectric layer further includes forming a ferroelectric precursor layer on the first electrode and irradiating it with light in the ultraviolet region to form a ferroelectric seed crystal layer. And a step of forming a ferroelectric precursor material layer on the ferroelectric seed crystal layer and irradiating it with light in the ultraviolet region to form a ferroelectric layer.

[0017]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described in detail below with reference to the drawings.

First Embodiment FIG. 1 is a sectional view of a semiconductor memory device (cross-point type ferroelectric memory) according to this embodiment. For example LO
In the active region of the semiconductor substrate 10 separated by an element isolation insulating film 20 such as COS, for example, polysilicon and tungsten silicide are formed into a two-layer structure of polycide or a single layer of polysilicon through a gate insulating film 21 of silicon oxide. Gate electrode 3 that consists of
0 is formed. Impurity diffusion layers 11, 12 and 13 to be source / drain regions are formed in the semiconductor substrate 10 on both sides of the gate electrode 30 by ion implantation, and as described above, two MOS (metal-ox) are formed.
ide-semiconductor transistor T
The r is configured to share the diffusion layer 12 serving as one of the source / drain regions.

The above-mentioned two transistors Tr are, for example, n-channel type in which the semiconductor substrate 10 is p-type and the diffusion layers 11, 12 and 13 are n-type. Further, a p-channel MOS transistor (not shown) is formed on the semiconductor substrate 10, and a COMS (complementary) is formed.
MOS) transistor. An interlayer insulating film 22 made of, for example, silicon oxide or a composite film of silicon oxide and silicon nitride is formed on the entire surface to cover the two MOS transistors described above.
A contact hole reaching the diffusion layer 12 shared by the S-transistor Tr is opened, and the contact plug 3 is formed inside.
1 is formed, and the wiring 32 to be a bit line is formed on the upper part.

Further, a contact hole reaching the diffusion layer 13 which is not shared by one of the MOS transistors Tr is opened and a contact plug 33 is formed therein, while a diffusion hole which is not shared by the other MOS transistor Tr is formed. A contact hole reaching the layer 11 is opened and a contact plug 34 is formed inside. For example, Ir / Ir is connected to the contact plug 33.
The first lower electrode 35 made of a laminated body of O ₂ is formed so as to extend in the first direction. On the upper layer of the first lower electrode 35, for example, a ferroelectric crystal (Bi, Ma) Bi ₂ (Ti, Mb) ₂ O ₉ (Ma) containing a Bi-based layered structure is formed.
Is Bi, Ca, Sr, or Ba, and Mb is T
A ferroelectric layer 23 made of, for example, a or Nb) is formed. On the upper layer of the ferroelectric layer 23, for example, a first upper electrode 3 made of Ir or a laminated body of IrO ₂ / Ir
7 is formed so as to extend in a second direction orthogonal to the first direction, for example.

Here, the first lower electrode 35 extends in the first direction, and the first upper electrode 37 extends in the second direction orthogonal to the first direction.
In the region where the first lower electrode 35 and the first upper electrode 37 intersect, a first ferroelectric capacitor Cap1 having a ferroelectric between a pair of electrodes is formed. Data is stored by the polarization of the layer, and the first lower electrode 35 serves as a storage region serving as a storage node.

Further, by connecting to the contact plug 34,
An intermediate conductor 36 is formed and covers the first ferroelectric capacitor Cap1 and the intermediate conductor 36 to cover the entire surface with an interlayer insulating film 24 made of, for example, silicon oxide.
Are formed. The interlayer insulating film 24 has an intermediate conductor 3
6, a contact hole reaching 6 is buried, the contact hole is buried so as to be connected to the intermediate conductor 36, and is extended in the first direction in the upper layer of the interlayer insulating film 24, for example, Ir / IrO ₂ The second lower electrode 38 formed of the laminated body of is formed. Second lower electrode 3
8 is a ferroelectric crystal (Bi, Ma) Bi ₂ (Ti, Mb) ₂ O ₉ containing a Bi-based layered structure, for example.
(Ma is any of Bi, Ca, Sr, and Ba, and M
b is Ta or Nb) etc.
5 is formed. On the upper layer of the ferroelectric layer 25, a second upper electrode 39 made of, for example, a laminated body of Ir or IrO ₂ / Ir is formed so as to extend in, for example, a second direction orthogonal to the first direction.

Here, the second lower electrode 38 extends in the first direction and the second upper electrode 39 extends in the second direction orthogonal to the first direction.
In the region where the second lower electrode 38 and the second upper electrode 39 intersect with each other, a second ferroelectric capacitor Cap2 having a ferroelectric substance between a pair of electrodes is formed. Data is stored by the polarization of the layer, and the second lower electrode 38 serves as a storage region serving as a storage node. Further, an insulating film 26 made of, for example, silicon oxide is formed on the entire surface to cover the second ferroelectric capacitor Cap2.
The semiconductor memory device according to the present embodiment described above is a cross-point type semiconductor memory in which the lower electrode and the upper electrode respectively extend in a twisted position relationship and a ferroelectric capacitor is formed in the intersection region between them. , For example,
A predetermined voltage is applied between the bit line and the selected upper electrode to polarize the ferroelectric layer in the corresponding intersection region to store data, and for example, in the state where the predetermined intersection region is selected by the upper electrode, The polarization state of the ferroelectric layer is read from the bit line and used as reproduction data.

A method of manufacturing the above cross-point type ferroelectric memory will be described. First, as shown in FIG. 2A, an element isolation insulating film 20 is formed on the semiconductor substrate 10 by, for example, the LOCOS method, and the active region isolated by the obtained element isolation insulating film 20 is thermally oxidized, for example. A silicon oxide film is formed by the method to form the gate insulating film 21. On top of that, for example, CVD (chemical vapor)
The polysilicon and tungsten silicide or a single layer of polysilicon are laminated by the r deposition method and patterned into a gate pattern to form the gate electrode 30. Further, conductive impurities are ion-implanted as the mask of the gate electrode 30 to form the impurity diffusion layers 11, 12 and 13 to be the source / drain regions. As described above, the MOS transistor Tr is formed.

For example, the above-mentioned two transistors Tr are formed as an n-channel type, p-channel MOS transistors are formed in a region (not shown) of the semiconductor substrate 10, and CO
It can also be an MS transistor.

Next, an interlayer insulating film 22 made of silicon oxide or a composite film of silicon oxide and silicon nitride is formed on the entire surface covering the MOS transistor Tr by, for example, the CVD method. At this time, in the middle of the process of forming the interlayer insulating film 22, a contact hole reaching the diffusion layer 12 shared by the two MOS transistors Tr is opened, and a contact plug 31 made of polysilicon or tungsten is formed therein. A wiring 32, which is a bit line and is made of a metal such as aluminum, polysilicon, or polycide, is formed on the upper surface thereof.

Next, as shown in FIG. 2B, one M
A contact hole reaching the diffusion layer 13 which is not shared by the OS transistor Tr is opened. Further, a contact hole reaching the diffusion layer 11 is also opened at the same time.
If necessary, the CMOS portion is activated. next,
The contact hole is buried, polysilicon or tungsten is deposited on the entire surface, and the portion deposited outside the contact hole is subjected to CMP (chemical).
A contact plug 33 which is removed by a mechanical polishing method and is connected to the diffusion layer 13.
Then, the contact plug 34 connected to the diffusion layer 11 is simultaneously formed.

Next, a layer to be a barrier metal (not shown) and Ir and IrO ₂ are laminated in this order by, for example, a sputtering method, a resist film is patterned by a photolithography process, and further RIE (react) is performed.
The first lower electrode 3 made of a laminate of Ir / IrO ₂ having a predetermined band-like pattern extending in the first direction by performing an etching process such as ive ion etching).
5 is formed by connecting to the contact plug 33. Also,
Simultaneously with the above-mentioned patterning of the laminated body of Ir / IrO _2, etc., the intermediate conductor 36 is connected to the contact plug 34 to be formed. The first lower electrode is deposited by a CMP method using a slurry containing alumina as an abrasive, for example, by depositing silicon oxide or laminating a composite film of silicon oxide and titanium oxide so as to fill the gap of the first lower electrode 35. Polish from the top until 35 is exposed, then
The gap between the lower electrodes 35 is filled with silicon oxide or the like to be planarized.

Next, as shown in FIG. 3A, a ferroelectric crystal (Bi, Ma) Bi ₂ (Ti, Mb) which is, for example, a Bi-based layered structure is provided on the upper layer of the first lower electrode 35. ) ₂
A ferroelectric layer 23 made of O ₉ (Ma is any one of Bi, Ca, Sr, and Ba and Mb is Ta or Nb) is formed. The method of forming the ferroelectric layer 23 will be described in detail below.

A method of forming the above ferroelectric layer 23 will be described. First, a precursor solution (S1) for forming a ferroelectric layer is prepared. For example, SYM, which is an EMOD (Organometallic Decomposition) coating material manufactured by Symmerolyx Corporation.
-BI05 (BiO _1.5 , 0.5 mol / liter), S
YM-TI05 (TiO ₂ , 0.5 mol / liter),
SYM-NB05 (NbO _2.5 , 0.5 mol / liter) and a solvent (toluene) were added in a ratio of 3: 1: 1: 11.5.
Mix with a stirrer for 30 minutes or more.

Next, as shown in FIG.
The precursor solution (S1) is coated on the first lower electrode 35 by spin coating of rotating at 00 rpm for 10 seconds and at 2000 rpm for 20 seconds.
For about 20 minutes.
A precursor thin film 23p having a thickness of nm is formed. The structure of the thin film 23p at this time is amorphous.

Next, as shown in FIG. 4 (b), while the substrate is heated to, for example, 300 ° C. in an atmosphere of atmospheric pressure, the amorphous precursor thin film 23p has a wavelength of 248.
The excimer laser LT of nm is pulse-irradiated. For example,
With a repetition frequency of 200 Hz, 35.
1 laser pulse with an energy density of 28 mJ / cm ²
Irradiate 20000 pulses. At this time, the precursor thin film 23
When crystallization starts near the upper surface 23c of p and is sufficiently irradiated with the excimer laser LT, as shown in FIG.
Grains 23 g of a ferroelectric seed crystal are formed.

Next, in order to grow a ferroelectric layer on the seed crystal, the following steps are performed. That is, the precursor solution (S2) prepared by increasing the concentration of the precursor to 2.5 times the precursor solution (S1) used to form the seed crystal is mixed for 30 minutes or more using a stirrer. . Next, for example, 500 rpm for 10 seconds and 2000 rpm for 2 seconds
The precursor solution (S2) is coated on the seed crystal of the ferroelectric substance by spin coating for 0 second rotation.
After treatment at 20 ° C for 30 minutes and drying, 400 ° C, 3
Preliminary firing by heat treatment in a diffusion furnace for 0 minutes in oxygen,
Furthermore, RTO for 30 seconds at 650-700 ° C in oxygen
(Rapid thermal oxidation)
Treatment is further performed, and if necessary, heat treatment is performed at 650 to 700 ° C. for 1 hour in an oxygen stream using a diffusion furnace to form a crystallized layer having a thickness of, for example, about 50 nm. By repeating the above-mentioned spin coating to RTO treatment or heat treatment by a diffusion furnace one more time, a ferroelectric layer 23 having a film thickness of 100 nm as shown in FIG. 3A is formed.

Next, as shown in FIG. 3B, Ir is formed on the ferroelectric layer 23 by, for example, a sputtering method.
Or IrO ₂ and Ir are laminated in this order, a resist film is patterned by a photolithography process, and an etching process such as RIE is further performed to extend in a second direction orthogonal to the first direction. A first upper electrode 37 made of an IrO ₂ / Ir laminated body or the like having a predetermined strip shape is formed. After performing necessary heat treatment, a protective film (not shown) such as alumina is formed to a thickness of 50 nm by, for example, an RF sputtering method. As described above, the region where the first lower electrode 35 and the first upper electrode 37 intersect becomes the first ferroelectric capacitor Cap1 having the ferroelectric between the pair of electrodes.

As the subsequent steps, substantially the same steps as those described above are repeated to obtain the first ferroelectric capacitor Cap1.
Another set of ferroelectric capacitors having the same structure as the above is formed. That is, the interlayer insulating film 24 is formed by covering the first ferroelectric capacitor Cap1 and the intermediate conductor 36 and depositing silicon oxide or the like on the entire surface by, for example, the CVD method.

Next, the intermediate conductor 36 is formed in the interlayer insulating film 24.
Open a contact hole reaching to, and burying the contact hole so as to connect to the intermediate conductor 36,
A second lower electrode 38 made of, for example, a laminated body of Ir / IrO ₂ is formed so as to extend in the first direction on the upper layer of the interlayer insulating film 24.

Next, the gap between the second lower electrodes 38 is filled with silicon oxide or the like so as to be planarized, and a ferroelectric crystal containing a layered structure of, for example, Bi based on the upper layer of the second lower electrodes 38 (Bi, Ma). ) Bi ₂ (Ti, Mb) ₂ O ₉ (Ma is any of Bi, Ca, Sr, and Ba, and Mb is Ta.
Or a Nb) ferroelectric layer 25 is formed.

Next, on the upper layer of the ferroelectric layer 25, for example, I
The second upper electrode 39 made of a laminated body of r or IrO ₂ / Ir is formed so as to extend in, for example, a second direction orthogonal to the first direction. As described above, the region where the second lower electrode 38 and the second upper electrode 39 intersect becomes the second ferroelectric capacitor Cap2 having the ferroelectric substance between the pair of electrodes.

Further, a protective film (not shown) of alumina or the like having a film thickness of 50 nm is formed on the entire surface by covering the second ferroelectric capacitor Cap2 by, for example, an RF sputtering method, and further, by a CVD method, for example, by oxidation. An insulating film 26 is formed by depositing silicon and is planarized by, for example, the CMP method. Next, an opening for a contact plug required for wiring is formed by etching such as RIE, and then activation processing of the CMOS portion is performed as necessary,
CMP is performed after forming polysilicon or tungsten film.
Then, the contact plug is formed by polishing by the method. next,
An opening for wiring of the first and second upper electrodes (37, 39) is formed, a TiN / Al film for wiring is formed by, for example, a sputtering method, and processed into a desired pattern by etching such as RIE. Upper layer wiring (not shown). Further, a thin film of silicon nitride (not shown) is formed to prevent entry of harmful elements such as moisture, and pads (not shown) are formed to connect the chip to external terminals.
A ferroelectric memory having the structure shown in can be formed.

In the crystallization treatment of the ferroelectric thin film, which has conventionally required high temperature treatment, in the method of manufacturing a semiconductor memory device according to the present embodiment described above, the seed crystal of the ferroelectric substance is irradiated with light in the ultraviolet region. Since it is irradiated and crystallized, the crystallization treatment can be performed at a substrate temperature of at most about 400 ° C.,
By lowering the crystallization temperature in this way, the interface between the ferroelectric film and the lower electrode below it can be made steeper, thereby realizing the characteristics originally possessed by the ferroelectric thin film. It becomes possible to realize a highly integrated device.

Second Embodiment A semiconductor memory device (cross-point type ferroelectric memory) according to this embodiment is substantially the same as that of the first embodiment. The method for manufacturing the semiconductor memory device according to this embodiment will be described below. The formation of the CMOS transistor on the substrate, the formation of the contact plug, etc., and the formation of the first lower electrode are performed in the same manner as in the first embodiment. Then the first
The ferroelectric layer 23 is formed on the lower electrode 35.

First, similarly to the first embodiment, grains of a ferroelectric seed crystal are formed on the surface of the first lower electrode 35. Next, the following steps are performed to grow a ferroelectric layer on the seed crystal. That is, the concentration of the precursor was 2.5 times that of the precursor solution (S1) used to form the seed crystal, and Bi was added in excess of 10% compared to the stoichiometric composition. The prepared precursor solution (S3) is mixed for 30 minutes or more using a stirrer. Next, for example, 500 rpm for 10 seconds and 2000 rpm for 2 seconds
The precursor solution (S3) is coated on the seed crystal of the ferroelectric substance by spin coating in which it is rotated for 0 seconds.
After treatment at 20 ° C for 30 minutes and drying, 400 ° C, 3
Pre-baked by heat treatment with a diffusion furnace in oxygen for 0 minutes,
Further, RTO treatment is performed in oxygen at 550 to 700 ° C. for 30 seconds to form a crystallized layer of about 500 nm, for example.

At this time, as shown in FIG. 5A, grains 23h containing impurities and a different phase are formed in the outermost layer of the crystallized grains 23g of the ferroelectric on the seed crystal. Here, as shown in FIG. 5B, in the state where the substrate is not heated in the atmosphere of atmospheric pressure, the grain 23h containing the above impurities and the different phase has a wavelength of 248n.
m excimer laser LT is pulsed. For example, 1
One laser pulse with an energy density of 290 mJ / cm ² is irradiated per pulse. At this time, the outermost surface portion 23 containing the grains 23h containing impurities and different phases
r is heated rapidly and evaporated at a stroke to be removed.
The state shown in FIG. Here, the outermost surface of the remaining film is the layer 23d damaged by the laser pulse irradiation.
Thus, when observed with, for example, a scanning electron microscope (SEM), it can be observed that the surface is flattened and grain irregularities disappear.

Here, for example, when heat treatment is performed at 550 to 700 ° C. for 1 hour in an oxygen stream using a diffusion furnace, FIG.
As shown in (b), the damaged layer 23d is recovered and the crystallized grains 23g of the ferroelectric substance are generated. In some cases, instead of heat treatment with a diffusion furnace,
It is also possible to perform RTO treatment at 550 to 700 ° C. for 30 seconds in oxygen, and perform full-scale recovery heat treatment using a diffusion furnace again after forming the upper electrode. The first upper electrode 37 is formed on the ferroelectric layer from which the grains containing impurities and different phases are removed as described above. The subsequent steps can be performed in the same manner as in the first embodiment, and the same processing can be performed on the ferroelectric layer of the second ferroelectric capacitor Cap2.

In the crystallization process of the ferroelectric thin film, the grains containing impurities and different phases on the surface of the crystallized ferroelectric layer can be removed and flattened. The irregularities at the interface between the upper electrode and the ferroelectric layer can be suppressed within the necessary minimum range. Therefore, it is possible to reduce adverse effects such as current leakage due to locally high voltage applied to the ferroelectric layer and disappearance of steepness of the hysteresis characteristic of the ferroelectric. Therefore, the interface between the ferroelectric film and the upper electrode of the upper layer can be made steep, which makes it possible to embody the characteristics originally possessed by the ferroelectric thin film. It is possible to realize an integrated device. The flattening of the film can be realized by the CMP method, but the flattening by the laser produces an excellent effect in that the highly volatile portion can be selectively removed by adjusting the input energy. Looking only at the planarization effect, it is not inferior to CMP.
The method of manufacturing the semiconductor memory device according to the present embodiment is the same as the above first
It is also possible to use it in combination with the embodiment.

Third Embodiment A semiconductor memory device (cross-point type ferroelectric memory) according to this embodiment is substantially the same as that of the first embodiment. The method for manufacturing the semiconductor memory device according to this embodiment will be described below. The formation of the CMOS transistor on the substrate, the formation of the contact plug, etc., and the formation of the first lower electrode are performed in the same manner as in the first embodiment. Then the first
The ferroelectric layer 23 is formed on the lower electrode 35.

First, the first lower electrode 3 is formed as follows.
A grain of a ferroelectric seed crystal is formed on the surface of No. 5. First, a precursor solution (S4) for forming a ferroelectric layer is prepared. For example, Mitsubishi Materials' SrBiTa
A sol-gel coating material of Nb (composition ratio 8/22/15/5) is mixed for 30 minutes or more using a stirrer.

Next, as shown in FIG.
The precursor solution (S4) is coated on the first lower electrode 35 by spin coating of rotating at 00 rpm for 10 seconds and at 2000 rpm for 20 seconds.
For about 4 minutes by heat treatment using a diffusion furnace in oxygen at 300 ° C. for 30 minutes.
A precursor thin film 23p having a film thickness of 0 nm is formed. The structure of the thin film 23p at this time is amorphous.

Next, as shown in FIG. 4B, the precursor thin film 23 in the above-mentioned amorphous state is prepared in a state where the substrate is heated to 500 ° C. or lower, for example, 300 ° C. in an atmosphere of atmospheric pressure.
The excimer laser LT having a wavelength of 248 nm is pulse-irradiated to p. The heat treatment atmosphere at this time is argon containing water vapor. For example, fine particles of water are blown by a spray nozzle into an argon stream kept at room temperature (about 25 ° C.) to form a mixed gas of water vapor and argon. For example, 200Hz
At a repetition frequency of 35.28 mJ / pulse
120,000 laser pulses with an energy density of cm ²
Irradiate with pulse. At this time, while the substitution reaction layer of water molecules spreads downward, crystallization starts from the vicinity 23c of the upper surface of the precursor thin film 23p, and when the excimer laser LT is sufficiently irradiated, as shown in FIG. 23 g of seed crystals of the body are formed.

Next, in order to grow a ferroelectric layer on the seed crystal, the following steps are performed. That is, the precursor solution (S5) prepared by increasing the concentration of the precursor to 2.5 times the precursor solution (S4) used for forming the seed crystal is mixed for 30 minutes or more using a stirrer. . Next, for example, 500 rpm for 10 seconds and 2000 rpm for 2 seconds
The above solution is applied onto the seed crystal of the above ferroelectric substance by spin coating in which it is rotated for 0 seconds, for example, treated at 120 ° C. for 30 minutes and dried, and diffused in oxygen at 400 ° C. for 30 minutes. Pre-baking is performed by heat treatment in a furnace, further RTO treatment is performed in oxygen at 650 to 700 ° C. for 30 seconds, and if necessary, 650 to 650 in oxygen flow using a diffusion furnace.
A heat treatment is performed at 700 ° C. for 1 hour to form a crystallized layer having a thickness of, for example, about 50 nm. R from the above spin coating
The TO process or the diffusion furnace process is repeated once more to form the ferroelectric layer 23 having a film thickness of 100 nm as shown in FIG. The first upper electrode 37 is formed on the ferroelectric layer 23 formed as described above. The subsequent steps can be performed in the same manner as in the first embodiment, and the same processing can be performed on the ferroelectric layer of the second ferroelectric capacitor Cap2.

In the crystallization treatment of the ferroelectric thin film, which has conventionally required high temperature treatment, in the method of manufacturing a semiconductor memory device according to the present embodiment described above, the seed crystal of the ferroelectric substance is irradiated with light in the ultraviolet region. Since it is irradiated and crystallized, the crystallization treatment can be performed at a substrate temperature of at most about 400 ° C.,
By lowering the crystallization temperature in this way, the interface between the ferroelectric film and the lower electrode below it can be made steeper, thereby realizing the characteristics originally possessed by the ferroelectric thin film. It becomes possible to realize a highly integrated device. Further, in an argon atmosphere containing water, while heating a thin film containing an organic matter (C _m H _n ) and irradiating laser light in the ultraviolet region, a substitution reaction occurs between water molecules, oxygen and an organic matter. As a result, the organic substances contained in the thin film can be effectively removed, and a thin film made of a metal oxide can be formed. The method of manufacturing the semiconductor memory device of this embodiment can be used in combination with the first and second embodiments described above.

Fourth Embodiment A semiconductor memory device (cross-point type ferroelectric memory) according to this embodiment is substantially the same as that of the first embodiment. The method for manufacturing the semiconductor memory device according to this embodiment will be described below. The formation of the CMOS transistor on the substrate, the formation of the contact plug, etc., and the formation of the first lower electrode are performed in the same manner as in the first embodiment. Then the first
The ferroelectric layer 23 is formed on the lower electrode 35.

First, a grain of a ferroelectric seed crystal is formed on the surface of the first lower electrode 35, for example, similarly to the first or third embodiment. Next, the following steps are performed to grow a ferroelectric layer on the seed crystal. That is, first, SYM-BI05 (BiO _1.5 , which is an EMOD (organic metal decomposition) coating material manufactured by Symmerolyx Corporation,
0.5 mol / liter), SYM-TI05 (TiO
₂ , 0.5 mol / liter), SYM-NB05 (Nb
O _2.5 , 0.5 mol / liter) and a solvent (toluene) in a ratio of 3: 1: 1: 11.5 for 30 minutes or more using a stirrer to form a precursor for forming a ferroelectric layer. A body solution (S6) is prepared. Next, as shown in FIG. 7 (a), 1 grain is formed, for example, at 500 rpm on the grain 23 g of the ferroelectric seed crystal formed on the first lower electrode 35.
The precursor solution (S6) is coated on the seed crystal of the ferroelectric substance by spin coating in which it is rotated at 2000 rpm for 20 seconds for 0 seconds. For example, the precursor solution (S6) is dried for 30 minutes at 120 ° C. Pre-baking is performed by heat treatment in a diffusion furnace in oxygen at 30 ° C. for 30 minutes to form a precursor thin film 23p having a film thickness of, for example, about 50 nm. The structure of the thin film 23p at this time is amorphous.

Next, as shown in FIG. 7 (b), the precursor thin film 23 in the above-mentioned amorphous state is obtained in a state where the substrate is heated to 500 ° C. or lower, for example, 300 ° C. in an atmosphere of atmospheric pressure.
The excimer laser LT having a wavelength of 248 nm is pulse-irradiated to p. The heat treatment atmosphere at this time is argon containing water vapor. For example, fine particles of water are blown by a spray nozzle into an argon stream kept at room temperature (about 25 ° C.) to form a mixed gas of water vapor and argon. For example, 200Hz
At a repetition frequency of 35.28 mJ / pulse
120,000 laser pulses with an energy density of cm ²
Irradiate with pulse. At this time, as shown in FIG.
Crystallization starts near the upper surface of the precursor thin film 23p while the water molecule substitution reaction layer 23w spreads downward, and when the excimer laser LT is sufficiently irradiated, grains 2 of the ferroelectric substance are generated.
3 g are formed. By repeating the above-mentioned application of the precursor solution and crystallization by irradiation with laser light, the ferroelectric layer 23 having a desired film thickness is formed. The first upper electrode 37 is formed on the ferroelectric layer formed as described above. The subsequent steps can be performed in the same manner as in the first embodiment, and the second step
The same process can be performed on the ferroelectric layer of the ferroelectric capacitor Cap2.

In the crystallization treatment of the ferroelectric thin film, which has conventionally required high temperature treatment, in the method of manufacturing the semiconductor memory device according to the above-described embodiment, the ferroelectric seed crystal is irradiated with light in the ultraviolet region. Since it is irradiated and crystallized, the crystallization treatment can be performed at a substrate temperature of at most about 400 ° C.,
By lowering the crystallization temperature in this way, the interface between the ferroelectric film and the lower electrode below it can be made steeper, thereby realizing the characteristics originally possessed by the ferroelectric thin film. It becomes possible to realize a highly integrated device. Further, in an argon atmosphere containing water, while heating a thin film containing an organic matter (C _m H _n ) and irradiating laser light in the ultraviolet region, a substitution reaction occurs between water molecules, oxygen and an organic matter. As a result, the organic substances contained in the thin film can be effectively removed, and a thin film made of a metal oxide can be formed. The method for manufacturing the semiconductor memory device of this embodiment can be used in combination with the above-described first to third embodiments.

Fifth Embodiment FIG. 8 is a sectional view of a semiconductor memory device (cross-point type ferroelectric memory) according to the present embodiment. That is, a MOS transistor is formed on a semiconductor substrate and its source
A first ferroelectric capacitor Cap having a first storage node MN1 as a lower electrode connected to a diffusion layer to be a drain region.
1, a second ferroelectric capacitor Cap2 having the second storage node MN2 as a lower electrode, a third ferroelectric capacitor Cap3 having a third storage node MN3 as a lower electrode, and a fourth
The fourth ferroelectric capacitor Cap4 having the storage node MN4 as a lower electrode is laminated via an insulating film.

In each ferroelectric capacitor, the lower electrode serving as a memory node extends in the first direction, and the upper electrode extends in the second direction orthogonal to the first direction. The region where the lines intersect is a ferroelectric capacitor having a ferroelectric between a pair of electrodes, and a storage region for storing data by polarization of the ferroelectric layer. For example, a predetermined voltage is applied between the bit line and the selected upper electrode to polarize the ferroelectric layer in the corresponding intersection region to store data, and for example, a state where the predetermined intersection region is selected by the upper electrode. Then, the polarization state of the ferroelectric layer is read from the bit line and used as reproduction data.

The semiconductor memory device according to the present embodiment described above can be manufactured substantially in the same manner as the method for manufacturing the semiconductor memory device described in the first embodiment, and particularly in the step of forming the ferroelectric layer, The methods described in the first to fourth embodiments can be used alone or in combination. The method of manufacturing the semiconductor memory device of this embodiment can be used in combination with the above-described first to fourth embodiments.

(Example) Crystallized Bi ₃ TiNbO
₉ thin film, 33.6 to 500 mJ / cm per pulse
One pulse of laser light in the ultraviolet region in the energy range of ² was irradiated. A change due to ablation was observed in the film irradiated with laser light having an energy density of 220 mJ / cm ² or more. 360 mJ / cm ² , 500 mJ / cm ²
The ablation film thickness of the film irradiated with the laser beam having the energy density of
m, 11 nm.

In order to lower the crystallization temperature of the layered structure dielectric thin film containing Bi, it is effective to select a composition containing Bi in excess of the stoichiometric composition as a precursor. However, Bi added excessively often becomes an oxide or a metal and is unevenly distributed in the film or in the surface layer portion of the film, which causes the performance of the thin film capacitor to deteriorate. Laser ablation is effective for removing Bi oxide or metal present in such a surface layer.

When one pulse of the same laser beam was applied to the Bi ₃ TiNbO ₉ precursor thin film, 121 mJ was obtained.
A clear change was observed in the film when irradiated with laser light having an energy density of / cm ² or more. Also, 73.9 mJ
Even when irradiated with laser light having an energy density of / cm ² , a slight change was observed in the film. The actual ablation thickness, 8 nm at the irradiation of the laser beam energy density of 121mJ / cm ^2, was 17nm in the laser light irradiation energy density of 240 mJ / cm ^2.

In order to select the optimum wavelength of laser light,
XeCl excimer laser (3
08 nm) was irradiated on the Bi ₂ TiNbO ₉ thin film. The energy per pulse was 400 mJ / cm ² (pulse width 30 ns) for 50 consecutive pulses, but no ablation occurred. Bi ₂ TiNbO ₉ thin film (5
Thin film 3 whose base of 0 nm is Ir (film thickness 100 nm)
The reflection coefficient at 08 nm is about 40%,
It was shown that the absorption of the laser beam was not sufficient in this wavelength region, and there was energy leakage to the underlying portion.

From the above results, (Bi, Ma) Bi ₂
(Ti, Mb) ₂ O ₉ (Ma is Bi, Ca, Sr, Ba
And Mb is Ta or Nb), the wavelength of the laser beam to be irradiated is 3
It was found that the wavelength should be shorter than 08 nm.

From the ablation film thickness, 248n
It is expected that most of the energy of the laser beam having a wavelength of m is absorbed at the penetration depth of about 20 nm. Therefore, it is considered that even a laser beam having a too short wavelength is not suitable for the purpose of seed crystal precipitation. Considering the ease of use of the laser light source, the wavelength of K is 248 nm.
The rF excimer laser was determined to be a suitable light source.

Further, the crystallization treatment with a laser beam having a wavelength shorter than 308 nm is a method suitable for forming a uniform seed crystal on a patterned underlayer in the sense that crystallization proceeds from the surface of the substrate. Was shown. However, if the wavelength of the laser light source is too short, the energy input is localized in the very surface layer of the dielectric or precursor thin film, making it difficult to obtain a seed crystal layer with an appropriate thickness, and the output It is also difficult to actually obtain a stable light source. Therefore, a laser having a wavelength in the range of 193 to 300 nm is preferable as a light source used for processing.

The present invention is not limited to the above embodiment. For example, the ferroelectric memory can be applied to a mode other than the cross point type. In addition, the materials and the like that form the ferroelectric layer, the upper electrode, the lower electrode, and the like are not limited to those shown in the embodiment. It is of great value to apply the present invention to a CVD process using an organometallic material. In particular, the principle of the present invention can be applied as it is to a CVD film forming method called “layer by layer” in which the deposition and crystallization of raw materials are distinguished and repeated. In addition, various modifications can be made without changing the gist of the present invention.

[0067]

According to the method of manufacturing the semiconductor memory device of the present invention,
It is possible to form a ferroelectric capacitor having a steep interface between the ferroelectric film in the ferroelectric capacitor and the electrodes above and below the ferroelectric film, and it is possible to realize a highly integrated device.

[Brief description of drawings]

FIG. 1 is a cross-sectional view of a semiconductor memory device according to a first embodiment.

FIG. 2 is a cross-sectional view showing the manufacturing process of the method for manufacturing the semiconductor memory device according to the first embodiment.

FIG. 3 is a cross-sectional view showing the manufacturing process of the method for manufacturing the semiconductor memory device according to the first embodiment.

FIG. 4 is a cross-sectional view showing a manufacturing process of a method for manufacturing a semiconductor memory device according to the first and third embodiments.

FIG. 5 is a cross-sectional view showing the manufacturing process of the method for manufacturing the semiconductor memory device according to the second embodiment.

FIG. 6 is a cross-sectional view showing the manufacturing process of the method for manufacturing the semiconductor memory device according to the second embodiment.

FIG. 7 is a cross-sectional view showing the manufacturing process of the method for manufacturing the semiconductor memory device according to the fourth embodiment.

FIG. 8 is a sectional view of a semiconductor memory device according to a fifth embodiment.

[Explanation of symbols]

10 ... Semiconductor substrate, 11, 12, 13 ... Diffusion layer, 20 ...
Element isolation insulating film, 21 ... Gate insulating film, 22, 24 ... Interlayer insulating film, 23, 25 ... Ferroelectric layer, 23p ... Precursor thin film, 23c ... Near upper surface, 23g ... Ferroelectric grain,
23h ... Grain containing impurities and foreign phase, 23d
... damaged layer, 23w ... water molecule substitution reaction layer,
26 ... Insulating film, 30 ... Gate electrode, 31, 33, 34 ...
Contact plug, 32 ... Wiring, 35 ... First lower electrode,
36 ... Intermediate conductor, 37 ... First upper electrode, 38 ... Second lower electrode, 39 ... Second upper electrode, Cap1, Cap2, C
ap3, Cap4 ... Ferroelectric capacitors, NM1, NM
2, NM3, NM4 ... Storage node, Tr ... Transistor, LT ... Laser light.

Claims (17)

[Claims] 1. A method for manufacturing a semiconductor memory device, comprising a ferroelectric material between a pair of electrodes, wherein data is stored by polarization of the ferroelectric material according to a voltage applied to both electrodes. A step of forming a first electrode; a step of forming a ferroelectric layer on the upper layer of the first electrode; and a step of forming a second electrode on the upper layer of the ferroelectric layer, the ferroelectric layer The method for manufacturing a semiconductor memory device, wherein the step of forming a step includes at least a step of irradiating the ferroelectric precursor layer or the ferroelectric layer with light in the ultraviolet region. 2. In the step of forming the first electrode,
In the step of forming the second electrode, the first electrode and the second electrode are formed so as to extend in a first direction and in a second direction different from the first direction. The method of manufacturing a semiconductor memory device according to claim 1, wherein a region where the electrodes intersect is a region for storing data by polarization of the ferroelectric substance. 3. The light in the ultraviolet region has a wavelength of 300 nm or less, 1
The method of manufacturing a semiconductor memory device according to claim 1, wherein the light has a wavelength of 93 nm or more. 4. The step of forming the ferroelectric layer comprises the steps of forming a ferroelectric precursor layer on the first electrode, and irradiating the ferroelectric precursor layer with light in the ultraviolet region. 2. The method of manufacturing a semiconductor memory device according to claim 1, further comprising the step of forming a layer of a ferroelectric seed crystal. 5. The ferroelectric precursor layer has a film thickness of 50 nm.
The method of manufacturing a semiconductor memory device according to claim 4, wherein: 6. In the step of irradiating the ferroelectric precursor layer with light in the ultraviolet region, the saturated vapor amount at 25.degree.
The method for manufacturing a semiconductor memory device according to claim 4, wherein light in the ultraviolet region is intermittently irradiated in an atmosphere containing 0% or more of water vapor. 7. The step of forming the ferroelectric layer comprises the step of forming a ferroelectric precursor layer on a layer of a ferroelectric seed crystal, and the ferroelectric precursor layer having light in the ultraviolet region. Irradiation to form a ferroelectric layer. 8. The ferroelectric precursor layer has a film thickness of 50 nm.
The method of manufacturing a semiconductor memory device according to claim 7, wherein: 9. In the step of irradiating the ferroelectric precursor layer with light in the ultraviolet region, a saturated vapor amount of 9 at 25 ° C.
The method for manufacturing a semiconductor memory device according to claim 7, wherein light in the ultraviolet region is intermittently irradiated in an atmosphere containing 0% or more of water vapor. 10. The method for manufacturing a semiconductor memory device according to claim 1, wherein the step of irradiating with light in the ultraviolet region is performed while heating the substrate to a temperature of room temperature or more and 500 ° C. or less. 11. The method of manufacturing a semiconductor memory device according to claim 1, wherein the first electrode contains any one of a noble metal, an alloy containing a noble metal, and a conductive oxide. 12. The method of manufacturing a semiconductor memory device according to claim 1, wherein a part or all of the outermost surface of the first electrode contains iridium oxide. 13. The ferroelectric layer, as a main component,
A ferroelectric crystal including a layered structure (Bi, Ma) Bi
₂ (Ti, Mb) ₂ O ₉ (Ma is Bi, Ca, Sr, B
The method for manufacturing a semiconductor memory device according to claim 1, wherein any one of a and Mb is Ta or Nb. 14. A step of planarizing a layer serving as a base of the ferroelectric layer including the first electrode after the step of forming the first electrode and before the step of forming the ferroelectric layer. The method of manufacturing a semiconductor memory device according to claim 1, further comprising: 15. The method of manufacturing a semiconductor memory device according to claim 12, wherein the planarizing step is performed by a chemical mechanical polishing process. 16. The step of forming the ferroelectric layer comprises the step of irradiating the ferroelectric precursor layer or the outermost surface layer of the ferroelectric layer with light in the ultraviolet region to evaporate and remove the light. The method of manufacturing a semiconductor memory device according to claim 1, comprising. 17. The step of forming the ferroelectric layer further comprises forming a ferroelectric precursor layer on the first electrode and irradiating it with light in the ultraviolet region to form a ferroelectric seed crystal layer. And a step of forming a ferroelectric precursor layer on the ferroelectric seed crystal layer and irradiating it with light in the ultraviolet region to form a ferroelectric layer. 17. The method for manufacturing a semiconductor memory device according to item 16.