JP2003168670A - Method for cleaning wafer - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method for cleaning a wafer for inexpensively and sufficiently removing impurities such as polymer, particles, and resist residue existing on a wafer surface without any deformation of the surface shape of the wafer such as enlargement in the opening diameter of a contact hole. <P>SOLUTION: Cleaning liquid LQ such as demineralized water and an inorganic- or organic-based treatment chemical liquid is mixed with pressurized gas GS, a minute droplet SP of cleaning liquid is generated by being jetted from a two-fluid nozzle NZ, and the minute droplet of the cleaning liquid is sprayed to a wafer. In addition to a cleaning effect by normal cleaning liquid, impurities on the wafer surface can be physically removed by the minute droplet. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for cleaning a wafer, and more particularly, to a foreign substance such as a polymer, a resist residue, and a particle generated on a surface of a wafer when a pattern is formed on the wafer in a semiconductor device manufacturing process. The present invention relates to a method of cleaning a wafer for removing.

[0002]

2. Description of the Related Art With the recent miniaturization of semiconductor devices, miniaturization of wiring and reduction of wiring pitch are required.
At the same time, along with the demand for lower power consumption and higher speed, lower dielectric constant of the interlayer insulating film is also required. Since the increase in resistance and the increase in wiring capacitance due to the fine wiring lead to the deterioration of the operating speed of the semiconductor device, in order to meet the above requirements, it is necessary to use fine wiring and a multi-layer wiring using a low dielectric constant film as an interlayer insulating film. .

In order to satisfy the above various requirements, CVD (Chemical Vapor Depos) which has been widely used as an insulating film material between wirings and interlayers has been widely used.
It has been studied to use a low dielectric constant material (also referred to as a low-K material) such as silicon oxide containing fluorine or xerogel in place of the silicon oxide film formed by the ionization method or the like. Hereinafter, the insulating film composed of these is also referred to as a low dielectric constant film (low-K film).

As a wiring material, a wiring using copper, which has a smaller electric resistance than aluminum or its alloy, which has been widely used, has been studied. As a method of forming a metal wiring such as the above copper, a method of filling the inside of a wiring groove called a damascene method with a wiring material such as copper, or a wiring groove called a dual damascene method and communicating with this A method has been developed in which the contact holes are simultaneously filled with a wiring material to integrally form the contact plug and the wiring.

Here, in the above-mentioned dual damascene method, foreign substances such as polymers and resist residues tend to remain at the bottom of the contact hole due to the manufacturing process. FIG. 11A is a cross-sectional view in the middle of a manufacturing process of a procedure of first opening a contact hole and then forming a wiring groove communicating with the contact hole by the dual damascene method. For example, an etching stopper 11 made of silicon nitride or the like is formed on an insulating film 10 formed on a substrate, a low dielectric constant film 12 and a cap insulating film 13 are laminated thereon, and a wiring 14 made of copper or the like is formed. It is embedded. An etching stopper 15, which is made of silicon nitride, a low dielectric constant film 16, an etching stopper 17, a low dielectric constant film 18, and a cap insulating film 19 are laminated on the upper layer.

At the stage shown in FIG. 11A, a contact hole CH reaching the wiring 14 and a wiring trench TR communicating with the contact hole CH are formed. In the manufacturing process, the inside of the contact hole CH and the cap insulating film 19 are formed. The residue RR of the resist film (22, 22a) is left on the upper layer.

Further, FIG. 11B is a sectional view in the middle of the manufacturing process of a procedure of first forming a wiring groove and then opening a contact hole communicating with the wiring groove by the dual damascene method. . A contact hole CH reaching the wiring 14 has the same structure as that of FIG.
A wiring trench TR communicating with this is formed, and in this case also, in the manufacturing process, the polymer PM, which is a reaction product of the etching gas used in the dry etching, remains on the bottom surface of the contact hole CH, and The residue RR of the resist film (26, 26a) is left inside the wiring trench TR and in the upper layer of the cap insulating film 19.

In order to remove the above-mentioned resist residue, polymer, and foreign matters such as particles, an ashing step and a step of cleaning the wafer surface are generally performed. The target of such a cleaning step is a wafer in the pre-wiring process in which a SiO ₂ -based material, SiN-based material, Si-based material, etc. are present on the surface, AlCu-based material, Ti-based material, Ta-based material, W This is a wafer in a wiring process in which a system material, a Cu system material, etc. are present on the surface.

In the above cleaning step, for example, cleaning treatment with a mixed solution of sulfuric acid and hydrogen peroxide solution (hereinafter referred to as SPM treatment) is performed to remove foreign matters such as the resist residue, polymer and particles. Is going.

However, according to FIG. 12 (a) showing the result of examining the fluctuation of the number of particles in each processing,
The number of particles (B) immediately after the processing in the case of performing only the SPM processing is larger than 0.15 μm and is 0.2 μm.
The number of particles larger than m is reduced to the same level as the number of particles (A) of the unprocessed silicon wafer, but the number of particles (B ') when left in the processing apparatus as it is for 2 hours after SPM processing is It will increase significantly. This is because the residual sulfur derived from sulfuric acid causes the sulfur to adsorb moisture and grow into particles.

Further, according to FIG. 12B showing the result of investigating the variation of the number of resist residues in each process, the number of resist residues (B) when only the SPM process is performed is 0.1.
Number of resist residues (A) of unprocessed silicon wafer for both sizes larger than 5 μm and larger than 0.2 μm
The amount of resist residue is much larger than that of the above, and the resist residue cannot be removed sufficiently. For example, in the case of a process of stacking resist films, the resist film on the lower layer side is
The film has a denser film distribution and is a hard film, and the resist film that has undergone the dry etching process is hardened by the heat of the etching process, making it more difficult to remove than a normal resist film.

When the resist film is not sufficiently removed as described above, the resist film reattaches to the surface of the wafer and the openings such as contact holes become insufficient, or when the wiring material inside the contact holes is filled. , A defective embedding may occur.

In order to prevent an increase in the number of particles after the SPM treatment as described above and to sufficiently remove the resist residue, a cleaning treatment with a mixed liquid of ammonia water and hydrogen peroxide water (hereinafter referred to as APM treatment). ) May be performed after SPM processing.

According to FIG. 12A, after SPM processing, A
The number of particles (C) when the PM processing is performed is 0.
Both the size larger than 15 μm and the size larger than 0.2 μm are reduced to the same level as the particle number (A) of the unprocessed silicon wafer.

Further, according to FIG. 12B, the number of resist residues (C) when the APM process is performed after the SPM process.
However, the number has decreased to the same level as the number of particles (A) of the unprocessed silicon wafer.

In order to prevent an increase in the number of particles after the above SPM treatment and to sufficiently remove the resist residue, after the above SPM treatment, a scrub treatment using a brush such as PVA or nylon ( Below, SC
A method of performing R processing) is also known.

According to FIG. 12 (a), after SPM processing, S
When the CR process is performed, the number of particles (D) is 0.
Both the size larger than 15 μm and the size larger than 0.2 μm are reduced to the same level as the particle number (A) of the unprocessed silicon wafer.

Further, according to FIG. 12B, the number of resist residues (D) when the SCR process is performed after the SPM process.
However, the number has decreased to the same level as the number of particles (A) of the unprocessed silicon wafer.

[0019]

However, since the above APM treatment etches silicon oxide and the like because it contains an alkaline component, it changes the shape of the surface of the wafer to be cleaned. There's a problem. FIG. 13 shows (a) with respect to the processing time of APM processing.
Silicon oxide by thermal oxidation method, (b) silicon nitride by low pressure CVD method, (c) polysilicon, (d, e) CV
The results of examining the etching amount of each material of silicon oxide (d and e have different film qualities depending on the CVD conditions) by the D method are shown. As described above, the APM process particularly greatly etches silicon oxide and polysilicon.

FIG. 14A is a sectional view of a device in which a contact hole is opened in an ideal shape in a laminated insulating film such as silicon oxide. A pair of wirings 31 having a polycide structure, which is a laminated body of, for example, a polysilicon layer 31a and a tungsten silicide layer 31b, is formed on a substrate 30, and a silicon oxide offset insulating film 32 is formed on the wiring 31.
Is formed, and the first insulating film 33 made of silicon nitride formed by the low pressure CVD method to cover these, CVD
A second insulating film 34 and a third insulating film 35 made of silicon oxide are formed by the method. Second insulating film 34
The quality of the third insulating film 35 and the third insulating film 35 differ depending on the CVD conditions. The first to third insulating films (33, 34, 3
In contrast to 5), a contact hole CH reaching the substrate 30 is opened in the gap between the pair of wirings 31.

The contact hole CH is ideally opened so that the wall surface is perpendicular to the substrate 30 as described above, but even in such a case, by performing the APM process, FIG. As shown in FIG. 3, the etching of the silicon oxide forming the second and third insulating films (34, 35) occurs, and the contact hole C at this portion
If the opening diameter of H is made large (indicated by Z in the drawing), the contact shape is transformed into a bowing shape. Further, as a result of such an increase in the opening diameter of the contact hole, the risk of short circuit between contacts is increased.

Further, the above-mentioned SCR processing requires a large-scale device, and there is a problem that the cost for performing the processing is high.

The present invention has been made in view of such circumstances, and an object thereof is not to bring about deformation of the surface shape of a wafer such as enlargement of an opening diameter of a contact hole and to inexpensively produce a polymer, particles or a resist residue. It is an object of the present invention to provide a wafer cleaning method capable of sufficiently removing foreign matter existing on the wafer surface such as.

[0024]

In order to achieve the above object, the wafer cleaning method of the present invention removes foreign matter generated on the surface of a wafer when a pattern is formed on the wafer in a semiconductor device manufacturing process. A method of cleaning a wafer, wherein a cleaning liquid and a pressurized gas are mixed and ejected from a two-fluid nozzle to generate fine droplets of the cleaning liquid; And the step of spraying.

In the wafer cleaning method of the present invention, preferably, the step of cleaning the wafer with an inorganic or organic processing chemical solution is performed before the step of spraying fine droplets of the cleaning solution onto the wafer. Further has.

The above-described wafer cleaning method of the present invention preferably further comprises a step of cleaning the wafer with pure water before the step of spraying fine droplets of the cleaning liquid onto the wafer. More preferably, the step of spraying fine droplets of the cleaning liquid onto the wafer is performed while the wafer remains wet with the pure water. Alternatively, preferably, the method further includes a step of cleaning the wafer with pure water after the step of spraying the minute droplets of the cleaning liquid on the wafer.

In the above wafer cleaning method of the present invention, preferably, the foreign matter contains at least one of a polymer, a resist residue, and particles.

In the above wafer cleaning method of the present invention, pure water is preferably used as the cleaning liquid. Alternatively, preferably, the cleaning liquid is an inorganic treatment liquid containing hydrogen peroxide water or the like, or an organic treatment liquid such as an organic solvent containing an amine-based solvent, an NH ₄ F-based solvent, an organic acid-based solvent or the like. To use.

In the above wafer cleaning method of the present invention, an inert gas is preferably used as the pressurized gas.

In the above-described wafer cleaning method of the present invention, a cleaning liquid such as pure water or an inorganic or organic processing chemical liquid and a pressurized gas are mixed and sprayed from a two-fluid nozzle to form a cleaning liquid. By generating minute liquid droplets and spraying the minute liquid droplets of the cleaning liquid on the wafer, in addition to the cleaning effect of the normal cleaning liquid, it has the effect of physically removing foreign substances on the wafer surface by the minute liquid droplets. As a result, the surface shape of the wafer is not deformed such as the opening diameter of the contact hole is enlarged, a large-scale device is not required, and the cost of the polymer,
It is possible to sufficiently remove foreign substances such as particles and resist residues existing on the wafer surface.

[0031]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of an etching method and an etching apparatus of this embodiment will be described below with reference to the drawings.

FIG. 1 is a sectional view of a two-fluid nozzle NZ used in the wafer cleaning process in this embodiment.
For example, it has a supply port Ma to which the cleaning liquid LQ is supplied, a supply port Mb to which the pressurized gas GS is supplied, and an ejection port Mc from which these are mixed and ejected. By supplying the cleaning liquid LQ and the gas GS at a predetermined pressure, the nozzle N
The cleaning liquid LQ and the gas GS are mixed in Z and ejected from the ejection port Mc to form minute droplets (spray SP) of the cleaning liquid, which are sprayed onto the wafer surface.

FIG. 2 is a schematic view of a single-wafer cleaning apparatus for cleaning a wafer using the above-mentioned two-fluid nozzle NZ. For example, the table TB attached to the rotary motor SM
A two-fluid nozzle NZ is provided. Table TB
The wafer WF is fixed on the upper surface, and the cleaning liquid spray SP is ejected from the two-fluid nozzle NZ and sprayed onto the wafer WF.
At this time, while rotating the wafer WF by the rotation motor SM, the nozzle NZ is moved from the inner circumference to the outer circumference, from the outer circumference to the inner circumference, or repeatedly, and the cleaning liquid is sprayed onto the entire surface of the wafer WF. . In addition, in order to prevent the scattering of the cleaning liquid, the cup C is attached to the outer peripheral portion of the table TB.
P is provided.

As the cleaning liquid LQ, for example, pure water, an inorganic or organic processing chemical liquid is used. Pure water in this case includes ion-exchanged water and the like. Further, hydrogen peroxide solution can be used as the inorganic processing chemical. Further, as the organic processing chemicals, amine-based solvents,
An organic solvent such as NH ₄ F-based solvent or organic acid-based solvent can be used. Further, as the gas GS, for example, an inert gas such as nitrogen gas, argon gas, or helium gas is used.

In the process of manufacturing a semiconductor device, the above cleaning device is used to clean the wafer in order to remove foreign substances such as polymers, resist residues and particles generated on the wafer surface when a pattern is formed on the wafer. .

For example, SiO ₂ type material, SiN type material,
For cleaning the wafer in the pre-wiring process in which the Si-based material or the like is present on the surface, the cleaning process Sw of the procedure shown in FIG. 3A can be performed. That is, first, the first step S
As 11, the wafer surface is cleaned with an inorganic processing chemical such as hydrogen peroxide solution or an organic processing chemical such as an amine solvent, an NH ₄ F solvent, an organic acid solvent or the like. Next, as the second step S12,
The surface of the wafer is washed with pure water. Next, as a third step S13, a spray of pure water is generated using the above-mentioned two-fluid nozzle, and this is sprayed on the wafer for cleaning. At this time, in the second step S12, it is preferable to spray a pure water spray without drying the wafer while it remains wet. Next, as a fourth step S14, the wafer surface is washed with pure water. Next, as a fifth step S15, the wafer is dried. After that, the next process such as a wiring forming process is performed.

Further, for example, for cleaning a wafer in a wiring process in which an AlCu-based material, a Ti-based material, a Ta-based material, a W-based material, a Cu-based material, etc. exist on the surface, FIG.
The cleaning process Sw of the procedure shown in can be performed. That is, first, as the first step S21, the wafer surface is cleaned with pure water. Next, as the second step S22,
Using the above two-fluid nozzle, amine solvent, NH ₄ F
A spray of an organic processing chemical (organic stripping solution) such as an organic solvent such as an organic solvent or an organic acid solvent is generated, and sprayed on the wafer for cleaning. At this time, the first step S2
It is preferred that the spray is sprayed as above at 1 while remaining wet without drying the wafer. Next, as a third step S23, the wafer surface is washed with pure water.
Next, as a fourth step S24, the wafer is dried. After that, the next step such as an insulating film forming step is performed.

The wafer cleaning method of the present embodiment described above is
A cleaning liquid such as pure water, an inorganic or organic processing chemical liquid, and a pressurized gas are mixed and ejected from a two-fluid nozzle to generate minute liquid droplets of the cleaning liquid. In addition to the cleaning effect of a normal cleaning liquid, the foreign matter on the wafer surface is physically removed by the microdroplets by spraying. As a result, the deformation of the surface shape of the wafer such as the enlargement of the opening diameter of the contact hole is not brought about, and foreign matters such as polymers, particles and resist residues existing on the wafer surface can be sufficiently removed at a low cost.

For example, in the above-described wafer cleaning method of the present embodiment, a step called a dual damascene method in which a wiring groove and a contact hole communicating with the wiring groove are simultaneously filled with a wiring material to integrally form a contact plug and a wiring. Can be preferably applied to.

FIG. 4 is a sectional view of a semiconductor device having a groove wiring and a contact plug integrally formed by the above dual damascene method. For example, an etching stopper 1 made of silicon nitride or the like is formed on the insulating film 10 formed on the substrate.
1 is formed, and the low dielectric constant film 12 and the cap insulating film 13 are laminated thereon, and the wiring 1 made of copper or the like is formed.
4 is embedded. An etching stopper 15, which is made of silicon nitride, a low dielectric constant film 16, an etching stopper 17, a low dielectric constant film 18, and a cap insulating film 19 are laminated on the upper layer. In the laminated insulating film, the contact hole CH reaching the wiring 14 and the wiring trench TR communicating with the contact hole CH are formed. A wiring material such as copper is embedded in the contact hole CH and the wiring trench TR communicating with the contact hole CH, and the contact plug 24a and the groove wiring 24b are integrally formed.

A method of manufacturing the above semiconductor device will be described.
To do. First, for example, as shown in FIG.
On the formed insulating film 10, for example, by a low pressure CVD method or the like.
Etching stopper 11 by depositing more silicon nitride
Is formed, and a low-dielectric
The rate film 12 and the cap insulating film 13 are laminated. Next
The low dielectric constant film 12 and the cap insulating film 13 on the wiring pattern.
Etching along the turn, etching stopper 11
Stop the etching on the surface of the
Form. Then, for example, for sputtering, for wiring
Fill the groove and deposit a conductive wiring material such as copper.
The wiring material deposited outside the groove by CMP (Chemical
l Mechanical Polishing) method
Then, the wiring 14 is formed. Then, for example, C
By the VD method, etc., etching stopper 15, low dielectric constant
Film 16, etching stopper 17, low dielectric constant film 18, key
Cap insulating film 19 and etching stopper 20 are laminated in this order.
To form. Next, the photolithography process
, The contact hole opening pattern P _CHCash register with
The strike film 21 is formed.

Next, as shown in FIG. 5B, etching such as RIE (reactive ion etching) is performed using the resist film 21 as a mask to open a contact hole CH reaching the wiring 14. At this time, the polymer PM, which is a reaction product of the etching gas used for etching such as RIE, remains on the bottom surface of the contact hole CH.

Next, as shown in FIG. 6A, the wafer cleaning process according to the present embodiment is performed to remove the resist film 21 and the polymer PM, and further the etching stopper 20 is removed by RIE or the like. Next, the lower layer resist film 22 is formed by filling the inside of the contact hole CH, and further the upper layer resist film 23 is formed. Here, the lower resist film 22 is a hard film with a denser film distribution. Further, the opening pattern P _TR of the wiring trench is formed in the upper resist film 23 by a photolithography process.

Next, as shown in FIG. 6B, etching such as RIE is performed using the upper layer resist film 23 as a mask to transfer the wiring groove opening pattern P _TR to the lower layer resist film 22. At this time, a part 22a of the lower resist film 22 is left in the contact hole CH.

Next, as shown in FIG. 7A, etching such as RIE that stops on the surface of the etching stopper 17 is performed using the lower resist film 22 as a mask.
A wiring trench TR having a depth corresponding to the film thicknesses of the low dielectric constant film 18 and the cap insulating film 19 is formed in communication with the contact hole CH. By this etching, the upper resist film 23
Are removed, but the lower resist film 22 and its part 22a
Residue RR is left.

Next, as shown in FIG. 7B, the lower layer resist film 2 is subjected to a cleaning process of the wafer according to the present embodiment.
2 and a part 22a of the residue RR are removed. With this cleaning process, the opening diameter of the contact hole does not cause deformation of the surface shape of the wafer such as expansion of the width of the wiring groove,
Foreign substances such as polymers, particles and resist residues existing on the wafer surface can be sufficiently removed at low cost.

In the subsequent steps, for example, the contact hole CH and the wiring trench TR are filled by sputtering, a conductive wiring material such as copper is deposited, and the wiring material deposited outside the trench is removed by a CMP method or the like. Then, the contact plug 24a and the groove wiring 24b are integrally formed, resulting in the configuration shown in FIG.

In the above, the manufacturing method of the procedure of first opening the contact hole and then forming the wiring groove communicating therewith has been described. However, the wiring groove is formed first, and then the wiring groove is communicated therewith. It can also be applied to a manufacturing method in which a contact hole is opened. First, similar to the step shown in FIG. 5A, the structure shown in FIG. 8A is obtained. However, the resist film 2 formed on the etching stopper 20
At 5, an opening pattern P _TR of a wiring groove is formed.

Next, as shown in FIG. 8B, using the resist film 25 as a mask, for example, an etching stopper 17 is used.
Etching such as RIE that stops on the surface of is performed to form the wiring trench TR having a depth corresponding to the film thicknesses of the low dielectric constant film 18 and the cap insulating film 19.

Next, as shown in FIG. 9A, the wafer cleaning process according to the present embodiment is performed to remove the residue of the resist film 25, and the etching stopper 20 is removed by RIE or the like. Then, the lower layer resist film 26 is formed by filling the inside of the wiring trench TR, and further the upper layer resist film 27 is formed. Here, the lower resist film 26 is a hard film with a denser film distribution. Also,
An opening pattern P _CH of the contact hole is formed in the upper resist film 27 by a photolithography process.

Next, as shown in FIG. 9B, etching such as RIE is performed using the upper resist film 27 as a mask to transfer the opening pattern P _CH of the contact hole to the lower resist film 26. Here, the wall surfaces of the openings of the upper-layer resist film 27 and the lower-layer resist film 26 are formed obliquely, and the opening diameter at the bottom of the opening is designed to be a desired contact hole diameter.

Next, as shown in FIG. 10A, the lower resist film 26 is used as a mask to perform etching such as RIE, and the contact hole CH reaching the wiring 14 is reached.
Are formed so as to communicate with the wiring trench TR. At this time, polymer PM, which is a reaction product of an etching gas used in etching such as RIE, is formed on the bottom surface of the contact hole CH.
Is left. Further, although the upper layer resist film 27 is removed by this etching, the lower layer resist film 26 and the residue RR which is a part 26a thereof are left.

Next, as shown in FIG. 10B, the wafer cleaning process according to the present embodiment is performed to remove the lower resist film 26 and the residue RR which is a part 26a thereof. By this cleaning process, the opening diameter of the contact hole does not cause the deformation of the surface shape of the wafer such as the expansion of the width of the wiring groove, and the foreign substances such as polymer, particles and resist residues existing on the wafer surface can be sufficiently inexpensively prepared. Can be removed.

In the subsequent steps, for example, the contact hole CH and the wiring trench TR are buried by sputtering to deposit a conductive wiring material such as copper, and the wiring material deposited outside the trench is removed by the CMP method or the like. Then, the contact plug 24a and the groove wiring 24b are integrally formed, resulting in the configuration shown in FIG.

According to the wafer cleaning method of the present embodiment, it is possible to sufficiently remove the residue of the resist film that remains as a hard film in the manufacturing process.

The present invention is not limited to the above embodiment.
For example, the surface shape of the wafer to be cleaned is not limited to the state in which the contact hole and the wiring groove are formed by the dual damascene method, and it can be applied in any state. Furthermore, the gas introduced to the two-fluid nozzle is not limited to the inert gas,
Other gases such as air can also be used. Besides, various modifications can be made without departing from the spirit of the present invention.

[0057]

As described above, according to the wafer cleaning method of the present invention, a cleaning liquid such as pure water or an inorganic or organic processing chemical liquid is mixed with a pressurized gas to form a two-fluid liquid. By spraying from a nozzle, minute droplets of the cleaning liquid are generated, and by spraying the minute droplets of the cleaning liquid onto the wafer, in addition to the cleaning effect of the normal cleaning liquid, foreign substances on the wafer surface are physically removed by the minute droplets. It has an effect of removing, does not cause deformation of the surface shape of the wafer such as enlargement of the opening diameter of the contact hole, and can sufficiently remove foreign substances such as polymer, particles, and resist residues existing on the wafer surface at low cost.

[Brief description of drawings]

FIG. 1 is a cross-sectional view of a two-fluid nozzle used in a wafer cleaning process according to this embodiment of the present invention.

FIG. 2 is a schematic diagram of a single wafer cleaning apparatus according to this embodiment of the present invention.

FIG. 3 is a diagram showing a procedure of a wafer cleaning method according to the present embodiment of the present invention.

FIG. 4 is a cross-sectional view of a semiconductor device manufactured by the method for manufacturing a semiconductor device according to this embodiment of the present invention.

FIG. 5 is a cross-sectional view showing the manufacturing process of the method for manufacturing the semiconductor device according to the embodiment of the present invention.

FIG. 6 is a cross-sectional view showing the manufacturing process of the method for manufacturing the semiconductor device according to the embodiment of the present invention.

FIG. 7 is a cross-sectional view showing the manufacturing process of the method for manufacturing the semiconductor device according to the embodiment of the present invention.

FIG. 8 is a cross-sectional view showing the manufacturing process of the method for manufacturing the semiconductor device according to the embodiment of the present invention.

FIG. 9 is a cross-sectional view showing the manufacturing process of the method for manufacturing the semiconductor device according to the embodiment of the present invention.

FIG. 10 is a cross-sectional view showing the manufacturing process of the method for manufacturing the semiconductor device according to the embodiment of the present invention.

FIG. 11 is a cross-sectional view illustrating a problem in a method of manufacturing a semiconductor device according to a conventional example.

FIG. 12 is a diagram showing a cleaning effect of a conventional wafer cleaning method.

FIG. 13 is a diagram for explaining a problem of the conventional wafer cleaning method.

FIG. 14 is a cross-sectional view illustrating a problem in a method of manufacturing a semiconductor device according to a conventional example.

[Explanation of symbols]

10 ... Insulating film, 11, 15, 17, 20 ... Etching stopper, 12, 16, 18 ... Low dielectric constant film, 13, 19 ...
Cap insulating film, 14, 24b ... Wiring 21, 25 ... Resist film, 22, 22a, 26, 26a ... Lower resist film, 23, 27 ... Upper resist film, 24a ... Contact plug, 30 ... Substrate, 31a ... Polysilicon Layer, 31b
... Tungsten silicide layer, 31 ... Wiring, 32 ... Offset insulating film, 33 ... First insulating film, 34 ... Second insulating film,
35 ... 3rd insulating film, NZ ... 2-fluid nozzle, Ma, Mb ...
Supply port, Mc ... Jet port, LQ ... Cleaning liquid, GS ... Gas, S
P ... Spray, SM ... Rotation motor, TB ... Table, W
F ... Wafer, CP ... Cup, CH ... Contact hole,
R ... wiring groove, PM ... polymer, RR ... resist Makuzan渣, P _TR ... aperture pattern of the wiring trench, an opening pattern P _CH ... contact hole.

Claims (14)

[Claims] 1. A method of cleaning a wafer for removing foreign matters generated on a wafer surface when a pattern is formed on the wafer in a manufacturing process of a semiconductor device, which comprises mixing a cleaning liquid and a pressurized gas. A method for cleaning a wafer, comprising: a step of generating fine droplets of a cleaning liquid by jetting from a two-fluid nozzle; and a step of spraying the minute droplets of the cleaning liquid onto the wafer. 2. The method for cleaning a wafer according to claim 1, further comprising a step of cleaning the wafer with an inorganic or organic processing chemical solution before the step of spraying the minute droplets of the cleaning solution onto the wafer. . 3. The method for cleaning a wafer according to claim 1, further comprising a step of cleaning the wafer with pure water before the step of spraying the minute droplets of the cleaning liquid on the wafer. 4. The method for cleaning a wafer according to claim 3, wherein the step of spraying fine droplets of the cleaning liquid onto the wafer is performed while the wafer remains wet with the pure water. 5. The method for cleaning a wafer according to claim 1, further comprising a step of cleaning the wafer with pure water after the step of spraying the minute droplets of the cleaning liquid on the wafer. 6. The wafer cleaning method according to claim 1, wherein the foreign matter contains at least one of a polymer, a resist residue, and particles. 7. The pure water is used as the cleaning liquid.
The method for cleaning a wafer according to item 4. 8. The wafer cleaning method according to claim 1, wherein an inorganic or organic processing chemical is used as the cleaning liquid. 9. The method for cleaning a wafer according to claim 8, wherein the cleaning liquid contains hydrogen peroxide as an inorganic processing chemical. 10. The wafer cleaning method according to claim 8, wherein the cleaning liquid contains an organic solvent as an organic processing chemical. 11. The wafer cleaning method according to claim 10, wherein the cleaning liquid contains an amine solvent as the organic solvent. 12. The cleaning solution comprises NH ₄ as the organic solvent.
The method for cleaning a wafer according to claim 10, further comprising an F-based solvent. 13. The method for cleaning a wafer according to claim 10, wherein the cleaning liquid contains an organic acid solvent as the organic solvent. 14. The method for cleaning a wafer according to claim 1, wherein an inert gas is used as the pressurized gas.