JP2003167018A - Characteristic testing circuit for semiconductor element - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To always form a constant current circuit even if measured element terminals AF, KF are connected to the casing ground earth GND(S) side, and to prevent the measured elements and the like from being destroyed by uncontrollable current. <P>SOLUTION: A current detecting resistance RS is disposed on the anode terminal side of the measured element DUT, and a ground earth GND(S) point connected to a casing including the characteristic testing circuit or the like for measures against noise and measures for an electric shock is also provided on the anode terminal side, whereby even in short-circuit of the measured element terminal KF, always a constant current flows through the current detecting resistance RS to prevent the switching element Q and the measured element DUT from being destroyed. <P>COPYRIGHT: (C)2003,JPO

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a circuit for testing characteristics of a semiconductor device, and more particularly to a forward voltage drop (VF) of a diode.
The present invention relates to an improvement of a test circuit for measuring characteristics. 2. Description of the Related Art FIG. 4 shows a conventional characteristic test circuit of this kind. In the figure, E is a DC power supply of 12 to 24 V DC,
RS is a current detection resistor, AF, KF, AS, and KS are device terminals to be measured, DUT is a device to be measured, GND (E) is a ground ground on the cathode side of the DC power supply E, and GND (S) is a housing or the like. , Q indicates a current control switching element such as a MOS FET, and I indicates a current flowing through the DUT. Further, AMP is a forward constant current amplifier circuit having an inverting input terminal connected to the current setting D / A converter CN1 and the other non-inverting input terminal having an element terminal to be measured KF and a current detecting resistor RS. Are connected so as to form a current feedback circuit. [0005] The output terminal of the forward constant current amplifier circuit AMP is connected to the gate of the current control switching element Q, and the drain terminal of the switching element Q is connected to the anode (+) side of the DC power supply E. The source terminal of the switching element Q is connected to the measured element terminal AF.
A forward voltage (V) is applied to the element terminals AS and KS to be measured.
A / D converter CN for VF measurement for measuring F)
2 are connected. In the above circuit configuration, the forward voltage measurement of the device under test DUT, here the diode,
The current I through the S
Normal operation is performed by flowing to (S). Further, in the above circuit, a predetermined voltage is supplied from the DC power supply E of 12 to 24 V DC to the current control switching element Q, and the current setting D / A converter CN
By setting the current to a predetermined value at 1, the forward constant current amplifier circuit AMP operates, whereby the switching element Q is turned on and the device under test DUT and the current detection resistor RS
Current flows through In the above case, assuming that the voltage (VS) between both ends of the current detection resistor RS is the current I, the current I is detected from the calculation formula of VS = I × RS, and the forward constant current amplifier circuit AM
By feeding back the current I to P, the current set in the current setting D / A converter CN1 becomes DU.
T is energized. Then, the forward voltage (VF) at that time is read by the VF measurement A / D converter CN2 and used as a measured value. [0008] Since the conventional characteristic test circuit for a semiconductor device is configured as described above, there are the following problems to be solved. That is, for example, when measuring the VF of the diode, the VF of the DUT is normally measured normally by the VF measurement A / D converter CN2 by flowing a current to the housing ground GND (S) through the current detection resistor RS. You. However, the device terminals AF and KF to be measured are not directly connected to the current detecting resistor RS but directly to the housing ground ground GN.
When connected to D (S), an uncontrolled current flows through the DC power supply E → the current control switching element Q → DUT,
The switching element Q and the DUT may be destroyed. By the way, the following can be said when the cause of the connection of the measured element terminals AF and KF to the housing ground GND (S) is considered. That is, when measuring characteristics such as a forward voltage of a diode, a predetermined measuring jig and an automatic inspection device are usually used. And one side of the measuring power supply of the measuring instrument is
It is connected to the housing for noise and electric shock measures. In this case, the same ground earth GND (S) is generally connected so as to have the same potential as the measuring jig, the device and the like. In the above case, the device terminals AF and KF to be measured are insulated from the housing, the device, and the like, but they are adjacent to each other in structure, and are liable to cause insulation failure due to dirt and the like. When the transport system is clogged for some reason during transport of the device under test, the device terminals AF and KF may be connected to the housing ground GND (S). SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems. The present invention has been made by changing a connection point between a current detection resistor RS and a case ground GND (S).
Even if the measured element terminals AF and KF are connected to the GND side,
It is an object of the present invention to provide a characteristic test circuit for a semiconductor device in which a constant current circuit is always configured and a switching element, a device to be measured, and the like are not destroyed by an uncontrollable current. A characteristic test circuit for a semiconductor device according to the present invention operates with a DC power supply for supplying a predetermined voltage to a current control switching device and a current set by a D / A converter. A forward constant current amplifier circuit for supplying a predetermined current to the switching element; a device to be measured to which a predetermined current is supplied when the switching element is turned on by a current from the constant current amplifier circuit; A current detection resistor that detects a current flowing through the element and feeds it back to the forward constant current amplifier circuit so that a constant current set by the D / A converter is supplied to the device under test; A characteristic test circuit for a semiconductor device comprising: an A / D converter for measuring a forward voltage of the device under test; In addition to being disposed on the anode terminal side, a grounding point for the housing connected to the housing or the like for noise suppression, electric shock prevention, etc. is also provided on the anode terminal side. A constant current flows through the resistor to prevent destruction of the switching element, the element to be measured, and the like due to an uncontrollable current. In the circuit for testing the characteristics of a semiconductor device according to the present invention, the current detection resistor for detecting the current flowing through the device under test and the case grounding point are set as described above. Even if an element terminal short circuit occurs, a constant current always flows through the current detection resistor disposed on the anode side of the device under test. Therefore, an uncontrollable current does not flow through the current control switching element, the device under test, and the like, and it is possible to prevent accidental destruction thereof. An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a circuit for testing the characteristics of a semiconductor device according to the present invention. A feature of the present invention is that a connection point between the current detection resistor RS and the housing ground GND (S) is arranged on the anode side of the device under test DUT. That is, the current control switching element Q, in this embodiment, the MOS FET
The drain terminal (D) of the switching element Q and the anode (+) of the DC power supply E are connected, and the source terminal S of the switching element Q and the anode located on the anode side of the device under test DUT are used. The current detection resistor RS is inserted between the measurement element terminals AF. Also, the point of grounding GND (S) connected to the chassis or housing of the device for noise measures or electric shock measures is changed between the current detection resistor RS and the measured element terminal AF as shown in the figure. It is provided. The connection point between the current detection resistor RS and the source terminal (S) of the switching element Q for current control and the non-inverting input terminal (+) of the forward constant current amplifier AMP are connected to each other. At the time of measurement of the measuring element DUT, a current feedback circuit for detecting a current flowing between the terminals AF and KF with the current detection resistor RS and feeding back the current to the forward constant current amplifier AMP is formed. The other configuration is the same as that of the prior art in that the current setting D /
An A converter CN1 is connected to an inverting input terminal (-) of the forward constant current amplifier circuit AMP, and an output terminal of the amplifier circuit AMP and a gate terminal (G) of the switching element Q.
Is connected. In addition, a forward voltage (V) of the device under test DUT is provided between a pair of terminals under test AS and KS provided opposite the device terminals under test AF and KF as in the related art.
A / D converter CN for VF measurement for measuring F)
2 are connected. The element under test KF is connected directly to the cathode side (-) of the DC power supply E as shown in the figure, without being grounded to the ground GND (E) as in the prior art. In the above configuration, a predetermined voltage is supplied from the DC power supply E of 12 to 24 V to the switching element Q for current control. And the current setting D / A converter C
A predetermined current is set by N1, and this current setting is supplied to the inverting input terminal (-) of the forward constant current amplifier circuit AMP, so that the amplifier circuit AMP operates and the output terminal of the amplifier circuit AMP A predetermined current is supplied to the gate terminal (G) of the switching element Q, and the switching element Q turns on. This allows the current detection resistor RS
→ A current flows through the path of the measured element terminal AF and the terminal A
A current flows through the device under test DUT inserted between F, KF, AS, and KS. In the above case, the current I flowing through the DUT is detected by the current detection resistor RS arranged on the anode side of the device under test DUT from the equation of VS = I × RS, and this is detected by the forward constant current amplifier circuit AMP. To the non-inverting input terminal (+). Thus, a current preset by the current setting D / A converter is always supplied to the DUT. Then, the forward voltage (VF) of the DUT is measured by the VF measurement A / D converter CN2 connected to the device terminals AS and KS to be measured in the same manner as in the related art. According to the present invention, as in the above embodiment, the current detection resistor RS and the ground earth GND (S) point of the housing and the like are connected from the conventional device terminal KF side to the device terminal A under test.
The terminal KF, AF
Is short-circuited for some reason, a current always flows through the current detection resistor RS.
Switching element Q for current control such as ET and element D to be measured
An uncontrollable current does not flow through the UT or the like, and their destruction can be effectively prevented. Next, with respect to an example that embodies the above embodiment,
This will be described with reference to FIGS. In FIG. 2, AC
A switching element Q, here M, is connected to the anode (+) side of a DC power supply output from a 100 V commercial power supply via a transformer T, a full-wave rectifier B and a smoothing capacitor C.
The drain terminal of the OS FET is connected. Between the gate (G) and the source (S) of the switching element Q, a zener diode ZD for protecting the G-S from an unexpectedly high noise voltage or the like and a gate resistor R1 are connected. A gate signal for controlling the forward current IF is transmitted to the gate terminal (G) from the pin a of the control board CB. One of the source terminals (S) of the switching element Q monitors the voltage on the high potential side of the IF detection and transmits the IF detection potential to the c-th pin of the control board CB. The other of the source terminals (S) of the switching element Q is connected to the input terminal of the IF detection resistor SH1, and the IF detection resistor SH1
1 is branched off, one of which is connected to the ground GND (S) of the housing and the control board B
It is connected to the C-th pin b (GND). The other end of the branched IF detection resistor SH1 on the exit side is VF /
It is connected to a pair of device terminals AF and KF via a VR measurement switching relay RY2. Device under test DUT
Is configured to be placed and in contact with the measured element terminals AF and KF every time measurement is performed. The terminal KF to be measured and the cathode terminal (-) of the DC power supply obtained through the full-wave rectifier B are directly connected to each other, and the current detection resistor RS as in the prior art shown in FIG. And not connected. Relay RY1 is D
A bypass circuit is formed to check the current flowing through the switching element Q when the UT is not mounted. However, the bypass circuit is normally open and not used. The other pair of DUT terminals A of the DUT
S and KS are pins d and e of the control board CB (V
F detection terminal). An inter-terminal protection resistor R3 is connected between the d-th and e-th pins. In the above circuit configuration, if the element terminal KF to be measured is grounded for some reason,
Even if it touches ND (S), the current detection resistor SH
1 flows through the switching elements Q and D
An uncontrollable large current does not flow through the UT, the control circuit section, and the like, and they do not lead to accidental destruction. In addition, the probability of contact with GND (S) is both the measured device terminals AF and KF in the prior art, whereas the measured device terminal AF is originally at the GND (S) potential in the present invention. Only the element terminal KF to be measured becomes a problem, and the probability is reduced by half. Next, referring to a schematic diagram of the control board CB of FIG. 3, a control circuit for constantly supplying a constant current to the DUT via the switching element Q, and the VUT of the DUT.
The outline of the F measurement circuit will be described. First, the current detection resistor SH
The detection current detected at 1 is input to the c-th pin of the control board CB. AMP from this pin c via resistor R4
1 non-inverting input terminal (+) and output as a non-inverting signal. On the other hand, the set current of the IF is input to the g-th pin. The value of the set current input from the g-th pin is input to the inverting terminal (-) of AMP2. And
The difference between AMP1 and AMP2 is the buffer A of the next stage.
MP3 is input to the non-inverting input terminal (+) via resistors R5 and R6, inverted and output by the buffer AMP3, and output to the next stage PNP via the base resistor R7.
The signal is sent to a complementary amplifier comprising a transistor Tr1 and an NPN transistor Tr2. The gate control signal amplified by the complementary amplifier is output to the pin a of the control board CB, and is fed back so that the switching element Q is controlled by the VGS voltage. As a result, the switching element Q is always turned on by a preset and constant current, and a constant current is supplied to the DUT. The outline of the VF measurement circuit of the DUT is as follows. A signal output from the measured device terminals AS and KS to the No. d and e pins of the control board CB via the relay RY3 is connected to the resistor R1.
Input to the inverting input terminal (-) and the non-inverting input terminal (+) of AMP4 via 0 and R11, guide the output from the AMP4 to the j-th pin of the control board CB, and measure and calculate VF. Note that these signal processing / procedures are not the gist of the present invention, and thus detailed description thereof will be omitted. FIG.
Although an example in which the above-described embodiment is further embodied has been described with reference to FIG. 3 and FIG. 3, according to this example, the position of the current detection resistor and the connection point of the housing ground GND (S) are changed. Accordingly, the switching element, the element to be measured, the control circuit, and the like, which have been a problem in the conventional technology, can be reliably protected from destruction due to an uncontrollable current. As described above, according to the present invention, the current detecting resistor RS and the ground earth GND (S) point of the housing and the like are connected from the conventional device terminal KF side to the device terminal MF. A
The terminal KF, AF
Even if is short-circuited for some reason, the current always flows through the current detection resistor RS.
An uncontrollable current does not flow through the current control switching element Q such as the transistor T, the transistor, or the device under test DUT, and the effect can be effectively prevented from destruction.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a diagram showing one embodiment of a characteristic test circuit for a semiconductor device of the present invention. FIG. 2 is a circuit diagram further embodying the above embodiment. FIG. 3 is a circuit diagram for explaining signal processing on a control board in the circuit. FIG. 4 is a diagram showing a conventional semiconductor element characteristic test circuit. [Explanation of Symbols] E DC power supply RS Current detection resistor AF, KF, AS, KS Device under test terminal DUT Device under test terminal GND (S) Casing ground earth Q Current control switching device I Current AMP Forward constant current amplifier Circuit CN1 Current setting D / A converter CN2 VF measurement A / D converter

Claims (1)

Claims: 1. A DC power supply for supplying a predetermined voltage to a current control switching element, and a DC power supply that operates with a current set by a D / A converter and supplies a predetermined current to the switching element. A direction constant current amplifier circuit, an element to be measured to which a predetermined current is supplied when the switching element is turned on by a current from the constant current amplifier circuit, and a current flowing through the element to be measured is detected. A current detection resistor which is fed back to a current amplifier circuit so that a constant current set by the D / A converter is supplied to the device under test, and an A which measures a forward voltage of the device under test when the current is supplied. A characteristic test circuit for a semiconductor device having a D / D converter and a current detection resistor. A ground earth point connected to the housing or the like for measures against electric shock is also provided on the anode terminal side, and even when the terminal to be measured is short-circuited, a constant current always flows through the current detection resistor, resulting in an uncontrollable current. A characteristic test circuit for a semiconductor element, wherein destruction of the switching element, the element to be measured, and the like is prevented.