JP2003163900A - Transport stream decoder and transport stream decoding method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a transport stream decoder that prevents data from being missing and allows a CPU to read a section even when designated sections are consecutively transmitted. <P>SOLUTION: A section discriminator 14 discriminates whether or not a transport packet outputted from a PID (Packet ID) filter 11 includes a section designated from data of a head part including a table ID of the section, and stores the result of discrimination to a tag register 15 and a descriptor register 23. A transfer data counter 19 counts a data amount of a transport packet and the tag register 15, and a DMA (Direct Memory Access) 21 allows a changeover device 20 to transfer the transport packet with an output of the tag register 15 attached thereto to a RAM 27 on the basis of the count. <P>COPYRIGHT: (C)2003,JPO

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a transport stream decoding device and a transport stream decoding method, and more particularly, to a fixed stream packet transport stream decoding method that can cope with some transmission errors.

[0002]

2. Description of the Related Art Conventionally, in a transport stream decoding apparatus, as shown in FIG. 11, a transmission path code decoder 31, a PID (packet ID) filter 32, a clock recovery synchronization detecting section 33, and a filter passing designation. The register 34, the section former 35, and the FIFO (Firs
t In First Out) 36, 37 and RAM
(Random access memory) interface 38, R
AM 39, 44, 45, CPU (Central Processing Unit) interface 40, MPEG (Moving Pict)
ure Experts Group) Video Decoder 4
1, an MPEG audio decoder 42, and a CPU 43
And an interrupt controller 46.

The clock reproduction synchronization detection unit 33 is a transport stream (TS: Transport Stream).
The sync position of the clock and the transport packet is detected from am). The PID filter 32 selects transport packets by PID. The section forming unit 35 forms a specified section of the transport packet output from the PID filter 32 from the data of the head portion including the table ID of the section.

The RAM interface 38 controls the RAM 39 which stores the section whose formation has been completed. C
The PU interface 40 is an interface for the CPU 43 to read an interrupt signal indicating the end of section formation and the formed section.

In the above operation of the transport stream decoding apparatus, every time a section of the designated table ID is formed, an interrupt requesting its take-up occurs, and the CP
U43 must read the section. The transport stream allows multiple different sections to be multiplexed into transport packets with the same PID.

[0006]

However, in the above-described conventional transport stream decoding apparatus, when the designated section is multiplexed in the transport packet of the same PID, an interrupt occurs at short intervals. There is a problem that the reading of data by the CPU may not be completed.

Therefore, an object of the present invention is to solve the above-mentioned problems, and even when a designated section is continuously transmitted, a transport stream in which the CPU can read the section without missing data. It is to provide a decoding device and a transport stream decoding method.

[0008]

A transport stream decoding device according to the present invention comprises a clock reproduction synchronization detecting means for detecting a clock and a synchronization position of the transport packet from a transport stream, and the transport identification using packet identification information. PID for selecting packets
What is claimed is: 1. A transport stream decoding device comprising: a filter; means for storing a transport packet containing video data for time-axis conversion; and means for storing a transport packet containing audio data and time-axis conversion. Section determining means for determining whether or not the transport packet output from the PID filter includes a specified section from the data of the head portion that also includes the table ID of the section, and a tag for storing the determination information of the section determining means. Register, a transfer data counter that counts the amount of data in the transport packet and the tag register, means for storing the transport packet and performing time axis conversion, and the time axis converted transport packet Add the output of the tag register Comprises means, storage means for storing an output of said adding means, and transfer means for transferring defining a destination of the output of said adding means in said storage means based on the count value of the transfer data counter.

A transport stream decoding method according to the present invention comprises a clock reproduction synchronization detecting means for detecting a clock and a synchronization position of the transport packet from a transport stream, and a PID filter for selecting the transport packet by packet identification information. And a transport stream decoding method for a transport stream decoding device, including means for storing a transport packet including video data and performing time-axis conversion, and means for storing a transport packet including audio data and performing time-axis conversion And a step of determining whether or not the transport packet output from the PID filter includes a specified section from the data of the head portion that also includes the table ID of the section, and the determination information is stored in the tag register. Storage A step of storing the transport packet and performing time axis conversion, adding the output of the tag register to the time axis converted transport packet, the transport packet and the tag register The step of deciding a transfer destination in the storage means for accumulating the transport packet to which the output of the tag register is added based on the count value and the count value and transferring.

That is, the transport stream decoding apparatus according to the present invention comprises a transport stream (TS: T
It has a clock reproduction synchronization detection that detects the clock and the synchronization position of the transport packet from the transport stream, and a PID filter that selects the transport packet by PID (packet ID).

Further, the transport stream decoding apparatus of the present invention determines whether or not the transport packet output from the PID filter includes the section specified from the data of the head portion which also includes the table ID of the section. A section determiner, a tag register that stores this determination information, and a FIFO (First In) that stores transport packets and performs time-axis conversion.
First Out), a FIFO for storing transport packets including video data and time-axis conversion, and a FIFO for storing transport packets including audio data and time-axis conversion.

Further, the transport stream decoding apparatus of the present invention counts the filter pass designation register for storing the information designating the passage of the PID filter and section determiner, and the data amount of the transport packet and the tag register. A transfer data counter and a DMA (Dir) that determines and transfers a transfer destination based on this count value.
ect Memory Access), a switcher that switches between the transport packet output from the FIFO and the output of the tag register, and a descriptor register that stores the determination information of the section determiner.

As described above, since the transport stream decoding apparatus of the present invention has the tag register, the conventional RAM for storing the section table after the section formation is unnecessary. Further, in the transport decoding device of the present invention, the CPU continuously reads the sections even if the designated section is multiplexed in the transport packet of the same PID by the management information by the descriptor and the tag other than the transport packet. Therefore, it is possible to solve the problem that the CPU does not complete the reading of data due to the occurrence of an interrupt at short intervals.

[0014]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is a block diagram showing the configuration of a transport stream decoding device according to an embodiment of the present invention. In FIG. 1, a transport stream decoding apparatus according to an exemplary embodiment of the present invention uses a PID (packet I
D) a filter 11, a clock recovery synchronization detector 12,
Filter pass designation register 13 and section determiner 1
4, the register 15 for tags, and the FIFO (First
In First Out 16 to 18, a transfer data counter 19, a switch 20, and a DMA (Direct).
Memory Access (CPU) 21, CPU (Central Processing Unit) interface 22, descriptor register 23, MPEG (Moving Picture)
e Experts Group) Video Decoder 24
An MPEG audio decoder 25, a CPU 26,
It is composed of RAMs (random access memories) 27 and 28 and an interrupt controller 29.

The clock reproduction synchronization detector 12 detects the clock and the synchronization position of the transport packet from the transport stream. PID filter 11 is PID
Select the transport packet with.

The section determiner 14 determines whether or not the transport packet output from the PID filter 11 includes a designated section from the data of the head portion which also includes the table ID of the section. The tag register 15 stores this determination information.

The FIFO 16 stores the transport packet and converts it on the time axis. The FIFO 17 stores a transport packet including video data and performs time-axis conversion. The FIFO 18 stores a transport packet containing audio data and performs time-axis conversion.

The filter passage designation register 13 stores information designating passage of the PID filter 11 and the section determiner 14. The transfer data counter 19 counts the transport packet and the data amount of the tag register 15. The DMA 21 determines a transfer destination based on this count value and transfers the transfer destination.

The switch 20 switches between the transport packet output from the FIFO 16 and the output of the tag register 15. The descriptor register 23 stores the determination information of the section determiner 14.

FIG. 2 is a RAM managed by the CPU 26 of FIG.
FIG. 3 is a diagram showing a data structure to be written on 27, and FIG.
5 is a diagram showing the structure of the descriptor area in the data structure of FIG. 4, FIG. 4 is a diagram showing the structure of the data area in the data structure of FIG. 2, and FIG. 5 is a diagram showing the structure of the tags of the data area of FIG. Is.

FIG. 6 is a diagram showing a concept of multiplexing by a transport stream according to an embodiment of the present invention, and FIG. 7 is a diagram showing a relationship between an elementary stream and a transport stream according to an embodiment of the present invention. FIG. 8 is a diagram showing the relationship between sections and transport streams according to an embodiment of the present invention. The operation of the transport decoding apparatus according to the embodiment of the present invention will be described with reference to FIGS.

First, an outline of the transport stream will be described. Transport stream is MP
EG2 system (ISO / IEC DIS 13818
It is one of the packet multiplexing methods defined in -1). T
Packets are multiplexed using fixed length packets of 188 bytes called S packets.

The TS packet has a 4-byte header, a sync byte (47h), a transport error,
Indicator, payload unit start indicator, transport priority, PID (packet identifier)
Transport scramble control, adaptation field control and continuity index are included in the header. The remaining 184 bytes are payload and adaptation.
It becomes a field.

TS packets are distinguished from each other by PID, and it is determined whether the payload is video, audio, or other data. Adaptation ·
The field has a function of transmitting and stuffing information such as a program clock reference (PCR) which is a system clock of a program. From the payload, in addition to the video and audio data that make up the program, PSI (Program Specific) indicating the configuration of a plurality of programs (which PID is the video of which program, etc.)
A table called Information is also transmitted (see FIG. 6).

The video and audio data in the payload is
Streams that are only compressed by MPEG (called elementary streams) are PES (Packetized)
It is packetized into a packet called Elementary Stream (see FIG. 7). PSI and other data are packetized in a table called a section (see FIG. 8).

TS including PES and beginning of section
In the packet, the payload unit start indicator of the header is valid and indicates that it includes the beginning. P
In ES, multiple PEs are included in the payload of one TS packet.
It does not allow S to exist, but allows multiple sections to exist in a section. The pointer indicates the position of the first section (see FIG. 8).

In one embodiment of the present invention, the tag register 15 is used.
By having the above, the conventional RAM for storing the section table after the section formation is unnecessary.

9 and 10 are flowcharts showing the operation of the transport stream decoding apparatus according to the embodiment of the present invention. The operation of the transport stream decoding apparatus according to the embodiment of the present invention will be described with reference to FIGS.

As shown in FIG. 1, the clock recovery synchronization detector 12 detects the clock and the synchronization position of the transport packet from the transport stream (step S1 in FIG. 9). The detected synchronization position is the PID filter 11
And section determiner 14.

The PID filter 11 matches the packet ID obtained from the synchronization position with one of the plurality of packet IDs indicated by the filter passing designation register 13
A transport packet having D is selected (step S2 in FIG. 9).

The transport packet that has passed through the PID filter 11 is sent to the section determiner 14 and the FIFO 16.
, And the FIFO 16 stores the transport packet and performs time-axis conversion (step S3 in FIG. 9).

Further, among the transport packets that have passed through the PID filter 11, the transport packet containing the video elementary stream is input to the FIFO 17, and the transport packet containing the video data is FI.
The image is stored in the FO 17, the time axis is converted, and the image is decoded by the MPEG video decoder 24 (step S in FIG. 9).
4).

Further, among the transport packets that have passed through the PID filter 11, the transport packet including the voice elementary stream is input to the FIFO 18, and the transport packet including the voice data is F.
The audio data is stored in the IFO 18, the time axis is converted, and the audio is decoded by the MPEG audio decoder 25 (step S5 in FIG. 9).

The section determiner 14 detects a transport packet in which the section in the payload matches the data at the beginning including the table ID indicated by the filter pass designation register 13 (step S6 in FIG. 9).

The tag register 15 stores the data string shown in FIG. The length of the data output from the tag register 15 is a fixed length, and together with the transport packet length 188, has a length that is an integral multiple of the cache line of the CPU 26. This means that, as shown in FIG. 4, the start positions of the transport packets are evenly spaced and aligned with the cache line. The dummy at the beginning of the tag area is meaningless data. The flag indicates that the payload contains the matched section.

If the payload does not include the specified section (step S7 in FIG. 10), the section determiner 14 writes "false" in the flag and does not write the subsequent PID, section ID, offset, and link ( Figure 10
Step S8).

If the payload includes the specified section (step S7 in FIG. 10), the section determiner 1
4 writes "true" in the flag (step S9 in FIG. 10).
Then, the section ID of the section included in the section determiner 14 and the number of bytes from the start position of the transport packet to the start position of the section are written in the offset (step S10 in FIG. 10).

The different section I specified for the link
Information is written indicating whether a section with D exists. There are three types of this information: "does not include next specified section", "include next specified section", and "determining next specified section". "Determination of next specified section" occurs when the section spans two transport packets. "Include the specified section" is followed by the section ID, offset, and link, and is repeated until "The specified section is not included". The data after this is invalid data.

The switching unit 20 carries out a data switching operation so that the output of the tag register 15 is added after the output of the FIFO 16 which stores the transport packet and performs time-axis conversion (step S11 in FIG. 10).

The transfer data counter 19 counts the transport packet and the data amount of the tag register 15, the DMA 21 determines the transfer destination based on this count value, and the RAM 27 managed by the CPU 26 stores the data area shown in FIG. The transport packet and the tag are transferred to and written in (step S12 in FIG. 10).

The bank has three areas # 0, # 1 and # 2, one of which is a reading area of the CPU 26, another one is a writing area of the DMA 21, and another area is D.
It is a write reserve area of the MA 21. When the writing of the write area of the DMA 21 is completed, the completion of the writing is notified to the CPU 26, the writing is moved to the write reserve area, and the previous write area becomes the read area.

As a result, even when the designated section is multiplexed in the transport packet having the same packet ID, the CPU 26 can continuously read the section, and interrupts are generated at short intervals as in the prior art. It is possible to solve the problem that the case where the data reading by the CPU 26 is not completed occurs.

The flag, PID, and address shown in FIG. 3 are written from the section determiner 14 into the descriptor register 23. The flag is information indicating whether a transport packet including the beginning of the designated section is included in the data area shown in FIG. 2, the PID is the packet ID of the transport packet, and the address is from the beginning of the data area shown in FIG. Is information indicating the offset of.

Further, since the position of the section can be easily obtained from the descriptor and the tag, if the section which is expected to be needed is designated by the filter pass designation register 13, the section is designated after the need arises. The section can be obtained from the data on the RAM 27 without doing so.

As described above, in the present embodiment, even if the designated section is multiplexed into the transport packet of the same PID by the management information by the descriptor and the tag other than the transport packet, the CPU 2
It is possible to solve the problem that the section 6 can continuously read the section, an interrupt occurs at a short interval, and the CPU 26 does not complete reading the data, which is the case in the related art.

If the dummy in the head area of the tag has a data size such that the flag aligns with the cache line of the CPU 26, the CPU 26 having the cache system can access the flag faster, so the amount of dummy It is possible to speed up the processing of the CPU 26 by adjusting the.

[0047]

As described above, according to the present invention, the clock reproduction synchronization detecting means for detecting the clock and the synchronization position of the transport packet from the transport stream, and the PID for selecting the transport packet by the packet identification information. In a transport stream decoding device including a filter, means for storing transport packets containing video data and time-axis conversion, and means for storing transport packets containing audio data and time-axis conversion It is determined whether the specified transport section is included in the output transport packet, which includes the table ID of the section, and the determination information is stored in the tag register, and the transport packet is stored. Time axis conversion,
The output of the tag register is added to the transport packet whose time axis has been converted, and the transport packet to which the output of the tag register is added is added based on the count value of the transport packet and the data amount of the tag register. By determining the transfer destination in the storage means for storing and transferring the data, even if the specified section is continuously transmitted, the data is not lost and the CPU
Has the effect that the section can be read.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of a transport stream decoding device according to an embodiment of the present invention.

FIG. 2 is a diagram showing a data structure to be written in a RAM managed by the CPU of FIG.

FIG. 3 is a diagram showing a structure of a descriptor area in the data structure of FIG.

FIG. 4 is a diagram showing a structure of a data area in the data structure of FIG.

5 is a diagram showing the structure of a tag in the data area of FIG.

FIG. 6 is a diagram showing a concept of multiplexing by a transport stream according to an embodiment of the present invention.

FIG. 7 is a diagram showing a relationship between an elementary stream and a transport stream according to an embodiment of the present invention.

FIG. 8 is a diagram showing a relationship between a section and a transport stream according to an embodiment of the present invention.

FIG. 9 is a flowchart showing an operation of the transport stream decoding device according to the embodiment of the present invention.

FIG. 10 is a flowchart showing an operation of the transport stream decoding device according to the embodiment of the present invention.

FIG. 11 is a block diagram showing a configuration of a conventional transport stream decoding device.

[Explanation of symbols]

11 PID filter 12 Clock recovery synchronization detector 13 Filter pass designation register 14 section judge 15 Tag register 16-18 FIFO 19 Transfer data counter 20 switch 21 DMA 22 CPU interface 23 Descriptor register 24 MPEG video decoder 25 MPEG Audio Decoder 26 CPU 27,28 RAM 29 Interrupt controller

Continued front page    F-term (reference) 5C052 CC11 GA07 GE05 GF01                 5C053 GA07 GA11 GB37 JA07 JA21                       JA26 KA08                 5C059 MA00 RB10 RC01 RC02 RC03                       RC04 SS02 UA05 UA09 UA30                       UA34                 5C063 AB03 AB07 CA11 CA16

Claims (10)

[Claims] 1. A clock reproduction synchronization detecting means for detecting a clock and a synchronization position of the transport packet from a transport stream, and a PID filter for selecting the transport packet by packet identification information.
What is claimed is: 1. A transport stream decoding device comprising: means for storing a transport packet containing video data for time-axis conversion; and means for storing a transport packet containing audio data and time-axis conversion. Section determining means for determining whether the output transport packet includes a specified section from the data of the head portion that also includes the table ID of the section, and a tag register for storing the determination information of the section determining means. A transfer data counter that counts the transport packet and the amount of data in the tag register, a unit that stores the transport packet and performs time-axis conversion, and the time-axis-converted transport packet for the tag Adding means to add the output of the register, A transport means for storing the output of the adding means, and a transfer means for determining a transfer destination of the output of the adding means in the storage means based on the count value of the transfer data counter and transferring the transfer destination. Stream decoding device. 2. The transport stream according to claim 1, wherein the storage means includes at least a read area of the central processing unit, a write area of the transfer means, and a write reserve area of the transfer means. Decoding device. 3. The transfer means notifies the central processing unit of the end of writing when writing to the write area of the storage means is finished, and shifts to writing to the write reserve area of the storage means. The transport stream decoding device according to claim 2, wherein the writing area is the reading area. 4. The filter pass designation register, comprising: a filter pass designation register that stores information that designates passage of the PID filter and the section determination means; and a descriptor register that stores determination information of the section determination means. 4. The transport stream decoding device according to claim 1, wherein the position of the section designated by is determined from the contents of the descriptor register and the contents of the tag register. 5. The addition means switches the output of the means for time-axis conversion of the transport packet and the output of the tag register to output the tag register to the time-axis converted transport packet. Claims 1 to 4 are characterized in that
5. The transport stream decoding device according to any one of 1. 6. A clock reproduction synchronization detecting means for detecting a clock and a synchronization position of the transport packet from a transport stream, and a PID filter for selecting the transport packet based on packet identification information.
A transport stream decoding method for a transport stream decoding device, comprising: means for storing a transport packet containing video data for time-axis conversion; and means for storing a transport packet containing audio data and time-axis conversion. The table ID of the section in the transport packet output from the PID filter.
A step of determining whether the specified section is included from the data of the beginning part including the following, a step of storing the determination information in a tag register, and a step of storing the transport packet and performing time axis conversion. Adding the output of the tag register to the transport packet whose time axis has been converted, and adding the output of the tag register based on the count value of the transport packet and the data amount of the tag register. And a transfer destination in a storage unit that stores the transferred transport packet, and the transfer is performed. 7. The transport stream according to claim 6, wherein the storage means includes at least a read area of the central processing unit, a write area of the transfer means, and a write spare area of the transfer means. Decryption method. 8. The step of deciding and transferring the transfer destination notifies the central processing unit of the end of writing when the writing to the writing area of the storage means is finished,
8. The transport stream decoding method according to claim 7, wherein the writing area is set as the reading area by shifting to writing to the writing spare area of the storage unit. 9. The position of a section designated by a filter pass designation register storing information designating passage of the PID filter and the section discriminating means, the contents of a descriptor register storing the discrimination information and the tag 9. The transport stream decoding method according to claim 6, wherein the transport stream decoding method is obtained from the contents of a register. 10. The step of adding the output of the tag register to the time-axis converted transport packet is configured to switch between the time-axis converted transport packet and the output of the tag register. 10. The transport stream decoding method according to any one of claims 6 to 9.