JP2003149625A - Liquid crystal display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enable prescribed work for a vertical retrace line interval by generating a signal showing a pseudo-scanning period. SOLUTION: A liquid crystal display device is characterized in that it is provided with a means for counting the length of the vertical retrace line interval, a means for detecting the beginning of the vertical retrace line interval, a means for generating a signal showing a pseudo-scanning period on the basis of an output of the means for detecting the beginning of the vertical retrace line interval, and a means for giving a prescribed signal to a liquid crystal cell drive circuit by judging a prescribed timing from the means for counting the length of the retrace line interval on the basis of an output of the mean for generating the signal showing the pseudo-scanning period.

Description

Detailed Description of the Invention

[0001]

TECHNICAL FIELD The present invention relates to a liquid crystal display device suitable for an active matrix.

[0002]

2. Description of the Related Art Conventionally, in liquid crystal display devices, various measures have been taken to improve image quality, as disclosed in Japanese Patent Application Laid-Open No. 5-6151. Among them, when driving a liquid crystal cell having a switching element for each pixel called an active matrix type, if a voltage is applied during the scanning time, the display is maintained by the voltage holding effect after that, so how voltage is applied during scanning. A big problem is whether to apply and what kind of voltage to apply.

[0003]

Therefore, in applying a voltage during scanning, various measures are taken to extend the application time, and a plurality of voltage values are used for the applied voltage. However, for these purposes, it is not enough to perform signal processing only during line-sequential scanning, and processing is also required at a predetermined timing in the vertical blanking period.

[0004]

According to another aspect of the present invention, a liquid crystal display device has means for counting the length of a vertical blanking period and detection for entering a vertical blanking period. Means and means for generating a signal indicating a pseudo scanning period by the output of the means for detecting that the vertical blanking period has been entered,
A means for counting the length of the blanking period on the basis of the output of the means for generating the signal indicating the pseudo scanning period, for determining a predetermined timing, and applying a predetermined signal to the liquid crystal cell drive circuit. It is characterized by

In the liquid crystal display device of the present invention, as described in claim 2, the means for giving the predetermined signal is a pre-charge gradation for the electrode of the liquid crystal cell of the scan first performed on the screen. It is characterized in that the liquid crystal cell drive circuit is operated so as to apply a voltage having a substantially intermediate value.

A liquid crystal display device according to the present invention is characterized by claim 3.
As described in 1), the means for generating the signal indicating the pseudo scanning period counts the length of the signal indicating the scanning period.
One counting means and the counting means are alternately used to determine the state of the signal indicating the scanning period after the predetermined counting, thereby determining the missing of the signal indicating the scanning period, and the missing of the signal indicating the scanning period, It is characterized in that a signal indicating the pseudo scanning period is generated based on the count values of the two counting means.

[0007]

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a block diagram of a liquid crystal display device according to an embodiment of the present invention, in which 10 is an active matrix type liquid crystal cell, which has an active element such as a-SiTFT for each pixel and is provided between substrates. Holds the liquid crystal layer. The liquid crystal cell 10 is connected to a liquid crystal cell drive circuit including a scanning circuit 11 connected to a gate electrode group and a signal circuit 12 connected to a source electrode group.

Reference numeral 2 monitors the signal DE indicating the scanning period from the receiving units 3 and 4 which receive data signals and timing signals from devices such as personal computers and word processors, and signals obtained through the control means 6 as necessary. The receiving unit 3,
Although 4 may be a simple terminal or a buffer, it may be a circuit including a waveform shaping circuit or an error correction circuit, or an I / O port. Reference numeral 5 is a means for generating a signal RD indicating a pseudo scanning period due to the lack of a signal indicating the scanning period of the means 2 for monitoring the signal DE indicating the scanning period. Reference numeral 6 denotes a gate electrode group which reproduces a data signal or various control signals as needed from a signal obtained from a device such as a personal computer or a word processor through the receivers 3 and 4, or generates a new control signal. It is a control means for outputting these data signals and various control signals to the liquid crystal cell drive circuit composed of the scanning circuit 11 connected to and the signal circuit 12 connected to the source electrode group.

The control means 6 applies a predetermined signal to the liquid crystal cell drive circuit based on the signal indicating the pseudo scanning period to count the length of the vertical blanking period, or to determine a predetermined timing to determine the liquid crystal. It is provided with a means for giving a predetermined signal to the cell driving circuit, a storage means 63 for storing a voltage signal of an intermediate value of gradation, and the like. It should be noted that the control means 6 is not explicitly independent of hardware, and is a single integrated circuit device together with the means 2 for monitoring the signal DE indicating the scanning period and the means 5 for generating the signal indicating the pseudo scanning period. Preferably it is incorporated in 13.

In these configurations, the means 2 for monitoring the signal DE indicating the scanning period and the means 5 for generating the signal indicating the pseudo scanning period are configured as shown in FIG. 2, for example. First, two counting means for counting the length of the signal indicating the scanning period, specifically, counters 21 and 22 having gates (G) at the front and back, and the counting means are alternately used to scan the scanning period after the predetermined counting. Means for determining the lack of the signal indicating the scanning period by determining the state of the signal shown, specifically, a register 23 for storing a predetermined numerical value and a coincidence determination circuit 24 are provided. The counters 21 and 22 respond to the flip-flop 25 in response to the rising edge of the signal DE indicating the scanning period, and how much dot clock (XCLK) is present within the period of the signal indicating the scanning period (for example, the display driver of the device). Is set to 512), and the coincidence determination circuit 24 outputs when the counting result exceeds 768, for example.

Further, in these configurations, a means for generating a signal indicating a pseudo scanning period due to a lack of a signal indicating a scanning period, specifically, a calculator 51 and a counter 52 consisting of a self-reset type preset counter. From a function output buffer (for example, a selector port), which outputs a signal indicating a scanning period, a signal indicating a pseudo scanning period, and a signal indicating a generation period of a signal indicating the pseudo scanning period while shaping the waveform as necessary. When the signal indicating the scanning period is missing, the calculator 51 calculates the time difference from the determination time to the break time corresponding to the scanning time, and the dot clock (XCL
K) from the counter 52 by the counter 52,
The timing of the pseudo scanning period is obtained by counting and resetting based on the count value of the dot clock (XCLK) indicating the original scanning time remaining in any of 22.

The operation of the liquid crystal display device having such a structure will be described. First, power and various signals are obtained from the device when the device is turned on, but the counter 61 of the control means 6 counts the length of the vertical blanking period from the lack of the vertical blanking signal or the signal DE indicating the scanning period, The length of the vertical blanking period is, for example, the number (number) n of signals DE indicating the scanning period, and the value is stored in the vertical period register 62. In the above-described configuration, the means 2 for monitoring the signal DE indicating the scanning period determines the lack of the signal indicating the scanning period, and is also means for detecting that the vertical blanking period has started.

Referring to FIG. 3, a signal DE indicating a scanning period obtained from a device or obtained by performing signal processing thereafter indicates an effective pixel signal (data) transmission period for each scanning line. In the H-level period 3a, each scanning (line) pixel signal is transmitted in synchronization with the dot clock. The flip-flop 25 responds to the rising edge of the signal DE indicating this scanning period, outputs the waveform as shown in FIG. 3b at the output Q and the inverted waveform at the output Q bar, and the signal causes the gates (G ) Alternately opens and closes, and the counter is reset at the moment when the specified gate is opened, and the length of the signal DE indicating the scanning period is counted by the dot clock (XCLK). For example, if resetting occurs at the rising edge and the gate (G) opens at the H level, the counters 21 and 22 alternately count at the arrow portions as shown in FIGS. 3c and 3d, so the so-called display period (other than the vertical blanking period) ), The counters 21 and 22 basically count 512 in the above example and switch to the counter of the other party. If necessary, the contents of these two counters 21 and 22 at the end of counting may be compared, and may be used for correction of clock misalignment or error correction.

Since the signal DE indicating the scanning period is not inverted in the vertical blanking period, the counter 22 continues counting, for example, in the example of FIG. 3d, which is monitored by the coincidence determination circuit 24 by the gate G in the subsequent stage. Therefore, when the number 768 stored in the register 23 is reached, the output of the coincidence determination circuit 24 is inverted (FIG. 3e). That is, the missing of the signal indicating the scanning period is determined by alternately using the counting means, and by setting the number of the register 23 as a predetermined number, it is determined that it is the vertical blanking period. At this time, if a signal indicating the pseudo scanning period is immediately generated, it means that the position of the original 512 dot clock is deviated. Therefore, the selector 27 reads the count value 512 of the signal DE indicating the original scanning period from the counter 22 which has stopped counting, and outputs the signal DE indicating the original scanning period.
The computing unit 51 computes the position of.

For example, a counter 21 counting 768
Signal D indicating the original scanning period with reference to the start of counting
The positions of E are 512, 1024, 1536, 2048 ...
Since the signal indicating the original scanning period should be generated at that timing, the counter 52 is preset so that the signal indicating the pseudo scanning period can be started 256 clocks after 768 which is currently being counted. At the same time, the inverted output of the coincidence determination circuit 24 opens the gate G of the counter 52, so that the counter 52 counts up to a preset value. As shown in FIG. 3f, the logical sum output MDE of the signal DE indicating the scanning period of the output stage 53 and the signal indicating the pseudo scanning period is constant only when the first one waveform in which the signal DE indicating the scanning period is omitted is missing. Can maintain pulses at intervals of.

Therefore, in the control means 6, capacitive coupling drive is performed at the gate output of the final line from the output e of the coincidence determination circuit 24 and the signal indicating the pseudo scanning period, for example, as shown in FIG. 3g. In this case, the voltage correction of the final line can be performed at exactly the same timing t as the other lines. In addition, the length n of the vertical blanking period previously counted
Based on the above, it is possible to generate a scan start and scan data so as to apply the precharge to the liquid crystal cell 10 before the end of the vertical blanking period. The example of FIG. 3h shows a data set in the case where a predetermined signal is given to the liquid crystal cell drive circuit two scans before (n-1) and n before the start of scanning. In this case, if data of 256 gradations is handled, black data is considered good from the viewpoint of precharge, but the actual image signal of the first scanning line has not arrived at this point and the image signal has not arrived. Since it is unknown whether the data is close to white or close to black, rather than handling the black data, the scanning performed at the beginning of the screen (approx. It is preferable to operate the liquid crystal cell drive circuit so as to apply a voltage having an intermediate value of gradation to the electrode of the liquid crystal cell 10 on the scanning line. However, the data may be read in advance and used, or predicted from the previous screen and used for precharge.

[0017]

As described above, according to the present invention, since a signal indicating a pseudo scanning period is also generated in the vertical blanking period,
It is easy to get the desired timing in the vertical blanking period,
The display quality of the liquid crystal cell display can be maintained high.

[Brief description of drawings]

FIG. 1 is a block diagram of a liquid crystal display device according to an embodiment of the present invention.

FIG. 2 is a block diagram of a main part of FIG.

FIG. 3 is an explanatory diagram of a state of FIG.

[Explanation of symbols]

10 Liquid crystal cell 11 scanning circuit 12 signal circuit 2 Means for monitoring the signal indicating the scanning period 5 Means for generating a signal indicating a pseudo scanning period 6 Control means

   ─────────────────────────────────────────────────── ─── Continued front page    (72) Inventor Satoru Hiraga             3-201 Minamiyoshikata, Tottori City, Tottori Prefecture Tottori             Sanyo Electric Co., Ltd. (72) Inventor Yutaka Nojiri             3-201 Minamiyoshikata, Tottori City, Tottori Prefecture Tottori             Sanyo Electric Co., Ltd. (72) Inventor Kazuki Asai             3-201 Minamiyoshikata, Tottori City, Tottori Prefecture Tottori             Sanyo Electric Co., Ltd. F-term (reference) 2H093 NA16 NA43 NB25 NC16 NC25                       NC27 NC28 NC34 NC49 ND33                       ND34                 5C006 AC24 AF59 AF71 AF73 BB16                       BC03 BF22 FA16                 5C080 AA10 BB05 DD01 FF11 FF12                       JJ02

Claims (3)

[Claims] 1. A means for counting the length of a vertical blanking period,
A means for detecting that the vertical blanking period has been entered, a means for generating a signal indicating the pseudo scanning period by the output of the means for detecting that the vertical blanking period has been entered, and a signal indicating the pseudo scanning period. A liquid crystal display device comprising: means for counting the length of the blanking period based on the output of the generating means to determine a predetermined timing and to apply a predetermined signal to the liquid crystal cell drive circuit. . 2. The liquid crystal cell drive circuit is configured so that the means for applying the predetermined signal applies a voltage of a substantially intermediate value of gradation as a precharge to the electrode of the liquid crystal cell in the scan performed first in the screen. The liquid crystal display device according to claim 1, wherein the liquid crystal display device is made to work. 3. The means for generating a signal indicating the pseudo scanning period comprises two counting means for counting the length of the signal indicating the scanning period and the scanning period after the predetermined counting by alternately using the counting means. Is determined to determine the lack of the signal indicating the scanning period, and the lack of the signal indicating the scanning period generates a signal indicating the pseudo scanning period based on the count values of the two counting means. The liquid crystal display device according to claim 1, wherein the liquid crystal display device is provided.