JP2003134817A - Power supply - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a resonance type power supply capable of attaining high efficiency and low noise. SOLUTION: The dead time for switching devices FET1 and FET2 can be switched between a long dead time and a short dead time, by turning on and off a photocoupler PC2 by means of an output control circuit 3. When a target output value for a load 1 detected by an output-detecting circuit 2 is higher than a prescribed value, a switching control drive circuit 4 shortens the dead time for the switching devices FET1 and FET2 by turning on the photocoupler PC2 to perform zero-voltage switching; and when the target output value is lower than the prescribed value, the switching control drive circuit 4 lengthens the dead time for the switching devices FET1 and FET2 by switching off the photocoupler PC2. A switching cycle for the switching devices FET1 and FET2 is changed via a photocoupler PC1 in respective cases.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a power supply device capable of outputting a large current suitable for charging a battery pack for tools.

[0002]

2. Description of the Related Art Conventionally, in a power supply device capable of outputting a large current suitable for charging a battery pack for tools, a forward type circuit system is generally used as a circuit system for converting a DC voltage into an AC voltage. The control is performed by PWM control with a fixed switching frequency, and when the output is small, the ON width of the PWM control can be made as small as possible, and it is not necessary to perform complicated control.

[0003]

In recent years, a resonance type power source has come out for downsizing of a power source device. However, when the output control area becomes wider, there are control areas where the resonance condition cannot be satisfied. This is because the range where resonance can occur is determined by the current flowing in the transformer, the resonance capacitor, the resonance inductor, the power supply voltage, the dead time, etc., but as the output becomes smaller, the current flowing in the transformer also becomes smaller, and the resonance energy is insufficient, and it remains as is. This is because they cannot resonate. Such a resonance type power source has a sufficient merit when used as a power source having a constant output. However, when used as a power supply with a wide output region, there is a problem that when the output is large, the loss of the switching element is small and the noise is small, but when the output is small, both the loss and the noise of the switching element are large.

The present invention has been made in view of the above circumstances, and an object thereof is to provide a resonance type power supply device with high efficiency and low noise.

[0005]

According to a first aspect of the present invention, there is provided a resonance type inverter section comprising two switching elements and a resonance capacitor for converting a DC input into a high frequency output by alternately turning on / off the switching elements. When,
A rectifying unit that rectifies the high-frequency output of the resonant inverter unit, a smoothing unit that smoothes the rectified output of the rectifying unit and supplies the load, an output detection circuit that detects information about the output that is supplied to the load, and the inverter Feedback control is performed so that the output information has a target output value by changing the switching frequency of the switching element of the switching unit, and the switching element of the inverter unit when the target output value is higher than a predetermined value. And a drive circuit for reducing the switching frequency by setting the dead time period of the inverter unit to a short constant value and setting the target output value lower than a predetermined value to set the dead time period of the switching element of the inverter unit to a long constant value. It is characterized by being provided.

According to a second aspect of the present invention, there is provided a resonance type inverter unit comprising two switching elements and a resonance capacitor for converting a DC input into a high frequency output by alternately turning on / off the switching elements, and the resonance type inverter. Section for rectifying the high frequency output of the section, a smoothing section for smoothing the rectified output of the rectifying section and supplying it to the load, an output detection circuit for detecting information on the output supplied to the load, and a switching element for the inverter section. Feedback control is performed so that the output information becomes a target output value by changing the switching frequency of, and when the target output value is higher than a predetermined value, the dead time period of the switching element of the inverter unit Is a short constant value, and when the target output value is lower than a predetermined value, the switching element of the inverter section While maintaining the ON period constant, characterized in that it comprises a drive circuit to reduce the and the switching frequency and longer value the dead time period.

The invention of claim 3 is characterized in that, in the invention of claim 1 or 2, the load is a constant voltage load.

The invention of claim 4 is characterized in that, in the invention of claim 1 or 2, the load is a secondary battery.

According to a fifth aspect of the invention, in the first or second aspect of the invention, the target output value is a voltage value.

The invention of claim 6 is characterized in that, in the invention of claim 1 or 2, the target output value is a current value.

A seventh aspect of the present invention is characterized in that, in any one of the first to sixth aspects, the inverter section is a two-stone push-pull resonance circuit.

According to an eighth aspect of the present invention, in any one of the first to seventh aspects, a load information detecting section for detecting load information is provided, and the drive circuit switches the inverter section according to the detected load information. It is characterized by driving an element.

According to a ninth aspect of the present invention, in the drive circuit according to any one of the first to eighth aspects, the drive circuit includes a first resistor, a first capacitor, a second resistor, and a switch portion for setting switching. Dead-time setting circuit in which a series circuit of is connected in parallel, a third resistor, a second capacitor, a minimum circuit in which a series circuit of a fourth capacitor and a switch portion for setting change is connected in parallel. A frequency setting circuit, and when the discharge time of the first capacitor is long, the dead time period of the switching element of the inverter unit is set to be long,
When the discharging time of the second capacitor is long, the minimum switching frequency of the switching element is set low, and the switch unit for setting switching is turned on when the target output value is higher than a predetermined value. The electric charge of the capacitor and the second capacitor is respectively discharged through the first, second and third and fourth resistors to shorten the discharge time, and the target output value is lower than the predetermined value. If it is low, turn it off and start
Each of the electric charges of the capacitor and the second capacitor is discharged through the first resistor and the third resistor, and the discharge time is lengthened.

According to a tenth aspect of the present invention, in the invention according to any one of the first to eighth aspects, the drive circuit includes a first resistor,
A dead time setting circuit in which a first capacitor, a second capacitor and a series circuit of a setting switching switch are connected in parallel, a second resistor, a third capacitor, and a fourth capacitor. A minimum switching frequency setting circuit in which a series circuit with a setting switching switch section is connected in parallel, and when the parallel circuit of the first capacitor and the second capacitor has a long discharge time, switching of the inverter section When the dead time period of the element is set to be long and the discharge time of the parallel circuit of the third capacitor and the fourth capacitor is long, the minimum switching frequency of the switching element is set to be low, and the switch section for setting switching is If the target output value is higher than a predetermined value, turn it off and
Only the electric charge of the third capacitor and the third capacitor
To shorten the discharge time by respectively discharging through the second resistor and the second resistor, and when the target output value is lower than a predetermined value, turn on to turn on the first, second and third capacitors. Each of the electric charges of the capacitor is discharged through the first resistance and the second resistance to lengthen the discharge time.

According to an eleventh aspect of the present invention, in any one of the first to tenth aspects of the present invention, the resonant capacitor is composed of a parallel circuit of a plurality of capacitors, and is connected in series to one or more of the plurality of capacitors. A resonance switching switch unit is provided, and the resonance switching switch unit is turned on when a target output value is higher than a predetermined value, a current flows through all of the plurality of capacitors, and the target output value is a predetermined value. When it is lower than the value of, the capacitor is turned off and no current flows through the capacitor connected in series to the resonance switching switch section.

According to a twelfth aspect of the present invention, in any one of the first to tenth aspects of the present invention, a resonance switching switch section connected in series to the resonance capacitor is provided, and the resonance switching switch section has a target output. When the value is higher than a predetermined value, it is turned on and a current flows through the resonance capacitor, and when the target output value is lower than the predetermined value, it is turned off and a current does not flow through the resonance capacitor.

According to a thirteenth aspect of the present invention, in any one of the first to twelfth aspects of the present invention, the two switching elements of the inverter unit are FETs, and the drive circuit is provided between the gate terminal of the FET and the drive circuit. A feature is that a filter circuit that delays the rising of the rectangular-wave drive signal output from the circuit is connected.

According to a fourteenth aspect of the invention, in the thirteenth aspect of the invention, the filter circuit includes a diode arranged in a forward direction from a gate terminal of the FET to the drive circuit and a first gate resistor in series. It is configured by a parallel circuit of a circuit and a second gate resistor, and the resistance value of the second gate resistor is larger than the resistance value of the first gate resistor.

According to a fifteenth aspect of the invention, in the thirteenth aspect of the invention, the filter circuit has a first diode and a first gate resistor arranged in a forward direction from a gate terminal of the FET to the drive circuit. And a series circuit of a second diode and a second gate resistor arranged in the forward direction from the drive circuit to the gate terminal of the FET, and the second circuit is connected in parallel. The resistance value of the gate resistance is larger than the resistance value of the first gate resistance.

According to a sixteenth aspect of the present invention, in the thirteenth aspect of the present invention, the filter circuit includes a diode arranged in a forward direction from a gate terminal of the FET to the drive circuit and a first gate resistor in series. A circuit, a circuit in which a series circuit of a second gate resistance and a third gate resistance is connected in parallel, and a switch section for short-circuiting a gate resistance connected in parallel to the third resistance, The gate resistance short-circuit switch unit is turned on when the target output value is higher than a predetermined value, and turned off when the target output value is lower than the predetermined value.

According to a seventeenth aspect of the invention, in the thirteenth aspect of the invention, the filter circuit includes a diode arranged in a forward direction from a gate terminal of the FET to the drive circuit and a first gate resistor in series. A circuit, a second gate resistor, a circuit in which a third gate resistor and a series circuit of a gate resistor cutoff switch unit are connected in parallel,
The switch unit for cutting off the gate resistance is turned on when the target output value is higher than a predetermined value, and is turned off when the target output value is lower than the predetermined value.

The invention of claim 18 relates to claims 13 to 17.
In any one of the inventions, a capacitor is connected between the gate terminal of the FET and the ground.

The invention of claim 19 is based on claims 13 to 17.
In any one of the inventions, a series circuit of a capacitor and a switch unit for connecting the capacitor is connected between the gate terminal of the FET and the ground, and the switch unit for connecting the capacitor has a predetermined output value. It is characterized in that it is turned off when it is higher than the value, and it is turned on when the target output value is lower than a predetermined value.

According to a twentieth aspect of the invention, in any one of the first to twelfth aspects of the invention, when the target output value is higher than a predetermined value, the voltage of the rectangular wave drive signal of the switching element of the inverter section is increased. When the target output value is lower than a predetermined value, a means for lowering the voltage of the rectangular wave drive signal of the switching element of the inverter section is provided.

[0025]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the drawings.

First, the basic structure of the power supply device of the present invention is shown in FIG. 1. A rectifying bridge B1 for rectifying the AC power supply AC, an electrolytic capacitor C1 for smoothing the rectified output, and source terminals on the negative voltage side of the electrolytic capacitor C1. Connected between the drain terminals of the switching elements FET1 and FET2, which are the FETs connected to
A series circuit of inductors L1 and L2 whose connection point is connected to the positive voltage side of the electrolytic capacitor C1 and a resonance capacitor C2.
A resonance type inverter unit configured by a two-stone push-pull resonance circuit including a series circuit of C3 and a series circuit of inductors L3 and L4 magnetically coupled to the inductors L1 and L2, and converting a DC output smoothed by the electrolytic capacitor C1 into a high frequency output. 5, a diode D1, in which an anode is connected to each end of a series circuit of the inductors L3 and L4 and cathodes are connected to each other.
A rectifying unit 8 including D2, a choke coil L5 having one end connected to a connection point of the diodes D1 and D2, and a smoothing capacitor C4 connected between the other end of the choke coil L5 and a connection point of the inductors L3 and L4. Smoothing part 9
A load 1 to which a DC voltage across the capacitor C4 is applied to supply the output of the inverter unit 5, an output detection circuit 2 for detecting information on the output to be supplied to the load 1, and a switching element according to a target output value. The output control circuit 3 for switching the dead times of the FET1 and FET2 and controlling the switching frequency of the switching elements FET1 and FET2 according to the output information detected by the output detection circuit 2, and the switching frequency and the dead time from the output control circuit 3 Photocouplers PC1 and P that insulate / transmit signals for control
C2 and the photo-couplers PC1 and P by the output control circuit 3
The switching control drive circuit 4 drives the switching elements FET1 and FET2 by controlling the switching frequency and the dead time via C2.

Next, the circuit operation of the basic configuration shown in FIG. 1 will be described. The output of the AC power supply AC is rectified by the rectifier bridge B1 and the DC voltage smoothed by the electrolytic capacitor C1 is alternately turned on and off by the switching elements FET1 and FET2, so that when the switching element FET1 is turned on, a current is supplied to the inductor L1. To induce a voltage in the inductor L3, and when the switching element FET2 is turned on, a current is caused to flow in the inductor L2 and the inductor L4.
Induces a voltage on. The induced voltage of the inductors L3 and L4 is rectified by the diodes D1 and D2, and the choke coil L
5. The DC voltage smoothed by the capacitor C4 is applied to the load 1 via the output detection circuit 2. At this time, the switching elements FET1 and FET2 are frequency-controlled with a constant dead time during which they are both turned off so as not to turn on at the same time.

Here, the output control circuit 3 is the output detection circuit 2
By transmitting the frequency setting signal to the switching control drive circuit 4 by using the amplification area of the photocoupler PC1 so that the output value to the load 1 detected by the switch 1 becomes the target output value, the switching control drive circuit 4 switches. By controlling the switching frequencies of the elements FET1 and FET2, the output value to the load 1 is brought close to the target output value.

Further, the switching elements FET1 and FET
The dead time of 2 can be switched between a long dead time and a short dead time by turning on / off the photocoupler PC2, which is a switch for setting change, by the output control circuit 3, and the target output value is greater than a predetermined value. When it is high (when the output current value is higher than several A), the photo coupler P
When C2 is turned on, the switching control drive circuit 4 shortens the dead time of the switching elements FET1 and FET2 to perform zero voltage switching, and the area where the output cannot be reduced by this short dead time, that is, the target output value is When it is lower than a predetermined value (when the output current value is lower than several A), the photocoupler PC2 is turned off and the switching control drive circuit 4 lengthens the dead time of the switching elements FET1 and FET2. Further, in each case, the output control circuit 3 causes the switching elements FET1 and FET2 to pass through the photocoupler PC1.
A wider range of outputs can be controlled by changing the switching frequency of the.

Hereinafter, a specific embodiment having the basic configuration of the circuit configuration shown in FIG. 1 will be described.

(Embodiment 1) The configuration of the present embodiment shown in FIG. 2 is substantially the same as the basic configuration shown in FIG. 1, and the same components are designated by the same reference numerals and the description thereof will be omitted. In the present embodiment, a load information detection unit 7 that detects load information of the load 1, for example, information such as voltage and temperature, and a microcomputer 6 are provided.
The microcomputer 6 transmits the target output value set according to the load information detected by the load information detection unit 7 to the output control circuit 3,
The output control circuit 3 transmits a frequency setting signal to the switching control drive circuit 4 by using the amplification region of the photocoupler PC1 so that the output value to the load 1 detected by the output detection circuit 2 becomes the target output value. By doing so, the switching control drive circuit 4 becomes a switching element FET.
1, controls the switching frequency of FET2.

Further, switching elements FET1 and FET
The dead time of 2 is switched by the microcomputer 6 as shown in FIG.
This is performed in the same manner as the circuit of the basic configuration shown in.

Next, a specific circuit configuration of the switching control drive circuit 4 will be described. One end of each of the parallel circuit of the resistors R1, R2 and the capacitor C5 and the parallel circuit of the resistors R3, R4 and the capacitor C6 is connected to the emitter terminal of the transistor Q1, and the base and collector terminals of the transistor Q1 are both connected to the control voltage. ing. Resistance R2, R
4, the other ends of the capacitors C5 and C6 are connected to the ground level, and the other ends of the resistors R1 and R3 are connected to the photocoupler PC2.
It is connected to the collector terminal of the output transistor of. The comparator 40 having a hysteresis characteristic inputs the voltage of the capacitor C5 to its inverting input and its non-inverting input to the constant voltage source E.
Comparator 41 connected to 1 and having a hysteresis characteristic
Inputs the voltage of the capacitor C6 to the inverting input and connects the non-inverting input to the constant voltage source E2. Also, the resistors R1 and R
2. One end of the parallel circuit of the capacitor C5 is connected to the collector terminal of the output transistor of the photocoupler PC1 via the resistor R5.

The output of the comparator 40 is connected to the other input of the NOR logic IC 42 having one input connected to the ground level, and the transistor Q2 has the collector terminal connected to the control voltage and the emitter terminal connected to the ground level. , The base terminal is connected to the output of the logic IC 42.
The output of the logic IC 42 is connected to the negative logic input of the NOR logic IC 43, and the output of the comparator 41 is connected to the positive logic input.

Input of the frequency dividing circuit 44 and AND logic IC
The output of the logic IC 43 is connected to the negative logic inputs of 45 and 46, the output Q of the frequency divider circuit 44 is connected to the positive logic input of the logic IC 45, and the frequency divider circuit 4 is connected to the positive logic input of the logic IC 46.
4 outputs Qbar are connected.

The output section of the switching control drive circuit 4 is
It is composed of a totem pole output circuit of transistors Q3 and Q4 and a totem pole output circuit of transistors Q5 and Q6. Each positive logic output of logic ICs 45 and 46 is connected to each base terminal of transistors Q3 and Q5, and each negative logic output. Are connected to the base terminals of the transistors Q4 and Q6. The connection point between the emitter terminal of the transistor Q3 and the collector terminal of the transistor Q4 is connected to the gate terminal of the switching element FET2 via the gate resistance R6, and the connection point between the emitter terminal of the transistor Q5 and the collector terminal of the transistor Q6 is a gate resistance. It is connected to the gate terminal of the switching element FET1 via R7.

Next, the operation of the switching control drive circuit 4 will be described. First, the capacitor C5 is charged with the control voltage via the collector-emitter of the transistor Q1 through which the base current flows according to the control voltage. The comparator 40 has a hysteresis characteristic, and when the voltage V1 across the capacitor C5 exceeds the high-point threshold value Vth1 of the comparator 40, the comparator 40
Goes to the L level, the output of the logic IC 42 goes to the H level, the base current flows through the transistor Q2 and turns on, and the transistor Q1 stops flowing the base current and turns off.

Then, the capacitor C5 is discharged through the resistor R2 and the series circuit of the resistor R5 and the photocoupler PC1 when the photocoupler PC2 is off, and the resistor R2 and the resistor R5 when the photocoupler PC2 is on. And a photocoupler PC1 and a resistor R1 and a photocoupler PC2 are discharged through a series circuit to generate a voltage V1.
Is the low-point threshold value Vth of the comparator 40
When it becomes lower than 2, the output of the comparator 40 becomes H level, the output of the logic IC 42 becomes L level, the base current of the transistor Q2 stops flowing and the transistor Q1 turns off, and the base current of the transistor Q1 flows and turns on. C5 is again charged with the control voltage via the collector-emitter of transistor Q1. Thereafter, this operation is repeated, and the switching frequency of the switching elements FET1 and FET2 is determined by the charging / discharging cycle of the capacitor C5.

The capacitor C6 is also the transistor Q.
The capacitor C5 is simultaneously charged with a control voltage through the collector-emitter of unity. The comparator 41 has a hysteresis characteristic and has a voltage V2 across the capacitor C6.
Is the high point threshold value Vth of the comparator 41
When it exceeds 1 (the same value as the comparator 40), the output of the comparator 41 becomes L level. When the transistor Q1 is turned off by the charging / discharging operation of the capacitor C5 described above, the capacitor C6 is discharged through the resistor R4 when the photocoupler PC2 is off, and the photocoupler P6 is discharged.
When C2 is turned on, it discharges through the resistor R4 and the series circuit of the resistor R3 and the photocoupler PC2, and the voltage V2
Is the low point threshold value Vth of the comparator 41
When it becomes lower than 2 (the same value as the comparator 40), the output of the comparator 41 becomes H level. By the output of this comparator 41, switching elements FET1 and FET
The dead time of 2 is decided.

When the transistor Q1 is turned on by the charging / discharging operation of the above-mentioned capacitor C5, the capacitor C6 is charged again with the control voltage via the collector-emitter of the transistor Q1, and thereafter this operation is repeated.

Therefore, the switching elements FET1,
The length of the dead time of the FET 2 can be switched by turning on / off the photocoupler PC2 with a signal transmitted from the microcomputer 6. When the target output value is higher than a predetermined value, the microcomputer 6 turns on the photocoupler PC2 to connect the resistors R1 and R3 to the ground level. First, by connecting the resistor R3 to the ground level, the capacitor C that determines the dead time
The capacitance value of 6 does not change, but the resistance value at the time of discharge is the resistance R
It becomes the parallel resistance value of R3 and R4, and the voltage V of the capacitor C6
Since the discharge time of 2 becomes short, the dead time is
3 can be set shorter than the state in which 3 is not connected to the ground level, and zero voltage switching can be performed to control high output. Also, the resistor R1
By connecting to the ground level, the minimum switching frequency that is optimal for high output is set.

Next, in a region where the output cannot be lowered by this short dead time, that is, when the target output value is lower than a predetermined value, the photocoupler PC2 is turned off to connect the resistors R1 and R3 to the ground level. Not in a state. First, since the resistor R3 is not connected to the ground level, the capacitance value of the capacitor C6 that determines the dead time does not change, but the resistance value at the time of discharging is only the resistor R4, and the discharging time of the voltage V2 of the capacitor C6 is long. Therefore, the dead time can be set longer than when the resistor R3 is connected to the ground level, and the minimum switching frequency that is optimal for low output is set because the resistor R1 is not connected to the ground level. The minimum switching frequency at this time (low output) is lower than the minimum switching frequency when the resistor R1 is connected to the ground level (high output).

As described above, when the output becomes small and the resonance condition is not satisfied and the zero voltage switching cannot be performed,
By making the dead time long and the minimum switching frequency low without performing the resonance operation, it is possible to perform low output control with low loss and low noise, and to expand the control range.

In either case where the target output value is higher than a predetermined value or when the target output value is lower than the predetermined value, the output detection circuit 2 detects the output value to the load 1 and the output control circuit 3 Is the load 1 detected by the output detection circuit 2.
A signal is continuously transmitted to the switching control drive circuit 4 using the amplification region of the photocoupler PC1 so that the output value to the target output value transmitted from the microcomputer 6 becomes the target output value.
In this embodiment, when the output value exceeds the target output value, the amount of current drawn from the capacitor C5 is increased by using the amplification region of the photocoupler PC1 to accelerate the discharge time of the voltage V1 across the capacitor C5. When the output value is reduced by increasing the switching frequency and the output value is less than the target output value, the amount of current drawn from the capacitor C5 is reduced by using the amplification area of the photocoupler PC1 to reduce the voltage V1 across the capacitor C5. The output value can be increased by delaying the discharge time and lowering the switching frequency, and the average value of the output values can be made extremely close to the target output value.

Here, in FIG. 3, the switching control drive circuit 4 has a section A: voltage across capacitor C5, section B: output voltage of comparator 40, section C: voltage across capacitor C6, section D: output of comparator 41. Voltage, E section: output voltage of the logic IC 43, F section: voltage of the output Q of the frequency dividing circuit 44, G section: voltage of the output Qbar of the frequency dividing circuit 44, H: drive voltage of the switching element FET2, I: switching element Each waveform of the drive voltage of the FET 1 is shown. In the present embodiment, the voltage V1 across the capacitor C5 that determines the switching frequency (the voltage waveform of the portion A) reaches the low-point threshold value Vth2 during discharge, and the voltage V2 across the capacitor C6 that determines the dead time (C2). Voltage R) so that the low point threshold value Vth2 is reached.
Each resistance value of 1, R2, R3, R4 is selected, and switching element FET1,
The dead time of the FET2 becomes constant, and the drive voltages (voltage waveforms of the I portion and the H portion) of the switching elements FET1 and FET2 are alternately turned on / off.

Switching elements FET1 and F at this time
Enlarged waveforms of the drive signals (voltage waveforms of the I portion and the H portion) of ET2 are shown in FIGS. 4 (a), 4 (b), 5 (a), and 5 (b).
When the set target output value is higher than the predetermined value, the photocoupler PC2 is turned on to cause the switching control drive circuit 4 to shorten the dead time of the switching elements FET1 and FET2 and perform zero voltage switching. As for the waveforms of the respective drive signals of the FET1 and FET2, as shown in FIG. 4A for the waveform when the switching frequency is low and as shown in FIG. 4B for the waveform when the switching frequency is high, the dead time T0 is short,
The dead time T0 is constant regardless of the switching frequency, and the on-time becomes shorter as the switching frequency becomes higher.

Then, in a region where the output cannot be lowered by this short dead time T0, that is, when the target output value is lower than a predetermined value, the photocoupler PC2 is turned off so that the switching control drive circuit 4 switches the switching elements FET1 and FET2. Of the drive signals of the switching elements FET1 and FET2 at this time, the waveform when the switching frequency is low is shown in FIG.
FIG. 5A shows a waveform when the switching frequency is high.
As shown in (b), the dead time T1 is longer than the dead time T0, the dead time T1 is constant regardless of the switching frequency, and the on-time becomes shorter as the switching frequency becomes higher. In the present embodiment that performs such control, it is possible to control a wider range of output.

Next, when the set target output value is lower than a predetermined value (the switching control drive circuit 4 turns off the photocoupler PC2, the switching elements FET1 and FET2 are turned on).
(When the dead time of the capacitor is increased), the voltage V2 across the capacitor C6 that determines the dead time (the voltage at the C portion) reaches the low-point threshold value Vth2 during discharge, and the voltage across the capacitor C5 determines the switching frequency. The resistors R1, R2, R3 and R4 are set so that the voltage V1 (voltage waveform of the portion A) becomes the low point threshold value Vth2.
The operation when each resistance value is selected will be described. In this case, the switching control drive circuit 4 has an A section: a voltage across the capacitor C5, a B section: an output voltage from the comparator 40, a C section: a voltage across the capacitor C6, a D section: an output voltage from the comparator 41, an E section: a logic IC 43. Output voltage of
F part: voltage of output Q of frequency dividing circuit 44, G part: frequency dividing circuit 4
4 output Qbar voltage, H: switching element FET
Waveforms of the drive voltage of No. 2 and I: the drive voltage of the switching element FET1 are shown in FIG.

In FIG. 6, the switching element FET
1, the on-time T2 of the drive signal of the FET2 is such that the voltage charged in the capacitor C5 is the low point threshold value V
It is determined by the time from th2 to reaching the high-point threshold value Vth1 and is always in a constant state, the on-time T2 is constant, and the dead time depends on the amount of current drawn from the capacitor C5 using the amplification region of the photocoupler PC1. Becomes variable.

Switching elements FET1 and F at this time
Enlarged waveforms of the drive signals (voltage waveforms of the I portion and the H portion) of ET2 are shown in FIGS. 7 (a), 7 (b), 8 (a), and 8 (b).
When the set target output value is higher than the predetermined value, the photocoupler PC2 is turned on, so that the switching control drive circuit 4 causes the switching elements FET1 and F to operate in the same manner as described above.
Zero voltage switching is performed by shortening the dead time of ET2, and switching elements FET1 and FET at this time
As for the waveforms of the respective drive signals of No. 2, as shown in FIG. 7 (a) when the switching frequency is low and as shown in FIG. 7 (b) when the switching frequency is high, the dead time T0 is short and the switching frequency is Regardless of this, the dead time T0 is constant, and the on-time becomes shorter as the switching frequency becomes higher.

Next, when the output cannot be lowered with this short dead time T0, that is, when the target output value is lower than a predetermined value, the photocoupler PC2 is turned off to cause the switching control drive circuit 4 to switch the switching elements FET1 ,. The ON time of the FET2 is kept constant, and the waveforms of the drive signals of the switching elements FET1 and FET2 at this time are the waveforms when the switching frequency is low.
FIG. 8A shows a waveform when the switching frequency is high.
As shown in (b), the on-time T2 is constant regardless of the switching frequency, and the dead time becomes shorter as the switching frequency becomes higher.

In this control method, when the target output value is higher than the predetermined value and the output value exceeds the target output value, the output control circuit 3 uses the amplification area of the photocoupler PC1. The output value is reduced by increasing the amount of current drawn from the capacitor C5, speeding up the discharge time of the voltage V1 across the capacitor C5, and increasing the switching frequency. If the output value is less than the target output value, amplification of the photocoupler PC1 is performed. By using the region, the amount of current drawn from the capacitor C5 is reduced, the discharge time of the voltage V1 across the capacitor C5 is delayed, and the switching frequency is lowered to increase the output value, and the average value of the output values is made extremely close to the target output value. be able to.

When the target output value is lower than the predetermined value and the output value exceeds the target output value, the amplification amount of the photocoupler PC1 is used to reduce the amount of current drawn from the capacitor C5, When the output value is reduced by delaying the discharge time of the voltage V1 across C5 and lowering the switching frequency, and when the output value does not reach the target output value, the amount of current drawn from the capacitor C5 using the amplification area of the photocoupler PC1. By increasing the discharge time of the voltage V1 across the capacitor C5 to increase the switching frequency, the output value can be increased, and the average output value can be made extremely close to the target output value.

When the load 1 is a constant voltage load,
The output detection circuit 2 detects the output voltage to the load 1 and performs the output control of this embodiment so that the output voltage becomes a constant voltage.
When the load 1 is a secondary battery, the output detection circuit 2 detects the output current to the load 1 and performs the output control of this embodiment so that the output current reaches the target output value. Further, both the constant voltage load and the secondary battery are hardly affected by the ripple current, and the rectifying unit 8 on the output side can be downsized.

(Embodiment 2) In this embodiment, as shown in FIG. 9, the resistor R1 and the dead time for switching the minimum switching frequency of the switching control drive circuit 4 of FIG. Resistance R for switching
Instead of 3, the capacitor C7 for switching the minimum switching frequency, the capacitor C8 for switching the dead time, the switch SW1 connected in series with the capacitors C7, C8, and one end of the output transistor collector of the photocoupler PC2. A resistor R9 connected to the control voltage and the other end of which is connected to the control voltage.
The connection point with 2 is connected to the drive end of the switch SW1. The same components as those in the first embodiment are designated by the same reference numerals and the description thereof will be omitted.

Also in this embodiment, the length of the dead time of the switching elements FET1 and FET2 is determined by the microcomputer 6
The photocoupler PC2 is turned on by the signal transmitted from
It can be switched by turning it off. When the target output value is higher than the predetermined value, the switch SW1 is turned off by turning on the photocoupler PC2, and the capacitors C7 and C8 are not connected to the ground level. First, since the capacitor C8 is not connected to the ground level, there is no change in the resistance value of the resistor R4, which is the resistance at the time of discharging, but only the capacitor C6 is discharged, and the voltage V2 of the capacitor C6 is changed. Since the discharge time of is shortened by the capacity of the capacitor C8, the dead time can be set shorter than the state in which the capacitor C8 is connected to the ground level, and zero voltage switching is performed to control high output. It can be performed. Further, since the capacitor C7 is not connected to the ground level, the optimum minimum switching frequency for high output is set.

Next, in a region where the output cannot be lowered by this short dead time, that is, when the target output value is lower than a predetermined value, the switch SW1 is turned on by turning off the photocoupler PC2, and the capacitor C7, C8
Is connected to the ground level. First, by connecting the capacitor C8 to the ground level, there is no change in the resistance value of the resistor R4, which is the resistance at the time of discharging, but the discharged capacitor is a parallel circuit of the capacitors C6 and C8, and the voltage V2 of the capacitor C6. Since the discharge time of is longer by the capacity of the capacitor C8, the dead time can be set longer than in the state where the capacitor C8 is not connected to the ground level, and the capacitor C7 is connected to the ground level. Thus, the optimum minimum switching frequency for low output is set, and the minimum switching frequency at this time (low output) is lower than the minimum switching frequency when the capacitor C7 is not connected to the ground level (high output).

In this way, when the output is so small that the resonance condition is not satisfied and the zero voltage switching cannot be performed,
By making the dead time long and the minimum switching frequency low without performing the resonance operation, it is possible to perform low output control with low loss and low noise, and to expand the control range.

In either case where the target output value is higher than the predetermined value or when the target output value is lower than the predetermined value, the output detection circuit 2 detects the output value to the load 1 and the output control circuit 3 Is the load 1 detected by the output detection circuit 2.
A signal is continuously transmitted to the switching control drive circuit 4 using the amplification region of the photocoupler PC1 so that the output value to the target output value transmitted from the microcomputer 6 becomes the target output value.
The operation is the same as that of the first embodiment, and the description is omitted.

(Embodiment 3) In this embodiment, as shown in FIG. 10, the resonance capacitor C9 connected in parallel to the resonance capacitors C2 and C3 is added to the power supply device of FIG. And a switching element FET3 that is a switch for resonance switching, a series circuit of a resonance capacitor C10 and a switching element FET4 that is a switch for resonance switching, and a photocoupler PC3 to which a signal from the microcomputer 6 is input. , A resistor R8 having one end connected to the collector of the output transistor of the photocoupler PC3 and the other end connected to a control voltage, and the connection point between the resistor R8 and the photocoupler PC3 is the switching element FET3.
4 is connected to the gate terminal. The same components as those in the first embodiment are designated by the same reference numerals and the description thereof will be omitted.

In this embodiment, in addition to the operation of the first embodiment, when the target output value is higher than a predetermined value, the photocoupler PC3 is turned off by the signal from the microcomputer 6 and the switching elements FET3, 4 are turned on. When turned on, the capacitance of the resonance capacitor becomes the capacitance obtained by adding the capacitor C9 to the capacitor C2 and the capacitance obtained by adding the capacitor C10 to the capacitor C3. This can be the capacitance of the resonance capacitor suitable for the resonance condition at the time of high output, and further, zero voltage switching can be performed to reduce the switching loss.

Next, in a region where the output cannot be lowered by this short dead time, that is, when the target output value is lower than a predetermined value, the photocoupler PC3 is turned on by the signal from the microcomputer 6, and the switching element FET3 ,.
By turning off 4, the capacitance of the resonance capacitor becomes the capacitance of only the capacitors C2 and C3.
This can be a capacitance of the resonance capacitor suitable for low output, and can reduce switching loss.

In either case where the target output value is higher than the predetermined value or when the target output value is lower than the predetermined value, the output detection circuit 2 detects the output value to the load 1, and the output control circuit 3 Is the load 1 detected by the output detection circuit 2.
A signal is continuously transmitted to the switching control drive circuit 4 using the amplification region of the photocoupler PC1 so that the output value to the target output value transmitted from the microcomputer 6 becomes the target output value.
The operation is the same as that of the first embodiment, and the description is omitted.

(Embodiment 4) In this embodiment, as shown in the configuration in FIG. 11, a resonance switching switch is connected in series to the resonance capacitors C2 and C3 in the power supply device of FIG. 2 showing the embodiment 1. Switching element FET3, F which is
ET4, a photocoupler PC3 to which a signal from the microcomputer 6 is input, and a resistor R8 whose one end is connected to the collector of the output transistor of the photocoupler PC3 and whose other end is connected to a control voltage are provided. The connection point with the PC3 is connected to the gate terminals of the switching element FETs 3 and 4. The same components as those in the first embodiment are designated by the same reference numerals and the description thereof will be omitted.

In the present embodiment, in addition to the operation of the first embodiment, when the target output value is higher than a predetermined value, the photocoupler PC3 is turned off by the signal from the microcomputer 6, and the switching elements FET3, 4 are turned on. When turned on, the resonance capacitors C2 and C3 are connected to the inductor L1,
Each of them is connected in parallel to L2. This can be the capacitance of the resonance capacitor suitable for the resonance condition at the time of high output, and further, zero voltage switching can be performed to reduce the switching loss.

Next, in a region where the output cannot be lowered by this short dead time, that is, when the target output value is lower than a predetermined value, the photo coupler PC3 is turned on by the signal from the microcomputer 6, and the switching element FET3 ,.
4 is turned off, the resonance capacitors C2 and C3 are turned on.
Is not connected in parallel to the inductors L1 and L2, and switching loss can be reduced.

In either case where the target output value is higher than the predetermined value or the target output value is lower than the predetermined value, the output detection circuit 2 detects the output value to the load 1 and the output control circuit 3 Is the load 1 detected by the output detection circuit 2.
A signal is continuously transmitted to the switching control drive circuit 4 using the amplification region of the photocoupler PC1 so that the output value to the target output value transmitted from the microcomputer 6 becomes the target output value.
The operation is the same as that of the first embodiment, and the description is omitted.

(Embodiment 5) In this embodiment, as shown in FIG. 12, the gate terminals of the switching elements FET1 and FET2 and the switching control drive circuit 4 of the power supply device of FIG. Filter circuits FIL1 and FIL2 are connected between the two. In addition,
The same components as those in the first embodiment are designated by the same reference numerals and the description thereof will be omitted.

In the present embodiment, the switching control drive circuit 4 is switched from the frequency control state with a constant dead time to the capacitor C5 via the photocoupler PC1.
The amount of current to be removed from the capacitor C6 is increased, and before the voltage V2 across the capacitor C6 that determines the dead time reaches the low-point threshold value Vth2 during discharge, the voltage V1 across the capacitor C5 that determines the switching frequency becomes the low-point threshold value. When the hold value Vth2 is reached, as described in the first embodiment, the switching control drive circuit 4 drives the switching elements FET1 and FET2 with a constant on-time, so that the on-time cannot be further shortened.

In such a case, the rectangular-wave drive signal output from the switching control drive circuit 4 is the filter circuit FI.
By passing L1 and FIL2, it is possible to delay the rising of the drive signal to the switching elements FET1 and FET2. FIG. 13A shows the filter circuits FIL1 and FIL when the switching on time is long.
1 shows a waveform of a drive signal before passing through IL2 (voltage waveform of H or I portion) and a waveform of a drive signal after passing through filter circuits FIL1 and FIL2 (voltage waveform of J portion or K portion), and FIG.
3 (b) is a waveform diagram of the drive signal before passing through the filter circuits FIL1 and FIL2 (voltage waveform of H or I portion) and a waveform diagram of the drive signal after passing through the filter circuits FIL1 and FIL2 when the switching on-time is shortest. (J,
Or the voltage waveform of the K portion). Then, when the switching on-time is long as shown in FIG.
The drive signal waveforms of the J and K sections rise with a delay relative to the drive signal waveforms of the H and I sections, and the switching elements FET1 and F
When the gate voltage Vg at which ET2 turns on is reached, the switching elements FET1 and FET2 actually turn on.

As shown in FIG. 13B, when the switching on-time is the shortest, the drive signal waveforms of the J and K portions that rise with a delay are switching element FETs.
1, the FET2 does not rise to the gate voltage Vg at which it turns on, and the switching elements FET1 and FET2 do not actually turn on. As described above, in the present embodiment, the switching element FE
By controlling the drive signals of T1 and T2 in a wide range, it is possible to perform a wide range of control from zero output to high output.

Next, a configuration example of the filter circuits FIL1 and FIL2 will be described. First, as a first configuration example of the filter circuits FIL1 and FIL2, as shown in FIG. 14, a diode Dg1 and a gate resistance Rg1 arranged in the forward direction from the respective gate terminals of the switching elements FET1 and FET2 to the switching control drive circuit 4. If a series circuit of and the gate resistance Rg2 are connected in parallel, the switching control drive circuit 4 switches the switching element F at turn-on.
The current flowing in the direction to each gate terminal of ET1 and FET2 flows only in the gate resistance Rg2, and the current flowing from each gate terminal of the switching elements FET1 and FET2 to the switching control drive circuit 4 at the time of turn-off is the diode Dg1. By flowing a series circuit of the gate resistance Rg1 and a circuit in which the gate resistance Rg2 is connected in parallel and making the resistance value of the gate resistance Rg2 larger than the resistance value of the gate resistance Rg1, the ON signal of the drive signal at the time of turn-on. You can delay the rising of the and turn it off immediately when it turns off.

The second of the filter circuits FIL1 and FIL2
As shown in FIG. 15 as an example of the configuration of the diode D, the diodes D are arranged in the forward direction from the gate terminals of the switching elements FET1 and FET2 to the switching control drive circuit 4.
g1 and a gate resistor Rg1 in series circuit, and the switching control drive circuit 4 to switching elements FET1 and FET
If a series circuit of a diode Dg2 and a gate resistor Rg2 arranged in the forward direction toward each gate terminal of 2 is connected in parallel, each of the switching elements FET1 and FET2 from the switching control drive circuit 4 at the time of turn-on. The current flowing in the direction toward the gate terminal is the diode Dg2.
And a gate resistance Rg2 in a series circuit, and a current flowing from each gate terminal of the switching elements FET1 and FET2 to the switching control drive circuit 4 at the time of turn-off flows in a series circuit of a diode Dg1 and a gate resistance Rg1. The resistance value of the gate resistance Rg2 is set to the gate resistance Rg.
If the resistance value is larger than 1, it is possible to delay the rising of the ON signal of the drive signal at the time of turn-on and immediately turn it off at the time of turn-off.

(Embodiment 6) In this embodiment, as shown in FIG. 16, the gate terminals of the switching elements FET1 and FET2 of the power supply device of FIG. The filter circuits FIL1 and FIL2 connected between the
Each series circuit of the diodes Dg1 and Dg11 and the gate resistors Rg1 and Rg11 arranged in the forward direction from the gate terminals of the ET1 and the FET2 to the switching control drive circuit 4, the gate resistors Rg2 and Rg12 and the gate resistor Rg3, respectively. Rg13 and each series circuit are connected in parallel, and transistors Q7 and Q8 are connected in parallel to the gate resistors Rg3 and Rg13 as switches for short-circuiting the gate resistors, and the photocoupler receives the signal from the microcomputer 6. P
A resistor R having one end connected to C3 and the collector of the output transistor of the photocoupler PC3 and the other end connected to a control voltage.
8 and the connection point between the resistor R8 and the photocoupler PC3 is connected to each base terminal of the transistors Q7 and Q8. The same components as those in the fifth embodiment are designated by the same reference numerals and the description thereof will be omitted.

In this embodiment, in addition to the operation of the first embodiment, when the target output value is higher than a predetermined value, the photo coupler PC3 is turned off by the signal from the microcomputer 6 and the transistors Q7 and Q8 are turned on. By doing so, the current flowing from the switching control drive circuit 4 to each gate terminal of the switching elements FET1 and FET2 at the time of turn-on flows through each series circuit of the resistors Rg2 and Rg12 and the transistors Q7 and Q8, and the resistors Rg2 and R8.
It is limited only by each resistance value of g12. When the target output value is lower than the predetermined value, the photocoupler PC3 is turned on by the signal from the microcomputer 6, and the transistors Q7, Q are turned on.
8 is turned off so that the switching control drive circuit 4 switches the switching elements FET1 and FE at turn-on.
The current flowing in the direction of each gate terminal of T2 is the resistance Rg.
2, Rg12 and resistors Rg3, Rg13 flow through each series circuit, and are limited by the series resistance values of resistors Rg2, Rg12 and resistors Rg3, Rg13. Also photo coupler PC3
Switching element FET1, F regardless of whether the switch is on or off
When ET2 is turned off, switching element FET
1, the current flowing from each gate terminal of the FET 2 to the switching control drive circuit 4 is the diode Dg1, D
It flows through each series circuit of g11 and resistors Rg1 and Rg11.

Therefore, when the target output value is higher than the predetermined value, it is possible to turn off the switching elements FET1 and FET2 immediately at the time of turn-on without delaying the rise of the ON signal of the drive signal. Further, when the target output value is lower than the predetermined value, it is possible to delay the rising of the ON signal of the drive signal when the switching elements FET1 and FET2 are turned on, and to immediately turn them off when they are turned off. Therefore, in the present embodiment, a wide range of output control can be performed, switching loss can be reduced at high output, and the output value supplied to the load 1 at low output can be adjusted to a stable low output value. .

(Embodiment 7) In this embodiment, as shown in FIG. 17, the gate terminals of the switching elements FET1 and FET2 and the switching control drive circuit 4 of the power supply device of FIG. The filter circuits FIL1 and FIL2 connected between the
Each series circuit of diodes Dg1 and Dg11 and gate resistors Rg1 and Rg11 arranged in the forward direction from each gate terminal of ET1 and FET2 to the switching control drive circuit 4, gate resistors Rg2 and Rg12, and gate resistor Rg3. , Rg13 and a series circuit of transistors Q7 and Q8, which are switches for cutting off the gate resistance, are connected in parallel, and a photocoupler PC3 to which a signal from the microcomputer 6 is input and an output transistor of the photocoupler PC3 And a resistor R8 whose one end is connected to the collector of and the other end is connected to a control voltage.
The connection point between and is connected to the base terminals of the transistors Q7 and Q8. The same components as those in the fifth embodiment are designated by the same reference numerals and the description thereof will be omitted.

In this embodiment, in addition to the operation of the first embodiment, when the target output value is higher than a predetermined value, the photo coupler PC3 is turned off by the signal from the microcomputer 6 and the transistors Q7 and Q8 are turned on. By doing so, the current flowing from the switching control drive circuit 4 to the respective gate terminals of the switching elements FET1 and FET2 at the time of turn-on becomes the gate resistances Rg2 and Rg12,
Gate resistors Rg3, Rg13 and transistors Q7, Q8
Flows through a circuit in which each series circuit of
It is limited by the parallel resistance value of g2, Rg12 and the gate resistances Rg3, Rg13. When the target output value is lower than the predetermined value, the photo coupler P
By turning on C3 and turning off the transistors Q7 and Q8, the current flowing from the switching control drive circuit 4 to the respective gate terminals of the switching elements FET1 and FET2 at the time of turn-on causes the resistances Rg2 and Rg12 to flow.
Flow through the resistances Rg2 and Rg12. Further, when the switching elements FET1 and FET2 are turned off regardless of whether the photocoupler PC3 is turned on or off, the current flowing from each gate terminal of the switching elements FET1 and FET2 to the switching control drive circuit 4 is the diodes Dg1 and Dg11 and the resistor Rg1. ，
It flows through each series circuit with Rg11.

Therefore, when the target output value is higher than the predetermined value, it is possible to turn off the switching elements FET1 and FET2 immediately at the time of turn-on without delaying the rising of the ON signal of the drive signal. Further, when the target output value is lower than the predetermined value, it is possible to delay the rising of the ON signal of the drive signal when the switching elements FET1 and FET2 are turned on, and to immediately turn them off when they are turned off. Therefore, in the present embodiment, a wide range of output control can be performed, switching loss can be reduced at high output, and the output value supplied to the load 1 at low output can be adjusted to a stable low output value. .

(Embodiment 8) In this embodiment, as shown in FIG. 18, the negative voltage of the electrolytic capacitor C1 and each gate terminal of the switching elements FET1 and FET2 of the power supply device of FIG. Capacitors C11 and C12 are respectively connected to the side (ground), and each turn-on time of the switching elements FET1 and FET2 can be further delayed. Therefore, in this embodiment, a wider range of output control can be performed,
Moreover, when the output is low, the output value supplied to the load 1 can be adjusted to a stable low output value. However, if the switching elements FET1 and FET2 used here have large gate capacitances, the capacitors C11 and C12 are not necessary. The same components as those in the fifth embodiment are designated by the same reference numerals and the description thereof will be omitted.

(Embodiment 9) In this embodiment, as shown in the configuration of FIG. 19, in the power supply device of FIG. 12 showing Embodiment 5, the gate terminals of the switching elements FET1 and FET2 and the negative electrode of the electrolytic capacitor C1 are added. Each series circuit of capacitors C11, C12 connected between the voltage side (ground) and switches SW2, SW3 for connecting the capacitors, a photocoupler PC3 to which a signal from the microcomputer 6 is input,
A photocoupler PC3 is provided with a resistor R8 having one end connected to the collector of the output transistor and the other end connected to a control voltage, and the connection point between the resistor R8 and the photocoupler PC3 is connected to the drive ends of the switches SW2 and SW3. Is. The same components as those in the fifth embodiment are designated by the same reference numerals and the description thereof will be omitted.

When the target output value is higher than the predetermined value, the photocoupler PC3 is turned on by the signal from the microcomputer 6 and the switches SW2 and SW3 are turned off so that the capacitors C11 and C12 are not connected to the ground. When the target output value is lower than the predetermined value, the photocoupler PC3 is turned off by the signal from the microcomputer 6 and the switches SW2 and SW3 are turned on to connect the capacitors C11 and C12 to the ground.

Therefore, when the target output value is higher than the predetermined value, when the switching elements FET1 and FET2 are turned on, the charging currents of the capacitors C11 and C12 are not necessary, so that the rising of the ON signal of the drive signal is not delayed. , It can be turned off immediately at turn off. When the target output value is lower than a predetermined value, when the switching elements FET1 and FET2 are turned on, the charging current of the capacitors C11 and C12 is required, so that the rising of the ON signal of the drive signal is delayed and immediately turned off at the time of turning off. Can be made. Therefore, in the present embodiment, a wider range of output control can be performed, switching loss can be reduced at high output, and the output value supplied to the load 1 at low output can be adjusted to a stable low output value. it can.

(Embodiment 10) In this embodiment, as shown in FIG. 20, the power supply device of FIG. 2 showing Embodiment 1 has the same configuration as that of the gate terminals of the switching elements FET1 and FET2 and the negative electrode of the electrolytic capacitor C1. Resistors R10, R11 and transistor Q9, which are connected between the voltage side (ground)
Each series circuit with Q10, a photocoupler PC3 to which a signal from the microcomputer 6 is input, and a resistor R8 having one end connected to the collector of the output transistor of the photocoupler PC3 and the other end connected to a control voltage, The connection point between the resistor R8 and the photocoupler PC3 is connected to the base terminals of the transistors Q9 and Q10, and the resistor R12 is connected in series to the load 1 as the output detection circuit 2.
The output current to the load 1 is detected by detecting the voltage across both terminals. The same components as those in the first embodiment are designated by the same reference numerals and the description thereof will be omitted.

First, the output control circuit 3 sets the frequency in the switching control drive circuit 4 by using the amplification region of the photocoupler PC1 so that the output current value to the load 1 detected by the resistor 12 becomes the target output current value. By transmitting the signal of, the switching control drive circuit 4 controls the switching frequencies of the switching elements FET1 and FET2 to bring the output current value to the load 1 close to the target output current value.

At this time, if the target output value is higher than the predetermined value, the photocoupler P
By turning on C3 and turning off the transistors Q9 and Q10, the resistors R10 and R11 are not connected to the ground, and the switching elements FET1 and FET
The gate voltage of 2 is sufficiently applied without being divided. When the target output value is lower than the predetermined value, the photocoupler PC3 is turned off by the signal from the microcomputer 6 and the transistors Q9 and Q10 are turned on, so that the resistance R10,
Switching element FET by connecting R11 to ground
1, the gate voltage of the FET2 is divided by the gate resistors R6 and R7 and the resistors R10 and R11 respectively, and the photocoupler PC3
A gate voltage lower than the gate voltage when ON is applied.

Therefore, when the target output value is higher than the predetermined value, the switching elements FET1 and FET2 can be turned on and off immediately, and when the target output value is lower than the predetermined value, the switching element FET1 is turned on.
Since the gate voltages of FET1 and FET2 are low, the on time of the switching elements FET1 and FET2 can be shortened, output control can be performed in a wide range, and switching loss can be reduced at high output. Therefore, when the output is low, the output value supplied to the load 1 can be adjusted to a stable low output value.

[0088]

According to the first aspect of the present invention, there is provided a resonance type inverter section having two switching elements and a resonance capacitor for converting a DC input into a high frequency output by alternately turning on and off the switching elements, and the resonance. Type inverter section for rectifying the high frequency output, a smoothing section for smoothing the rectified output of the rectifying section and supplying it to the load, an output detection circuit for detecting information of the output supplied to the load, and the inverter section Feedback control is performed so that the output information has a target output value by changing the switching frequency of the switching element, and when the target output value is higher than a predetermined value, the dead of the switching element of the inverter unit When the time period is set to a short constant value and the target output value is lower than a predetermined value, the switching element of the inverter unit is Since it has a drive circuit that keeps the dead time period of a constant value long and lowers the switching frequency, the dead time is long and the switching frequency is low when the output is so small that the zero voltage switching cannot be performed because the resonance condition is not met. By lowering, there is an effect that low output control can be performed with high efficiency, low loss, and low noise.

According to a second aspect of the present invention, there is provided a resonance type inverter section comprising two switching elements and a resonance capacitor for converting a DC input into a high frequency output by alternately turning on / off the switching elements, and the resonance type inverter. Section for rectifying the high frequency output of the section, a smoothing section for smoothing the rectified output of the rectifying section and supplying it to the load, an output detection circuit for detecting information on the output supplied to the load, and a switching element for the inverter section. Feedback control is performed so that the output information becomes a target output value by changing the switching frequency of, and when the target output value is higher than a predetermined value, the dead time period of the switching element of the inverter unit Is a short constant value, and when the target output value is lower than a predetermined value, the switching element of the inverter section Because and a longer value the dead time while maintaining the ON period constant and a driving circuit for reducing the switching frequency, it is possible to obtain the same effect as claim 1.

According to a third aspect of the present invention, in the first or second aspect of the present invention, the load is a constant voltage load, so the constant voltage load is less susceptible to ripple current, and the rectifying section on the output side is downsized and reduced. The cost can be reduced.

According to the invention of claim 4, in the invention of claim 1 or 2, since the load is the secondary battery, the secondary battery is not easily affected by the ripple current, and the rectifying section on the output side is downsized and reduced. The cost can be reduced.

According to the invention of claim 5, in the invention of claim 1 or 2, since the target output value is a voltage value, the control circuit can be made inexpensive.

According to the invention of claim 6, in the invention of claim 1 or 2, since the target output value is a current value, the same effect as that of claim 5 can be obtained.

According to a seventh aspect of the present invention, in the invention according to any one of the first to sixth aspects, since the inverter section is a two-stone push-pull resonance circuit, two switching elements are used and a general prior art is used. It is possible to select a component having a lower maximum rating of the switching element current than a certain forward method, and it is possible to reduce the size and cost of the component.

According to an eighth aspect of the present invention, in any one of the first to seventh aspects of the present invention, a load information detecting section for detecting load information is provided, and the drive circuit switches the inverter section according to the detected load information. Since the element is driven, there is an effect that output information can be controlled without damaging the load by detecting load information and status.

According to a ninth aspect of the present invention, in the drive circuit according to any one of the first to eighth aspects, the drive circuit includes a first resistor, a first capacitor, a second resistor, and a switch portion for setting switching. Dead-time setting circuit in which a series circuit of is connected in parallel, a third resistor, a second capacitor, a minimum circuit in which a series circuit of a fourth capacitor and a switch portion for setting change is connected in parallel. A frequency setting circuit, and when the discharge time of the first capacitor is long, the dead time period of the switching element of the inverter unit is set to be long,
When the discharging time of the second capacitor is long, the minimum switching frequency of the switching element is set low, and the switch unit for setting switching is turned on when the target output value is higher than a predetermined value. The electric charge of the capacitor and the second capacitor is respectively discharged through the first, second and third and fourth resistors to shorten the discharge time, and the target output value is lower than the predetermined value. If it is low, turn it off and start
Since the electric charge of each capacitor and the second capacitor is respectively discharged through the first resistor and the third resistor to prolong the discharge time, the dead time and the minimum of the switching element are reduced by the simple and inexpensive drive circuit. Since the switching frequency can be changed, there is an effect that a wide range of control from high output to low output can be performed.

According to a tenth aspect of the invention, in the invention according to any one of the first to eighth aspects, the drive circuit includes a first resistor,
A dead time setting circuit in which a first capacitor, a second capacitor and a series circuit of a setting switching switch are connected in parallel, a second resistor, a third capacitor, and a fourth capacitor. A minimum switching frequency setting circuit in which a series circuit with a setting switching switch section is connected in parallel, and when the parallel circuit of the first capacitor and the second capacitor has a long discharge time, switching of the inverter section When the dead time period of the element is set to be long and the discharge time of the parallel circuit of the third capacitor and the fourth capacitor is long, the minimum switching frequency of the switching element is set to be low, and the switch section for setting switching is If the target output value is higher than a predetermined value, turn it off and
Only the electric charge of the third capacitor and the third capacitor
To shorten the discharge time by respectively discharging through the second resistor and the second resistor, and when the target output value is lower than a predetermined value, turn on to turn on the first, second and third capacitors. Since the electric charge of the capacitor is discharged through the first resistance and the second resistance respectively to extend the discharge time, it is possible to obtain the same effect as that of the ninth aspect.

According to an eleventh aspect of the present invention, in any one of the first to tenth aspects of the present invention, the resonant capacitor is composed of a parallel circuit of a plurality of capacitors, and is connected in series to one or more of the plurality of capacitors. A resonance switching switch unit is provided, and the resonance switching switch unit is turned on when a target output value is higher than a predetermined value, a current flows through all of the plurality of capacitors, and the target output value is a predetermined value. When it is lower than the value of, the current does not flow in the capacitor that is turned off and is connected in series to the resonance switching switch section, so the output becomes small and the resonance condition does not match and zero voltage switching is not possible, at low output, There is an effect that the loss can be further reduced with a simple circuit configuration in which the capacitance of the resonance capacitor is reduced.

According to a twelfth aspect of the present invention, in the invention according to any one of the first to tenth aspects, the resonance switching switch section is connected in series with the resonance capacitor, and the resonance switching switch section has a target output. When the value is higher than a predetermined value, it turns on and current flows through the resonance capacitor, and when the target output value is lower than the predetermined value, it turns off and current does not flow through the resonance capacitor, so the output decreases. There is an effect that the loss can be further reduced with a simple circuit configuration in which the resonance capacitor is not connected at the time of low output where the resonance condition is not met and the zero voltage switching cannot be performed.

According to a thirteenth invention, in the invention according to any one of the first to twelfth inventions, the two switching elements of the inverter section are FETs, and the drive circuit is provided between the gate terminal of the FET and the drive circuit. Since a filter circuit that delays the rising of the rectangular wave drive signal output from the circuit is connected, when the ON width of the rectangular wave drive signal output from the drive circuit is limited due to the configuration of the drive circuit, the FET that is a switching element The minimum ON width of the rectangular wave drive signal applied to the gate terminal of can be made smaller,
There is an effect that a wider range of output control can be performed.

According to a fourteenth aspect of the present invention, in the thirteenth aspect of the present invention, the filter circuit includes a diode and a first gate resistor connected in series in a forward direction from a gate terminal of the FET to the drive circuit. It is composed of a parallel circuit of a circuit and a second gate resistance. Since the resistance value of the second gate resistance is larger than the resistance value of the first gate resistance, the filter circuit is composed of an inexpensive and simple circuit. Therefore, there is an effect that the output value can be controlled in a wider range and the output value supplied to the load can be adjusted to a stable low output value.

According to a fifteenth aspect of the invention, in the thirteenth aspect of the invention, the filter circuit has a first diode and a first gate resistor arranged in a forward direction from a gate terminal of the FET to the drive circuit. And a series circuit of a second diode and a second gate resistor arranged in the forward direction from the drive circuit to the gate terminal of the FET, and the second circuit is connected in parallel. Since the resistance value of the gate resistance is larger than the resistance value of the first gate resistance, the same effect as that in (14) can be obtained.

According to a sixteenth aspect of the invention, in the thirteenth aspect of the invention, the filter circuit includes a diode and a first gate resistor connected in series in a forward direction from a gate terminal of the FET to the drive circuit. A circuit, a circuit in which a series circuit of a second gate resistance and a third gate resistance is connected in parallel, and a switch section for short-circuiting a gate resistance connected in parallel to the third resistance, The switch part for short-circuiting the gate resistance is turned on when the target output value is higher than the predetermined value, and is turned off when the target output value is lower than the predetermined value, thus reducing switching loss at high output. Therefore, there is an effect that the output value supplied to the load can be adjusted to a stable low output value when the output is low.

According to a seventeenth aspect of the invention, in the thirteenth aspect of the invention, the filter circuit includes a diode and a first gate resistor connected in series in a forward direction from a gate terminal of the FET to the drive circuit. A circuit, a second gate resistor, a circuit in which a third gate resistor and a series circuit of a gate resistor cutoff switch unit are connected in parallel,
Since the switch unit for cutting off the gate resistance turns on when the target output value is higher than a predetermined value and turns off when the target output value is lower than the predetermined value, the same effect as in claim 16 is obtained. be able to.

The invention of claim 18 relates to claims 13 to 17.
In any one of the inventions, since the capacitor is connected between the gate terminal of the FET and the ground, when the ON width of the rectangular wave drive signal output from the drive circuit is limited due to the configuration of the drive circuit, the filter circuit In addition to the FET
By using a capacitor connected between the gate terminal of the FET and the ground, the minimum ON width of the rectangular wave drive signal applied to the gate terminal of the FET, which is a switching element, can be made smaller, and a wider range of output control can be performed. And the output value supplied to the load can be adjusted to a stable low output value.

The invention of claim 19 relates to claims 13 to 17.
In any one of the inventions, a series circuit of a capacitor and a switch unit for connecting the capacitor is connected between the gate terminal of the FET and the ground, and the switch unit for connecting the capacitor has a predetermined output value. It turns off when the output value is higher than the specified value, and turns on when the target output value is lower than the specified value. Therefore, the loss due to switching can be reduced when the output is high, and the output value supplied to the load is stable when the output is low. There is an effect that it can be adjusted to a low output value.

According to a twentieth aspect of the present invention, in any one of the first to twelfth aspects of the invention, when the target output value is higher than a predetermined value, the voltage of the rectangular wave drive signal of the switching element of the inverter section is increased. When the target output value is lower than the predetermined value, since the means for lowering the voltage of the rectangular wave drive signal of the switching element of the inverter section is provided, the same effect as in claim 19 can be obtained.

[Brief description of drawings]

FIG. 1 is a diagram showing a basic configuration of the present invention.

FIG. 2 is a diagram showing a configuration of a first exemplary embodiment of the present invention.

FIG. 3 is a diagram showing voltage waveforms at various portions according to the first embodiment of the present invention.

FIG. 4A is a diagram showing a voltage waveform of a drive signal of the inverter unit when the first embodiment of the present invention has a high output and a low switching frequency. (B) It is a figure which shows the voltage waveform of the drive signal of an inverter part when Embodiment 1 of this invention has a high output and a high switching frequency.

FIG. 5A is a diagram showing a voltage waveform of a drive signal of the inverter unit when the output of the first embodiment of the present invention is low and the switching frequency is low. (B) FIG. 6 is a diagram showing a voltage waveform of a drive signal of the inverter unit when the first embodiment of the present invention has a low output and a high switching frequency.

FIG. 6 is a diagram showing voltage waveforms at various parts during another output control according to the first embodiment of the present invention.

FIG. 7 (a) is a diagram showing another voltage waveform of the drive signal of the inverter unit when the first embodiment of the present invention has a high output and a low switching frequency. (B) It is a figure which shows another voltage waveform of the drive signal of an inverter part when Embodiment 1 of this invention has a high output and a high switching frequency.

FIG. 8A is a diagram showing another voltage waveform of the drive signal of the inverter unit when the output of the first embodiment of the present invention is low and the switching frequency is low. FIG. 6B is a diagram showing another voltage waveform of the drive signal of the inverter unit when the first embodiment of the present invention has a low output and a high switching frequency.

FIG. 9 is a diagram showing a configuration of a second exemplary embodiment of the present invention.

FIG. 10 is a diagram showing a configuration of a third exemplary embodiment of the present invention.

FIG. 11 is a diagram showing a configuration of a fourth exemplary embodiment of the present invention.

FIG. 12 is a diagram showing a configuration of a fifth exemplary embodiment of the present invention.

FIG. 13A is a diagram showing a voltage waveform of a drive signal before the filter circuit according to the fifth embodiment of the present invention. (B) It is a figure which shows the voltage waveform of the drive signal after the filter circuit of Embodiment 5 of this invention.

FIG. 14 is a first diagram showing a configuration of a filter circuit according to a fifth embodiment of the present invention.

FIG. 15 is a second diagram showing the configuration of the filter circuit according to the fifth embodiment of the present invention.

FIG. 16 is a diagram showing a configuration of a sixth exemplary embodiment of the present invention.

FIG. 17 is a diagram showing a configuration of a seventh embodiment of the present invention.

FIG. 18 is a diagram showing a configuration of an eighth exemplary embodiment of the present invention.

FIG. 19 is a diagram showing a configuration of a ninth embodiment of the present invention.

FIG. 20 is a diagram showing a configuration of a tenth exemplary embodiment of the present invention.

[Explanation of symbols] 1 load 2 output detection circuit 3 output control circuit 4 Switching control drive circuit 5 Resonance type inverter section 8 Rectifier 9 Smooth section FET1, FET2 switching element C2, C3 resonance capacitor

   ─────────────────────────────────────────────────── ─── Continued front page    (72) Inventor Atsushi Kubota             1048, Kadoma, Kadoma-shi, Osaka Matsushita Electric Works Co., Ltd.             Inside the company F-term (reference) 5H730 AA02 AA14 AS01 AS02 AS17                       BB25 BB61 CC01 DD04 EE02                       EE03 EE08 EE59 FD01 FD31                       FF01 FF09 FG04

Claims (20)

[Claims] 1. A resonance type inverter section comprising two switching elements and a resonance capacitor for converting a DC input into a high frequency output by alternately turning on and off the switching elements, and a high frequency output of the resonance type inverter section. A rectifying unit that rectifies, a smoothing unit that smoothes the rectified output of the rectifying unit and supplies the load, an output detection circuit that detects information of the output that is supplied to the load, and a switching frequency of the switching element of the inverter unit. By performing feedback control so that the output information becomes a target output value by doing so, when the target output value is higher than a predetermined value, the dead time period of the switching element of the inverter unit is set to a short constant value. When the target output value is lower than a predetermined value, the dead time period of the switching element of the inverter section And a drive circuit that lowers the switching frequency. 2. A resonance type inverter section comprising two switching elements and a resonance capacitor for converting a DC input into a high frequency output by alternately turning on and off the switching elements, and a high frequency output of the resonance type inverter section. A rectifying unit that rectifies, a smoothing unit that smoothes the rectified output of the rectifying unit and supplies the load, an output detection circuit that detects information of the output that is supplied to the load, and a switching frequency of the switching element of the inverter unit. By performing feedback control so that the output information becomes a target output value by doing so, when the target output value is higher than a predetermined value, the dead time period of the switching element of the inverter unit is set to a short constant value. When the target output value is lower than a predetermined value, the ON period of the switching element of the inverter unit is kept constant. A power supply device, comprising: a drive circuit that keeps the dead time period long while keeping the switching frequency low. 3. The power supply device according to claim 1, wherein the load is a constant voltage load. 4. The power supply device according to claim 1, wherein the load is a secondary battery. 5. The power supply device according to claim 1, wherein the target output value is a voltage value. 6. The power supply device according to claim 1, wherein the target output value is a current value. 7. The power supply device according to claim 1, wherein the inverter unit is a two-stone push-pull resonance circuit. 8. A load information detection unit for detecting load information, wherein the drive circuit drives a switching element of the inverter unit in accordance with the detected load information. The power supply described. 9. The drive circuit includes a first resistor, a first capacitor, a dead time setting circuit in which a series circuit of a second resistor and a switch unit for setting switching is connected in parallel, And a second capacitor, and a minimum switching frequency setting circuit in which a series circuit of a fourth resistor and a switch portion for setting switching is connected in parallel, and the discharge time of the first capacitor is long. In this case, the dead time period of the switching element of the inverter unit is set to be long, and when the discharge time of the second capacitor is long, the minimum switching frequency of the switching element is set to be low, and the setting switching switch unit is set to the target. When the output value is higher than a predetermined value, the power is turned on to charge each charge of the first capacitor and the second capacitor to the first, second resistance, and third, fourth.
Each of them is discharged through each of the resistors to shorten the discharge time, and when the target output value is lower than a predetermined value, it is turned off to charge each of the first capacitor and the second capacitor with the first resistor, 9. The power supply device according to any one of claims 1 to 8, characterized in that the discharge time is lengthened by discharging each through the third resistance. 10. The drive circuit includes a first resistor and a first resistor.
Dead time setting circuit in which a series circuit including a second capacitor and a setting switching switch section is connected in parallel, a second resistor, a third capacitor, a fourth capacitor, and a setting switch. A minimum switching frequency setting circuit in which a series circuit with a switch section for use in parallel is connected in parallel, and when the parallel circuit of the first capacitor and the second capacitor has a long discharge time, the switching element of the inverter section is The dead time period is set to be long, and when the discharge time of the parallel circuit of the third capacitor and the fourth capacitor is long, the minimum switching frequency of the switching element is set to be low and the setting switching switch unit When the output value to be output is higher than a predetermined value, the output is turned off and only the respective charges of the first capacitor and the third capacitor are turned on to the first resistance and the second resistance. To shorten the discharge time, and when the target output value is lower than the predetermined value, turn on to turn on the respective charges of the first, second and third and fourth capacitors. 9. The power supply device according to claim 1, wherein the power supply device is made to discharge through the resistance of 1 and the second resistance to lengthen the discharge time. 11. The resonance capacitor is composed of a parallel circuit of a plurality of capacitors, and one of the plurality of capacitors is used.
A resonance switching switch unit connected in series to one or more capacitors, and the resonance switching switch unit is turned on when a target output value is higher than a predetermined value, and a current flows through all of the plurality of capacitors. 11. The method according to claim 1, wherein when the target output value is lower than a predetermined value, the capacitor is turned off so that no current flows through the capacitor connected in series to the resonance switching switch section. Power supply. 12. A resonance switching switch unit connected in series to the resonance capacitor, wherein the resonance switching switch unit is turned on when a target output value is higher than a predetermined value, and a current is supplied to the resonance capacitor. 11. When the target output value is lower than a predetermined value, it is turned off and no current flows through the resonance capacitor.
The power supply device according to any one of the above. 13. The two switching elements of the inverter unit are FETs, and a filter circuit for delaying the rising of a rectangular-wave drive signal output from the drive circuit is provided between the gate terminal of the FET and the drive circuit. The power supply device according to claim 1, wherein the power supply device is connected. 14. The filter circuit includes a series circuit of a diode and a first gate resistor arranged in a forward direction from a gate terminal of the FET to the drive circuit, and a second circuit.
14. The power supply device according to claim 13, wherein the power supply device is configured by a parallel circuit with the gate resistance of, and the resistance value of the second gate resistance is larger than the resistance value of the first gate resistance. 15. The filter circuit includes a series circuit of a first diode and a first gate resistor arranged in a forward direction from a gate terminal of the FET to the drive circuit, and the drive circuit to the FET. Of the second diode and a series circuit of a second gate resistor arranged in the forward direction toward the gate terminal of the second gate resistor, and the resistance value of the second gate resistor is the first gate resistor. 14. The power supply device according to claim 13, wherein the power supply device has a resistance value greater than the resistance value. 16. The filter circuit includes a series circuit of a diode and a first gate resistor arranged in a forward direction from a gate terminal of the FET to the drive circuit, and a second circuit.
Of a gate resistance short circuit and a series circuit of a third gate resistance connected in parallel, and a gate resistance short circuit switch section connected in parallel to the third resistance. The power supply device according to claim 13, wherein the switch unit is turned on when the target output value is higher than a predetermined value, and is turned off when the target output value is lower than the predetermined value. 17. The filter circuit includes a series circuit of a diode and a first gate resistor arranged in a forward direction from a gate terminal of the FET to the drive circuit, and a second circuit.
Of the gate resistance and a series circuit of a third gate resistance and a series circuit of a switch section for shutting off the gate resistance are connected in parallel, and the switch section for shutting off the gate resistance has a predetermined output value. 14. The power supply device according to claim 13, wherein the power supply device is turned on when the target output value is lower than a predetermined value, and turned off when the target output value is lower than the predetermined value. 18. A capacitor is connected between the gate terminal of the FET and the ground.
The power supply device according to any one of 3 to 17. 19. A series circuit of a capacitor and a switch portion for connecting the capacitor is connected between the gate terminal of the FET and the ground, and the switch portion for connecting the capacitor has a target output value of a predetermined value. Turn off if higher,
18. The power supply device according to claim 13, wherein the power supply device is turned on when the target output value is lower than a predetermined value. 20. When the target output value is higher than a predetermined value, the voltage of the rectangular wave drive signal of the switching element of the inverter section is increased, and when the target output value is lower than the predetermined value, the inverter is 13. The power supply device according to claim 1, further comprising means for lowering the voltage of the rectangular wave drive signal of the switching element of the section.