JP2003133567A - Method of manufacturing solar cell and electrode material used in the same solar cell - Google Patents
Method of manufacturing solar cell and electrode material used in the same solar cellInfo
- Publication number
- JP2003133567A JP2003133567A JP2001326830A JP2001326830A JP2003133567A JP 2003133567 A JP2003133567 A JP 2003133567A JP 2001326830 A JP2001326830 A JP 2001326830A JP 2001326830 A JP2001326830 A JP 2001326830A JP 2003133567 A JP2003133567 A JP 2003133567A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor substrate
- solar cell
- silver
- electrode material
- front surface
- Prior art date
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Classifications
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
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- Photovoltaic Devices (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は太陽電池素子の製造
方法とそれに用いる電極材料に関し、特に半導体基板の
表面に微細な凹凸を形成した太陽電池素子の製造方法お
よびそれに用いる電極材料に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a solar cell element and an electrode material used therefor, and more particularly to a method for manufacturing a solar cell element having fine irregularities formed on the surface of a semiconductor substrate and an electrode material used therefor.
【０００２】[0002]
【従来の技術】太陽電池素子には、単結晶半導体基板を
用いた太陽電池素子、多結晶半導体基板を用いた太陽電
池素子、アモルファス半導体層を用いた太陽電池素子が
ある。このうち、量産性の点では多結晶半導体基板を用
いた太陽電池素子が最も優れている。2. Description of the Related Art Solar cell elements include a solar cell element using a single crystal semiconductor substrate, a solar cell element using a polycrystalline semiconductor substrate, and a solar cell element using an amorphous semiconductor layer. Among them, the solar cell element using the polycrystalline semiconductor substrate is the most excellent in terms of mass productivity.
【０００３】このような多結晶半導体基板を用いた太陽
電池素子の高効率化を図るために、従来から種々の検討
がなされている。例えば半導体基板に照射された光をで
きるだけ多く半導体基板内に取り込むとともに、半導体
基板内に取り込まれた光をできるだけ多く半導体基板内
に閉じ込めるために、半導体基板の表面に微細な凹凸を
形成することが提案されている。Various studies have heretofore been made to improve the efficiency of solar cell elements using such a polycrystalline semiconductor substrate. For example, it is possible to form fine irregularities on the surface of the semiconductor substrate in order to capture as much light as possible onto the semiconductor substrate into the semiconductor substrate and to confine as much light as possible into the semiconductor substrate. Proposed.
【０００４】このような微細な凹凸は、例えば反応性イ
オンエッチング（Reactive Ion Etching：ＲＩＥ）法で
形成される（例えば特公昭６０−２７１９５号、特開平
５−７５１５２号、特開平９−１０２６２５号公報参
照）。この方法によると、半導体基板として多結晶シリ
コンを用いた場合でも、結晶の不規則な面方位に左右さ
れることなく、均一な凹凸を形成することができ、特に
多結晶シリコンを用いた太陽電池素子においては、より
効果的に表面反射を低減できるようになる。Such fine irregularities are formed by, for example, a reactive ion etching (RIE) method (for example, JP-B-60-27195, JP-A-5-75152, JP-A-9-102625). See the bulletin). According to this method, even when polycrystalline silicon is used as the semiconductor substrate, it is possible to form uniform unevenness without being influenced by the irregular plane orientation of the crystal. In particular, a solar cell using polycrystalline silicon In the device, the surface reflection can be reduced more effectively.
【０００５】すなわち、単結晶シリコン基板は、結晶の
面方位が均一であることから、例えば濃度が５％程度の
水酸化ナトリウム水溶液などのアルカリ溶液で等方性エ
ッチングを行うと基板の表面の全面にわたって微細な凹
凸を均一に形成することができるが、多結晶シリコン基
板は結晶の面方位が不均一であることから、アルカリ溶
液でエッチングしても凹凸が均一にならず、基板表面で
の反射を効果的に防止することができず、太陽電池の高
効率化を図ることができない。That is, since a single crystal silicon substrate has uniform crystal plane orientations, if isotropic etching is performed with an alkaline solution such as an aqueous solution of sodium hydroxide having a concentration of about 5%, the entire surface of the substrate will be processed. Although fine irregularities can be uniformly formed over the entire surface, the polycrystalline silicon substrate has non-uniform crystal plane orientations, so even if the substrate is etched with an alkaline solution, the irregularities are not uniform and reflection on the substrate surface occurs. Cannot be effectively prevented, and the solar cell cannot be made highly efficient.
【０００６】ところが、このような多結晶シリコン基板
でも、反応性イオンエッチング法などのドライエッチン
グ法であれば、その面方位に左右されることなく、微細
な凹凸を均一に形成することができる。However, even with such a polycrystalline silicon substrate, if the dry etching method such as the reactive ion etching method is used, fine irregularities can be uniformly formed without being influenced by the plane orientation.
【０００７】[0007]
【発明が解決しようとする課題】ところが、上記の方法
で形成された微細な凹凸部の上にスクリーン印刷法等を
用いて銀ペースト等の導電性ペーストを塗布して焼成し
た場合、この銀ペーストには銀の粒径が１〜５μｍ程度
のものを多量に含んでいるために、凹凸部の深さが０．
２〜０．５μｍ、幅が０．２〜１．０μｍ程度しかない
凹部には銀が入り込めず、シリコン基板との接触が行え
なくなって接触抵抗が高くなり、とりわけ曲線因子が低
下して太陽電池素子の変換効率を低下させるという問題
があった。However, when a conductive paste such as a silver paste is applied onto the fine uneven portion formed by the above method by a screen printing method and then baked, this silver paste is used. Contains a large amount of silver having a grain size of about 1 to 5 μm, so the depth of the uneven portion is 0.1.
Silver cannot enter into the concave portion having only 2 to 0.5 μm and width of 0.2 to 1.0 μm, contact with the silicon substrate cannot be made, and contact resistance becomes high. There is a problem that the conversion efficiency of the battery element is reduced.
【０００８】本発明はこのような従来技術の問題点に鑑
みてなされたものであり、基板と電極材料との接触抵抗
が大きく、曲線因子が悪いという従来の問題を解消した
太陽電池素子の製造方法を提供することを目的とする。The present invention has been made in view of the above problems of the prior art, and manufactures a solar cell element which solves the conventional problems that the contact resistance between the substrate and the electrode material is large and the fill factor is bad. The purpose is to provide a method.
【０００９】[0009]
【課題を解決するための手段】上記目的を達成するため
に、本発明に係る太陽電池素子の製造方法によれば、一
導電型を呈する半導体基板の表面側に微細な凹凸を形成
するとともに、この半導体基板の表面側に逆導電型を呈
する領域を形成し、この半導体基板の表面側と裏面側に
電極を形成する太陽電池素子の製造方法において、前記
半導体基板の表面側に銀を主成分とし、その銀１００重
量部に対して０．１〜０．５μｍの範囲の粒径のものを
５〜５０重量部含有する銀ペーストを塗布して焼き付け
ることを特徴とする。In order to achieve the above object, according to the method for manufacturing a solar cell element of the present invention, fine irregularities are formed on the surface side of a semiconductor substrate of one conductivity type, and In the method for manufacturing a solar cell element, in which a region having an opposite conductivity type is formed on the front surface side of this semiconductor substrate and electrodes are formed on the front surface side and the back surface side of this semiconductor substrate, silver is the main component on the front surface side of the semiconductor substrate. It is characterized by coating and baking a silver paste containing 5 to 50 parts by weight of silver having a particle size in the range of 0.1 to 0.5 μm per 100 parts by weight of silver.
【００１０】また、本発明に係る太陽電池素子用電極材
料によれば、前記半導体接合部を有する半導体基板の表
面側に焼き付けられる太陽電池素子用電極材料におい
て、前記電極材料が銀を主成分とし、その銀１００重量
部に対して０．１〜０．５μｍの範囲の粒径のものを５
〜５０重量部含有することを特徴とする。Further, according to the electrode material for a solar cell element of the present invention, in the electrode material for a solar cell element which is baked on the front surface side of the semiconductor substrate having the semiconductor junction, the electrode material contains silver as a main component. , With a grain size in the range of 0.1 to 0.5 μm with respect to 100 parts by weight of silver 5
It is characterized by containing ˜50 parts by weight.
【００１１】[0011]
【発明の実施の形態】以下、本発明を添付図面に基づき
詳細に説明する。図１は本発明の太陽電池素子の製造方
法を示す断面図であり、１は半導体基板、２は反射防止
膜、３は裏面電極、４は表面電極である。DETAILED DESCRIPTION OF THE INVENTION The present invention will be described below in detail with reference to the accompanying drawings. FIG. 1 is a cross-sectional view showing a method for manufacturing a solar cell element of the present invention, in which 1 is a semiconductor substrate, 2 is an antireflection film, 3 is a back electrode, and 4 is a front electrode.
【００１２】まず、半導体基板１を用意する（図１
（ａ）参照）。この半導体基板１は、単結晶又は多結晶
シリコンなどから成る。この半導体基板１をシリコンで
形成する場合は、ボロン（Ｂ）などの一導電型半導体不
純物を１×１０16 〜 18ａｔｏｍｓ／ｃｍ3程度含有し、
比抵抗１．５Ω・ｃｍ程度の基板である。単結晶シリコ
ンの場合は引き上げ法などによって形成され、多結晶シ
リコンの場合は鋳造法などによって形成される。多結晶
シリコンは、大量生産が可能であり製造コスト面で単結
晶シリコンよりも有利である。引き上げ法や鋳造法によ
って形成されたブロックを１０ｃｍ×１０ｃｍもしくは
１５ｃｍ×１５ｃｍ程度の大きさに切断し、３００〜５
００μｍ程度の厚みにスライスして半導体基板とする。First, a semiconductor substrate 1 is prepared (see FIG. 1).
(See (a)). The semiconductor substrate 1 is made of single crystal or polycrystalline silicon or the like. When this semiconductor substrate 1 is made of silicon, it contains one conductivity type semiconductor impurity such as boron (B) in an amount of about 1 × 10 16 to 18 atoms / cm 3 .
The substrate has a specific resistance of about 1.5 Ω · cm. In the case of single crystal silicon, it is formed by a pulling method, and in the case of polycrystalline silicon, it is formed by a casting method. Polycrystalline silicon can be mass-produced and is advantageous over manufacturing cost in terms of manufacturing cost. A block formed by a pulling method or a casting method is cut into a size of about 10 cm × 10 cm or 15 cm × 15 cm, and 300 to 5
The semiconductor substrate is sliced to a thickness of about 00 μm.
【００１３】次に、半導体基板１の表面側に、微細な凹
凸１ｃを多数形成する（図１（ｂ）参照）。この微細な
凹凸１ｃは、半導体基板１の表面側に照射される光を多
重反射させて、表面反射を減少させるために設ける。こ
の微細な凹凸１ｃは、円錐形もしくは角錐形を呈し、Ｒ
ＩＥ法によるガス濃度若しくはエッチング時間を制御す
ることにより、その大きさを変化させることができる。
この微細な凹凸１ｃの幅と高さはそれぞれ２μｍ以下に
形成される。この凹凸１ｃの幅と高さが２μｍ以上にな
ると、エッチングの処理時間が長くなる反面、基板１表
面での反射率はさほど低減されない。この微細な凹凸１
ｃを半導体基板１の表面側の全面にわたって均一且つ正
確に制御性を持たせて形成するには、その幅と高さは１
μｍ以下が好適である。また、この微細な凹凸１ｃは極
めて微小なものでも反射率低滅の効果はあるが、面内に
均一かつ正確に形成するためには、製造工程上１ｎｍ以
上であることが望まれる。Next, a large number of fine irregularities 1c are formed on the front surface side of the semiconductor substrate 1 (see FIG. 1B). The fine irregularities 1c are provided in order to multiple-reflect the light irradiated to the surface side of the semiconductor substrate 1 and reduce the surface reflection. The fine irregularities 1c have a cone shape or a pyramid shape, and
The size can be changed by controlling the gas concentration or etching time by the IE method.
The width and height of the fine irregularities 1c are each formed to be 2 μm or less. When the width and height of the unevenness 1c is 2 μm or more, the etching processing time becomes long, but the reflectance on the surface of the substrate 1 is not reduced so much. This fine unevenness 1
In order to form c with uniform and accurate controllability over the entire surface of the semiconductor substrate 1, the width and height are set to 1
μm or less is preferable. Further, even if the minute unevenness 1c is extremely minute, the effect of lowering the reflectance can be obtained, but in order to form it uniformly and accurately in the surface, it is desired that it is 1 nm or more in the manufacturing process.
【００１４】次に、半導体基板１を拡散炉中に配置し
て、オキシ塩化リン（ＰＯＣｌ3）などの中で加熱する
ことによって、半導体基板１の表面部分にリン原子を拡
散させて他の導電型を呈する領域１ａを形成する（図１
（ｃ）参照）。この他の導電型を呈する領域１ａは、
０．３〜０．５μｍ程度の深さに形成され、シート抵抗
が６０Ω／□以上になるように形成される。この熱拡散
により、半導体基板１の外表面全体に他の導電型を呈す
る領域とリン原子を含むリンガラス層（不図示）が形成
されるが、半導体基板１の一主面側の他の導電型を呈す
る領域のみを残して他の部分は、弗酸（ＨＦ）と硝酸
（ＨＮＯ3）を主成分とするエッチング液に浸漬して除
去した後、純水で洗浄する（図１（ｃ））。Next, the semiconductor substrate 1 is placed in a diffusion furnace and heated in phosphorus oxychloride (POCl 3 ) or the like to diffuse phosphorus atoms to the surface portion of the semiconductor substrate 1 to cause another conductivity. A region 1a having a shape is formed (see FIG. 1).
(See (c)). The region 1a exhibiting other conductivity type is
It is formed to a depth of about 0.3 to 0.5 μm and has a sheet resistance of 60 Ω / □ or more. By this thermal diffusion, a region having another conductivity type and a phosphorus glass layer (not shown) containing phosphorus atoms are formed on the entire outer surface of the semiconductor substrate 1, but the other conductivity on the one main surface side of the semiconductor substrate 1 is increased. The rest of the mold-exposing region is removed by immersing it in an etching solution containing hydrofluoric acid (HF) and nitric acid (HNO 3 ) as main components, and then cleaning with pure water (FIG. 1C). ).
【００１５】次に、半導体基板１の一主面側に反射防止
膜２を形成する（図１（ｄ））。この反射防止膜２は例
えば窒化シリコン膜などから成り、シランとアンモニア
との混合ガスを用いたプラズマＣＶＤ法などで形成され
る。この反射防止膜２は、半導体基板１の表面で光が反
射するのを防止して、半導体基板１内に光を有効に取り
込むために設ける。また、半導体基板１の表面部の界面
準位を低下させると共に、半導体基板１の内部の結晶欠
陥を緩和するために設ける。この反射防止膜２は、半導
体基板１との屈折率差などを考慮して、屈折率が１．８
〜２．３程度になるように形成され、厚み８５０Å程度
に形成される。Next, the antireflection film 2 is formed on the one main surface side of the semiconductor substrate 1 (FIG. 1D). The antireflection film 2 is made of, for example, a silicon nitride film, and is formed by a plasma CVD method using a mixed gas of silane and ammonia. The antireflection film 2 is provided to prevent light from being reflected on the surface of the semiconductor substrate 1 and to effectively take in light into the semiconductor substrate 1. Further, it is provided in order to lower the interface state of the surface portion of the semiconductor substrate 1 and alleviate crystal defects inside the semiconductor substrate 1. The antireflection film 2 has a refractive index of 1.8 in consideration of a difference in refractive index with the semiconductor substrate 1.
It is formed to have a thickness of about 2.3, and a thickness of about 850Å.
【００１６】次に、裏面電極材料３を塗布して乾燥した
後、表面電極材料４を塗布して乾燥する。この際に使用
される裏面電極材料３、４は０．１〜５μｍ程度の銀粉
末の１００重量部に対し、有機ビヒクルを１０〜３０重
量部、ガラスフリットを０．１〜５重量部含有する電極
材料を用いる。また、表面電極材料４の銀粉末は、銀粉
末の１００重量部に対して０．１〜０．５μｍの粒径の
銀粉末を５〜５０重量部含有する。このような電極材料
を用いると、図２に示すように、半導体基板１の表面側
の凹部１ｃに電極材料が入り込み、半導体基板１と電極
材料４との接触抵抗を極力低減できる。この表面電極材
料４の０．１〜０．５μｍの粒径の銀粉末が５重量部よ
り少ない場合には、微細な凹凸１ｃの凹部に銀が充分に
入りこまず、電極の接触抵抗が増大する。また、５０重
量部を越える場合には、ペースト中のガラスフリット成
分がシリコンと電極との界面に多量に押し出されて電極
の接触抵抗が増大する。Next, the back electrode material 3 is applied and dried, and then the front electrode material 4 is applied and dried. The back surface electrode materials 3 and 4 used at this time contain 10 to 30 parts by weight of an organic vehicle and 0.1 to 5 parts by weight of a glass frit with respect to 100 parts by weight of silver powder of about 0.1 to 5 μm. An electrode material is used. The silver powder of the surface electrode material 4 contains 5 to 50 parts by weight of silver powder having a particle size of 0.1 to 0.5 μm with respect to 100 parts by weight of silver powder. When such an electrode material is used, as shown in FIG. 2, the electrode material enters the concave portion 1c on the front surface side of the semiconductor substrate 1 and the contact resistance between the semiconductor substrate 1 and the electrode material 4 can be reduced as much as possible. When the amount of the silver powder having a particle diameter of 0.1 to 0.5 μm of the surface electrode material 4 is less than 5 parts by weight, the silver does not sufficiently enter into the concave portions of the fine irregularities 1c and the contact resistance of the electrode increases. To do. On the other hand, if it exceeds 50 parts by weight, a large amount of glass frit component in the paste is pushed out to the interface between silicon and the electrode, and the contact resistance of the electrode increases.
【００１７】このような電極材料３、４は塗布して乾燥
した後、６００〜８００℃で１〜３０分程度焼成するこ
とにより焼き付けられる。The electrode materials 3 and 4 are applied and dried, and then baked by baking at 600 to 800 ° C. for about 1 to 30 minutes.
【００１８】[0018]
【実施例】比抵抗が１．５Ωｃｍの半導体基板の一主面
側をドライエッチング法により表面に凹部の深さが０．
２〜０．５μｍ、凸部の間隔が０．２〜１．０μｍとな
る微細な凹凸を形成して粗面化したのち、リンを１×１
０17ａｔｏｍｓ／ｃｍ3拡散させて、厚み８５０Åの窒
化シリコン膜を形成した。その後、銀粉末１００重量部
に対し有機ビヒクル２５重量部、ガラスフリット２重量
部からなる裏面電極材料を塗布したのち、銀粉末１００
重量部に対し有機ビヒクル２５重量部、ガラスフリット
２重量部からなる表面電極材料で銀ペーストの粒径が
０．１〜５μｍの銀粉末のうち、０．１〜０．５μｍの
銀粉末の重量比が１％、５％、１５％、２５％、３５
％、５０％、６０％のものを７５０℃×１５分で焼き付
けて、太陽電池素子の電極部とした。このときの曲線因
子および太陽電池特性を測定した。その結果を表１に示
す。EXAMPLES One main surface side of a semiconductor substrate having a specific resistance of 1.5 Ωcm was formed on the surface by a dry etching method so that the depth of the recess was 0.1.
After roughening the surface by forming fine irregularities having a diameter of 2 to 0.5 μm and a convex portion spacing of 0.2 to 1.0 μm, phosphorus is added to 1 × 1.
0 17 atoms / cm 3 was diffused to form a silicon nitride film having a thickness of 850 Å. Then, a back electrode material consisting of 25 parts by weight of an organic vehicle and 2 parts by weight of a glass frit is applied to 100 parts by weight of the silver powder, and then the silver powder 100 is added.
A surface electrode material consisting of 25 parts by weight of an organic vehicle and 2 parts by weight of a glass frit with respect to parts by weight, and a weight of the silver powder of 0.1 to 0.5 μm among the silver powder having a silver paste particle size of 0.1 to 5 μm. Ratio is 1%, 5%, 15%, 25%, 35
%, 50%, and 60% were baked at 750 ° C. for 15 minutes to form an electrode portion of a solar cell element. The fill factor and solar cell characteristics at this time were measured. The results are shown in Table 1.
【００１９】[0019]
【表１】 [Table 1]
【００２０】粒径が０．１〜５μｍの銀粉末を含有する
銀ペーストで、粒径が０．１〜０．５μｍの銀粉末の重
量比を変えた場合の曲線因子の結果は表１に示すとおり
である。すなわち、０．１〜０．５μｍの銀粉末の重量
比が１％のとき、曲線因子は７４．０％であった。０．
１〜０．５μｍの銀粉末の重量比が５％のとき、曲線因
子は７５．５％であった。０．１〜０．５μｍの銀粉末
の重量比が１５％のとき、曲線因子は７６．１％であっ
た。０．１〜０．５μｍの銀粉末の重量比が２５％のと
き、曲線因子は７６．８％であった。０．１〜０．５μ
ｍの銀粉末の重量比が３５％のとき、曲線因子は７６．
２％であった。０．１〜０．５μｍの銀粉末の重量比が
５０％のとき、曲線因子は７５．０％であった。０．１
〜０．５μｍの銀粉末の重量比が６０％のとき、曲線因
子は７４．２％であった。Table 1 shows the fill factor results when the weight ratio of silver powder having a particle diameter of 0.1 to 0.5 μm was changed in a silver paste containing the silver powder having a particle diameter of 0.1 to 5 μm. It is shown. That is, when the weight ratio of the silver powder of 0.1 to 0.5 μm was 1%, the fill factor was 74.0%. 0.
The fill factor was 75.5% when the weight ratio of the silver powder of 1 to 0.5 μm was 5%. The fill factor was 76.1% when the weight ratio of the silver powder of 0.1 to 0.5 μm was 15%. When the weight ratio of the silver powder of 0.1 to 0.5 μm was 25%, the fill factor was 76.8%. 0.1-0.5μ
When the weight ratio of the silver powder of m is 35%, the fill factor is 76.
It was 2%. The fill factor was 75.0% when the weight ratio of 0.1-0.5 μm silver powder was 50%. 0.1
The fill factor was 74.2% when the weight ratio of silver powder of ˜0.5 μm was 60%.
【００２１】[0021]
【発明の効果】以上のように、本発明に係る太陽電池素
子の製造方法によれば、一導電型を呈する半導体基板の
表面側に微細な凹凸を形成するとともに、この半導体基
板の表面側に銀を主成分とし、その銀１００重量部に対
して０．１〜０．５μｍの範囲の粒径のものを５〜５０
重量部含有する銀ペーストを塗布して焼き付けることか
ら、電極の接触抵抗が低減できて良好な曲線因子を有す
る太陽電池素子を得ることができる。As described above, according to the method for manufacturing a solar cell element of the present invention, fine irregularities are formed on the surface side of a semiconductor substrate having one conductivity type, and the surface side of this semiconductor substrate is formed. 5 to 50 having silver as a main component and having a particle size of 0.1 to 0.5 μm with respect to 100 parts by weight of silver
By coating and baking the silver paste contained in parts by weight, it is possible to reduce the contact resistance of the electrodes and obtain a solar cell element having a good fill factor.
【００２２】また、本発明に係る太陽電池用電極材料に
よれば、銀を主成分とし、その銀１００重量部に対して
０．１〜０．５μｍの範囲の粒径のものを５〜５０重量
部含有することから、表面に微細な凹凸部を形成した太
陽電池素子においても、電極の接触抵抗が低減でき、良
好な曲線因子を有する太陽電池素子を得ることができ
る。Further, according to the electrode material for a solar cell of the present invention, silver containing 5 to 50 as a main component and having a particle size of 0.1 to 0.5 μm with respect to 100 parts by weight of silver is used. Since the weight part is contained, the contact resistance of the electrode can be reduced and a solar cell element having a good fill factor can be obtained even in the solar cell element having fine irregularities formed on the surface.
【図１】本発明に係る太陽電池素子の製造方法を説明す
るための図であり、（ａ）〜（ｅ）は工程毎の断面図で
ある。FIG. 1 is a diagram for explaining a method for manufacturing a solar cell element according to the present invention, in which (a) to (e) are cross-sectional views in each step.
【図２】本発明に係る太陽電池素子の製造方法の表面側
の凹凸部を拡大して示す図である。FIG. 2 is an enlarged view showing a concavo-convex portion on the surface side of the method for manufacturing a solar cell element according to the present invention.
１・・・半導体基板、１ａ・・・逆導電型半導体不純物
を有する領域、１ｃ・・・微細な凹凸部、２・・・反射
防止膜、３・・・裏面電極、４・・・表面電極DESCRIPTION OF SYMBOLS 1 ... Semiconductor substrate, 1a ... Area | region which has an opposite conductivity type semiconductor impurity, 1c ... Fine concavo-convex part, 2 ... Antireflection film, 3 ... Back surface electrode, 4 ... Front surface electrode
Claims (2)
微細な凹凸を形成するとともに、この半導体基板の表面
側に逆導電型を呈する領域を形成し、この半導体基板の
表面側と裏面側に電極を形成する太陽電池素子の製造方
法において、前記半導体基板の表面側に銀を主成分と
し、その銀１００重量部に対して０．１〜０．５μｍの
範囲の粒径のものを５〜５０重量部含有する銀ペースト
を塗布して焼き付けることを特徴とする太陽電池素子の
製造方法。1. A semiconductor substrate of one conductivity type is provided with fine irregularities on the front surface side thereof, and a region of the opposite conductivity type is formed on the front surface side of the semiconductor substrate. In the method for manufacturing a solar cell element, in which an electrode is formed on the surface of the semiconductor substrate, silver having a particle diameter of 0.1 to 0.5 μm as a main component on the surface side of the semiconductor substrate and having a particle size of 0.1 to 0.5 μm is used. A method for manufacturing a solar cell element, which comprises coating and baking a silver paste containing 50 to 50 parts by weight.
表面側に焼き付けられる太陽電池素子用電極材料におい
て、前記電極材料が銀を主成分とし、その銀１００重量
部に対して０．１〜０．５μｍの範囲の粒径のものを５
〜５０重量部含有することを特徴とする太陽電池素子用
電極材料。2. In an electrode material for a solar cell element, which is baked on the front surface side of a semiconductor substrate having the semiconductor junction, the electrode material contains silver as a main component, and 0.1 to 0 relative to 100 parts by weight of the silver. 5 with a particle size in the range of 0.5 μm
An electrode material for a solar cell element, characterized by containing ˜50 parts by weight.
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| WO2006008896A1 (en) * | 2004-07-16 | 2006-01-26 | Shin-Etsu Chemical Co., Ltd. | Electrode material, solar cell and process for producing solar cell |
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| JP2007194581A (en) * | 2005-12-21 | 2007-08-02 | E I Du Pont De Nemours & Co | Paste for solar cell electrode |
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