JP2003133422A - Input protection circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce the mounting area of an input/output buffer part on a semiconductor chip without considering the interval between diffusion layers or the like at the time of forming the diffusion layer functioning as a protection resistor. SOLUTION: This is an input protection circuit provided between an input pad 10 which receives the signal voltage and is formed on the semiconductor chip and an internal circuit. The input protection circuit has a protection resistor 12 that is formed of the diffusion layer so as to have an area that is larger on the side connected with the input pad 10 and becomes smaller on the side connected with the internal circuit side.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an input protection circuit, and more particularly to an input protection circuit provided between an input pad to which a signal voltage formed on a semiconductor chip is input and an internal circuit.

[0002]

2. Description of the Related Art Since an integrated circuit is deteriorated or destroyed by electrostatic discharge, a protection circuit is provided at an input / output terminal of the integrated circuit in order to improve the breakdown voltage. M
In the case of an OS device, it is the gate oxide film that is most easily destroyed, and in the case of SiO 2, an electric field of 7 MV / cm or more is applied, and when the power consumption during that time is about 2 μJ, the gate breakdown is said to occur. A circuit for clamping the voltage is required to protect this.

In the MOS integrated circuit, the output terminal is connected to the source / drain PN junction having a relatively high electrostatic discharge withstand voltage, and this serves as a protection circuit. However, the input terminal is a MOS device that constitutes a buffer. A protection circuit is required to be connected to the gate of the.

An example of a conventional input protection circuit of this type is shown in FIG.
Shown in. This input protection circuit forms a diffusion layer 2 having a conductivity opposite to that of the substrate 1 on the substrate 1 and utilizes a PN junction between the diffusion layer 2 and the substrate. It is necessary for the PN junction itself to have a sufficient withstand voltage against an abnormal input voltage. JP-A-52
The input protection circuit shown in FIGS. 5 and 6 is proposed in Japanese Patent Publication No. 143778. In the input protection circuit shown in FIG. 5, the area near the contact hole 7 with the external input terminal 4 to which one end of the diffusion layer 2 functioning as a resistor is connected is widened, and the diffusion layers are provided so as to face each other. It is formed so as to widen the mutual interval of the parts.

Further, the input protection circuit shown in FIG. 6 is configured such that the area of the diffusion layers and the mutual spacing of the diffusion layers are gradually increased as they approach the external input terminal 4. The dimensions shown in FIGS. 5 and 6 are values shown in μm, for example. Another example of the conventional input protection circuit is shown in FIG. The resistor of this input protection circuit includes a first diffusion layer 8 having a wide linear shape, one end of which is connected to an input pad 10 serving as an external input terminal through a contact hole 14, and a first diffusion layer. The other end and contact hole 15, wiring 18, contact hole 1
And a second diffusion layer 9 whose one end is connected via 6.

The second diffusion layer 9 has a narrower width than the first diffusion layer 8 and is formed linearly. The other end of the second diffusion layer 9 is connected to the input end of the input buffer 11 via the contact hole 17 and the wiring 19. The first diffusion layer 8 has a wider width than the second diffusion layer 9 in consideration of breakdown voltage.

[0007]

In the above-mentioned conventional input protection circuit, in order to increase the breakdown voltage of the portion of the diffusion layer that functions as a protection resistor, which is close to the input terminal, the area of the diffusion layer and the distance between the diffusion layers are increased. It is necessary to widen the distance between the input terminals and the input terminals, and there is a problem that the mounting area of the input / output buffer section on the semiconductor chip increases because the diffusion layer has a zigzag shape. Further, even if the protective resistance of the input protection circuit is formed in a folded linear shape as shown in FIG. 7, since the area is large, there is a problem that the mounting area of the input / output buffer section on the semiconductor chip also increases. There was

The present invention has been made in view of such circumstances, and when forming a diffusion layer functioning as a protective resistance, the input / output buffer section on a semiconductor chip is not considered without considering the distance between the diffusion layers. It is an object of the present invention to provide an input protection circuit with a reduced mounting area.

[0009]

In order to achieve the above object, the present invention according to claim 1 is provided between an input pad formed on a semiconductor chip to which a signal voltage is input and an internal circuit. The input protection circuit is formed of a diffusion layer such that the area connected to the input pad is large and the area becomes smaller toward the side connected to the internal circuit. It is characterized by having a resistor.

The invention described in claim 2 is the same as claim 1.
In the input protection circuit according to, the resistance body has a large area only in a portion that requires a sufficient breakdown voltage, and is gradually reduced from the input pad side toward the internal circuit side,
The subsequent portion is characterized by being formed with a constant width.

The invention described in claim 3 is the same as claim 1.
In the input protection circuit according to any one of items 1 and 2, the resistor is linearly formed from the input pad side toward the internal circuit side.

The input protection circuit according to the present invention has a large area on the side connected to the input pad for inputting the signal voltage,
Further, it has a resistor formed of a diffusion layer so that the area becomes smaller toward the side connected to the internal circuit side. Further, in the input protection circuit according to the present invention, the area of the resistor is reduced stepwise from the input pad side to the internal circuit side only in a portion where a sufficient breakdown voltage is required, and the subsequent portion has a constant width. And is formed linearly as a whole.

Therefore, since the shape of the diffusion layer functioning as the protection resistance of the input protection circuit can be simplified, the input / output buffer section on the semiconductor chip can be formed without considering the distance between the diffusion layers when forming the diffusion layer. The mounting area can be reduced.

[0014]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described in detail below with reference to the drawings. FIG. 1 shows the configuration of an input protection circuit to which the present invention is applied. In the figure, the input protection circuit includes an input pad 10 to which a signal voltage formed on a semiconductor chip is input, and a P which constitutes an input buffer 11.
MOS transistor 111 and NMOS transistor 11
It has a protection resistor 12 connected between the two gates. The output terminal of the input buffer 11 is connected to the internal circuit.

FIG. 2 shows a pattern of protection resistors of the input protection circuit according to the embodiment of the present invention. In FIG.
The protection resistor 12 shown in FIG. 2 is a resistor formed of a diffusion layer, one end of which is connected to the input pad 10 through the contact hole 20 and the other end of which is connected to the input buffer 11 through the contact hole 21 and the wiring 13. It is connected to the input end. The resistance body as the protection resistor 12 has a large area on the side connected to the input pad 10, and has an end portion connected to the contact hole 21 connected to the input side of the input buffer 11 connected to the internal circuit. It is formed so that the area gradually decreases as it goes.

Here, the resistor forming the protective resistor 12 is a portion 1 close to the input pad 10 which requires a sufficient breakdown voltage.
2A has a large area and is gradually reduced from the input pad 10 side toward the contact hole 21, and the subsequent portion 12B is formed with a constant width so as to obtain a necessary resistance value as a protective resistance, and as a whole. It is formed linearly. In addition, in the resistor pattern shown in FIG. 2, the portion 12A for gradually reducing the area is formed in a stepped manner so that the area gradually changes on both side surfaces. Alternatively, one of the side surfaces may be formed in a stepped shape so that the area thereof changes stepwise.

Next, the areas of the resistor pattern forming the protective resistance in the input protection circuit according to the present embodiment shown in FIG. 3 and the resistor pattern in the conventional input protection circuit shown in FIG. 7 are compared in area. To do. Both have almost the same resistance value. In the protection resistor shown in FIG. 7, the width of the first diffusion layer 8 formed in a rectangular shape is 5 μm, the length is 100 μm, the resistance value is 100Ω, and the width of the second diffusion layer 9 formed in a rectangular shape is large. 1.65μm, length 100μm, resistance value 302Ω
Therefore, the total resistance value is 402Ω.

On the other hand, in the protection resistor in the input protection circuit according to the present embodiment shown in FIG. 3, the part 12A 'requiring a sufficient breakdown voltage has sides of 5 μm, 4 μm and 3 μm.
m and 2 μm, each of which is formed by connecting squares, and the remaining part is formed in a rectangular shape with a width of 1.08 μm and a length of 86 μm.
The resistance value of B'is 398.14Ω, and the total resistance value is 40.
It is 2.14Ω.

The area S1 of the pattern of the resistor forming the protective resistance in the input protection circuit according to the present embodiment shown in FIG. 3 is S1 = 86 × 1.08 + 5 × 5 + 4 × 4 + 3.
× 3 + 2 × 2 = 146.88 (μm2), and the area S2 of the resistor pattern forming the conventional protection resistor shown in FIG. 7 is S2 = 100 × 5 + 100 × 1.65 = 665.
(Μm2).

As described above, the pattern of the resistors forming the protective resistance in the input protection circuit according to the present embodiment shown in FIG. 3 and the pattern of the resistors in the conventional input protection circuit shown in FIG. Although the resistance values are almost the same, the area of the resistor pattern forming the protective resistance in the input protection circuit according to the present embodiment is about 1 / the area of the resistor pattern in the conventional input protection circuit shown in FIG. Therefore, the mounting area of the protective resistor can be reduced. As a result, the mounting area of the input / output buffer section in the semiconductor chip can be reduced.

[0021]

According to the present invention, since the shape of the diffusion layer functioning as the protection resistance of the input protection circuit can be simplified, the semiconductor chip can be formed without considering the distance between the diffusion layers when forming the diffusion layer. The mounting area of the input / output buffer section can be reduced.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing a configuration of an input protection circuit to which the present invention is applied.

FIG. 2 is a diagram showing an example of a pattern of protection resistors of the input protection circuit according to the embodiment of the present invention.

FIG. 3 is a diagram showing another example of the pattern of the protection resistance of the input protection circuit according to the embodiment of the present invention.

FIG. 4 is an explanatory diagram showing an example of a pattern of protection resistors of a conventional input protection circuit.

FIG. 5 is an explanatory diagram showing another example of the pattern of the protection resistance of the conventional input protection circuit.

FIG. 6 is an explanatory diagram showing still another example of the pattern of the protection resistance of the conventional input protection circuit.

FIG. 7 is an explanatory diagram showing still another example of the pattern of the protection resistance of the conventional input protection circuit.

[Explanation of symbols]

10 ... Input pad, 11 ... Input buffer, 12 ... Protective resistance, 13, 18, 19 ... Wiring, 14-17, 20, 21
… Contact holes

Continuation of front page (51) Int.Cl. ⁷ Identification code FI theme code (reference) H03K 19/003

Claims (3)

[Claims] 1. An input protection circuit provided between an input pad formed on a semiconductor chip and receiving a signal voltage and an internal circuit, wherein the input protection circuit is connected to the input pad. Has a large area and has a resistor formed of a diffusion layer such that the area becomes smaller toward the side connected to the internal circuit side. 2. The resistor has a large area only in a portion where a sufficient breakdown voltage is required, and is gradually reduced from the input pad side toward the internal circuit side, and the subsequent portion is formed with a constant width. The method according to claim 1, wherein
Input protection circuit described in. 3. The input protection circuit according to claim 1, wherein the resistor is linearly formed from the input pad side toward the internal circuit side.