JP2003124378A - Chip component - Google Patents

Chip component

Info

Publication number
JP2003124378A
JP2003124378A JP2001314184A JP2001314184A JP2003124378A JP 2003124378 A JP2003124378 A JP 2003124378A JP 2001314184 A JP2001314184 A JP 2001314184A JP 2001314184 A JP2001314184 A JP 2001314184A JP 2003124378 A JP2003124378 A JP 2003124378A
Authority
JP
Japan
Prior art keywords
light emitting
solder paste
electrodes
emitting device
surface portion
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP2001314184A
Other languages
Japanese (ja)
Inventor
Tadahiro Okazaki
忠宏 岡崎
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Rohm Co Ltd
Original Assignee
Rohm Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Rohm Co Ltd filed Critical Rohm Co Ltd
Priority to JP2001314184A priority Critical patent/JP2003124378A/en
Publication of JP2003124378A publication Critical patent/JP2003124378A/en
Withdrawn legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001—Core members of the layer connector
    • H01L2224/29099—Material
    • H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
    • H01L2224/29298—Fillers
    • H01L2224/29299—Base material
    • H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29338—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29339—Silver [Ag] as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144—Gold (Au) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45147—Copper (Cu) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92—Specific sequence of method steps
    • H01L2224/922—Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
    • H01L2224/9222—Sequential connecting processes
    • H01L2224/92242—Sequential connecting processes the first connecting process involving a layer connector
    • H01L2224/92247—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00011—Not relevant to the scope of the group, the symbol of which is combined with the symbol of this group
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01015—Phosphorus [P]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01047—Silver [Ag]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Abstract

PROBLEM TO BE SOLVED: To prevent a packaging defect. SOLUTION: A light emitting device 10 is provided with a substrate 12 and an LED chip is bonded on the substrate 12. Projecting parts 24 are formed respectively on lower faces 14c and 16c of electrodes 14 and 16. For example, the light emitting device 10 is used as a side light type illuminator and packaged laterally on the circuit board of electronic equipment. Since the projecting parts 24 are formed at mutually confronted terminal edges on the lower faces 14c and 16c, the area can be made small. Therefore, in the case of packaging, the spread of fused solder paste is comparatively suppressed. Further, the fused solder paste is blocked (prevented) from being drooped by hypotenuse parts 24a and 24c. Namely, since the stagnation of the solder paste in the lower part of a junction is avoided, electrodes are not short-circuited and a solder side ball is not generated, either.

Description

【発明の詳細な説明】 【０００１】 【産業上の利用分野】この発明は、チップ部品に関し、
特にたとえば、基板の表面上に素子チップを取り付け、
基板の裏面両端に素子チップに接続された２つの電極が
配置された、チップ部品に関する。 【０００２】 【従来の技術】図１０（Ａ）に示す、従来のこの種のチ
ップ部品としての半導体発光装置１は、絶縁性基板２の
表面に２つのパターン電極３ａおよびパターン電極３ｂ
が形成される。図示は省略するが、この電極３ａおよび
電極３ｂの一方には半導体発光素子（ＬＥＤ）チップが
ダイボンディングされ、電極３ａおよび電極３ｂの他方
にはＬＥＤチップがボンディングワイヤを用いてワイヤ
ボンディングされる。そして、ＬＥＤチップおよびボン
ディングワイヤが透光性樹脂４によって封止される。 【０００３】このような半導体発光装置１は、携帯電話
機のような電子機器（図示せず）に用いられ、電子機器
に設けられるプリント基板のような回路基板に実装され
る。 【０００４】 【発明が解決しようとする課題】しかし、従来の半導体
発光装置１では、図１０（Ａ）に示したように、絶縁性
基板２の裏面側（透光性樹脂４と反対側）では、電極３
ａおよび電極３ｂは長方形状に形成される。このため、
垂直に設けられた回路基板（図示せず）に、半導体発光
装置１を横向きにして実装するときに、つまり回路基板
と絶縁性基板２とが平行になるように半導体発光装置１
を実装するときに、リフロ炉で半田ペースト５が溶融さ
れると、半導体発光装置１と回路基板との接合部におい
て、溶融された半田ペースト５は電極３ａおよび電極３
ｂによって押し広げられ（押し出され）ていた。また、
溶融した半田ペースト５は自重によって下方に流れ、接
合部の下部に溜まってしまっていた。したがって、図１
０（Ｂ）に示すように、接合部では、半田ペースト５に
よって、電極３ａと電極３ｂとが短絡（ショート）して
しまうという問題があった。また、半田ペースト５が押
し出されて、半田サイドボール５ａが形成されてしま
い、これによって、回路基板に設けられた他の回路がシ
ョートしてしまうなどの不具合が発生する恐れもあっ
た。 【０００５】それゆえに、この発明の主たる目的は、簡
単な構成で実装不良を防止できる、チップ部品を提供す
ることである。 【０００６】 【課題を解決するための手段】この発明は、基板の表面
上に素子チップを取り付け、基板の裏面両端に素子チッ
プに接続された２つの電極が配置されたチップ部品にお
いて、２つの電極の対向する端縁に少なくとも１つの山
または谷を形成するようにしたことを特徴とする、チッ
プ部品である。 【０００７】 【作用】この発明のチップ部品では、基板の表面上に素
子チップが取り付けられる。また、基板の裏面両端に
は、素子チップに接続された２つの電極が配置される。
この２つの電極の対向する端縁には、少なくとも１つの
山または谷が設けられる。 【０００８】このチップ部品を携帯電話機のような電子
機器のプリント基板（回路基板）に実装する場合には、
たとえば、チップ部品は横向きに配置（マウント）され
る。つまり、垂直に設けられた回路基板とチップ部品の
基板とが平行であり、２つの電極が水平方向に並ぶよう
に、チップ部品が配置される。回路基板には、予めチッ
プ部品を実装する位置（パターン電極）に半田ペースト
が塗布（印刷）されており、チップ部品がマウントされ
た状態で、半田リフロ処理が施される。 【０００９】このとき、半田ペーストは溶融して、チッ
プ部品の電極によって押し広げられたり、その自重によ
って垂れ下がろうとする（下方に流れようとする）。し
かし、チップ部品では、２つの電極の対向する端縁に少
なくとも１つの山または谷を設けているため、言い換え
ると、２つの電極の一部が除去されて、面積が小さくさ
れるため、半田ペーストを押し出す部分が比較的少な
い。したがって、その押し出しを比較的抑制することが
できる。また、電極に設けた山または谷の斜辺によっ
て、半田ペーストが下方に流れるのを阻止（防止）する
ことができる。 【００１０】つまり、半田ペーストの押し出しや垂れ下
がりを抑制し、半田ペーストが接合部の下部に滞留する
のを防止して、２つの電極間でショートが発生したり、
半田サイドボールが発生したりするのを回避している。 【００１１】 【発明の効果】この発明によれば、基板の裏面両端に設
けられた２つの電極の対向する端縁に山または谷を設け
るだけで、その電極間のショートの発生および半田サイ
ドボールの発生を回避できるので、簡単な構成で実装不
良を防止することができる。 【００１２】この発明の上述の目的，その他の目的，特
徴および利点は、図面を参照して行う以下の実施例の詳
細な説明から一層明らかとなろう。 【００１３】 【実施例】図１を参照して、この実施例のチップ部品と
しての半導体発光装置（以下、単に「発光装置」とい
う。）１０は、ガラスエポキシ或いはセラミック等の絶
縁性の材料で形成された基板１２を含む。基板１２の表
面には、２つのパターン電極（以下、単に「電極」とい
う。）１４および電極１６が形成される。電極１４およ
び電極１６はたとえば銅（銅泊）で形成され、図１のＩ
Ｉ−ＩＩ断面図である図２から分かるように、基板１２
の上面１２ａから側面１２ｂを介して下面１２ｃまで伸
びて形成されている。 【００１４】なお、図面においては、分かり易くするた
めに、電極１４および電極１６に厚みを設けて示してい
るが、実際には薄膜の厚さに形成される。 【００１５】発光装置１０はまた、半導体発光素子チッ
プ（以下、「ＬＥＤチップ」という。）１８を含み、Ｌ
ＥＤチップ１８は基板１２の上面１２ａ側であり、電極
１４上に銀ペーストのような導電性の接着剤（図示せ
ず）によってダイボンディング（接着）される。つま
り、ＬＥＤチップ１８は、上面部１４ａに接着される。
また、ＬＥＤチップ１８と電極１６とが、金線或いは銅
線のような金属細線（ワイヤ）２０によって電気的に接
続される。つまり、ＬＥＤチップ１８が上面部１６ａに
ワイヤボンディングされる。 【００１６】さらに、ＬＥＤチップ１８およびワイヤ２
０は、基板１２、電極１４および電極１６の上に形成さ
れるエポキシ樹脂のような透光性樹脂２２によって封止
される。 【００１７】図１および図２を参照して、電極１４およ
び電極１６について詳しく説明すると、電極１４は、基
板１２の上面１２ａ側に形成される上面部（第１上面
部）１４ａ、基板１２の側面１２ｂ側に形成される側面
部（第１側面部）１４ｂおよび基板１２の下面１４ｃ側
に形成される下面部（第１下面部）１４ｃを含む。つま
り、上面部１４ａは、ＬＥＤチップ１８をダイボンディ
ングする領域（ダイボンディング領域）１４ａ′を含
み、下面部１４ｃは、基板１２を挟んで上面部１４ａに
対向して設けられる。また、側面部１４ｂは、上面部１
４ａと下面部１４ｃとを基板１２の側面１４ｂで連結す
る。 【００１８】同様に、電極１６は、上面部（第２上面
部）１６ａ、側面部（第２側面部）１６ｂおよび下面部
（第２下面部）１６ｃを含む。つまり、上面部１６ａ
は、ＬＥＤチップ１８をワイヤボンディングする領域
（ワイヤボンディング領域）１６ａ′を含み、下面部１
６ｃは、基板１２を挟んで上面部１６ａに対向して設け
られる。また、側面部１６ｂは、上面部１６ａと下面部
１６ｃとを基板１２の側面１２ｂ（側面部１４ｂが設け
られる側面１２ｂと対向する側面である。）で連結す
る。 【００１９】図３を参照して、発光装置１０を裏面（下
面）側から見ると、下面部１４ｃおよび下面部１６ｃに
は山（凸部）２４が設けられる。つまり、基板１２の裏
面（底面）１２ｃ両端には、対向する２つの電極、すな
わち下面部１４ｃおよび下面部１６ｃが配置され、この
下面部１４ｃおよび下面部１６ｃが対向する端縁には互
いに他方に突出する凸部２４が設けられる。 【００２０】なお、この実施例では、下面部１４ｃおよ
び下面部１６ｃは、たとえば、野球で使用されるホーム
ベースを横向きにしたような五角形の形状に形成され
る。 【００２１】下面部１４ｃは、凸部２４を設けることに
より形成された斜辺部２４ａおよび斜辺部２４ｂを有し
ている。斜辺部２４ａおよび斜辺部２４ｂは、基板１２
の長手方向（図３におけるＰ方向）の側面１２ｂ、すな
わち側面部１４ｂおよび側面部１６ｂが形成されている
側面１２ｂとは異なる側面１２ｂに対して一定の角度
（一定角度）αを有しており、斜辺部２４ａと斜辺部２
４ｂとが交わる点（山頂部分）が下面部１６ｃ側に突出
している。 【００２２】また、下面部１６ｃは、上述したように、
下面部１４ｃと同様の形状であり、下面部１４ｃに対し
て（左右）対称に形成される。つまり、下面部１６ｃ
は、凸部２４を設けることにより形成された斜辺部２４
ｃおよび斜辺部２４ｄを有しており、斜辺部２４ｃと斜
辺部２４ｄとが交わる山頂部分が下面部１４ｃ側に突出
している。 【００２３】この実施例の発光装置１０を製造する場合
には、図４（Ａ）および図４（Ｂ）に示すような複数の
基板１２が連続的に形成された連続基板３０が準備され
る。この連続基板３０は、基板１２を複数（図４（Ａ）
および図４（Ｂ）の例では５個）の発光装置１０に対応
する数だけ連結した大きさである。このような連続基板
３０の表面に銅箔がラミネートされ、その後、図４
（Ａ）および図４（Ｂ）に示したように、複数の発光装
置１０に対応する電極対（電極１４および電極１６）を
形成するように、エッチング処理が施される。 【００２４】なお、隣接する電極１４同士は連続的に形
成され、同様に、隣接する電極１６同士は連続的に形成
される。 【００２５】このような連続基板３０を用いて、まず、
複数の電極１４のそれぞれに導電性の接着剤（図示せ
ず）が塗布される。続いて、図５（Ａ）に示すように、
それぞれの電極１４（上面部１４ａ）にＬＥＤチップ１
８がマウントされる。したがって、ＬＥＤチップ１８が
ダイボンディングされる。 【００２６】次の工程では、図５（Ｂ）に示すように、
ＬＥＤチップ１８がワイヤ２０を用いてワイヤボンディ
ングされる。つまり、ＬＥＤチップ１８とそのＬＥＤチ
ップ１８がダイボンディングされた電極１４（上面部１
４ａ）に対応する電極１６（上面部１６ａ）とがワイヤ
２０によって電気的に接続される。 【００２７】続いて、図６（Ａ）に示すように、ＬＥＤ
チップ１８がボンディングされた連続基板３０が上型３
２ａと下型３２ｂとの間に配置される。そして、図６
（Ｂ）に示すように、上型３２ａと下型３２ｂとで形成
されたキャビネット３４内に透光性樹脂２２がモールド
される。透光性樹脂２２が硬化されると、図６（Ｃ）に
示すように、金型（上型３２ａおよび下型３２ｂ）が離
型され、発光装置１０の１つ分の大きさ毎にダイシング
（切断）される。このようにして、図１に示したような
発光装置１０が複数製造される。 【００２８】たとえば、発光装置１０は、携帯電話機の
ような電子機器のディスプレイ装置に適用され、たとえ
ば、導光板を照明するサイドライト方式の照明装置とし
て用いられる。具体的には、発光装置１０は、図７
（Ａ）に示すような態様で、電子機器（図示せず）に設
けられる回路基板４０に対して垂直に設けられた回路基
板４２に実装される。 【００２９】なお、図７（Ａ）から分かるように、回路
基板４２の横に導光板４４が水平に配置され、その上方
に同じく水平にＬＣＤパネル４６が配置される。つま
り、導光板４４およびＬＣＤパネル４６は、回路基板４
０と平行に設けられる。 【００３０】このような回路基板４２に発光装置１０を
実装する場合には、まず、回路基板４２に形成されたパ
ターン電極（図示せず）に半田ペースト５０が印刷（塗
布）される。つまり、実装（接合）される発光装置１０
の電極１４および電極１６に対応する位置（回路基板４
２のパターン電極）に半田ペースト５０が印刷される。 【００３１】次に、半田ペースト５０が印刷されたパタ
ーン電極に、電極１４および電極１６が接触するよう
に、発光装置１０が配置（マウント）される。つまり、
基板１２と回路基板４２とが平行であり、電極１４およ
び電極１６が水平方向に並ぶように、発光装置１０は配
置される。このとき、発光装置１０は、たとえば、実装
すべきパターン電極間に塗布された接着剤（図示せず）
によって、回路基板４２に固定（仮留め）される。この
状態で、発光装置１０、回路基板４０および回路基板４
２等がリフロ炉（図示せず）を通され、その後、常温で
冷却される。このことにより、半田ペースト５０が溶融
および凝固して、発光装置１０が回路基板４２に接合
（実装）される。 【００３２】ここで、リフロ炉内で半田ペースト５０が
溶融した際には、溶融した半田ペースト５０は電極１４
および電極１６すなわち下面部１４ｃおよび下面部１６
ｃによって押し広げられる（押し出される）とともに、
その自重によって下方に流れようとする。このため、何
ら手当てを施さない場合には、下面部１４ｃおよび下面
部１６ｃによって押し出された半田ペースト５０が、接
合部の下部に滞留して、電極１４と電極１６とが短絡
（ショート）してしまったり、半田ペースト５０が垂れ
落ちて半田サイドボールが発生したりする（図１０
（Ｂ）参照）。 【００３３】しかし、この実施例の発光装置１０では、
電極１４および電極１６は図３に示したような形状に形
成しているため、図７（Ｂ）に示すように、発光装置１
０と回路基板４２とが接合する部分（接合部）６０で
は、溶融した半田ペースト５０が押し広げられるのが比
較的抑制されるとともに、下方に垂れ下がるのが防止
（阻止）される。 【００３４】なお、図７（Ｂ）においては、分かり易く
するために、回路基板４２は省略してある。 【００３５】つまり、下面部１４ｃおよび下面部１６ｃ
が対向する端縁には、凸部２４が設けられるため、つま
り、下面部１４ｃおよび下面部１６ｃの一部が除去され
て、従来技術で示したような電極よりも面積が小さくさ
れるため、半田ペースト５０を押し出す部分が少ない。
また、下面部１４ｃおよび下面部１６ｃには、凸部２４
を設けることにより形成された斜辺部２４ａおよび斜辺
部２４ｃによって、半田ペースト５０が下方に流れるの
を阻止（抑制）することができる。 【００３６】なお、斜辺部２４ａおよび２４ｃによる半
田ペースト５０の下方への流れを効果的に阻止するため
には、下面部１４ｃおよび下面部１６ｃの形状を適宜変
更して、一定角度αをより小さくするのが望ましい。 【００３７】また、図７（Ｂ）に示すように、この実施
例では、下面部１４ｃおよび下面部１６ｃのそれぞれ
は、一点鎖線Ａを軸として（上下）対称に形成されるた
め、発光装置１０を図７（Ａ）および図７（Ｂ）に示し
た方向と逆向きにして（上下反転させて）実装する場合
にも、斜辺部２４ｂおよび斜辺部２４ｄによって、半田
ペースト５０が下方に流れるのを阻止することができ
る。 【００３８】この実施例によれば、溶融した半田ペース
トの押し出しおよび垂れ下がりを抑制することがきるの
で、半田ペーストによる電極間のショートを防止できる
とともに、半田サイドボールの発生を防止することがで
きる。つまり、実装不良を防止して、製品（電子機器）
の歩溜まりを向上させることができる。 【００３９】なお、この実施例では、下面部１４ｃおよ
び下面部１６ｃの両方に凸部２４を設けるようにした
が、下面部１４ｃおよび下面部１６ｃのいずれか一方に
のみ凸部２４を設けるようにしても、同様の効果が得ら
れると考えられる。 【００４０】図８（Ａ）に示す他の実施例の発光装置１
０は、電極１４および電極１６の形状が異なる以外は、
図１実施例と同じあるため、重複した説明は省略する。 【００４１】他の実施例の発光装置１０を裏面側から見
ると、電極１４および電極１６は図８（Ａ）のように形
成される。つまり、下面部１４ｃおよび下面部１６ｃの
対向する端縁には、谷（凹部）２６が設けられる。 【００４２】図８（Ａ）から分かるように、下面部１４
ｃおよび下面部１６ｃは、それぞれ、凹部２６を設ける
ことにより形成された斜辺部２６ａ、斜辺部２６ｂ、斜
辺部２６ｃおよび斜辺部２６ｄを有している。また、こ
の斜辺部２６ａ，２６ｂ，２６ｃおよび２６ｄは、それ
ぞれ、基板１２の長手方向（図８（Ａ）におけるＱ方
向）の側面１２ｂ、すなわち側面部１４ｂおよび側面部
１６ｂが設けられていない側面１２ｂに対して一定角度
βを有している（図８（Ｂ）参照）。 【００４３】この他の実施例の発光装置１０では、下面
部１４ｃおよび下面部１６ｃの対向する端縁に、凹部２
６を設けるので、つまり、上述の実施例と同様に、半田
ペースト５０を押し出す部分が小さいので、図７（Ｂ）
に示したような回路基板４２に実装する場合には、接合
部６０では、図８（Ｂ）に示すように、半田ペースト５
０が押し出されるのを比較的抑制することができる。ま
た、斜辺部２６ｂと斜辺部２６ｄとによって、半田ペー
スト５０が下向きに流れるのを阻止（防止）することが
できる。 【００４４】なお、図８（Ｂ）においても、分かり易く
するために、回路基板４２は省略してある。 【００４５】また、図８（Ｂ）に示すように、下面部１
４ｃおよび下面部１６ｃは、一点鎖線Ｂを軸として（上
下）対称に形成されるため、上述の実施例と同様に、発
光装置１０を図８（Ｂ）に示した方向と上下反転して実
装する場合であっても、斜辺部２６ａと斜辺部２６ｃと
によって、半田ペースト５０が下向きに流れるのを防止
することができる。 【００４６】さらに、斜辺部２６ａ，２６ｂ，２６ｃお
よび２６ｄによる半田ペースト５０の下方への流れを効
果的に阻止（抑制）するためには、下面部１４ｃおよび
下面部１６ｃの形状を適宜変更して、一定角度βを大き
くするようにすればよい。 【００４７】このように、他の実施例においても、溶融
した半田ペーストの押し出しおよび垂れ下がりを防止す
るので、実装不良が発生することはない。したがって、
発光装置を実装する電子機器の歩溜まりを向上させるこ
とができる。 【００４８】なお、これらの実施例で示した電極の形状
は単なる例示であり、これらに限定されるものではな
く、半田ペーストの押し出し（広がり）を抑制できると
ともに、垂れ下がりを阻止できる形状であれば、どのよ
うな形状に形成してもよい。 【００４９】たとえば、図９（Ａ）〜図９（Ｃ）に示す
ように、下面部１４ｃおよび下面部１６ｃを形成するよ
うにしてもよい。図９（Ａ）には、図１実施例に示した
電極１４および電極１６（下面部１４ｃおよび下面部１
６ｃ）に設けられた凸部２４の形状を変更したものが示
され、斜辺部２４ａ〜２４ｄおよび山頂部分が曲線状に
形成される。したがって、図１で示した場合よりも一定
角度αを少し小さくすることができ、溶融した半田ペー
スト５０の垂れ下がりを効果的に阻止（抑制）できると
言える。 【００５０】また、図９（Ｂ）には、他の実施例（図８
（Ａ））に示した下面部１４ｃおよび下面部１６ｃに設
けられた凹部２６の形状を変更したものが示され、斜辺
部２６ａ〜２６ｄおよび谷底部（斜辺部２６ａと斜辺部
２６ｂとが交わる部分および斜辺部２６ｃと斜辺部２６
ｄとが交わる部分）が曲線状に形成される。したがっ
て、図８（Ａ）および図８（Ｂ）に示した場合よりも一
定角度βを少し大きくすることができ、溶融した半田ペ
ースト５０の垂れ下がりを効果的に抑制することができ
ると言える。 【００５１】さらに、図９（Ｃ）には、下面部１４ｃお
よび下面部１６ｃの対向する端縁に複数の山（凸部）ま
たは谷（凹部）を設けたものが示される。つまり、上述
の実施例では、下面部１４ｃおよび下面部１６ｃのそれ
ぞれに、凸部または凹部を１つ設けた場合について示し
たが、このように、複数の凸部（または凹部）を設ける
ようにしてもよい。この場合には、図からよく分かるよ
うに、複数の斜辺部が形成されるため、上述の実施例
（図１および図８参照）で示した場合や図９（Ａ）およ
び図９（Ｂ）に示した場合よりも、さらに効果的に、溶
融した半田ペースト５０の垂れ下がりを抑制することが
できる。 【００５２】なお、上述の実施例では、チップ部品とし
て発光装置のみを示したが、基板上に素子チップが取り
付けられ、その素子チップに接続される電極が基板の裏
面（下面）両端に配置されるものであれば、この発明を
適用できることは言うまでもない。Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a chip component,
In particular, for example, mounting an element chip on the surface of a substrate,
The present invention relates to a chip component in which two electrodes connected to an element chip are arranged at both ends of a back surface of a substrate. 2. Description of the Related Art A conventional semiconductor light emitting device 1 as a chip component of this kind shown in FIG. 10A has two pattern electrodes 3a and 3b on the surface of an insulating substrate 2.
Is formed. Although not shown, a semiconductor light emitting element (LED) chip is die-bonded to one of the electrodes 3a and 3b, and an LED chip is wire-bonded to the other of the electrodes 3a and 3b using a bonding wire. Then, the LED chip and the bonding wires are sealed with the translucent resin 4. [0003] Such a semiconductor light emitting device 1 is used for electronic equipment (not shown) such as a mobile phone, and is mounted on a circuit board such as a printed board provided in the electronic equipment. However, in the conventional semiconductor light emitting device 1, as shown in FIG. 10A, the back side of the insulating substrate 2 (the side opposite to the translucent resin 4). Then, electrode 3
a and the electrode 3b are formed in a rectangular shape. For this reason,
When the semiconductor light emitting device 1 is mounted sideways on a vertically provided circuit board (not shown), that is, the circuit board and the insulating substrate 2 are parallel to each other.
When the solder paste 5 is melted in a reflow oven when mounting the solder paste, the melted solder paste 5 is applied to the electrode 3a and the electrode 3 at the joint between the semiconductor light emitting device 1 and the circuit board.
b was spread out (extruded). Also,
The melted solder paste 5 flows downward by its own weight and has accumulated at the lower part of the joint. Therefore, FIG.
As shown in FIG. 0 (B), there was a problem that the electrode 3a and the electrode 3b were short-circuited (short-circuited) by the solder paste 5 at the joint. Further, the solder paste 5 is extruded to form the solder side balls 5a, which may cause a problem such as a short circuit of another circuit provided on the circuit board. [0005] Therefore, a main object of the present invention is to provide a chip component that can prevent a mounting failure with a simple configuration. According to the present invention, there is provided a chip component in which an element chip is mounted on a front surface of a substrate and two electrodes connected to the element chip are arranged at both ends of the back surface of the substrate. A chip component characterized in that at least one peak or valley is formed at an opposing edge of an electrode. According to the chip component of the present invention, the element chip is mounted on the surface of the substrate. Further, two electrodes connected to the element chip are arranged at both ends of the back surface of the substrate.
Opposing edges of the two electrodes are provided with at least one peak or valley. When mounting this chip component on a printed circuit board (circuit board) of an electronic device such as a mobile phone,
For example, chip components are arranged (mounted) sideways. In other words, the chip components are arranged such that the vertically provided circuit board and the substrate of the chip components are parallel and the two electrodes are arranged in the horizontal direction. A solder paste is applied (printed) on the circuit board in advance at positions (pattern electrodes) where chip components are to be mounted, and solder reflow processing is performed with the chip components mounted. At this time, the solder paste melts and is spread by the electrodes of the chip component, or tends to hang down (flow downward) due to its own weight. However, in the chip component, at least one peak or valley is provided at the opposing edges of the two electrodes, in other words, a part of the two electrodes is removed and the area is reduced, so that the solder paste The parts that extrude are relatively small. Therefore, the extrusion can be relatively suppressed. Further, the oblique sides of the peaks or valleys provided on the electrodes can prevent (prevent) the solder paste from flowing downward. In other words, the solder paste is prevented from being pushed out or sagged, and the solder paste is prevented from staying at the lower part of the joint, so that a short circuit occurs between the two electrodes.
The occurrence of solder side balls is avoided. According to the present invention, short-circuiting between the two electrodes provided at both ends of the back surface of the substrate is only required by providing peaks or valleys at the opposite edges, and solder side balls are formed. Can be avoided, so that mounting failure can be prevented with a simple configuration. The above objects, other objects, features and advantages of the present invention will become more apparent from the following detailed description of embodiments with reference to the drawings. Referring to FIG. 1, a semiconductor light emitting device (hereinafter simply referred to as "light emitting device") 10 as a chip component of this embodiment is made of an insulating material such as glass epoxy or ceramic. Includes formed substrate 12. On the surface of the substrate 12, two pattern electrodes (hereinafter simply referred to as "electrodes") 14 and electrodes 16 are formed. The electrode 14 and the electrode 16 are formed of, for example, copper (copper copper), and
As can be seen from FIG.
Is formed to extend from the upper surface 12a to the lower surface 12c via the side surface 12b. In the drawings, the electrodes 14 and 16 are provided with a thickness for easy understanding, but they are actually formed to have a thin film thickness. The light emitting device 10 also includes a semiconductor light emitting element chip (hereinafter, referred to as “LED chip”) 18.
The ED chip 18 is on the upper surface 12a side of the substrate 12, and is die-bonded (bonded) on the electrode 14 by a conductive adhesive (not shown) such as a silver paste. That is, the LED chip 18 is bonded to the upper surface portion 14a.
The LED chip 18 and the electrode 16 are electrically connected by a thin metal wire (wire) 20 such as a gold wire or a copper wire. That is, the LED chip 18 is wire-bonded to the upper surface 16a. Further, the LED chip 18 and the wire 2
Reference numeral 0 is sealed with a light-transmitting resin 22 such as an epoxy resin formed on the substrate 12, the electrodes 14, and the electrodes 16. The electrode 14 and the electrode 16 will be described in detail with reference to FIGS. 1 and 2. The electrode 14 has an upper surface portion (first upper surface portion) 14a formed on the upper surface 12a side of the substrate 12, A side surface portion (first side surface portion) 14b formed on the side surface 12b side and a lower surface portion (first lower surface portion) 14c formed on the lower surface 14c side of the substrate 12 are included. That is, the upper surface portion 14a includes a region (die bonding region) 14a 'where the LED chip 18 is die-bonded, and the lower surface portion 14c is provided to face the upper surface portion 14a with the substrate 12 interposed therebetween. In addition, the side surface portion 14b is
4a and the lower surface portion 14c are connected by the side surface 14b of the substrate 12. Similarly, the electrode 16 includes an upper surface (second upper surface) 16a, a side surface (second side surface) 16b, and a lower surface (second lower surface) 16c. That is, the upper surface portion 16a
Includes a region (wire bonding region) 16a 'for wire bonding the LED chip 18, and the lower surface 1
6c is provided facing the upper surface 16a with the substrate 12 interposed therebetween. The side surface portion 16b connects the upper surface portion 16a and the lower surface portion 16c with the side surface 12b of the substrate 12 (the side surface facing the side surface 12b on which the side surface portion 14b is provided). Referring to FIG. 3, when the light emitting device 10 is viewed from the back surface (lower surface) side, a mountain (convex portion) 24 is provided on the lower surface portion 14c and the lower surface portion 16c. That is, two electrodes facing each other, that is, a lower surface portion 14c and a lower surface portion 16c are arranged at both ends of the rear surface (bottom surface) 12c of the substrate 12, and the lower surface portion 14c and the lower surface portion 16c are opposed to each other at the other edge. A protruding projection 24 is provided. In this embodiment, the lower surface 14c and the lower surface 16c are formed in, for example, a pentagonal shape such that a home base used in baseball is turned sideways. The lower surface 14c has a hypotenuse 24a and a hypotenuse 24b formed by providing the projection 24. The oblique side portion 24a and the oblique side portion 24b
Has a constant angle (constant angle) α with respect to the side surface 12b in the longitudinal direction (P direction in FIG. 3), that is, the side surface 12b different from the side surface 12b on which the side surface portion 14b and the side surface portion 16b are formed. , Hypotenuse 24a and hypotenuse 2
A point (crest portion) where 4b intersects protrudes toward the lower surface 16c. Further, as described above, the lower surface portion 16c
It has the same shape as the lower surface 14c, and is formed symmetrically (left and right) with respect to the lower surface 14c. That is, the lower surface portion 16c
Is a hypotenuse 24 formed by providing the projection 24.
c and a hypotenuse portion 24d, and a peak portion where the hypotenuse portion 24c and the hypotenuse portion 24d intersect protrudes toward the lower surface portion 14c. In manufacturing the light emitting device 10 of this embodiment, a continuous substrate 30 on which a plurality of substrates 12 are continuously formed as shown in FIGS. 4A and 4B is prepared. . The continuous substrate 30 includes a plurality of substrates 12 (FIG. 4A).
4 (5 in the example of FIG. 4B). Copper foil is laminated on the surface of such a continuous substrate 30, and thereafter, FIG.
As shown in FIGS. 4A and 4B, an etching process is performed to form electrode pairs (electrodes 14 and 16) corresponding to the plurality of light emitting devices 10. The adjacent electrodes 14 are formed continuously, and similarly, the adjacent electrodes 16 are formed continuously. Using such a continuous substrate 30, first,
A conductive adhesive (not shown) is applied to each of the plurality of electrodes 14. Subsequently, as shown in FIG.
LED chip 1 is attached to each electrode 14 (upper surface 14a).
8 is mounted. Therefore, the LED chip 18 is die-bonded. In the next step, as shown in FIG.
The LED chip 18 is wire-bonded using the wire 20. That is, the LED chip 18 and the electrode 14 to which the LED chip 18 is die-bonded (the upper surface 1
The electrode 16 (upper surface portion 16a) corresponding to 4a) is electrically connected by a wire 20. Subsequently, as shown in FIG.
The continuous substrate 30 to which the chip 18 is bonded is the upper die 3
It is arranged between 2a and lower mold 32b. And FIG.
As shown in (B), the translucent resin 22 is molded in a cabinet 34 formed by the upper mold 32a and the lower mold 32b. When the translucent resin 22 is cured, the molds (upper mold 32a and lower mold 32b) are released as shown in FIG. 6C, and dicing is performed for each size of the light emitting device 10. (Cut). In this way, a plurality of light emitting devices 10 as shown in FIG. 1 are manufactured. For example, the light emitting device 10 is applied to a display device of an electronic device such as a mobile phone, and is used as, for example, a sidelight type lighting device for illuminating a light guide plate. Specifically, the light emitting device 10 is configured as shown in FIG.
As shown in FIG. 3A, the circuit board is mounted on a circuit board 42 provided perpendicular to a circuit board 40 provided on an electronic device (not shown). As can be seen from FIG. 7A, the light guide plate 44 is horizontally arranged beside the circuit board 42, and the LCD panel 46 is also horizontally arranged above the light guide plate 44. That is, the light guide plate 44 and the LCD panel 46 are
0 is provided in parallel. When the light emitting device 10 is mounted on such a circuit board 42, first, a solder paste 50 is printed (applied) on a pattern electrode (not shown) formed on the circuit board 42. That is, the light emitting device 10 to be mounted (joined)
Corresponding to the electrodes 14 and 16 (the circuit board 4
The solder paste 50 is printed on the second pattern electrode). Next, the light emitting device 10 is arranged (mounted) so that the electrodes 14 and 16 are in contact with the pattern electrodes on which the solder paste 50 is printed. That is,
The light emitting device 10 is arranged such that the substrate 12 and the circuit board 42 are parallel, and the electrodes 14 and 16 are arranged in a horizontal direction. At this time, the light emitting device 10 is, for example, an adhesive (not shown) applied between the pattern electrodes to be mounted.
Thereby, it is fixed (temporarily fixed) to the circuit board 42. In this state, the light emitting device 10, the circuit board 40, and the circuit board 4
2 and the like are passed through a reflow oven (not shown), and then cooled at room temperature. Thereby, the solder paste 50 is melted and solidified, and the light emitting device 10 is joined (mounted) to the circuit board 42. Here, when the solder paste 50 is melted in the reflow furnace, the melted solder paste 50 is
And the electrode 16, that is, the lower surface portion 14c and the lower surface portion 16
while being extruded (extruded) by c,
It tends to flow downward due to its own weight. For this reason, when no treatment is performed, the solder paste 50 extruded by the lower surface portion 14c and the lower surface portion 16c stays at the lower portion of the joint portion, and the electrode 14 and the electrode 16 are short-circuited (short-circuited). Or the solder paste 50 drips and solder side balls are generated (FIG. 10).
(B)). However, in the light emitting device 10 of this embodiment,
Since the electrodes 14 and 16 are formed in the shape as shown in FIG. 3, as shown in FIG.
At a portion (joining portion) 60 where the 0 and the circuit board 42 are joined, the spread of the molten solder paste 50 is relatively suppressed, and at the same time, the solder paste 50 is prevented from hanging down (prevented). In FIG. 7B, the circuit board 42 is omitted for easy understanding. That is, the lower surface portion 14c and the lower surface portion 16c
Is provided on the edge facing the surface, that is, a part of the lower surface part 14c and the lower surface part 16c is removed, and the area is smaller than that of the electrode shown in the related art. There are few portions where the solder paste 50 is extruded.
In addition, the lower surface portion 14c and the lower surface portion 16c are provided with a convex portion 24.
The solder paste 50 can be prevented from flowing downward (suppressed) by the oblique side portions 24a and the oblique side portions 24c formed by the provision of. In order to effectively prevent the solder paste 50 from flowing downward due to the oblique sides 24a and 24c, the shapes of the lower surface 14c and the lower surface 16c are appropriately changed so that the constant angle α is reduced. It is desirable to do. Further, as shown in FIG. 7B, in this embodiment, each of the lower surface portion 14c and the lower surface portion 16c is formed symmetrically (up and down) about the alternate long and short dash line A. 7A and 7B, the solder paste 50 flows downward due to the oblique sides 24b and 24d. Can be prevented. According to this embodiment, the extrusion and drooping of the molten solder paste can be suppressed, so that a short circuit between the electrodes due to the solder paste can be prevented and the generation of solder side balls can be prevented. In other words, preventing mounting defects,
Yield can be improved. In this embodiment, the convex portions 24 are provided on both the lower surface portion 14c and the lower surface portion 16c. However, the convex portions 24 are provided on only one of the lower surface portion 14c and the lower surface portion 16c. It is thought that the same effect can be obtained. A light emitting device 1 of another embodiment shown in FIG.
0 is the same except that the shapes of the electrodes 14 and 16 are different.
Since the configuration is the same as that of the embodiment in FIG. When the light emitting device 10 of another embodiment is viewed from the back side, the electrodes 14 and 16 are formed as shown in FIG. That is, valleys (recesses) 26 are provided at the opposing edges of the lower surface portion 14c and the lower surface portion 16c. As can be seen from FIG.
c and the lower surface 16c respectively have an oblique side 26a, an oblique side 26b, an oblique side 26c, and an oblique side 26d formed by providing the concave portion 26. The oblique sides 26a, 26b, 26c, and 26d are respectively formed on the side surface 12b in the longitudinal direction (the Q direction in FIG. 8A) of the substrate 12, that is, the side surface 12b on which the side surface portion 14b and the side surface portion 16b are not provided. (See FIG. 8B). In the light emitting device 10 according to the other embodiment, the recesses 2 are formed at the opposite edges of the lower surface portion 14c and the lower surface portion 16c.
6B, that is, as in the above-described embodiment, the portion for extruding the solder paste 50 is small.
When the circuit board 42 is mounted on the circuit board 42 as shown in FIG.
Extrusion of 0 can be relatively suppressed. Further, the oblique side portion 26b and the oblique side portion 26d can prevent (prevent) the solder paste 50 from flowing downward. In FIG. 8B, the circuit board 42 is omitted for easy understanding. Further, as shown in FIG.
Since the lower surface 4c and the lower surface 16c are formed symmetrically (vertically) with the dashed line B as an axis, the light emitting device 10 is mounted upside down with respect to the direction shown in FIG. Even in this case, the oblique sides 26a and 26c can prevent the solder paste 50 from flowing downward. Further, in order to effectively prevent (suppress) the downward flow of the solder paste 50 by the oblique sides 26a, 26b, 26c and 26d, the shapes of the lower surface 14c and the lower surface 16c are appropriately changed. , The constant angle β may be increased. As described above, in the other embodiments, since the molten solder paste is prevented from being pushed out and sagged, no defective mounting occurs. Therefore,
The yield of electronic devices on which the light-emitting device is mounted can be improved. Note that the shapes of the electrodes shown in these embodiments are merely examples, and the present invention is not limited to these shapes. Any shape that can suppress extrusion (spreading) of the solder paste and prevent dripping can be prevented. , May be formed in any shape. For example, as shown in FIGS. 9A to 9C, a lower surface portion 14c and a lower surface portion 16c may be formed. FIG. 9A shows the electrodes 14 and 16 (lower surface portion 14c and lower surface portion 1) shown in FIG.
FIG. 6c) shows a modification of the shape of the convex portion 24 provided, and the oblique sides 24a to 24d and the peaks are formed in a curved shape. Therefore, it can be said that the fixed angle α can be made slightly smaller than the case shown in FIG. 1, and the dripping of the molten solder paste 50 can be effectively prevented (suppressed). FIG. 9B shows another embodiment (FIG. 8).
(A) shows a modification of the shape of the concave portion 26 provided in the lower surface portion 14c and the lower surface portion 16c, and shows the hypotenuse portions 26a to 26d and the valley bottom (the portion where the hypotenuse portion 26a intersects the hypotenuse portion 26b). And the hypotenuse 26c and the hypotenuse 26
d) is formed in a curved shape. Therefore, it can be said that the fixed angle β can be made slightly larger than in the case shown in FIGS. 8A and 8B, and the dripping of the molten solder paste 50 can be effectively suppressed. FIG. 9C shows a case where a plurality of peaks (convex portions) or valleys (concave portions) are provided at opposing edges of the lower surface portion 14c and the lower surface portion 16c. That is, in the above-described embodiment, the case where one convex portion or one concave portion is provided on each of the lower surface portion 14c and the lower surface portion 16c has been described, but a plurality of convex portions (or concave portions) are provided in this way. You may. In this case, as can be clearly understood from the drawing, a plurality of oblique sides are formed, so that the case shown in the above-described embodiment (see FIGS. 1 and 8) and FIGS. 9A and 9B The sagging of the molten solder paste 50 can be more effectively suppressed than the case shown in FIG. In the above-described embodiment, only the light emitting device is shown as a chip component. However, an element chip is mounted on a substrate, and electrodes connected to the element chip are arranged at both ends of the rear surface (lower surface) of the substrate. Needless to say, the present invention can be applied to any case.

【図面の簡単な説明】 【図１】この発明の一実施例を示す図解図である。 【図２】図１実施例に示す発光装置の断面図である。 【図３】図１実施例に示す発光装置を裏面側から見た図
解図である。 【図４】図１実施例に示す発光装置の製造工程の一部を
説明するための図解図である。 【図５】図１実施例に示す発光装置の製造工程の他の一
部を説明するための図解図である。 【図６】図１実施例に示す発光装置の製造工程のその他
の一部を説明するための図解図である。 【図７】図１実施例に示す発光装置を回路基板へ実装し
た場合の接合部の一例を示す図解図である。 【図８】この発明の他の発光装置の一例を示す図解図で
ある。 【図９】図１実施例および図８実施例に示す発光装置に
設けられた電極の他の例を示す図解図である。 【図１０】従来の発光装置の一例およびその光装置を回
路基板に実装した場合の接合部を示す図解図である。 【符号の説明】 １０ …半導体発光装置（発光装置） １２ …基板 １４，１６ …電極 １８ …半導体発光素子チップ（ＬＥＤチップ） ２０ …ワイヤ ２２ …透光性樹脂 ２４ …山（凸部） ２６ …谷（凹部）BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is an illustrative view showing one embodiment of the present invention; FIG. 2 is a sectional view of the light emitting device shown in FIG. FIG. 3 is an illustrative view of the light emitting device shown in FIG. 1 as viewed from the back side. FIG. 4 is an illustrative view for explaining a part of a manufacturing process of the light emitting device shown in FIG. 1 embodiment; FIG. 5 is an illustrative view for explaining another portion of the manufacturing process of the light emitting device shown in FIG. 1 embodiment; FIG. 6 is an illustrative view for explaining another portion of the manufacturing process of the light emitting device shown in FIG. 1 embodiment; FIG. 7 is an illustrative view showing one example of a joint portion when the light emitting device shown in FIG. 1 is mounted on a circuit board; FIG. 8 is an illustrative view showing one example of another light emitting device of the present invention; FIG. 9 is an illustrative view showing another example of the electrode provided in the light emitting device shown in FIGS. 1 and 8; FIG. 10 is an illustrative view showing one example of a conventional light emitting device and a bonding portion when the optical device is mounted on a circuit board. [Description of Signs] 10 ... Semiconductor light emitting device (Light emitting device) 12 ... Substrates 14, 16 ... Electrode 18 ... Semiconductor light emitting element chip (LED chip) 20 ... Wire 22 ... Transparent resin 24 ... Mountain (convex portion) 26 ... Valley (recess)

Claims (1)

【特許請求の範囲】 【請求項１】基板の表面上に素子チップを取り付け、前
記基板の裏面両端に前記素子チップに接続された２つの
電極が配置されたチップ部品において、 前記２つの電極の対向する端縁に少なくとも１つの山ま
たは谷を形成するようにしたことを特徴とする、チップ
部品。Claims: 1. A chip component having an element chip mounted on a surface of a substrate, and two electrodes connected to the element chip arranged on both ends of the rear surface of the substrate, wherein: A chip component, wherein at least one crest or valley is formed at an opposing edge.
JP2001314184A 2001-10-11 2001-10-11 Chip component Withdrawn JP2003124378A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2001314184A JP2003124378A (en) 2001-10-11 2001-10-11 Chip component

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2001314184A JP2003124378A (en) 2001-10-11 2001-10-11 Chip component

Publications (1)

Publication Number Publication Date
JP2003124378A true JP2003124378A (en) 2003-04-25

Family

ID=19132540

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2001314184A Withdrawn JP2003124378A (en) 2001-10-11 2001-10-11 Chip component

Country Status (1)

Country Link
JP (1) JP2003124378A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012109475A (en) * 2010-11-19 2012-06-07 Rohm Co Ltd Light emitting device, manufacturing method of light emitting device, and optical device
US9882106B2 (en) 2015-07-30 2018-01-30 Citizen Electronics Co., Ltd. Semiconductor device and light-emitting apparatus

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012109475A (en) * 2010-11-19 2012-06-07 Rohm Co Ltd Light emitting device, manufacturing method of light emitting device, and optical device
US9882106B2 (en) 2015-07-30 2018-01-30 Citizen Electronics Co., Ltd. Semiconductor device and light-emitting apparatus

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