JP2003108436A - Semiconductor integrated circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit capable of being used without difficulty for both a system LSI and a peripheral LSI. SOLUTION: This semiconductor integrated circuit comprises a switching means for selectively switching whether a chip select signal is outputted or not from an address decoder 10 to a circuit part 11.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an improvement of a semiconductor integrated circuit including at least an address decoder and a circuit section which is made accessible by outputting a chip select signal designating an address from the address decoder.

[0002]

2. Description of the Related Art In electronic devices such as facsimile machines,
Various semiconductor integrated circuits are used, and when an address is selected and a chip select signal is input, it can be accessed from the output source of the signal.

Such integrated circuits include an integrated circuit (hereinafter referred to as a system LSI) directly accessed by a CPU and an integrated circuit (hereinafter referred to as a peripheral LSI) accessed from the system LSI. The system LSI generates a chip select signal for accessing the peripheral LSI and also a chip select signal for the internal register.

[0004]

However, depending on the specifications of the electronic device, it may be desired to use the system LSI as a peripheral LSI. In such a case, the system LS is used.
Since the chip select signal for the internal register is not output from I, there is a problem that the system LSI cannot access the internal register.

The present invention has been made in consideration of the above circumstances, and an object of the present invention is to provide a semiconductor integrated circuit which can be easily used as both a system LSI and a peripheral LSI.

[0006]

In order to achieve the above object, in a semiconductor integrated circuit according to a first aspect of the present invention, whether to output a chip select signal from an address decoder to a circuit portion is selectively switched. It is configured to include switching means.

According to another aspect of the semiconductor integrated circuit of the present invention, the circuit portion is an internal register, and when the chip select signal is inputted and becomes accessible, data can be written in and read from the internal register. .

According to another aspect of the semiconductor integrated circuit of the present invention, the switching means is constituted by a gate switch, and the gate switch selects a terminal for selecting whether to output a chip select signal from the address decoder to the circuit section. It is configured to include.

[0009]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a diagram showing an example of a main part configuration of a semiconductor integrated circuit of the present invention. Note that FIG.
2, the system LSI 3 and the peripheral LSI 2 in FIG.
A conventional configuration is used as

This semiconductor integrated circuit 1 is provided with an address decoder 10, an internal register 11 which constitutes a circuit portion, and a gate switch SW which constitutes a switching means, and a peripheral LS.
I2 (# 1 to # 3) are connected.

The gate switch SW is composed of a switch SW1 and a switch SW2, and depending on the voltage value applied to the external terminal 12, the switch SW1 and the switch S2.
It switches in conjunction with W2.

In FIG. 1, since the external terminal 12 is grounded, a voltage of 0V is applied to the switches SW1 and SW2.
Both of them are switched to the contact a side, and the chip select signal CS from the CPU (not shown) is not input to the internal register 11.

In such a state, the chip select signal CS input from the CPU is input only to the address decoder 10 so that the integrated circuit 1 can be accessed from the CPU. At this time, the address decoder 10 outputs the chip select signal CS. Outputs the chip select signals CS1 to CS3 to each of the peripheral LSIs 2 to enter the access state.

Further, the address decoder 10 outputs a chip select signal CS4 designating the address to the internal register 11 to bring it into an access state, and data can be written in and read from the internal register 11.

On the other hand, as shown in FIG. 2, when the integrated circuit 1 is used as a peripheral LSI, the gate switch SW
A predetermined voltage, for example, a voltage value of 5V is applied to the external terminal 12 of the.

Then, in the gate switch SW, both the switches SW1 and SW2 are switched to the contact b side, the chip select signal CS3 from the system LSI 3 is input to the internal register 11, and the system L is connected.
The access state is entered from SI3. At this time, system L
Data can be written to and read from the internal register 11 from SI3.

In this way, the voltage value applied to the external terminal 12 of the gate switch SW is changed to change the switch SW.
By switching the contacts of SW1 and SW2, it is possible to selectively switch whether or not to output the chip select signal from the address decoder 10 to the internal register 11. Therefore, it can be easily used as either a system LSI or a peripheral LSI. , Convenient.

[0018]

As can be understood from the above description, in the semiconductor integrated circuit according to the first aspect of the present invention, the switching means for selectively switching whether to output the chip select signal from the address decoder to the circuit section. Since it is configured to include
It is convenient because it can be used as a system LSI or a peripheral LSI without difficulty.

According to another aspect of the semiconductor integrated circuit of the present invention, the circuit portion is an internal register, and when the chip select signal is input to enable access, data can be written in and read from the internal register. Therefore, when this semiconductor integrated circuit is used as a peripheral LSI, writing and reading of data with respect to the internal register of this integrated circuit can be performed without problems.

According to another aspect of the semiconductor integrated circuit of the present invention, the switching means is composed of a gate switch, and the gate switch selects a terminal for selecting whether to output a chip select signal from the address decoder to the circuit section. Since it has, by changing the voltage value applied to the selection terminal,
It is convenient because it is possible to selectively switch whether to output the chip select signal from the address decoder to the circuit section.

[Brief description of drawings]

FIG. 1 is a diagram for explaining a usage example of a semiconductor integrated circuit of the present invention.

FIG. 2 is a diagram for explaining an example of use of the semiconductor integrated circuit of the present invention.

[Explanation of symbols]

1 ... Semiconductor integrated circuit 10: Address decoder 11 ... Internal register 12 ... External terminal SW: Gate switch CS, CS1 to 4 ... Chip select signal

Claims (3)

[Claims] 1. A semiconductor integrated circuit comprising at least an address decoder and a circuit section which is made accessible by outputting a chip select signal designating an address from the address decoder, wherein the chip is provided from the address decoder to the circuit section. A semiconductor integrated circuit having a switching means for selectively switching whether to output a select signal. 2. The semiconductor device according to claim 1, wherein the circuit section is an internal register, and when the chip select signal is input and becomes accessible, data can be written in and read from the internal register. Integrated circuit. 3. The switching device according to claim 1 or 2, wherein the switching means is composed of a gate switch, and the gate switch determines whether to output the chip select signal from the address decoder to the circuit section. A semiconductor integrated circuit having a selection terminal for selecting.