JP2003092677A - Data processing method and apparatus, its program and storage medium - Google Patents

Abstract

PROBLEM TO BE SOLVED: To surely identify a falsified position even when the algorithm of an electronic watermark method and the embedded pattern are known. SOLUTION: A first pattern C(i, j) having self-synchronization is generated for digital contents comprising a plurality of sequential data blocks, a second pattern B(i, j) is generated on the basis of pseudo random number values, which are generated using an initial value k, and pixel values of the digital contents, the first pattern C(i, j) having self-synchronization and the second pattern B(i, j) are exclusively ORed and the result is embedded to the LSB of the original data to generate a data block to which an electronic watermark is embedded.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to digital data processing, and more particularly, to a data processing method and apparatus for detecting a falsification position of digital data such as digital image data, and a program for executing the method.
And a storage medium storing the program.

[0002]

2. Description of the Related Art In recent years, with the spread of computers and the Internet, a form of digitizing information and using it as a digital image is becoming popular in place of conventional silver halide photographs and paper documents. Further, due to the remarkable progress of image processing technology, it has become possible to easily edit and tamper digital images by using a photo retouching tool or the like. For this reason, the originality of digital images is lower than that of conventional silver halide photographs and paper documents, and there is a problem that the ability as evidence is poor. Conventionally, a photographic image is used as an evidence photograph of an accident in, for example, an insurance company, or used as a record of the progress of a construction site in a construction company.
Its evidence power, ie its originality, has played an important role. However, as mentioned above, it is a big problem that the evidence is lost by the digitization of information.

Generally, the guarantee of the originality of a digital image is as follows.
As shown in U.S. Pat. No. 5,499,294, it is realized by creating an electronic signature using a public key encryption for a hash value of a digital image. With this method, even if the presence or absence of falsification is known, the falsification position It could not be detected.

On the other hand, when a specific pattern is embedded in the entire image as a digital watermark and the image is tampered with or edited, the embedded pattern is destroyed and the tampered position is detected. The method is known. An example thereof is a method of embedding a specific image called a stamp image in the LSB. For example, in Japanese Patent Laid-Open No. 2001-24876, the embedding position of the stamp image in the image is determined by a pseudo random number generated from secret key information. Has been proposed.

[0005]

In such a conventional tampered position detecting method using a digital watermark, the security is based on the fact that the algorithm and the embedding pattern are not known. Therefore, if the algorithm or the embedding pattern is known, it is possible to prevent the falsification even if the falsification is performed, that is, it is possible to forge the digital image. That is, LS
In the method of embedding a stamp image in B, a person who knows the algorithm first extracts and saves the LSB stamp image, tampers with the image, then reads the first saved stamp image and tamper with it again. By embedding it in the LSB of the subsequent image data, falsification in which tampering is not detected becomes possible.

Further, in the method of determining the embedding position of the stamp image by the pseudo random number as disclosed in Japanese Patent Laid-Open No. 2001-24876, since the embedding position depends on the pseudo random number, the embedding position depends on the pseudo random number. Although it is safe, the same forgery is possible once the embedding position of the stamp image is known by taking the difference between the original image and the digital watermark image.

Generally, the security of a digital watermark is often premised on that the algorithm is secret, and even if the algorithm is known, a method that can be said to be safe has not been proposed so far. Is no exaggeration.

Further, in the conventional tampering position detection method using a digital watermark, a tampered position is detected by embedding a stamp image, saving the stamp image, and comparing the saved stamp image with the extracted stamp image. . Since such a stamp image is two-dimensional data, it has a large amount of data and requires a large memory capacity to store it, which is not efficient.

Further, in the conventional method, a safe method has not been proposed when cutting and pasting a plurality of different images that have been embedded using the same stamp image with the same key.
For example, consider an attack in which a plurality of different images of the same size are decomposed into blocks of the same size, and blocks at the same position are replaced to synthesize one image. At this time, if each image uses the same key and the same stamp image, tampering cannot be detected, and this attack succeeds. For such an attack, it is possible to perform embedding processing using a different key or a different stamp image for each image. However, using different keys or different stamp images for each image is not easy to use as a digital watermark application. This is because when an image suspected of being tampered with is found, it is necessary to first specify which key or which stamp image the image is processed with. When the image to be verified is largely tampered with and the original image is difficult to estimate, or when images processed with different keys are combined, it is difficult to specify which image is the original image. That is, there are cases where it is not known which key or which stamp image should be used.

The present invention has been made in view of the above-mentioned conventional example, and a data processing method and apparatus, a program therefor, and a storage medium which can surely detect a falsification position even if an algorithm of a digital watermark method or an embedding pattern is known. The purpose is to provide.

Another object of the present invention is to eliminate the need to save a stamp image, and even if the same key is used to embed different data, it is possible to reliably detect a tampered position in the data. And its program and storage medium.

Another object of the present invention is to provide a data processing method and apparatus, a program therefor, and a storage medium which do not need to store stamp images and can detect shifts of several patterns and insertion / deletion of images. To do.

[0013]

In order to achieve the above object, the data processing apparatus of the present invention has the following configuration. That is, first pattern generation means for generating a first pattern having self-synchronization with respect to digital contents composed of a plurality of ordered data blocks, and second pattern generation for generating a second pattern depending on an image. Means, and an embedding pattern generating means for generating an embedding pattern from the first pattern and the second pattern,
Pattern embedding means for embedding the embedding pattern in each data block.

In order to achieve the above object, the data processing device of the present invention has the following configuration. That is, a first pattern generation means for generating a first pattern having self-synchronization with digital contents composed of a plurality of ordered data blocks, and a pseudo random number generation means for generating a pseudo random number based on an initial value. An encrypted block generating means for generating an encrypted data block from each of the pseudo random number and the plurality of data blocks; and an error detection code applied to each of the encrypted data blocks to generate a check bit. It is characterized by comprising a check bit generating means, an embedded pattern generating means for generating an embedded pattern from the check bit and the first pattern, and a pattern embedding means for embedding the embedded pattern in each corresponding data block.

In order to achieve the above object, the data processing apparatus of the present invention has the following configuration. That is, the third data block corresponding to each of the plurality of ordered data blocks.
Third pattern generation means for generating a pattern, fourth pattern generation means for generating a fourth pattern from the verification target image and the third pattern, and fifth pattern generation means from the fourth pattern and the verification target image. It is characterized by comprising a fifth pattern generation means and an inspection means for inspecting the self-synchronization of the fifth pattern.

In order to achieve the above object, the data processing apparatus of the present invention has the following configuration. That is, a pseudo random number generating means for generating a pseudo random number based on an initial value, an encrypted block generating means for generating an encrypted block from each of a plurality of ordered verification target data blocks, and the pseudo random number, and the cipher Check bit generating means for generating a check bit by applying an error detection code to each of the encrypted blocks, a means for obtaining a difference between the check bit and the check bit included in each data block, and a self of the difference. And an inspection means for inspecting synchronism.

In order to achieve the above object, the data processing apparatus of the present invention has the following configuration. That is, first pattern generation means for generating a first pattern having self-synchronization with digital content composed of a plurality of ordered data blocks, and the first pattern generated by the first pattern generation means. Is embedded in each data block.

Further, in order to achieve the above object, the data processing apparatus of the present invention has the following configuration. That is, first pattern generation means for generating a first pattern having self-synchronization with digital content composed of a plurality of ordered data blocks, and the first pattern generated by the first pattern generation means. And a pattern embedding unit that embeds the embedding pattern generated by the embedding pattern generating unit in each data block.

In order to achieve the above object, the data processing method of the present invention comprises the following steps. That is, a first pattern generation step of generating a first pattern having self-synchronization with respect to a digital content composed of a plurality of ordered data blocks, and a second pattern generation of generating a second pattern depending on an image. The method is characterized by including a step, an embedded pattern generation step of generating an embedded pattern from the first pattern and the second pattern, and a pattern embedding step of embedding the embedded pattern in each data block.

In order to achieve the above object, the data processing method of the present invention comprises the following steps. That is, a first pattern generation step of generating a first pattern having self-synchronization with respect to a digital content composed of a plurality of ordered data blocks, and a pseudo random number generation step of generating a pseudo random number based on an initial value. And an encrypted block generating step of generating an encrypted data block from each of the pseudo random number and the plurality of data blocks, and applying an error detection code to each of the encrypted data blocks to generate a check bit. It is characterized by including a check bit generation step, a buried pattern generation step of generating a buried pattern from the check bit and the first pattern, and a pattern embedding step of embedding the buried pattern in each corresponding data block.

In order to achieve the above object, the data processing method of the present invention comprises the following steps. That is, the third data block corresponding to each of the plurality of ordered data blocks.
A third pattern generation step of generating a pattern, a fourth pattern generation step of generating a fourth pattern from the verification target image and the third pattern, and a fifth pattern from the fourth pattern and the verification target image. It is characterized by comprising a fifth pattern generation step and an inspection step of inspecting the self-synchronization of the fifth pattern.

In order to achieve the above object, the data processing method of the present invention comprises the following steps. That is, a pseudo random number generation step of generating a pseudo random number based on an initial value, an encrypted block generation step of generating an encrypted block from each of a plurality of ordered verification target data blocks and the pseudo random number, Check bit generation step of generating a check bit by applying an error detection code to each of the encrypted blocks, a step of obtaining a difference between the check bit and the check bit included in each data block, and And an inspection step of inspecting synchronism.

Further, in order to achieve the above object, the data processing method of the present invention comprises the following steps. That is, a first pattern generation step of generating a first pattern having self-synchronization with respect to digital content composed of a plurality of ordered data blocks, and the first pattern generated in the first pattern generation step. Is embedded in each data block.

Further, in order to achieve the above object, the data processing method of the present invention comprises the following steps. That is, a first pattern generation step of generating a first pattern having self-synchronization with respect to digital content composed of a plurality of ordered data blocks, and the first pattern generated in the first pattern generation step. And a pattern embedding step of embedding the embedding pattern generated in the embedding pattern generating step in each data block.

[0025]

BEST MODE FOR CARRYING OUT THE INVENTION [First Embodiment] FIG. 1 is a conceptual diagram for explaining an image embedding process according to a first embodiment of the present invention.

Here, it is assumed that the original image I (i, j) is a multi-valued image consisting of M × N pixels (here, one pixel is an 8-bit multi-valued image). In the following, ⊚ represents EXOR (exclusive OR). However, in the processes from the process 103 onward in FIG. 1, i = 0, j = 0 to i = M-
1, j = N-1 is performed for each pixel.

<Embedding Process (FIG. 1)> First, process 101
Then, the self-synchronization pattern C (i, j) is generated with the value ki determined for each image as an initial value.

Next, in step 102, a pseudo random number is generated with the key k as an initial value, 8-bit data is input, and 1-bit data is output to create a lookup table LUT (). This is realized by allocating the generated pseudo-random number to each address in 1-bit order in each table.

Next, in process 103, the LS of the image I (i, j)
From the image I7 (i, j) excluding B, B (i, j) = LUT (I7
(I, j)) is calculated. Where LUT (I7 (i, j))
Image I7 (i, j) is a lookup table LUT ()
1-bit random number value that is output corresponding to the input.

Next, in process 104, the LS of the image I (i, j)
By embedding {B (i, j) ⊚C (i, j)} in B, an image I '(i, j) in which a digital watermark is embedded is generated.

The image I '(i, j) in which the digital watermark obtained by this digital watermark embedding processing is the LSB of the B component of the image I (i, j) is {B (i , j) ◎ C (i, j)}. Here, the reason why the digital watermark embedded image in which only the LSB of the B component is changed is to realize the digital watermark embedding process with the least deterioration of the image quality of the original image in consideration of human visual characteristics.

Next, a method for extracting the digital watermark thus embedded will be described. The verification target image is V (i,
It is represented by j). The verifier uses the key k used in the embedding process.
To share.

In order to make this embedding process easier to understand, the process flow is shown in the schematic diagram of FIG.

In FIG. 7, reference numeral 410 is a self-synchronization pattern generator having a self-synchronization pattern C (i,
j) has occurred. Reference numeral 411 is a pseudo-random number generator, which has a value k.
Is generated as an initial value and stored in the lookup table LUT 412 in the order of addresses. An image I7 (i, j) excluding the LSB of the image I (i, j) is input to the LUT 412, and 1-bit data B (i, j) is output correspondingly. The exclusive OR of this B (i, j) and the self-synchronization pattern C (i, j) is taken and inserted into the LSB of the original image I (i, j) to embed the digital watermark. The image becomes I ′ (i, j).

<Extracting Process (FIG. 2)> FIG. 2 is a diagram for explaining a process for detecting a tampered position by extracting a digital watermark from an image in which the digital watermark is embedded.

First, in process 201, a pseudo-random number is generated with the key k as an initial value, and as in the embedding process, a lookup table LUT () having an input of 8 bits and an output of 1 bit.
To create. The lookup table created in this way is the same as the lookup table 412 in FIG. 7.

Next, in process 202, the verification target image V (i,
The image V7 (i, j) excluding the LSB of j) is input to the LUT to obtain U (i, j) = LUT (V7 (i, j)). Here, U (i, j) indicates a 1-bit random value output corresponding to the image V7 (i, j) input to the lookup table LUT ().

Next, in process 203, if U (i, j) = LSBV, D (i, j) = 0 is set, and if U (i, j) ≠ LSB, D is set.
(I, j) = 1. Where LSBV is the image V (i, j)
Is the LSB.

Next, in process 204, self-synchronization is performed from the output result D (i, j) in process 203, and the position out of synchronization is set as the tampered position.

Here, the self-synchronization pattern C (i, j) is
A bit sequence having a long cycle and strong autocorrelation, for example, a bit sequence called an M sequence is known. The M sequence is a cyclic code having an information length m and a code length n = 2m-1,
By using the m-stage shift register, a bit string having a maximum length cycle can be easily generated.

FIG. 4 is a block diagram showing the configuration of an M sequence generator using the following equation (1). In FIG. 4, 401 is a shift register and 402 is an adder (EXOR)
Indicates.

H (x) = hm-1 · x ^m-1 + hm-2 · x ^m-2 + ... + h1 · x + h0 ... Formula (1) Here, self-synchronization performed in the process 101 of FIG. The pattern generation process is performed as follows.

The initial values c1, ..., cm of each of the plurality of shift registers 401 in FIG.
Calculate m + 1. This output result cm + 1 is fed back to the first shift register 401, and the operation is sequentially repeated to obtain the self-synchronization pattern C (i, j) = [c
, ..., cMxN] is generated. Here, it is clear that the value in each shift register 401 and its output value cm + 1 have the following relationship.

Ci + m = ci + m-1.x ^m-1 + ci + m-2.x ^m-2 + ... + ci + 1.x + ci ... Formula (2) Then, the process 204 in FIG. The self-synchronization method in is executed as follows.

FIG. 5 is a block diagram showing the configuration of an M-sequence calculator for checking the M-sequence. In FIG. 5, 5
01 is a shift register, 502 is an adder (EXOR), 50
Reference numerals 3 denote switches, respectively.

In FIG. 5, when the switch 503 is connected to the input side (terminal a), the extracted bit series is input. On the other hand, when the switch 503 is connected to the feedback side (terminal b), it becomes a normal M-sequence data generator as shown in FIG.

First, consider the case where a bit sequence that has not been tampered with is input.

When the switch 503 is connected to the input side (terminal a) and the first bit sequence d1, ..., dm of the extracted bit string D (i, j) is input to the M sequence generator,
Since the relationship of the above equation (2) is established, cm + 1 is calculated. The calculated value cm + 1 is the extracted bit string D (i, j)
Since it coincides with dm + 1 which is the next bit of, it can be seen that synchronization is achieved. After that, even if the process is repeated up to M × N, all the bits match, so that it is understood that no tampering has been performed.

Next, when the synchronization is achieved up to d1, ..., di and the synchronization is lost at di + 1, that is, ci + 1 ≠ di + 1
When it becomes, it can be seen that di + 1 is the falsification position. After that, if the calculation is continued with the switch 503 set to the input side, the influence of di + 1 causes the subsequent m bits to be
It is clear that the calculated value c and the extracted value d do not match.

Therefore, when tampering is detected, the switch 50
3 is connected to the feedback side (terminal b), the calculated value ci + 1 is input to the M-sequence generator instead of the extracted value di + 1 which is a falsified value, and the calculation is continued. At this time, when only the extracted value di + 1 is at the falsification position, the calculation is continued with the correct ci + 1 instead of di + 1, so that the values after di + 2 are the same. However, since there is a chance that ci + 2 and di + 2 coincide with each other, it is determined that the synchronization is achieved again only when they coincide with each other for t times or more, that is, no alteration is performed after di + 2.

Similarly, when tampering is intensively performed after di + 1, if t times or more consecutively match, it is determined that synchronization has been traced back to t, that is, there is no tampering. Here, if t is made large, the probability of coincidence t times consecutively becomes 2 ^−t , so the probability of coincidence can be made extremely small.

In the initial state, the first d1, ...,
If even one bit is tampered with in dm, the above equation (2) does not hold, so the bit calculated from the beginning does not match the extracted bit dm + 1, and the synchronization is lost. In this case, since the correct calculated value cm + 1 cannot be obtained, the switch 503 is connected to the input side (terminal a) until the expression (2) is satisfied and the calculation is continued. In this way, if the synchronized state continues t times in a row, it is determined that the synchronized state has been established, and thereafter, the same processing as the case where the synchronized state is lost from the middle is performed.

Further, the self-synchronization pattern is not limited to the linear operation like the M series, but the value of the shift register may be calculated by the non-linear function, or the plurality of M series patterns may be calculated by the non-linear function. .

As a result, the image is shifted,
Even if partial deletion / insertion is performed, it can be detected by the loss of synchronization at that part, and the position can be tampered with.

Next, let us consider the case of an attack in which an image subjected to embedding processing is cut and pasted using the same key as described in the subject of the present invention. Here, for simplicity, it is assumed that there is no other tampering.

First, synchronization starts from the self-synchronization pattern of the first image. In this embodiment, in the embedding process 101 of FIG. 1, different self-synchronization patterns are embedded by using different initial values ki for each image. Therefore,
Synchronization will be lost in the part where different images are cut and pasted. If all the different images are combined here,
Even if the switch 503 is set to the feedback side (terminal b) and the pattern matching is inspected, the synchronization does not return, and the part other than the first image is detected as the tampered part. This does not use a predetermined stamp image,
This is because the self-synchronization detected from the extracted pattern is used, and thus the difference in self-synchronization, that is, the difference in image can be detected.

Here, in order to more strictly verify an attack such as cut and paste, a state (state 1) in which the switch 503 is connected to the feedback side and calculation is performed and a state in which the switch 503 is connected to the input side are calculated. It is possible to perform the state (state 2) in parallel. For example, if the synchronization is lost and the switch 503 is connected to the input side thereafter to continue the calculation, the synchronization returns again when m bits have passed from the cut and pasted portion. This is because the embedded pattern is another self-synchronization pattern, so that when the influence of the previous image disappears, the self-synchronization starts to be obtained with the pattern of the next image. Therefore, by performing the calculations of “state 1” and “state 2” in parallel, it is possible to identify that different images are combined. It is clear that this method is also effective when the image is shifted, lines of the image are inserted, or deleted.

As described above, the alteration position determination performed in the process 204 of FIG. 2 is represented by the state transition diagram shown in FIG. However, in the case of verifying the attack in more detail, in the falsification state 602 and the semi-synchronous state 604, “state 1” and “state 2” exist in parallel.

First, the initial state 601 becomes the processing start state, the switch 503 is connected to the input side, the first extraction patterns d1 to dm are set as the initial value of each shift register 501, and cm + 1 is calculated, The calculation result is compared with the extracted dm + 1. Here, if cm + 1 = dm + 1, the state transits to the synchronization state 603 (610), and if cm + 1 ≠ dm + 1, the state transits to the falsification state 602 (611).

The falsification state 602 is a state in which the position of the previous state is falsified, and in this case, the switch 503 is connected to the feedback side (terminal b) and the calculation (state 1) is continued to be calculated. The value cm + 1 is compared with the extracted value dm + 1. If these values match, the state transits to the semi-synchronous state 604. At the same time, the calculation (state 2) in which the switch 503 is connected to the input side is also continued, and the calculated value cm + 1 is compared with the extracted value dm + 1. Here, if these values match, the state shifts to the semi-synchronous state 604 (612).

The semi-synchronous state 604 indicates a state in which the results of "state 1" and "state 2" do not match. Here, the calculation of "state 1" and "state 2" is continued, and the result of "state 1" is continued. , If the result of the “state 2” matches t ² times in succession, transition to the synchronous state 603 without tampering (613), and if they do not match, the tampered state 602 (614).

In the synchronous state 603, the switch 503 is connected to the input side (terminal a), the calculated value ci + m is calculated from the extracted values di to di + m-1, and ci + m = di + m. ing. Here, if they do not match, the state transits to the falsification state 602 (615).

The image embedding processing and the extraction processing described above can be realized by using the image processing apparatus shown in FIG.

FIG. 3 is a block diagram showing the configuration of the image processing apparatus according to the embodiment of the present invention.

In FIG. 3, the host computer 301
Is a widely used personal computer, for example, which can input image data read by the scanner 314 and edit and store the image data. Further, the image data obtained here can be printed by the printer 315. The mouse 31 is used for various manual instructions from the user.
2. Input is made from the keyboard 313. Inside the host computer 301, each block to be described later is connected by a bus 316, and various data can be transferred.

In the figure, 302 is a display (monitor) for a CRT, liquid crystal, plasma or the like. 303 is a CPU,
It controls the operation of each internal block or executes a program stored inside. A ROM 304 stores a specific image that is not permitted to be printed, an image processing program required in advance, various data, and the like. A RAM 305 temporarily stores a program and data to be processed for the CPU 303 to perform processing. A hard disk (HD) 306 is a RAM 305.
The program and image data to be transferred to the computer etc. are stored in advance, or the processed image data is saved. An interface unit 307 is connected to a scanner 314 that generates image data by reading a document or film with a CCD, and inputs image data obtained by the scanner 314. A CD drive 308 can read or write data stored in a CD (CD-R) which is one of external storage media. Reference numeral 309 denotes an FD drive, which, like the CD drive 308, reads data from a floppy disk (FD) and writes data to the FD. Reference numeral 310 denotes a DVD drive, which, like the CD drive 308, reads data from a DVD,
Data can be written to. In addition, these CD, FD,
When a program for image editing or a printer driver is stored in the DVD or the like, these programs are once installed on the HD 306, transferred to the RAM 305 as necessary and held, and based on this program or the like. The CPU 303 can be executed.
An interface unit (I / F) 311 is connected to the mouse 312 or the keyboard 313 to receive an input instruction. A modem 318 is connected to an external network via an interface unit 319 (I / F).

In the above configuration, the image data to be processed is input from the storage medium such as a CD-ROM, a DVD or the like, the scanner 314, or the network via the interface unit 319, and temporarily stored in the RAM 305. Then, in accordance with an instruction input from the keyboard 313, the mouse 312, or the like, a program that executes the above-described or later-described processing is read from the HD 306 and RA
By storing the program in the M305 and executing the program, the processing according to the first to fourth embodiments is performed by the CPU 303.
Executed under the control of. The image in which the digital watermark or the image is embedded is transmitted to the network or stored in a storage medium such as a CD or a DVD.
Further, it is possible to detect whether the image data has been tampered with illegally by executing the extraction process of the embedded image with respect to the image data input from the network or the above-mentioned storage medium. The result thus obtained may be displayed on the monitor 302 to warn the operator, or may be printed by the printer 315.

As described above, according to the first embodiment, it is not necessary to store the stamp image, and a safe method can be realized even if the embedding process is performed on different images using the same key. This method can be said to be a safe method even if all the algorithms except the key are disclosed if the conversion table generated from the pseudo-random number generation method using the key as the initial value is safe.

[Second Embodiment] In the first embodiment, the pixel value I7 of each pixel of the original image I (i, j) excluding the LSB is used.
When (i, j) is the same, the generated B (i, j) is the same, so it may be easier to analyze. Therefore, a method of making the analysis difficult by converting with a random number according to the pixel position is shown below.

FIG. 8 is a schematic diagram for explaining a digital watermark embedding process according to the second embodiment of the present invention.

<Embedding Process (FIG. 8)> First, process 701
Then, the self-synchronization pattern C (i, j) is generated with the value ki determined for each image as an initial value.

Next, in process 702, a pseudo-random number is generated with the key k as an initial value, and a lookup table LUT () with 8-bit input and 1-bit output is created. This is realized by allocating the generated pseudo-random number (1 bit) in the order of addresses in each table. Further, the pseudo random number is continuously generated to generate a binary pseudo random number image R of M × N.
Generate (i, j).

Next, in step 703, the original image I (i, j)
From the image I7 (i, j) excluding the LSB of B (i, j) = LU
Calculate T (I7 (i, j)) * R (i, j). Where L
UT (I7 (i, j)) indicates a 1-bit random value output corresponding to the image i7 (i, j) input to the lookup table LUT ().

Next, in step 704, the original image I (i, j)
The digital watermark image I ′ (i, j) is generated by embedding {B (i, j) ⊚C (i, j)} in the LSB of the.

Here, the difference from the first embodiment is that
Instead of simply using B (i, j) as 1-bit data (LUT (I7 (i, j))) corresponding to the image i7 (i, j), the 1-bit data and M × N 2 Pseudo-random image of value R
(I, j), that is, an exclusive OR with a random number value corresponding to the pixel position.

The outline of the embedding process according to the second embodiment is shown in FIG. Note that, in FIG. 10, portions common to those in FIG. 7 are denoted by the same symbols, and description thereof will be omitted.

In FIG. 10, the LS of the original image I (i, j)
The output of the lookup table 412 (LUT
(I7 (i, j))) and the pseudo-random number R (i, j) for the number of pixels of the image I (i, j) generated with the key k as the initial value The feature is that it is inserted into the LSB of the.

<Extraction Process (FIG. 9)> FIG. 9 is a schematic diagram for explaining the digital watermark extraction and tampered position detection process according to the second embodiment of the present invention.

First, in process 801, a pseudo-random number is generated with the key k as an initial value, and as in the embedding process of FIG. 8, a lookup table LUT with an 8-bit input and a 1-bit output is generated.
Create (). Furthermore, continue to generate the pseudo-random number,
An M × N binary pseudo random number image R (i, j) is generated.

Next, in process 802, the verification target image V (i,
From the image V7 (i, j) excluding the LSB of j), U (i, j) = L
UT (V7 (i, j)) ◎ Calculate R (i, j). here,
LUT (V7 (i, j)) indicates the output (1 bit) of the lookup table when the image V7 (i, j) is input.

Next, in process 803, if U (i, j) = LSBV, then D (i, j) = 0, and if U (i, j) ≠ LSBV, then D (i, j).
j) = 1. Here, LSBV represents the LSB of the B component of the verification target image V (i, j).

Next, in process 804, self-synchronization is performed from D (i, j), and the position out of synchronization is set as the tampered position.

In the second embodiment, the look-up table output value (LUT (I7 (i, j)) or LUT (V7 (i, j))) that depends only on the pixel value and does not depend on the pixel position.
On the other hand, even if the pixel value is the same, the exclusive OR with the pseudo random number R (i, j) generated in the process 702 of FIG. 8 or the process 802 of FIG. 9 is obtained (process 703, 803). Different B (i, j) and U (i, j) can be output to make analysis difficult. However, pseudo-random number R (i, j)
Are self-synchronization patterns C (i, j) and extraction patterns D (i, j
j) or the image I (i, j) or V (i, j) may be obtained by exclusive OR, and the effect is the same in both cases.

[Third Embodiment] In the conventional tampered position detecting method for storing stamp images, when the image is scaled, rotated, or cut, the tampered image is referred to with reference to the shape of the stored stamp image. It is possible to correct scaling, rotation, and trimming of.

On the other hand, in this embodiment, since the stamp image is not stored, the shape of the stamp image cannot be referred to. Therefore, the following means are used to deal with scaling, rotation, and clipping.

1) Image I'with a digital watermark embedded
If (i, j) has undergone overall falsification such as scaling, rotation, etc., it depends on the definition of falsification, but if scaling, rotation is also considered falsification, it is extracted without worrying about changes in image size or shape. If the processing is performed, the verification target image V (i, j) and the embedded image I ′ (i, j) at the same pixel position are almost different, and the correspondence with the pseudo-random number is also different. To be detected. Therefore, in this case, no means is required.

However, if the scaling and rotation are not considered to be tampering, a registration signal as will be described later is embedded in advance, and after scaling and rotation are corrected,
If the tampered position detection processing is performed, it is possible not to consider a restoration change such as enlargement / reduction or rotation that is tampered with. Therefore, in this case, as shown in FIG. 11, after the image correction unit 1201 performs the image correction by the registration signal,
The falsification position detection unit 1102 having the functions described in the first and second embodiments executes the verification and falsification position detection processing.

2) When cropping the embedded image I '(i, j) The self-synchronization pattern C (i, j) generated in the process 101 of FIG. 1 is first set to i = 0, j = 0, for example. To i = i +
It corresponds to 1 up to i = M, then j = j + 1, i = 0
The same correspondence is performed from the position of up to i = M and j = N. That is, when the self-synchronization pattern C (i, j) is made to correspond in order from the top row of the image, only the lower part of the embedded image I ′ (i, j) is cut off at all positions U (i, j). = LSB and no tampering is detected. Therefore, the self-synchronization pattern C
Correspondence to the image position of (i, j) needs to be performed one by one vertically and horizontally so that the image I (i, j) is not easily cut, or it needs to be determined in advance at random. . Alternatively, it is possible to change the self-synchronization pattern according to the image size.

Further, in the above-mentioned embodiment, the description has been made only in the case of the multi-valued image, but even in the case of a color image, it is converted into R.
The present invention can be carried out by decomposing it into GB. In this case, it may be performed separately for each RGB or may be performed by combining the RGB results.

In the present embodiment, the self-synchronization pattern has been described as an example, but the present invention is not limited to this as long as the difference between the patterns can be easily identified. For example, instead of the self-synchronization pattern, it is possible to insert a normal image with different strengths for each color component and detect the falsification position by color identification.

Further, since the autocorrelation calculation can be performed by frequency conversion, the self-synchronization detection is not limited to the configuration shown in FIG.

Further, t for establishing synchronization is the initial state 6
It is also possible to change between the case of transitioning from 01 to the synchronization state 603 and the case of transitioning from the falsification state 602 to the synchronization state 603. In general, t for establishing synchronization from the initial state 601 should be set larger than t for establishing synchronization from the falsification state 602. Further, when the value of t for establishing synchronization from the falsification state 602 is set to "1", the semi-synchronous state 604 is not passed, so the state transition diagram of FIG. 6 is variable according to the value of t. . Therefore, the state transition in the present embodiment is not limited to FIG.

For simplicity, the self-synchronization pattern is M
Although the sequence has been described as an example, since a pseudo random number generally has self-synchronization, a pseudo random number generator can be used.
For example, the M-sequence generator shown in FIG. 4 inputs m bits,
It is replaced with a conversion table that outputs 1 bit. Therefore, it is also possible to generate a pseudo-random number from a certain initial value k1 and use a new m-bit input to correspond to the output of the 1-bit output lookup table.

Further, a pseudo random number is generated with the key k0 as an initial value, and an exclusive OR of each bit except the LSB of the B component of the image I (i, j) is taken to obtain the image I (i, j). )
May be encrypted according to the pixel position, and a pattern embedded in the LSB may be generated instead of the image I (i, j). At this time, in the extraction process, the same process is performed by encrypting the image V (i, j) using the pseudo random number generated from the same key k0.

[Registration signal] Various attacks may be applied to the digital watermark. Such attacks include, for example, lossy compression such as JPEG and geometric transformation such as enlargement / reduction or rotation. Registration signals are signals that are embedded to correct the geometric distortions caused by these various attacks. The registration processing adds a specific signal (registration signal) to the image separately from the additional information when embedding the digital watermark, and when extracting the digital watermark, before adding the additional information, This is a process of promoting the extraction of additional information using the registration signal.

As a method using this registration, there is a method proposed in US Pat. No. 5,636,292. This is a method for automatically calculating the geometric transformation applied to an image using a geometric pattern embedded in advance. Also, there is a method proposed by Japanese Patent Laid-Open No. 11-355547, which is composed of two-dimensional waves having no axis of symmetry.

[Fourth Embodiment] The first to third embodiments described above.
In the above, taking an image as an example, a more reliable tampering position detection method has been described.However, the data targeted in the present invention is not limited to an image, and for example, digital data is divided into blocks and tampering corresponding thereto is performed. This includes all cases such as adding inspection information for detecting the position.

As an example thereof, consider the case where one content is represented by a plurality of data blocks, as shown in FIG. In the case of normal tampering detection, the check bit for each data block may be added using an error detection code or the like. If the error detection code used is special and secret, there is no problem because the attacker cannot generate the corresponding check bit even if the data block is falsified, but if the error detection code used is public , The attacker can generate a check bit corresponding to the tampered data and cannot detect the tampering of the data block. Even if the error detection code used is special and secret, the replacement of data blocks including check bits cannot be detected because the error detection is performed for each data block. This causes the same problem as in the case of the image, which is also taken up in the above-mentioned embodiment. Such a problem is solved by performing encryption according to the order of data blocks and generating a check bit corresponding to the encrypted block.

However, if there are a plurality of different contents and the same key is used to perform encryption on those contents in the same manner, if the data blocks constituting the different contents are exchanged, the alteration will not occur. After all it is not detected. Therefore, as described below, an example will be described in which such a problem is solved by embedding a pattern having a self-synchronous property, which is different for each content and continuously, as a digital watermark.

FIG. 13 is a diagram for explaining a process of embedding check bits in a data block on the transmitting side according to the fourth embodiment of the present invention.

<Sending Side (FIG. 13)> First, in process 1301, a pattern C (i) having self-synchronization is generated with a value ki determined for each content as an initial value.

Next, in process 1302, a pseudo random number is generated with the key k as an initial value, and in sequence, the exclusive OR of each data block D (i) (i represents the order) forming the content and the pseudo random number. Thus, the encrypted block CC (i) according to the order of the data blocks is generated.

Next, in process 1303, the data block CC encrypted using a known error detection code is used.
Generate a check bit P (i) corresponding to (i), C (i)
Data block D (i)
Added to.

FIG. 15 is a diagram showing the process of embedding check bits in a data block on the transmitting side according to the fourth embodiment in a more understandable manner.
00 generates a pattern C (i) having self-synchronization with a value ki determined for each content as an initial value. The pseudo random number generator 1501 also generates a pseudo random number R (i) with the key k as an initial value. And the encrypted block CC
(I) is the pseudo random number R (i) and the data block D
The check bit P (i) is obtained by applying the error detection code to the encrypted block CC (i), which is obtained by exclusive OR with (i). This check bit P
The bit to be added to the data block D (i) is obtained by the exclusive OR of (i) and the self-synchronization pattern C (i),
By adding this to the data block D (i),
Data block D '(i) 15 in which check bits are embedded
Create 02.

FIG. 14 is a diagram for explaining the tampered position detection processing in the data block D ′ (i) on the receiving side according to the fourth embodiment of the present invention.

<Reception Side (FIG. 14)> First, processing 1401
Then, a pseudo random number is generated by using the key k as an initial value, and each data block D ′ (i) forming the content is sequentially exclusive-ORed with the pseudo random number, so that the order of the data blocks is determined. Generate a cipher block CC ′ (i).

Next, in process 1402, the check bit P ′ (i) is calculated from the encrypted data block CC ′ (i) using the known error detecting code used on the transmitting side, and the check bit for reception is received. The difference C ′ (i) from P (i) is taken.

Next, in processing 1403, the self-synchronization of the difference C '(i) is checked, and the position of the content corresponding to the block out of synchronization is set as the falsification position.

As an application example in which one content is composed of such a plurality of data blocks, MIDI (Music Instrument Digital Int), which has been widely used as music information distributed on the Internet in recent years, is used.
erface) and SMF (Standard MIDI File), which is a standard format for music performance data files. These transmit music information by dividing it into a plurality of blocks, and the receiving side combines these transmitted blocks and reproduces as one music information. Therefore,
It is obvious that the method according to the fourth embodiment can be applied to the detection of the tampered block.

Although JPEG, MPEG, and the like are apparently configured as one data stream, they can be decomposed into 8 × 8 pixel blocks or data blocks for each frame, and these blocks are consecutive. It constitutes one content. In FIG. 6, data blocks are shown in a disassembled form for the sake of simplicity. However, the present invention can be applied to a single data stream in appearance or to a content substantially composed of a plurality of data blocks. It is also clear that

Further, in the fourth embodiment, the check bit is composed of the error correction code, but it may be composed of a known hash function or the like. Furthermore, in the present embodiment, the check bit is described as being attached to the data block, but it may be embedded in the data block by a known digital watermark applicable to the content, and is not limited.

[Fifth Embodiment] FIG. 16 is a conceptual diagram for explaining an image embedding process according to a fifth embodiment of the present invention. In the fifth and subsequent embodiments, the image processing device, the M-sequence generator, and the M-sequence generator are also included.
Since the configuration of the sequence calculator is the same as that described with reference to FIGS. 3 to 5 described above, the description thereof will be omitted.

Here, it is assumed that the original image I (i, j) is a multivalued image consisting of M × N pixels (here, each pixel is described as a multivalued image of 8 bits).

<Embedding Process (FIG. 16)> First Process 16
At 01, a self-synchronization pattern C (i, j) is generated with a value ki determined for each image as an initial value. Next, in processing 1602,
The generated self-synchronization pattern C (i, j) is used as the image I (i, j
The image I '(i, j) in which the digital watermark is embedded is generated by embedding it in the LSB of j).

In the image I '(i, j) in which the digital watermark obtained by the digital watermark embedding process is embedded, the LSB of the image I (i, j) is converted into the self-synchronization pattern C (i, j) in process 1602. This is the image changed to j). Here, when the image I (i, j) is a color image, the LSB of the B component is changed. This is to realize the digital watermark embedding process with the least deterioration of the image quality of the original image in consideration of human visual characteristics.

Next, a method of extracting the digital watermark thus embedded will be described. The verification target image is represented by V (i, j) here.

<Extraction Processing (FIG. 17)> FIG. 17 is a diagram for explaining processing for extracting a digital watermark from the image V (i, j) in which the digital watermark is embedded and detecting a falsification position.

First, in process 1701, the verification target image V (i,
Extract the LSB of j) and call it the D (i, j). Next, in process 1702, the output result D (i,
The self-synchronization from j) is taken, and the position where the synchronization is lost is the tampered position.

Here, the self-synchronization pattern C (i, j) is a bit sequence having a long cycle and a strong autocorrelation, for example, M
A bit sequence called a sequence is known. The M sequence is a cyclic code having an information length m and a code length n = 2 ^m −1, and m
By using a shift register of stages, it is possible to easily generate a bit string having a maximum length period.

The configurations of such an M-sequence generator and an M-sequence calculator have been described with reference to FIGS. 4 and 5 described above, and therefore description thereof will be omitted here.

In this way, even if the image is shifted or partially deleted / inserted, it can be detected by the loss of synchronization at that part, and the position can be tampered with. The image embedding process and the image extracting process described above can be realized by using the image processing apparatus shown in FIG.

As described above, according to the fifth embodiment, it is not necessary to save the stamp image, and the self-synchronization is detected even if there is a shift, insertion or deletion of several patterns. There is an effect that the falsification position can be detected.

[Sixth Embodiment] In the fifth embodiment described above, the self-synchronization pattern is directly embedded in the LSB of the original image I (i, j), but it may be easier to analyze as it is. So, combining with other patterns,
It is possible to further convert the self-synchronization pattern.
Therefore, in the sixth embodiment, an example will be described in which a pseudo random number having another key as an initial value is used for the self-synchronization pattern to make analysis difficult.

FIG. 18 is a schematic diagram for explaining a digital watermark embedding process according to the sixth embodiment of the present invention.

<Embedding Process (FIG. 18)> First, Process 18
At 01, a self-synchronization pattern C (i, j) is generated with a value ki determined for each image as an initial value. Next, in processing 1802,
A pseudo random number B (i, j) having the same length as the self-synchronization pattern is generated with the key k as an initial value. Next, the processing 1803 is performed.
Calculate B (i, j) ◎ C (i, j). However, here ◎
Represents an EXOR (exclusive OR) operation. Next, process 18
04, the LSB of the original image I (i, j) is changed to {B (i, j)
By embedding C (i, j)}, a digital watermark image I ′ (i, j) is generated.

Here, the point different from the fifth embodiment is that
This is that the self-synchronization pattern C (i, j) is stream-encrypted by the pseudo random number B (i, j). by this,
A third party who does not know the key k has difficulty in analyzing the self-synchronization pattern.

Furthermore, the embedding position can be set to a position other than the LSB by using a random number generated using the key k. For example, it is conceivable to divide the generated pseudo-random number into 2 bits and use it as the embedding position. That is, "00"
It is conceivable to embed LSB, "01" in the upper bit of the LSB, and further embed "10" and "11" in the upper bit, respectively.

<Extraction Process (FIG. 19)> FIG. 19 is a schematic diagram for explaining the digital watermark extraction and tampered position detection process according to the sixth embodiment of the present invention.

First, in processing 1901, a pseudo random number is generated with the key k as an initial value, and B (i, j) is generated. Next process 1
At 902, the LSB of the verification target image V (i, j) is extracted,
Let U (i, j). Next, in processing 1903, D (i, j) = U
(I, j) ◎ Calculate B (i, j). Next, in process 1904,
Self-synchronization is performed from D (i, j), and a position out of synchronization is set as a falsification position.

In the conventional tampered position detection method for saving stamp images, when the image is scaled, rotated, or cut, the tampered image is scaled or rotated with reference to the shape of the saved stamp image. Cuts can be corrected. On the other hand, in the present embodiment, since the stamp image is not stored, the shape of the stamp image cannot be referred to. Therefore, enlargement / reduction, rotation, and cutting are dealt with by the means described with reference to FIG.

Further, although the present embodiment has been described by taking the self-synchronization pattern as an example, the present invention is not limited to this as long as the difference between the patterns can be easily identified. For example, instead of the self-synchronization pattern, it is possible to insert a normal image with different strengths for each color component and detect the falsification position by color identification.

Further, since the autocorrelation calculation can be performed by frequency conversion, the self-synchronization detection is not limited to the configuration shown in FIG.

In the above-mentioned embodiments, taking an image as an example,
Although the tampered position detection method has been described, the target data in the present invention is not limited to images, but includes all cases where digital data is blocked and inspection information for detecting the tampered position corresponding thereto is added. Be done.
As one example thereof, as shown in FIG. 12 described above, one content is represented by a plurality of data blocks, but the same operation can be performed. Therefore, it is obvious that if the pixel described in the above embodiment is used as a data block, the falsification position can be detected for each data block of arbitrary content. That is, a plurality of pixels may be used as a data block, and tampering position detection can be performed on time-series information such as music information. Further, it is clear that the tampered position in the packet can be detected even when the content is decomposed into data blocks and packet communication is performed.

Although JPEG, MPEG, and the like are apparently configured as one data stream, they can be decomposed into 8 × 8 pixel blocks or data blocks for each frame, and these blocks are consecutive. It constitutes one content. In FIG. 12, the data blocks are shown in a disassembled form for the sake of simplicity, but the present invention can be applied to a single data stream in appearance or to a content substantially composed of a plurality of data blocks. It is also clear that

The present invention is not limited to the apparatus and method for realizing the above-described embodiment and the method of combining the methods described in the embodiments, and the computer (CPU or CPU in the system or apparatus described above is not limited thereto. MP
In U), a program code of software for realizing the above-described embodiment is supplied, and the computer of the system or the apparatus operates the various devices according to the program code to realize the above-described embodiment. It is included in the category of the present invention.

Further, in this case, the program code itself of the software realizes the function of the above-mentioned embodiment, and the program code itself and means for supplying the program code to the computer, specifically, A storage medium storing the program code is included in the scope of the present invention.

Storage media for storing such program codes include, for example, floppy disks, hard disks, optical disks, magneto-optical disks, CD-ROMs,
A magnetic tape, a non-volatile memory card, a ROM or the like can be used.

The program code is running on the computer, not only when the functions of the above-described embodiments are realized by the computer controlling various devices only according to the supplied program code. Even when the above embodiment is realized in cooperation with an OS (operating system) or other application software, such program code is included in the scope of the present invention.

Further, after the supplied program code is stored in the memory provided in the function expansion board of the computer or the function expansion unit connected to the computer, the function expansion board or function is stored based on the instruction of the program code. A case in which the CPU or the like included in the storage unit performs a part or all of the actual processing and the above-described embodiment is realized by the processing is also included in the scope of the present invention.

As described above, according to the present embodiment, it is possible to realize a tampered position detection method using a digital watermark that is safe even when embedding different images using the same key, which has been impossible in the past. it can.

Further, according to the present embodiment, it is not necessary to store the stamp image, and only the key needs to be kept secret, which is efficient.

Further, according to the present embodiment, it is possible to detect only the tampered portion such as the shift or the insertion / deletion of the digital contents, which cannot be done conventionally.

[0143]

As described above, according to the present invention, even if the algorithm of the digital watermarking method or the embedding pattern is known, the falsified position can be detected with certainty.

Further, according to the present invention, there is an effect that it is not necessary to store a stamp image, and even if embedding processing is performed on different data using the same key, the falsified position in the data can be detected reliably.

Further, according to the present invention, it is possible to detect only the tampered portion such as displacement, insertion or deletion of digital contents, which cannot be done conventionally.

[Brief description of drawings]

FIG. 1 is a conceptual diagram illustrating an outline of an image embedding process according to a first embodiment of the present invention.

FIG. 2 is a schematic diagram illustrating a process of extracting an embedded image and identifying a falsification position according to the first embodiment.

FIG. 3 is a block diagram showing a configuration of an image processing apparatus according to an embodiment of the present invention.

FIG. 4 is a block diagram showing a configuration of a self-synchronization pattern generator according to the first embodiment of the present invention.

FIG. 5 is a block diagram showing a configuration of a self-synchronization pattern calculator according to the first embodiment of the present invention.

[Fig. 6] Fig. 6 is a diagram for describing state transitions for self-synchronization according to the first embodiment of the present invention.

FIG. 7 is a conceptual diagram illustrating an image embedding process according to the first embodiment of the present invention.

FIG. 8 is a conceptual diagram illustrating an outline of an image embedding process according to the second embodiment of the present invention.

FIG. 9 is a schematic diagram illustrating a process of extracting an embedded image and identifying a falsification position according to the second embodiment.

FIG. 10 is a conceptual diagram illustrating an image embedding process according to the second embodiment of the present invention.

FIG. 11 is a diagram illustrating an outline of extraction processing according to the third embodiment of the present invention.

FIG. 12 is a diagram illustrating embedding of check bits in a data block according to the third embodiment of the present invention.

FIG. 13 is a diagram illustrating a process of embedding check bits in a data block on the transmission side according to the fourth embodiment of the present invention.

FIG. 14 is a diagram illustrating a process of detecting a falsified position in a data block on the receiving side according to the fourth embodiment of the present invention.

FIG. 15 is a conceptual diagram illustrating a data embedding process in a data block according to the fourth embodiment of the present invention.

FIG. 16 is a conceptual diagram illustrating an outline of image embedding processing according to the fifth embodiment of the present invention.

FIG. 17 is a schematic diagram illustrating a process of extracting an embedded image and identifying a falsification position according to the fifth embodiment.

FIG. 18 is a conceptual diagram illustrating an outline of an image embedding process according to a sixth embodiment of the present invention.

FIG. 19 is a schematic diagram illustrating a process of extracting an embedded image and identifying a falsification position according to the sixth embodiment.

Claims (48)

[Claims] 1. A first pattern generation means for generating a first pattern having self-synchronization with respect to digital contents composed of a plurality of ordered data blocks, and a second pattern for generating a second pattern depending on an image. Data comprising two pattern generating means, an embedding pattern generating means for generating an embedding pattern from the first pattern and the second pattern, and a pattern embedding means for embedding the embedding pattern in each data block. Processing equipment. 2. The second pattern generation means has a pseudo random number generation means for generating a pseudo random number based on an initial value, and the second pattern generation means based on the pseudo random number and each data block value of the digital content. The data processing device according to claim 1, wherein a pattern is generated. 3. The second pattern generation means has a pseudo random number generation means for generating a pseudo random number based on an initial value, and the pseudo random number and each data block value of the digital content, and the pseudo random number generation means. 2. The data processing device according to claim 1, wherein the second pattern is generated based on a pseudo random number corresponding to each data block position of the digital content generated by. 4. The data according to claim 1, wherein the first pattern generation means generates the first pattern based on an initial value corresponding to each data block. Processing equipment. 5. The second pattern generation means has a table in which the pseudo random numbers generated by the pseudo random number generation means are stored in the order of addresses, and each data block value is input to the table, and based on the output thereof. The data processing device according to claim 2, wherein the second pattern is generated. 6. A first pattern generation means for generating a first pattern having self-synchronization with respect to digital content composed of a plurality of ordered data blocks, and a pseudo pattern generating pseudo random number based on an initial value. Random number generating means, encrypted block generating means for generating an encrypted data block from each of the pseudo random number and the plurality of data blocks, and an inspection bit by applying an error detection code to each of the encrypted data blocks And an embedding pattern generating means for generating an embedding pattern from the inspection bit and the first pattern, and a pattern embedding means for embedding the embedding pattern in each corresponding data block. And data processing device. 7. The data processing apparatus according to claim 6, wherein each of the plurality of data blocks is encrypted according to its order. 8. The data processing apparatus according to claim 1, wherein the digital content is a digital image, and the data block is a pixel. 9. A third pattern extracting means for extracting a third pattern corresponding to each of a plurality of ordered data blocks, a fourth pattern generating means for generating a fourth pattern from a verification target image, and the fourth pattern. A fifth pattern generating means for generating a fifth pattern from the pattern and the third pattern; an inspecting means for inspecting the self-synchronization of the fifth pattern;
A data processing device comprising: 10. The fourth pattern generation means has a pseudo random number generation means for generating a pseudo random number based on an initial value,
The data processing apparatus according to claim 9, wherein the fourth pattern is generated based on the pseudo random number and each data block value of the verification target digital content. 11. The fourth pattern generation means has a pseudo random number generation means for generating a pseudo random number based on an initial value, and the pseudo random number, each data block value of the verification target digital content, and the pseudo random number. 10. The data processing device according to claim 9, wherein the fourth pattern is generated based on a pseudo random number corresponding to each data block position of the verification digital content generated by the generation means. 12. The data according to claim 9, wherein the self-synchronization test generation means generates the self-synchronization pattern based on an initial value corresponding to each data block. Processing equipment. 13. The fourth pattern generation means has a table in which the pseudo random numbers generated by the pseudo random number generation means are stored in the order of addresses, and each data block value is input to the table, and based on the output thereof. The data processing device according to claim 10, wherein the fourth pattern is generated. 14. The data processing apparatus according to claim 9, further comprising means for correcting scaling and rotation of the digital content. 15. The data processing apparatus according to claim 9, wherein the pattern is a pattern for detecting the clipping of the digital content, and the pattern is vertical / horizontal alternating, random or in a predetermined order. 16. Pseudo-random number generation means for generating a pseudo-random number based on an initial value, and encrypted block generation means for generating an encrypted block from each of a plurality of ordered verification target data blocks and the pseudo-random number. A check bit generating unit that generates a check bit by applying an error detection code to each of the encrypted blocks; a unit that obtains a difference between the check bit and the check bit included in each data block; A data processing device, comprising: a checking unit that checks the self-synchronization of the difference. 17. The data processing apparatus according to claim 16, wherein each of the plurality of verification target data blocks is encrypted according to its order. 18. A first pattern generation means for generating a first pattern having self-synchronization with respect to a digital content composed of a plurality of ordered data blocks, and the first pattern generation means generated by the first pattern generation means. And a pattern embedding unit that embeds the first pattern in each data block. 19. A first pattern generation means for generating a first pattern having self-synchronization with respect to a digital content composed of a plurality of ordered data blocks, and the first pattern generation means. A data processing device comprising: an embedding pattern generating means for generating an embedding pattern from a first pattern; and a pattern embedding means for embedding the embedding pattern generated by the embedding pattern generating means in each data block. 20. The data processing apparatus according to claim 18, wherein the first pattern generation means generates the first pattern based on an initial value corresponding to each data block. 21. Third pattern extracting means for extracting a third pattern from the plurality of ordered data blocks, and inspection means for inspecting the self-synchronization of the third pattern extracted by the third pattern extracting means. 20. The data processing device according to claim 19, further comprising: 22. The data processing apparatus according to claim 21, wherein the checking unit generates a self-sync pattern based on an initial value corresponding to each data block to check the self-sync. 23. The data processing apparatus according to claim 19, further comprising means for correcting scaling and rotation of the digital content. 24. A first pattern generating step of generating a first pattern having self-synchronization with respect to digital content composed of a plurality of ordered data blocks, and a second pattern of generating an image-dependent second pattern. Data comprising two pattern generation steps, an embedded pattern generation step of generating an embedded pattern from the first pattern and the second pattern, and a pattern embedding step of embedding the embedded pattern in each data block. Processing method. 25. The second pattern generation step includes a pseudo random number generation step of generating a pseudo random number based on an initial value, and the second pattern generation step based on the pseudo random number and each data block value of the digital content. The data processing method according to claim 24, wherein a pattern is generated. 26. The second pattern generating step includes a pseudo random number generating step of generating a pseudo random number based on an initial value, and the pseudo random number, each data block value of the digital content, and the pseudo random number generating step. 25. The data processing method according to claim 24, wherein the second pattern is generated based on a pseudo-random number corresponding to each data block position of the digital content generated by. 27. The data according to claim 24, wherein in the first pattern generating step, the first pattern is generated based on an initial value corresponding to each data block. Processing method. 28. The second pattern generating step has a table in which the pseudo random numbers generated in the pseudo random number generating step are stored in the order of addresses, and each data block value is input to the table, and based on the output thereof. The data processing method according to claim 25 or 26, wherein the second pattern is generated. 29. The data processing method according to claim 24, wherein each of the plurality of data blocks is encrypted according to its order. 30. A first pattern generating step of generating a first pattern having self-synchronization with respect to digital contents composed of a plurality of ordered data blocks, and a pseudo random number generating pseudo random number based on an initial value. A random number generating step, an encrypted block generating step of generating an encrypted data block from each of the pseudo random number and the plurality of data blocks, and an inspection bit by applying an error detection code to each of the encrypted data blocks And an embedding pattern generating step of generating an embedding pattern from the inspection bit and the first pattern, and a pattern embedding step of embedding the embedding pattern in each corresponding data block. Data processing method. 31. A third pattern generating step of generating a third pattern corresponding to each of a plurality of ordered data blocks, and a fourth pattern generating step of generating a fourth pattern from the verification target image and the third pattern. A step, a fifth pattern generation step of generating a fifth pattern from the fourth pattern and the verification target image, an inspection step of inspecting the self-synchronization of the fifth pattern,
A data processing method comprising: 32. The third pattern generation step includes a pseudo random number generation step of generating a pseudo random number based on an initial value, and the fourth pattern generation step includes each of the pseudo random number and the verification target digital content. The fourth pattern is generated based on a data block value.
1. The data processing method described in 1. 33. The third pattern generation step includes a pseudo random number generation step of generating a pseudo random number based on an initial value, and the fourth pattern generation step includes each of the pseudo random number and the verification target digital content. 32. The data according to claim 31, wherein the fourth pattern is generated based on a data block value and a pseudo random number corresponding to each data block position of the verification digital content generated by the pseudo random number generating step. Processing method. 34. The data according to claim 31, wherein the third pattern generation step generates the third pattern based on an initial value corresponding to each data block. Processing method. 35. The fourth pattern generation step has a table in which the pseudo random numbers generated by the pseudo random number generation step are stored in the order of addresses, and each data block value is input to the table, and based on the output thereof. The data processing method according to claim 32 or 33, wherein the fourth pattern is generated. 36. The data processing method according to claim 31, further comprising means for correcting scaling and rotation of the digital content. 37. The data processing method according to claim 31, wherein the pattern is a pattern for detecting the clipping of the digital content, and the pattern is vertical / horizontal alternating, random or a predetermined order. 38. The data processing method according to claim 31, wherein the digital content is a digital image, and the data block is a pixel. 39. A pseudo random number generating step of generating a pseudo random number based on an initial value, and an encrypted block generating step of generating an encrypted block from each of a plurality of ordered verification target data blocks and the pseudo random number. A check bit generation step of generating a check bit by applying an error detection code to each of the encrypted blocks; a step of obtaining a difference between the check bit and the check bit included in each of the data blocks; An inspection step for inspecting the self-synchronization of the difference. 40. The data processing method according to claim 39, wherein each of the plurality of verification target data blocks is encrypted according to the order thereof. 41. A first pattern generating step of generating a first pattern having self-synchronization with respect to digital content composed of a plurality of ordered data blocks, and the first pattern generating step generated by the first pattern generating step. A pattern embedding step of embedding the first pattern in each data block. 42. A first pattern generating step of generating a first pattern having self-synchronization with respect to digital contents composed of a plurality of ordered data blocks, and the first pattern generating step generated by the first pattern generating step. A data processing method comprising: an embedded pattern generation step of generating an embedded pattern from a first pattern; and a pattern embedding step of embedding the embedded pattern generated in the embedded pattern generation step in each data block. 43. The data processing method according to claim 41, wherein in the first pattern generating step, the first pattern is generated based on an initial value corresponding to each data block. 44. A third pattern generation step of generating a third pattern corresponding to each of a plurality of ordered data blocks, and an inspection step of inspecting self-synchronization of the third pattern.
A data processing method comprising: 45. In the inspection step, a self-synchronization pattern is generated based on an initial value corresponding to each data block, and self-synchronization is inspected based on the self-synchronization pattern. Described data processing method. 46. The data processing method according to claim 44, further comprising a step of correcting scaling and rotation of the digital content. 47. A storage medium storing a program for executing the data processing method according to any one of claims 24 to 46. 48. A program for executing the data processing method according to claim 24.