JP2003092373A - Semiconductor device and method of manufacturing the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a reliable semiconductor device which enables to test a wiring substrate for continuity easily and reliably. SOLUTION: The wiring substrate 20 is such that a pattern 12 for plating is formed in a lattice, and a wiring pattern 10 is formed in connection to the pattern for plating for each unit region demarcated by the pattern for plating. On such a wiring substrate 20, a semiconductor element 32 is mounted by electrically connecting to the wiring pattern, and the surface where the semiconductor element is mounted is entirely sealed with a resin to fabricate a semiconductor device. In a method of manufacturing the semiconductor device, a dividing recess 30 of such a depth as to divide at least the pattern for plating and the wiring pattern is formed in the wiring substrate 20 formed with the pattern 12 for plating and the wiring pattern 10, along the edge of the pattern 12 for plating and perpendicularly to the wiring pattern 10. Then, the semiconductor element 32 is mounted on the wiring substrate 20, and the surface whereon the semiconductor element is mounted is entirely sealed with the resin 34. The wiring substrate 20, together with the sealing resin 34, is divided by the unit region to obtain respective semiconductor devices.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a method for manufacturing the same, and more particularly to mounting a large number of semiconductor elements in a predetermined arrangement on a wiring board, resin-sealing the semiconductor elements, The present invention relates to a semiconductor device obtained by dividing it into individual pieces and a method for manufacturing the same.

[0002]

2. Description of the Related Art A semiconductor device in which a semiconductor element is mounted on a wiring board such as a BGA (Ball Grid Array) is a wiring board on which a semiconductor element is mounted on a wiring board on which a required wiring pattern is formed. After resin sealing one side of
It is obtained by joining the external connection terminals to the wiring board. These semiconductor device manufacturing methods include a method of individually encapsulating a resin in each unit area in which a semiconductor element is mounted, separating the wiring board into individual pieces to obtain a product, and mounting the semiconductor element. There is a method in which one surface of a wiring board is entirely resin-sealed, and the wiring board is diced together with the sealing resin into individual products.

FIG. 5 shows a unit area of a wiring board in which a semiconductor device is individually resin-sealed for each mounting position of a semiconductor element mounted on the wiring board. In the figure, 10 is a wiring pattern provided on the wiring substrate, 10a is a pad to which the electrode of the semiconductor element is bonded, and 12 is a pattern for plating.
Since the semiconductor elements are mounted on the wiring board at regular intervals, these plating patterns 12 are formed in a grid pattern at regular intervals. One region divided by the plating pattern 12 is a portion divided into individual pieces as a semiconductor device, and a region surrounded by a dotted line A is a resin-sealed region.

When plating the wiring pattern 10 in the manufacturing process of the wiring board, the plating pattern 12 is used.
And the wiring pattern 10 are connected. In the wiring board shown in FIG. 5, slit holes 14 are provided in the wiring board to divide the plating pattern 12 and the wiring pattern 10. This is because it is necessary to electrically separate the wiring pattern 10 and the plating pattern 12 in order to perform a continuity test of the wiring pattern 10 as an inspection of the wiring board. The slit hole 14 is formed by a router penetrating the wiring board in the thickness direction.

[0005]

The above-described method of manufacturing a semiconductor device by resin-sealing each mounting position of a semiconductor element is a method used when manufacturing a large-sized semiconductor device, and is small. In a semiconductor device mounted on an electronic device, one surface of a wiring board on which a semiconductor element is mounted is resin-encapsulated over the entire surface, and the wiring board is diced into individual pieces together with the sealing resin to form a semiconductor device. FIG. 6 shows an example of a wiring board for manufacturing a small semiconductor device, in which a wiring pattern 10 and a plating pattern 12 are formed in a repetitive pattern. A dotted line B indicates a region which becomes a semiconductor device of an individual piece.

In a wiring board for manufacturing such a small-sized semiconductor device, each area surrounded by the plating pattern is a minute area, and the slit holes 14 as shown in FIG. 5 should be formed individually. I can't. Therefore,
When inspecting the wiring board, only the disconnection of the wiring pattern 10 can be confirmed, and there is a problem that a short circuit of the wiring pattern 10 cannot be inspected. In addition, temporarily, wiring pattern 1
When inspecting for a short circuit of 0, it is necessary to partially remove the connection portion between the wiring pattern 10 and the plating pattern 12 to electrically separate the wiring pattern 10 and the plating pattern. However, the method of removing the connection portion between the wiring pattern 10 and the plating pattern 12 by the etching method has a problem that the process is complicated and costly.

Further, in the conventional method shown in FIGS. 5 and 6, when the semiconductor element is mounted on the wiring board and the resin is sealed and separated into individual pieces, as shown in FIG. The end surface of the metal layer 22 is exposed on the outer surface, and the metal layer 22 and the sealing resin 2 are exposed.
There was a problem that the joint with 4 was peeled off. When a wiring pattern is formed by stacking multiple layers on a conventional wiring board, the wiring pattern and the plating pattern connected to this are provided for each layer, so the wiring board is divided into individual pieces by dicing or the like. At this time, the end face of the metal layer 22 which separates the wiring pattern and the plating pattern is exposed from the end face of the wiring board.

The present invention has been made to solve these problems in a semiconductor device in which a semiconductor element is mounted on a wiring board and the semiconductor element is resin-sealed. Even when the semiconductor device is manufactured by resin-sealing one side of the whole surface, the plating pattern and the wiring pattern can be easily electrically separated, which ensures the inspection of the wiring board. (EN) A semiconductor device and a method for manufacturing the same that can be performed and can be provided as a highly reliable product by improving the adhesion between the sealing resin and the wiring board.

[0009]

In order to achieve the above object, the present invention has the following constitution. That is, a pattern for plating is provided in a grid pattern, and for each unit area partitioned by the pattern for plating, a wiring board connected to the pattern for plating and provided with a wiring pattern is electrically connected to the wiring pattern. In a method for manufacturing a semiconductor device, in which a semiconductor element is connected and mounted, and the surface on which the semiconductor element is mounted is resin-sealed over the entire surface, a plating method and a wiring pattern are formed on a wiring board. In the arrangement that intersects the wiring pattern along the edge of the plating pattern, at least a dividing groove having a depth at which the plating pattern and the wiring pattern can be separated is provided,
Next, a semiconductor element is mounted on the wiring board, the surface on which the semiconductor element is mounted is resin-sealed over the entire surface, and the wiring board is divided together with the sealing resin for each unit area to obtain individual semiconductor devices. Characterize. Further, the wiring board is characterized in that a plating pattern for connecting to the wiring pattern is provided only on the surface layer side of the wiring board. As a result, the wiring pattern and the plating pattern can be easily separated by the dividing groove, and the wiring pattern and the plating pattern can be easily electrically separated. Further, the dividing groove is formed to a depth of about ½ of the thickness of the wiring board. This makes it possible to improve the adhesion between the resin and the wiring board and improve the reliability of the semiconductor device.

Further, in a semiconductor device in which a semiconductor element is mounted by being electrically connected to a wiring pattern provided on the wiring board, and the entire surface on which the semiconductor element is mounted is sealed with a resin, It is characterized in that a step-like cutout portion is formed on the outer surface on the side close to the resin, and the cutout portion is integrally filled with the resin. Further, the cutout portion is provided up to a substantially midway position in the thickness direction of the wiring board.

[0011]

BEST MODE FOR CARRYING OUT THE INVENTION Preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings. FIG. 1 relates to a method of manufacturing a semiconductor device by a method in which one surface of a wiring board on which a semiconductor element is mounted is entirely resin-sealed. FIG. 1A shows a plane layout of a wiring pattern 10 and a plating pattern 12 formed on the surface of a wiring board. Reference numeral 10a is a pad formed in the same plane arrangement as the electrodes of the semiconductor chip, and 10b is a via for electrically connecting the lower wiring pattern and the surface plating pattern 12 to each other.

The wiring board used in this embodiment is a semiconductor device in which a large number of semiconductor elements are aligned and arranged at a predetermined interval, are collectively sealed with resin, and are separated into individual pieces. A plurality of wiring patterns 10 as a unit are formed on the wiring board so as to be connected vertically and horizontally. The plating pattern 12 is arranged at a boundary position of the wiring pattern 10 as a unit, is electrically connected to each wiring pattern 10, and is formed in a grid shape as the entire wiring board. In FIG. 1 (a), the dotted line B indicates the position where the semiconductor element is mounted on the wiring board, resin-sealed, and then separated into pieces. When the wiring board is separated into individual pieces, the wiring board is separated along the plating pattern 12 so that the plating pattern 12 does not remain in the semiconductor device.

The semiconductor device manufacturing method of this embodiment is characterized by a predetermined wiring pattern 1 on a wiring board.
0 and the plating pattern 12 are formed, a dicer blade is inserted along the edge of the plating pattern 12 to a depth of about ½ of the thickness of the wiring board to form the plating pattern 12. The dividing groove 30 is formed so as to intersect with the base side of the wiring pattern 10 along the edge portion of. By providing the dividing groove 30 in this manner, the wiring pattern 10
Is separated from the plating pattern 12, the wiring pattern 12 and the plating pattern 12 are separated, and the wiring pattern 10 and the plating pattern 12 are electrically separated.

FIG. 1B shows a state in which the dividing groove 30 is formed by the dicer along the plating pattern 12.
The wiring pattern 10 is a unit of the plating pattern 12
Since it is formed at the boundary position of the region where the pattern is formed, the dicing groove 30 is provided by moving the dicer along both side edges of the plating pattern 12. FIG. 2 is an enlarged view of a portion where the dividing groove 30 is formed by the dicer. The hatched portion in the drawing is the portion where the dividing groove 30 is formed by the dicer. By cutting the wiring board with a dicer, the dividing grooves 30 having a constant width are formed. The wiring patterns 10 connected to both sides of the plating pattern 12 are separated from the plating pattern 12, respectively.

As shown in FIG. 1B, by electrically separating the plating pattern 12 and the wiring pattern 10 with a dicer, the wiring pattern 10 becomes a completely independent pattern. In this state, it is possible to perform a disconnection inspection and a continuity inspection of the wiring pattern 10 on the wiring board. This allows the wiring board to be easily and reliably inspected. Further, the operation of electrically separating the plating pattern 12 and the wiring pattern 10 by using a dicer is far more than the conventional method of removing the connection portion between the wiring pattern 10 and the plating pattern 12 by etching. It is effective in that the work is easy and the work cost is low.

FIG. 3 is a sectional view showing a state in which the dividing groove 30 is provided in the wiring substrate 20 by the dicer. As described above, the dividing groove 30 provided on the wiring board 20 is set to a depth of about ½ of the thickness of the wiring board 20. If the dividing groove 30 has only the purpose of separating the electrical continuity between the plating pattern 12 and the wiring pattern 10, the dividing groove 30 has a depth at which the plating pattern 12 and the wiring pattern 10 can be separated. However, the reason why the dividing groove 30 is provided relatively deeply in the present embodiment is that the sealing resin enters the dividing groove 30 when the semiconductor element is sealed with resin. The purpose is to improve the adhesiveness between the sealing resin and the wiring board 20.

The semiconductor element 32 is mounted on the wiring board 20 having the dividing grooves 30 shown in FIG.
A manufacturing process until a semiconductor device is obtained by dividing 0 into individual pieces will be described. FIG. 4A shows a state in which the semiconductor element 32 is mounted on the wiring board 20 by the flip chip method. Figure 4 (b)
Shows a state where one surface of the wiring board 20 on which the semiconductor element 32 is mounted is entirely sealed with the resin 34. In the method of manufacturing a semiconductor device of this embodiment, the surface of the wiring board 20 on which the semiconductor element 32 is mounted is resin-sealed at once.
As a result, the dividing groove 30 is also filled with the resin 34.

FIG. 4C shows a state in which the wiring substrate 20 is divided for each unit region in which the semiconductor element 32 is mounted and individual semiconductor devices are obtained. When the wiring board 20 is divided into individual pieces, the wiring board 20 is cut together with the resin 34 by the dicer with the position of the line C-C shown in FIG. The division position for dividing the wiring board 20 is set within the passage range of the dividing groove 30 as shown in FIG.
In order to prevent the plating pattern 12 from being left on the semiconductor device product in the state of being divided into individual pieces, the resin 34 filled in the dividing grooves 30 covers the side surface of the wiring substrate 20 of the semiconductor device product and the wiring substrate 20. This is to prevent the metal layer from being exposed on the end face of the.

That is, as shown in FIG. 4 (c), by dividing the resin 34 and the wiring board 20 within the range where the dividing groove 30 passes, the wiring board 2 on the side to be bonded to the resin 34 is divided.
A stepped cutout portion 30a is formed on the outer side surface of 0, and the cutout portion 30a is filled with resin 34 to cover the outer side surface of the wiring board 20. Since the dividing groove 30 is provided at a depth of about ½ of the thickness of the wiring board 20, the cutout portion 30a is formed on the outer surface of the wiring board 20 up to the middle position of the thickness of the wiring board 20. Become. At the portion where the cutout portion 30a is formed, the outer surface of the wiring board 20 is sealed with the resin 34, and the metal layer can be prevented from being exposed.

Since the dividing groove 30 is provided to divide the electrical connection between the plating pattern 12 and the wiring pattern 10, when the wiring board 20 is viewed in the thickness direction, the plating pattern 12 is separated by the dividing groove 30. It must be provided in the layer to be divided. Therefore, when the wiring board 20 has the inner metal layer 22, the plating pattern 12 is formed so that the wiring pattern 10 and the plating pattern 12 provided on the metal layer 22 are cut. The metal layer 22 to be provided is preferably designed to be collected on the surface side of the wiring board 20. In the conventional wiring board in which the metal layer 22 is provided as the inner layer, there are many examples in which the plating pattern is provided in each layer, but in the wiring board 20 of the present embodiment, the plating pattern 12 is not provided in each layer and is divided by the dividing groove 30. Try to collect on the surface side.

As described above, by providing the metal layer 22 provided with the pattern 12 for plating on the surface layer side of the wiring substrate 20, by providing the dividing groove 30, the pattern 12 for plating and the wiring pattern 10 of each layer are formed. The end face of the wiring pattern 10 which is divided and is divided in each layer after resin sealing is not exposed to the outer surface of the wiring substrate 20, and the adhesion between the wiring substrate 20 and the resin 34 is improved to improve the reliability of the semiconductor device. It is possible to improve.

[0022]

As described above, according to the semiconductor device and the method for manufacturing the same of the present invention, it becomes possible to easily conduct the continuity test of the wiring pattern provided on the wiring board when manufacturing the semiconductor device. It can be provided as a highly reliable semiconductor device. Further, by providing the dividing groove in the wiring board, it is possible to prevent the sealing resin from exposing the metal layer from the side surface of the wiring board, and thereby, it is possible to improve the reliability of the semiconductor device. .

[Brief description of drawings]

FIG. 1 is an explanatory diagram showing positions of dividing grooves formed on a wiring board by a dicer.

FIG. 2 is an explanatory view showing an enlarged position where a dividing groove is formed.

FIG. 3 is a cross-sectional view showing a state in which a dividing groove is formed on a wiring board.

FIG. 4 is a cross-sectional view showing a step of manufacturing a semiconductor device by mounting a semiconductor element on a wiring board having a dividing groove formed therein.

FIG. 5 is a plan view showing a configuration of a conventional wiring board in which slit holes are provided in the wiring board.

FIG. 6 is a plan view showing a configuration of a wiring board in which one surface on which a semiconductor element is mounted is entirely resin-sealed.

FIG. 7: A semiconductor element is mounted on a wiring board and resin-sealed,
It is sectional drawing which shows the state of the end surface in the conventional semiconductor device divided | segmented into pieces.

[Explanation of symbols]

10 wiring patterns 12 Patterns for plating 14 slit holes 20 wiring board 22 Metal layer 24 Sealing resin 30 division groove 32 Semiconductor element 34 resin

   ─────────────────────────────────────────────────── ─── Continued front page    (72) Inventor Katsuhiko Yamamoto             711 Toshida, Kurita, Oita, Nagano City, Nagano Prefecture             Shinko Electric Industry Co., Ltd. (72) Inventor Hideki Emura             711 Toshida, Kurita, Oita, Nagano City, Nagano Prefecture             Shinko Electric Industry Co., Ltd.

Claims (5)

[Claims] 1. A wiring board provided with a pattern for plating in a grid pattern, and a wiring pattern connected to the pattern for plating and provided with a wiring pattern for each unit area defined by the pattern for plating. A method of manufacturing a semiconductor device, comprising electrically connecting and mounting a semiconductor element, and sealing the entire surface on which the semiconductor element is mounted with a resin, wherein the wiring for forming a plating pattern and a wiring pattern. On the substrate, a dividing groove is provided at a position that intersects the wiring pattern along the edge of the plating pattern, and at least a dividing groove having a depth that allows the plating pattern and the wiring pattern to be separated is provided. The element is mounted, the surface on which the semiconductor element is mounted is resin-encapsulated over the entire surface, and the wiring board is divided with the encapsulating resin for each unit area. The method of manufacturing a semiconductor device, characterized in that to obtain a semiconductor device of the pieces. 2. The method of manufacturing a semiconductor device according to claim 1, wherein the wiring board is provided with a plating pattern for connection with the wiring pattern provided only on the surface layer side of the wiring board. 3. The dividing groove is ½ of the thickness of the wiring board.
The method of manufacturing a semiconductor device according to claim 1, wherein the semiconductor device is formed to a depth of about a certain degree. 4. A semiconductor device in which a semiconductor element is mounted by being electrically connected to a wiring pattern provided on the wiring board, and the entire surface on which the semiconductor element is mounted is sealed with resin, A semiconductor device, wherein a step-like cutout portion is formed on the outer surface on the side close to the resin, and the cutout portion is filled with the resin integrally with the resin. 5. The semiconductor device according to claim 4, wherein the cutout portion is provided up to a substantially middle position in the thickness direction of the wiring board.