JP2003092310A - Ic chip having projected electrode with seal resin - Google Patents
Ic chip having projected electrode with seal resinInfo
- Publication number
- JP2003092310A JP2003092310A JP2001281308A JP2001281308A JP2003092310A JP 2003092310 A JP2003092310 A JP 2003092310A JP 2001281308 A JP2001281308 A JP 2001281308A JP 2001281308 A JP2001281308 A JP 2001281308A JP 2003092310 A JP2003092310 A JP 2003092310A
- Authority
- JP
- Japan
- Prior art keywords
- chip
- sealing resin
- protruding electrode
- manufacturing
- protruding
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L21/6836—Wafer tapes, e.g. grinding or dicing support tapes
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/27—Manufacturing methods
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/67—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere
- H01L2221/683—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L2221/68304—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
- H01L2221/68327—Apparatus for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support used during dicing or grinding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/11—Manufacturing methods
- H01L2224/113—Manufacturing methods by local deposition of the material of the bump connector
- H01L2224/1133—Manufacturing methods by local deposition of the material of the bump connector in solid form
- H01L2224/1134—Stud bumping, i.e. using a wire-bonding apparatus
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/27—Manufacturing methods
- H01L2224/274—Manufacturing methods by blanket deposition of the material of the layer connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/731—Location prior to the connecting process
- H01L2224/73101—Location prior to the connecting process on the same surface
- H01L2224/73103—Bump and layer connectors
- H01L2224/73104—Bump and layer connectors the bump connector being embedded into the layer connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
- H01L2224/83191—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on the semiconductor or solid-state body
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
- H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は封止樹脂付突起電極
付ＩＣチップとその製造方法に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an IC chip with a protruding electrode having a sealing resin and a method for manufacturing the same.
【０００２】[0002]
【従来の技術】近年、半導体パッケージの小型化及び半
導体チップをマザーボートに高密度化実装するため、半
導体チップを直接フェイスダウン方式で、基板上に実装
するフリップチップ実装が開発されている。なかでも、
金のスタッドバンプを使ったフリップチップ実装を安価
に製造する市場要求が本格化している。2. Description of the Related Art In recent years, flip chip mounting has been developed in which a semiconductor chip is directly mounted on a substrate by a face-down method in order to miniaturize the semiconductor package and mount the semiconductor chip on a mother board with high density. Above all,
The market demand for inexpensive manufacturing of flip chip mounting using gold stud bumps is in full swing.
【０００３】図４は、従来の突起電極付ＩＣチップの回
路基板への実装方法を示す。図４（ａ）に示す基板は実
装に使われる回路基板である。回路基板６上にソルダー
レジスト７で開口されたボンディングパット８が形成さ
れている。パターン１０はソルダーレジスト７で被覆さ
れている。FIG. 4 shows a conventional method of mounting an IC chip with protruding electrodes on a circuit board. The board shown in FIG. 4A is a circuit board used for mounting. On the circuit board 6, a bonding pad 8 opened with a solder resist 7 is formed. The pattern 10 is covered with the solder resist 7.
【０００４】図４（ｂ）に示す封止フィルム貼り付け工
程は、ＩＣチップより大きなサイズに切断した封止樹脂
５とカバーフィルム１８の着いた封止フィルム１７を回
路基板６上のほぼＩＣチップが搭載される位置に配置す
る。In the step of attaching the sealing film shown in FIG. 4B, the sealing resin 5 cut into a size larger than the IC chip and the sealing film 17 with the cover film 18 are formed on the circuit board 6 almost on the IC chip. Place it in the position where is installed.
【０００５】図４（ｃ）に示すカバーフィルム剥離工程
は、前記封止フィルム１７を回路基板６に熱圧着しボイ
ドを取り封止樹脂５を仮接着した後、カバーフィルム１
８を取り去る。In the cover film peeling step shown in FIG. 4 (c), the sealing film 17 is thermocompression-bonded to the circuit board 6, voids are removed, and the sealing resin 5 is temporarily adhered to the cover film 1.
Remove 8
【０００６】図４（ｄ）に示す実装工程は、ＩＣチップ
１上の突起電極２と回路基板６上のボンディングパット
８を位置合わせし、熱プレスすることで、突起電極８と
ボンディングパット８を電気的に接合すると同時に封止
樹脂を硬化させ、硬化済封止樹脂９を形成する。また、
チップ外周面はフィレット１１が形成される。In the mounting process shown in FIG. 4D, the protruding electrodes 2 on the IC chip 1 and the bonding pads 8 on the circuit board 6 are aligned and heat-pressed to separate the protruding electrodes 8 and the bonding pads 8 from each other. At the same time as the electrical connection, the sealing resin is cured to form the cured sealing resin 9. Also,
A fillet 11 is formed on the outer peripheral surface of the chip.
【０００７】図４（ｅ）に示す完成は、前述の図４
（ａ）から図４（ｄ）の工程で実装完成品２００が完成
する。The completion shown in FIG.
The completed mounting product 200 is completed in the steps of (a) to FIG. 4 (d).
【０００８】図５は、従来の突起電極付ＩＣチップの実
装構造を示す。FIG. 5 shows a conventional mounting structure of an IC chip with protruding electrodes.
【０００９】回路基板６上のボンディングパット８とＩ
Ｃチップ１の突起電極２が電気的に接合され、硬化済封
止樹脂９が回路基板６とＩＣチップ１を機械的に接合し
ている。フィレット１１がＩＣチップ１の外周部に形成
されているが、コスト低減のため封止樹脂をＩＣチップ
に近いサイズで供給すると封止樹脂とＩＣチップは別々
に位置合わせされるため、位置合わせ精度等の問題でＩ
Ｃチップの外周部に均一なフィレットが形成できなくな
り、信頼性が確保できなくなる等の問題がある。Bonding pads 8 and I on the circuit board 6
The protruding electrode 2 of the C chip 1 is electrically joined, and the cured sealing resin 9 mechanically joins the circuit board 6 and the IC chip 1. The fillet 11 is formed on the outer peripheral portion of the IC chip 1. However, when the sealing resin is supplied in a size close to the IC chip for cost reduction, the sealing resin and the IC chip are separately aligned, so that the alignment accuracy is improved. Due to problems such as I
There is a problem that a uniform fillet cannot be formed on the outer peripheral portion of the C chip, and reliability cannot be ensured.
【００１０】[0010]
【発明が解決しようとする課題】しかしながら、前述し
た突起電極付ＩＣチップの実装方法には次のような問題
点がある。即ち、封止フィルムを基板に貼り付けるた
め、封止フィルムをＩＣチップよりも必要以上に大きく
必要とするため、コストが高くなる等の問題があった。
また、封止樹脂フィルムを基板に貼り付けた後ＩＣチッ
プを貼り付けるため、均等に貼り付けることが難しいた
め、均一なフィレットが形成できず、信頼性が低下する
等の問題があった。However, the above-mentioned mounting method of the IC chip with protruding electrodes has the following problems. That is, since the sealing film is attached to the substrate, the sealing film is required to be larger than the IC chip, which causes a problem such as an increase in cost.
Further, since the IC chip is attached after the encapsulation resin film is attached to the substrate, it is difficult to attach the IC chip evenly, so that there is a problem that a uniform fillet cannot be formed and reliability is lowered.
【００１１】本発明は、上記従来の課題に鑑みなされた
ものであり、その目的は、封止樹脂付突起電極付ＩＣチ
ップの安価で信頼性のある構造とその製造方法を提供す
るものである。The present invention has been made in view of the above conventional problems, and an object thereof is to provide an inexpensive and reliable structure of an IC chip with a protruding electrode with a sealing resin and a manufacturing method thereof. .
【００１２】[0012]
【課題を解決するための手段】上記目的を達成するため
に、未硬化の封止樹脂がＩＣチップの実装面の面積とほ
ぼ同じ大きさで、前記ＩＣチップの実装面に接着された
ことを特徴とする、封止樹脂付突起電極付ＩＣチップで
ある。In order to achieve the above object, it is necessary that the uncured sealing resin is adhered to the mounting surface of the IC chip in a size substantially equal to the area of the mounting surface of the IC chip. A characteristic is an IC chip with a protruding electrode with a sealing resin.
【００１３】また、前記封止樹脂の厚みは、前記ＩＣチ
ップに配設された突起電極の高さより厚いことを特徴と
するものである。Further, the thickness of the sealing resin is thicker than the height of the protruding electrodes arranged on the IC chip.
【００１４】また、前記突起電極は、先端が非平面形状
であることを特徴とするものである。Further, the protruding electrode is characterized in that the tip has a non-planar shape.
【００１５】また、前記封止樹脂は、少なくとも熱硬化
性樹脂と熱可塑性樹脂とを含有することを特徴とするも
のである。Further, the sealing resin contains at least a thermosetting resin and a thermoplastic resin.
【００１６】また、前記熱硬化性樹脂は、Ａステージで
あることを特徴とするものである。The thermosetting resin is A stage.
【００１７】また、前記熱硬化性樹脂の反応開始温度
が、前記熱可塑性樹脂の軟化温度以上であることを特徴
とするものである。Further, the reaction initiation temperature of the thermosetting resin is equal to or higher than the softening temperature of the thermoplastic resin.
【００１８】また、未硬化の封止樹脂を突起電極付ＩＣ
チップに接着する方法であって、少なくとも突起電極付
ウエハの裏面にサポートフィルムを貼り付ける貼り付け
工程と、前記サポートフィルム付ウエハを少なくともサ
ポートフィルムの一部を残して前記ウエハを切削する切
削工程と、未硬化の封止樹脂を切削済ウエハの突起電極
面に接着する接着工程と、切削溝に沿って個辺ＩＣチッ
プに分離する分離工程とを包含することを特徴とするも
のである。Further, an uncured sealing resin is used as an IC with a protruding electrode.
A method of adhering to a chip, which comprises: a step of attaching a support film to at least the back surface of a wafer with protruding electrodes; and a step of cutting the wafer with support film so that at least a part of the support film is left to cut the wafer. The present invention is characterized by including an adhesion step of adhering the uncured sealing resin to the protruding electrode surface of the cut wafer and a separation step of separating the individual side IC chips along the cutting grooves.
【００１９】また、前記切削工程は、ダイシング法を用
いることを特徴とするものである。The cutting step is characterized by using a dicing method.
【００２０】また、前記接着工程は、未硬化の封止樹脂
を印刷法で接着することを特徴とするものである。Further, the bonding step is characterized in that an uncured sealing resin is bonded by a printing method.
【００２１】また、前記接着工程は、予めフィルムに貼
り付けられた未硬化の封止樹脂を貼り付ける方法である
ことを特徴とするものである。The adhering step is characterized in that it is a method of adhering an uncured sealing resin which has been adhered to the film in advance.
【００２２】また、前記分離工程は、ドライ工程である
ことを特徴とするものである。The separation step is a dry step.
【００２３】また、前記ドライ工程は、レーザーを用い
ることを特徴とするものである。The dry process is characterized by using a laser.
【００２４】また、前記レーザーは、前記突起電極付ウ
エハの裏面側より照射されることを特徴とするものであ
る。Further, the laser is irradiated from the back surface side of the wafer with protruding electrodes.
【００２５】また、前記レーザーは、個辺となった前記
ＩＣチップのエッジをマスクとすることを特徴とするも
のである。Further, the laser is characterized in that the edges of the IC chip, which are individual sides, are used as a mask.
【００２６】また、前記ドライ工程は、切断法であるこ
とを特徴とするものである。The dry process is characterized by a cutting method.
【００２７】[0027]
【発明の実施の形態】以下図面に基づいて本発明におけ
る封止樹脂付突起電極付ＩＣチップとその製造方法につ
いて説明する。図１は本発明の実施の形態で封止樹脂付
突起電極付ＩＣチップの構造を説明する説明図である。
図２は本発明の実施の形態で封止樹脂付突起電極付ＩＣ
チップの製造方法を説明する説明図である。図３は本発
明の封止樹脂付突起電極付ＩＣチップを使った実装の構
造を説明する説明図である。従来技術と同一部材は同一
符号で示す。BEST MODE FOR CARRYING OUT THE INVENTION An IC chip with a protruding electrode with a sealing resin and a method for manufacturing the same according to the present invention will be described below with reference to the drawings. FIG. 1 is an explanatory diagram illustrating the structure of an IC chip with a protruding electrode with a sealing resin according to an embodiment of the present invention.
FIG. 2 is an embodiment of the present invention, IC with a protruding electrode with a sealing resin
It is explanatory drawing explaining the manufacturing method of a chip. FIG. 3 is an explanatory view for explaining a mounting structure using the IC chip with a protruding electrode with a sealing resin of the present invention. The same members as those in the prior art are designated by the same reference numerals.
【００２８】先ず、図１（ａ）は、封止樹脂付突起電極
付ＩＣチップの上面図である。ＩＣチップ１上に、突起
電極２が形成されている。First, FIG. 1A is a top view of an IC chip with a protruding electrode with a sealing resin. The bump electrode 2 is formed on the IC chip 1.
【００２９】図１（ｂ）は、図１（ａ）のＡＡ’断面図
である。ＩＣチップ１上にパット４が形成されている。
パット４の周りは、ＰＶ膜３により保護されている。パ
ット４上に突起電極２が形成されている。ＩＣチップ１
の上面及び突起電極２は、封止樹脂５により被覆されて
いる。封止樹脂５の大きさは、ＩＣチップ１の大きさと
ほぼ同じであり、突起電極２の上部も被覆されている。
封止樹脂５の厚みが、突起電極２の高さよりも厚いこと
で、後工程の熱プレス法による実装時ＩＣチップの周り
にフィレットを形成する封止樹脂を供給することができ
る。突起電極２の上部は、後工程のボンディング時、封
止樹脂５を貫通させるため非平面状の突起形状になって
いることが望ましい。FIG. 1B is a sectional view taken along the line AA 'of FIG. A pad 4 is formed on the IC chip 1.
The periphery of the pad 4 is protected by the PV film 3. The protruding electrode 2 is formed on the pad 4. IC chip 1
The upper surface and the protruding electrode 2 are covered with the sealing resin 5. The size of the sealing resin 5 is almost the same as the size of the IC chip 1, and the upper portion of the bump electrode 2 is also covered.
Since the thickness of the sealing resin 5 is thicker than the height of the protruding electrodes 2, it is possible to supply the sealing resin that forms the fillet around the IC chip at the time of mounting by the hot pressing method in the subsequent step. It is desirable that the upper portion of the protruding electrode 2 has a non-planar protruding shape in order to allow the sealing resin 5 to penetrate therethrough during bonding in a later step.
【００３０】図２は、封止樹脂付突起電極付ＩＣチップ
の製造方法の説明であるが、右側の図は、ウエハ状の上
面図であり、左側の図はその断面図である。FIG. 2 is a description of a method for manufacturing an IC chip with a protruding electrode with a sealing resin. The drawing on the right side is a wafer-like top view and the drawing on the left side is its sectional view.
【００３１】図２（ａ）に示す突起電極付ウエハは、半
導体の前工程でウエハ１２の各ＩＣチップ１内にアクテ
ィブ素子を形成したウエハ１２のＩＣチップ１のパット
部に突起電極２をワイヤーボンディング法で形成したも
のである。In the wafer with protruding electrodes shown in FIG. 2A, the protruding electrodes 2 are wired to the pad portion of the IC chip 1 of the wafer 12 in which active elements are formed in each IC chip 1 of the wafer 12 in the pre-process of semiconductor. It is formed by the bonding method.
【００３２】図２（ｂ）に示す貼り付け工程は、ウエハ
１２を各ＩＣチップ１にダイシングにより切削するた
め、ウエハ１２の裏面にサポートフィルム１５を貼り付
ける。In the attaching step shown in FIG. 2B, since the wafer 12 is cut into the IC chips 1 by dicing, the support film 15 is attached to the back surface of the wafer 12.
【００３３】図２（ｃ）に示す切削工程では、サポート
フィルム１５の一部を残し、ＩＣチップ外形１４部分を
ダイシング法等により切断する。サポートフィルム１５
をすべて切断しないため各ＩＣチップ１はバラバラにな
ることはない。In the cutting step shown in FIG. 2C, the IC film outer shape 14 is cut by a dicing method or the like while leaving a part of the support film 15. Support film 15
Since all of the IC chips 1 are not cut, the IC chips 1 do not fall apart.
【００３４】図２（ｄ）に示す接着工程は、封止樹脂５
を個辺化したＩＣチップ１の上に接着する。接着方法
は、予めフィルムに接着された封止樹脂をラミネート法
で接着する方法、液状の封止樹脂を印刷法で接着する方
法、スピンコート法で接着する方法等が有る。ラミネー
ト法では未硬化の封止樹脂を容易に扱うことができ、印
刷法では安価な接着法を提供できる。この図では、封止
樹脂５の表面は保護されていないが、印刷法、スピンコ
ート法で接着した場合、後で保護のためカバーフィルム
を貼り付けてもかまわない。封止樹脂５にＡステージの
熱硬化性樹脂と熱可塑性樹脂を含ませ、熱硬化性樹脂の
反応開始温度を熱可塑性樹脂の軟化温度よりも高く設定
し、接着工程の接着温度を熱可塑性樹脂の軟化温度より
も高く、熱硬化性樹脂の反応開始温度よりも低く設定す
ることで、接着工程での封止樹脂５の粘度が下がり、ウ
エハ１２の突起電極２等の表面凹凸に起因するボイドの
発生を防ぐことができと同時に接着工程終了後、封止樹
脂５は未反応であるため、後工程の回路基板との接合時
（図示せず）、ボイドの発生しない封止構造を提供でき
る。例えば、熱可塑性樹脂に軟化温度が約８０℃のアク
リル系樹脂を使い、反応開始温度を約１２０℃に調整す
ると、１００℃で仮接着すると、粘度は充分下がってい
るため、ボイドの発生の無い封止樹脂５を形成できた。In the bonding step shown in FIG. 2D, the sealing resin 5 is used.
Is bonded onto the individualized IC chip 1. Examples of the bonding method include a method of bonding a sealing resin previously bonded to the film by a laminating method, a method of bonding a liquid sealing resin by a printing method, a method of bonding by a spin coating method, and the like. The laminating method can easily handle the uncured sealing resin, and the printing method can provide an inexpensive bonding method. In this figure, the surface of the sealing resin 5 is not protected, but when adhered by a printing method or a spin coating method, a cover film may be attached later for protection. The A-stage thermosetting resin and the thermoplastic resin are included in the sealing resin 5, the reaction start temperature of the thermosetting resin is set higher than the softening temperature of the thermoplastic resin, and the bonding temperature in the bonding step is set to the thermoplastic resin. Is higher than the softening temperature of the thermosetting resin and lower than the reaction start temperature of the thermosetting resin, the viscosity of the sealing resin 5 in the bonding step is lowered, and voids caused by surface irregularities of the bump electrodes 2 of the wafer 12 At the same time, the sealing resin 5 is unreacted after the bonding process is completed, so that a void-free sealing structure can be provided at the time of joining with a circuit board in a subsequent process (not shown). . For example, when an acrylic resin having a softening temperature of about 80 ° C. is used as the thermoplastic resin and the reaction start temperature is adjusted to about 120 ° C., the viscosity is sufficiently reduced when temporarily bonded at 100 ° C., so that no void is generated. The sealing resin 5 could be formed.
【００３５】図２（ｅ）に示す分離工程は前述の切削工
程で形成されたダイシング部１６を再度切断し、封止樹
脂付突起電極付ＩＣチップを各チップに分離する。上面
よりレーザーを使い各封止樹脂付突起電極付ＩＣチップ
に分離した場合、封止樹脂５の実装面の大きさは、ほぼ
ＩＣチップ１の実装面の大きさになる。ウエハ裏面より
チップ外周部をマスクとし各封止樹脂付突起電極付ＩＣ
チップに分離した場合、封止樹脂５の実装面の大きさと
ＩＣチップ１の実装面の大きさは同じとなり、実装した
場合、ＩＣチップの外周部に均一なフィレットが形成で
きるため、信頼性のある実装品を提供できる。一方、サ
ポートフィルム１５は、予めレーザー光を透過するガラ
ス基板等に貼り付けておくことで、分離工程でウエハが
封止樹脂付突起電極付ＩＣチップに分離されても、バラ
バラになることはない。また、ダイシング部１６を鋭利
な刃物、金型等で切断すること等で容易に個辺チップに
分離することができる。In the separating step shown in FIG. 2 (e), the dicing portion 16 formed in the above-mentioned cutting step is cut again to separate the IC chip with the protruding electrodes with the sealing resin into the respective chips. When the IC chips with protruding electrodes with sealing resin are separated from the upper surface using a laser, the size of the mounting surface of the sealing resin 5 is almost the size of the mounting surface of the IC chip 1. ICs with protruding electrodes with sealing resin, using the chip periphery from the backside of the wafer as a mask
When separated into chips, the size of the mounting surface of the sealing resin 5 is the same as the size of the mounting surface of the IC chip 1, and when mounted, a uniform fillet can be formed on the outer peripheral portion of the IC chip, so that reliability is improved. It is possible to provide a certain mounted product. On the other hand, since the support film 15 is attached to a glass substrate or the like that transmits laser light in advance, the support film 15 will not be separated even if the wafer is separated into IC chips with protruding electrodes with sealing resin in the separation step. . Further, the dicing portion 16 can be easily separated into individual chips by cutting it with a sharp blade, a die or the like.
【００３６】図２（ｆ）に示す完成は、ＩＣチップをサ
ポートフィルムから分離することで、封止樹脂付突起電
極付ＩＣチップ１００が完成する。The completion shown in FIG. 2 (f) is completed by separating the IC chip from the support film to complete the IC chip 100 with protruding electrodes with sealing resin.
【００３７】図３は、本発明の封止樹脂付突起電極付Ｉ
Ｃチップを使った実装の構造の説明図である。パターン
１０がソルダーレジスト７で保護され、ボンディングパ
ット８がソルダーレジスト７で開口されている回路基板
６のボンディングパット８とＩＣチップ上の突起電極２
を位置合わせし熱プレスすることで、電気的に接合し、
封止樹脂を硬化させ、硬化済封止樹脂９で回路基板６と
ＩＣチップ１を物理的に接合する。フィレット１１は、
予め硬化樹脂のＩＣチップとの接合面がＩＣチップ１の
実装面の大きさになっているため、ＩＣチップ１の外周
部に均一に形成でき、信頼性が向上した。FIG. 3 shows a projection electrode I with a sealing resin according to the present invention.
It is explanatory drawing of the structure of mounting using a C chip. The pattern 10 is protected by the solder resist 7, and the bonding pad 8 is opened by the solder resist 7. The bonding pad 8 of the circuit board 6 and the protruding electrode 2 on the IC chip.
By aligning and hot pressing,
The sealing resin is cured, and the circuit board 6 and the IC chip 1 are physically joined by the cured sealing resin 9. Fillet 11
Since the bonding surface of the cured resin with the IC chip has the size of the mounting surface of the IC chip 1 in advance, it can be uniformly formed on the outer peripheral portion of the IC chip 1 and the reliability is improved.
【００３８】[0038]
【発明の効果】以上説明したように、本発明の封止樹脂
付突起電極付ＩＣチップによれば、封止樹脂がＩＣチッ
プの実装面の面積とほぼ同じ大きさで、ＩＣチップの実
装面に接着されていることで、均一なフィレットが形成
でき、信頼性のある実装品を提供できる。As described above, according to the IC chip with a protruding electrode with a sealing resin of the present invention, the sealing resin has substantially the same size as the area of the mounting surface of the IC chip, and the mounting surface of the IC chip is By being adhered to the substrate, a uniform fillet can be formed and a reliable mounted product can be provided.
【００３９】また、封止樹脂の厚みがＩＣチップに配設
された突起電極の高さより厚いことで、後工程の実装時
フィレット形成するための封止樹脂を供給することがで
きる。Further, since the thickness of the sealing resin is thicker than the height of the protruding electrode provided on the IC chip, the sealing resin for forming the fillet at the time of mounting in the subsequent process can be supplied.
【００４０】また、突起電極の先端が非平面形状である
ことで、信頼性のある突起電極と回路基板の接続を提供
できる。Further, since the tip of the protruding electrode has a non-planar shape, reliable connection between the protruding electrode and the circuit board can be provided.
【００４１】また、封止樹脂は少なくとも熱硬化性樹脂
と熱可塑性樹脂とを含むことで、後工程で容易に実装で
きる封止樹脂の反応を制御した封止樹脂付突起電極付Ｉ
Ｃチップを提供できる。Further, since the sealing resin contains at least a thermosetting resin and a thermoplastic resin, the reaction of the sealing resin, which can be easily mounted in a later step, is controlled, and the sealing resin-attached protruding electrode I
A C chip can be provided.
【００４２】また、熱硬化性樹脂がＡステージであるこ
とで、未硬化の封止樹脂付突起電極付ＩＣチップを提供
できる。Further, since the thermosetting resin is the A stage, it is possible to provide an uncured IC chip with a protruding electrode with a sealing resin.
【００４３】また、熱硬化性樹脂の反応開始温度が熱可
塑性樹脂の軟化温度より低いことで、ボイドの無い封止
樹脂付突起電極付ＩＣチップを提供できる。Further, since the reaction initiation temperature of the thermosetting resin is lower than the softening temperature of the thermoplastic resin, it is possible to provide an IC chip with a protruding electrode with a sealing resin without voids.
【００４４】また、本発明の封止樹脂付突起電極付ＩＣ
チップの製造方法によれば、容易に封止樹脂とＩＣチッ
プとの実装面の大きさをほぼ同じとできることで、実装
時信頼性のある実装品を提供できる。Further, the IC with the protruding electrode with the sealing resin of the present invention
According to the chip manufacturing method, it is possible to easily make the mounting surfaces of the sealing resin and the IC chip substantially the same in size, so that it is possible to provide a mounted product that is reliable during mounting.
【００４５】また、切削工程がダイシング法であること
で、容易にＩＣチップを個辺化できる。Further, since the cutting process is the dicing method, the IC chip can be easily singulated.
【００４６】また、封止樹脂を印刷法でウエハに接着す
ることで、安価な製造法を提供できる。Also, an inexpensive manufacturing method can be provided by adhering the sealing resin to the wafer by a printing method.
【００４７】また、封止樹脂をフィルム付封止樹脂でウ
エハに接着することで、取り扱いの良い製造法を提供で
きる。Further, by adhering the sealing resin to the wafer with the sealing resin with a film, it is possible to provide a manufacturing method which is easy to handle.
【００４８】また、分離工程をドライ工程にすること
で、吸水による未硬化の封止樹脂の劣化を防ぐことがで
きる。Further, by making the separation step a dry step, it is possible to prevent deterioration of the uncured sealing resin due to water absorption.
【００４９】また、レーザーを用い各封止樹脂付突起電
極付ＩＣチップに分離することで、未硬化封止樹脂の反
応を防止できる。Further, by separating each IC chip with protruding electrodes with sealing resin by using a laser, the reaction of the uncured sealing resin can be prevented.
【００５０】また、レーザーをウエハ裏面より照射する
ことで、容易にレーザーを照射する部分を特定できる。Further, by irradiating the laser from the back surface of the wafer, it is possible to easily specify the portion to be irradiated with the laser.
【００５１】また、ＩＣチップのエッジをレーザー照射
時のマスクとすることで、容易に封止樹脂とＩＣチップ
の大きさが同じ製品を提供できる。Further, by using the edge of the IC chip as a mask at the time of laser irradiation, it is possible to easily provide a product in which the sealing resin and the IC chip have the same size.
【００５２】また、切断法により各封止樹脂付突起電極
付ＩＣチップに分離することで、安価な製造法を提供で
きる。Further, an inexpensive manufacturing method can be provided by separating the IC chips with protruding electrodes with sealing resin by a cutting method.
【図１】本発明の実施の形態に係わる封止樹脂付突起電
極付ＩＣチップの構造を示す説明図である。FIG. 1 is an explanatory diagram showing the structure of an IC chip with a protruding electrode with a sealing resin according to an embodiment of the present invention.
【図２】本発明の実施の形態に係わる封止樹脂付突起電
極付ＩＣチップの製造方法で、突起電極付ウエハ、貼り
付け工程、切削工程、接着工程、分離工程、完成を示す
説明図明図である。FIG. 2 is an explanatory diagram showing a wafer with protruding electrodes, a bonding step, a cutting step, an adhering step, a separating step, and a completion in a method for manufacturing an IC chip with protruding electrodes with a sealing resin according to an embodiment of the present invention. It is a figure.
【図３】本発明の実施の形態に係わる封止樹脂付突起電
極付ＩＣチップを使った実装構造を示す説明図である。FIG. 3 is an explanatory diagram showing a mounting structure using an IC chip with a protruding electrode with a sealing resin according to an embodiment of the present invention.
【図４】従来の突起電極付ＩＣチップの実装方法で、基
板、封止フィルム貼り付け工程、カバーフィルム剥離工
程、実装工程、完成を示す説明図である。FIG. 4 is an explanatory view showing a substrate, a sealing film attaching step, a cover film peeling step, a mounting step, and completion in a conventional mounting method of an IC chip with protruding electrodes.
【図５】従来の突起電極付ＩＣチップを使った実装構造
を示す説明図である。FIG. 5 is an explanatory diagram showing a mounting structure using a conventional IC chip with protruding electrodes.
１ ＩＣチップ ２ 突起電極 ３ ＰＶ膜 ４ パット ５ 封止樹脂 ６ 回路基板 ７ ソルダーレジスト ８ ボンディングパット ９ 硬化済封止樹脂 １０ パターン １１ フィレット １２ ウエハ １３ 突起電極付ＩＣチップ １４ ＩＣチップ外形 １５ サポートフィルム １６ ダイシング部 １７ 封止フィルム １８ カバーフィルム １００ 封止樹脂付突起電極付ＩＣチップ ２００ 実装完成品 1 IC chip 2 protruding electrodes 3 PV film 4 putts 5 Sealing resin 6 circuit board 7 Solder resist 8 bonding pads 9 Cured sealing resin 10 patterns 11 fillets 12 wafers 13 IC chip with protruding electrodes 14 IC chip outline 15 Support film 16 Dicing part 17 Sealing film 18 cover film 100 IC chip with sealing resin and protruding electrode 200 finished product
Claims (15)
の面積とほぼ同じ大きさで、前記ＩＣチップの実装面に
接着されたことを特徴とする、封止樹脂付突起電極付Ｉ
Ｃチップ。1. An encapsulating resin-attached protruding electrode I, wherein the uncured encapsulating resin is adhered to the mounting surface of the IC chip in a size substantially equal to the area of the mounting surface of the IC chip.
C chip.
に配設された突起電極の高さより厚いことを特徴とする
請求項１記載の封止樹脂付突起電極付ＩＣチップ。2. The IC chip with a protruding electrode with a sealing resin according to claim 1, wherein the thickness of the sealing resin is thicker than the height of the protruding electrode provided on the IC chip.
ることを特徴とする請求項１または２記載の封止樹脂付
突起電極付ＩＣチップ。3. The IC chip with a protruding electrode with a sealing resin according to claim 1, wherein the protruding electrode has a non-planar tip.
脂と熱可塑性樹脂とを含有することを特徴とする請求項
１から３記載の封止樹脂付突起電極付ＩＣチップ。4. The IC chip with a protruding electrode with a sealing resin according to claim 1, wherein the sealing resin contains at least a thermosetting resin and a thermoplastic resin.
ことを特徴とする請求項４記載の封止樹脂付突起電極付
ＩＣチップ。5. The IC chip with a protruding electrode with a sealing resin according to claim 4, wherein the thermosetting resin is an A stage.
記熱可塑樹脂の軟化温度以上であることを特徴とする請
求項５記載の封止樹脂付突起電極付ＩＣチップ。6. The IC chip with a protruding electrode with a sealing resin according to claim 5, wherein the reaction initiation temperature of the thermosetting resin is equal to or higher than the softening temperature of the thermoplastic resin.
プに接着する方法であって、少なくとも突起電極付ウエ
ハの裏面にサポートフィルムを貼り付ける貼り付け工程
と、前記サポートフィルム付ウエハをサポートフィルム
の一部を残して前記ウエハを切削する切削工程と、未硬
化の封止樹脂を切削済ウエハの突起電極面に接着する接
着工程と、切削溝に沿って個辺ＩＣチップに分離する分
離工程とを包含することを特徴とする封止樹脂付突起電
極付ＩＣチップの製造方法。7. A method for adhering an uncured encapsulating resin to an IC chip with protruding electrodes, comprising a step of attaching a support film to at least the back surface of the wafer with protruding electrodes, and supporting the wafer with supporting films. A cutting step of cutting the wafer while leaving a part of the film, an adhesion step of adhering an uncured sealing resin to the protruding electrode surface of the cut wafer, and a separation step of separating the IC chips into individual sides along the cutting grooves. A method for manufacturing an IC chip with a protruding electrode with a sealing resin, the method including:
ことを特徴とする請求項７記載の封止樹脂付突起電極付
ＩＣチップの製造方法。8. The method for manufacturing an IC chip with a protruding electrode with a sealing resin according to claim 7, wherein the cutting step uses a dicing method.
刷法で接着することを特徴とする請求項７または８記載
の封止樹脂付突起電極付ＩＣチップの製造方法。9. The method for manufacturing an IC chip with a protruding electrode with a sealing resin according to claim 7, wherein in the bonding step, an uncured sealing resin is bonded by a printing method.
付けられた未硬化の封止樹脂を貼り付ける方法であるこ
とを特徴とする請求項７または８記載の封止樹脂付突起
電極付ＩＣチップの製造方法。10. The IC chip with a protruding electrode with a sealing resin according to claim 7 or 8, wherein the bonding step is a method of sticking an uncured sealing resin that is previously stuck to the film. Manufacturing method.
とを特徴とする請求項７から１０記載の封止樹脂付突起
電極付ＩＣチップの製造方法。11. The method for manufacturing an IC chip with a protruding electrode with a sealing resin according to claim 7, wherein the separating step is a dry step.
ことを特徴とする請求項１１記載の封止樹脂付突起電極
付ＩＣチップの製造方法。12. The method of manufacturing an IC chip with a protruding electrode with a sealing resin according to claim 11, wherein a laser is used in the dry step.
ハの裏面側より照射されることを特徴とする請求項１２
記載の封止樹脂付突起電極付ＩＣチップの製造方法。13. The laser is irradiated from the back surface side of the wafer with the bump electrode.
A method for manufacturing an IC chip with a protruding electrode having a sealing resin as described above.
Ｃチップのエッジをマスクとすることを特徴とする請求
項１３記載の封止樹脂付突起電極付ＩＣチップの製造方
法。14. The laser comprises the I
14. The method for manufacturing an IC chip with a protruding electrode with a sealing resin according to claim 13, wherein an edge of the C chip is used as a mask.
を特徴とする請求項１１記載の封止樹脂付突起電極付Ｉ
Ｃチップの製造方法。15. The method according to claim 11, wherein the dry process is a cutting method.
Manufacturing method of C chip.
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| JP2001281308A JP2003092310A (en) | 2001-09-17 | 2001-09-17 | Ic chip having projected electrode with seal resin |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001281308A JP2003092310A (en) | 2001-09-17 | 2001-09-17 | Ic chip having projected electrode with seal resin |
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| JP (1) | JP2003092310A (en) |
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| WO2011129272A1 (en) * | 2010-04-13 | 2011-10-20 | 積水化学工業株式会社 | Attachment material for semiconductor chip bonding, attachment film for semiconductor chip bonding, semiconductor device manufacturing method, and semiconductor device |
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