JP2003078018A - Semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device where the deterioration of transistor characteristics due to NBTI and the like can be restored. SOLUTION: The device is provided with a monitor circuit 2 monitoring the characteristics of a transistor where prescribed voltage is applied to the gate electrode, a temperature raising circuit 5 raising the temperature of the transistor, and a control circuit 4 operating the temperature raising circuit 5 when the deterioration of the characteristics of the transistor is not less than a prescribed threshold based on the characteristics of the transistor monitored by the monitor circuit.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device having, for example, a p-channel transistor having a gate electrode to which a negative voltage is applied.

[0002]

2. Description of the Related Art nMOS (Metal Oxide Semiconductor)
C formed by both transistor and pMOS transistor
A MOS (Complementary MOS) transistor is characterized by low power consumption and high speed, and is therefore widely used as a basic circuit configuration that constitutes many LSIs including memories and logics.

In manufacturing a MOS transistor, it is necessary to form a gate insulating film on a semiconductor substrate and form a gate electrode on the gate insulating film. Conventionally, silicon oxide has been used as the gate insulating film, and polycrystalline silicon containing impurities such as phosphorus and boron has been used as the gate electrode.

Generally, a silicon oxide film as a gate insulating film is formed by reacting a silicon semiconductor substrate with dry oxygen or steam gas generated by combustion of hydrogen gas in a high temperature atmosphere.
That is, the thermal oxidation method is used. On the other hand, as a method of forming the gate electrode, a method of depositing polycrystalline silicon containing phosphorus or arsenic on the gate insulating film by a CVD (Chemical Vapor Deposition) method is generally used, and particularly, a minimum line width of 0.25 μm. In the CMOS transistors of the later generations, the structure of the gate electrode is greatly different from the structure of the 0.5 μm generation up to that point.

Namely, so far from the structure used as the gate electrode of the n ⁺ doped polysilicon nMOS transistor and the pMOS transistor both constituting the CMOS transistor, a p ⁺ doped polysilicon in the pMOS transistor, the nMOS transistor n ⁺ doped poly The structure is changed to use silicon as a gate electrode.

The purpose of this is to change the buried channel structure to the surface channel structure in order to suppress the short channel effect in the pMOS transistor.

By the way, in the above structure, pMOS
Boron (B) is introduced as a p-type impurity into the gate electrode on the transistor side by ion implantation or the like. Unlike phosphorus (P) introduced into the gate electrode on the nMOS transistor side, boron in polysilicon is not thermally stable, and is subjected to heat treatment such as activation annealing in the device manufacturing process after the introduction, and thus boron in the gate electrode. To spread.

After the 0.25 μm generation, since the gate insulating film is as thin as 3 to 5 nm, the above-mentioned boron diffuses into silicon oxide which is the gate insulating film in some cases,
Furthermore, it may reach the silicon substrate. In the present specification, this is referred to as boron penetration.

Boron reaching the silicon substrate changes the impurity concentration in the channel forming region, thereby changing the threshold voltage of the transistor and acting as a scattering factor for the carriers in the channel, resulting in deterioration of transistor performance. .

Therefore, it is necessary to suppress or prevent the penetration of boron, and in recent CMOS transistors,
Among those using a boron-doped p ⁺ gate electrode, not the conventional silicon oxide film as the gate insulating film,
Some use a silicon oxynitride (SiON) film obtained by nitriding this.

The silicon oxynitride film is generally formed in a highly reactive gas containing nitrogen such as nitric oxide (NO), dinitrogen oxide (N ₂ O) or ammonia (NH ₃ ). It is formed by heat-treating the film, but NO or N
_It may be formed by directly heat treating a silicon substrate with ₂ O gas. Nitrogen introduced into the film by heat treatment has a concentration peak at the interface between the silicon oxide film and the silicon substrate,
Present throughout the membrane. Due to the presence of this nitrogen, the penetration of boron into the silicon substrate is suppressed, and the above-mentioned deterioration of the transistor characteristics can be prevented.

[0012]

However, a large amount of hydrogen contained in the above-mentioned silicon oxynitride film is dissociated by the heat treatment, and a part of the Si--O bond in the gate insulating film is broken by the hydrogen, so that the gate insulating film is formed. NB that the threshold voltage fluctuates as a result of the increase in the trap density in the NB.
A decrease in characteristic deterioration of a transistor called TI (Negative Bias Temperature Instability) has come to be observed. NBTI refers to a problem of deterioration of transistor characteristics when a negative voltage is applied to a gate electrode of a pMOS transistor at high temperature for use.

As described above, in the NBTI, charges are trapped in the trap having a shallow energy level formed in the gate insulating film, and as a result, the increase in the threshold voltage of the transistor appears as a phenomenon.

In a transistor deteriorated by NBTI, an increase in threshold voltage, a decrease in drain current, and the like occur, which changes various characteristics of the semiconductor integrated circuit, resulting in adverse effects such as a decrease in circuit speed.

The present invention has been made in view of the above circumstances, and an object thereof is to provide a semiconductor device capable of recovering deterioration of transistor characteristics due to NBTI and the like.

[0016]

To achieve the above object, a semiconductor device according to the present invention includes a monitor circuit for monitoring characteristics of a transistor to which a predetermined voltage is applied to a gate electrode, and a temperature rise of the transistor. And a control circuit that activates the temperature raising circuit when the deterioration of the characteristics of the transistor is equal to or more than a predetermined threshold value based on the characteristics of the transistor monitored by the monitor circuit. Have.

The monitor circuit monitors the output current value of the transistor, and the control circuit compares the output current value of the transistor monitored by the monitor circuit with a predetermined threshold value to output the output. When the current value is less than or equal to a predetermined threshold value, the temperature increasing circuit is activated.

The monitor circuit monitors the output current value during the operation of the transistor, and the control circuit controls the gate electrode of the transistor when the output current value is equal to or less than a predetermined threshold value. The voltage application is stopped and the temperature raising circuit is operated.

The monitor circuit monitors the threshold voltage of the transistor, and the control circuit compares the threshold voltage of the transistor monitored by the monitor circuit with a predetermined threshold, When the threshold voltage is equal to or higher than a predetermined threshold value, the temperature raising circuit is activated.

The monitor circuit monitors the leak current value of the transistor, and the control circuit compares the leak current value of the transistor monitored by the monitor circuit with a predetermined threshold value to detect the leak current. When the current value is less than or equal to a predetermined threshold value, the temperature increasing circuit is activated.

The monitor circuit monitors the characteristics of the p-channel transistor in which a negative voltage is applied to the gate electrode.

In the above semiconductor device of the present invention, first, the monitor circuit monitors the characteristics such as the output current value of the transistor, and the characteristics of the transistor are deteriorated based on the characteristics of the transistor monitored by the monitor circuit. The control circuit determines whether or not it is equal to or more than the threshold value. Then, when the control circuit determines that the deterioration of the characteristics of the monitored transistor is equal to or higher than a predetermined threshold value, the temperature increasing circuit is activated. Then, by raising the temperature of the transistor by the temperature raising circuit, the heat energy releases the charge trapped in the trap in the gate insulating film, which causes the deterioration of the characteristics of the transistor. The threshold voltage is lowered and the transistor characteristics are restored.

Further, in order to achieve the above object, the semiconductor device of the present invention includes a monitor circuit for monitoring characteristics of a transistor in which a predetermined voltage is applied to a gate electrode, and a reverse bias for applying a reverse bias to the transistor. An applying circuit; and a control circuit that operates the reverse bias applying circuit when the deterioration of the characteristic of the transistor is equal to or more than a predetermined threshold value based on the characteristic of the transistor monitored by the monitor circuit. .

The monitor circuit monitors the output current value of the transistor, and the control circuit compares the output current value of the transistor monitored by the monitor circuit with a predetermined threshold value to output the output. When the current value is less than or equal to a predetermined threshold value, the reverse bias applying circuit is activated.

The monitor circuit monitors the output current value during operation of the transistor, and the control circuit controls the gate electrode of the transistor when the output current value is equal to or less than a predetermined threshold value. The application of the voltage is stopped to operate the reverse bias application circuit.

The monitor circuit monitors the threshold voltage of the transistor, and the control circuit compares the threshold voltage of the transistor monitored by the monitor circuit with a predetermined threshold, When the threshold voltage is equal to or higher than a predetermined threshold value, the reverse bias applying circuit is activated.

The monitor circuit monitors the leak current value of the transistor, and the control circuit compares the leak current value of the transistor monitored by the monitor circuit with a predetermined threshold value to determine the leak value. When the current value is less than or equal to a predetermined threshold value, the reverse bias applying circuit is activated.

The monitor circuit monitors the characteristics of the p-channel transistor in which a negative voltage is applied to the gate electrode.

In the above semiconductor device of the present invention, first, the monitor circuit monitors the characteristics such as the output current value of the transistor, and based on the characteristics of the transistor monitored by the monitor circuit, the characteristics of the transistor are deteriorated. The control circuit determines whether or not it is equal to or more than the threshold value. When the control circuit determines that the deterioration of the characteristics of the monitored transistor is equal to or higher than a predetermined threshold value, the reverse bias application circuit is activated. Then, by applying a reverse bias to the transistor by the reverse bias application circuit, the potential barrier between the gate insulating film of the transistor and the substrate is lowered, and trapped in the trap in the gate insulating film, which causes deterioration of the characteristics of the transistor. The generated charge is released, the threshold voltage of the transistor is lowered, and the characteristics of the transistor are restored.

Further, in order to achieve the above object, the semiconductor device of the present invention includes a monitor circuit for monitoring the characteristics of the transistor which fluctuates due to charges trapped in the gate insulating film of the transistor, and the monitor. A control circuit for determining whether or not the characteristic of the transistor monitored by the circuit is within a predetermined range; and, when the control circuit determines that the characteristic of the transistor exceeds a predetermined range, Charge discharging means for discharging the charges trapped in the gate insulating film until the characteristics of the transistor fall within a predetermined range.

The charge discharging means has a temperature raising circuit for raising the temperature of the transistor.

The charge discharging means has a reverse bias applying circuit for applying a reverse bias to the transistor.

The monitor circuit monitors the output current value of the transistor which fluctuates due to the charges trapped in the gate insulating film.

The monitor circuit monitors the threshold voltage of the transistor which fluctuates due to the charges trapped in the gate insulating film.

The monitor circuit monitors the leak current value of the transistor which changes due to the charges trapped in the gate insulating film.

In the above-described semiconductor device of the present invention, first, the monitor circuit monitors the characteristics of the transistor that fluctuate due to the charges trapped in the gate insulating film of the transistor, and the monitor circuit monitors the transistor. The control circuit determines whether or not the characteristic of is within a predetermined range. Then, when the control circuit determines that the characteristics of the transistor exceed the predetermined range, the charge discharging means keeps the charge trapped in the gate insulating film until the characteristics of the transistor fall within the predetermined range. Is released. Examples of the charge discharging means include a temperature increasing circuit and a reverse bias applying circuit. In this manner, the charge discharging means releases the charges trapped in the traps in the gate insulating film, which cause the transistor characteristics to fluctuate, thereby restoring the transistor characteristics.

[0037]

BEST MODE FOR CARRYING OUT THE INVENTION Embodiments of a semiconductor device of the present invention will be described below with reference to the drawings.

First Embodiment FIG. 1 is a schematic configuration diagram of a semiconductor device according to this embodiment. As shown in FIG. 1, the semiconductor device 1 according to the present embodiment
Has a main circuit 2 in which a predetermined circuit pattern is formed in a semiconductor chip, a current monitor circuit 3, a control circuit 4, and a temperature raising circuit 5.

The circuit 2 is not particularly limited in circuit pattern, and is composed of a circuit including a CMOS transistor or the like. For example, a DRAM memory cell or a booster circuit,
Various circuits such as an I / O circuit or an analog circuit are formed.

The current monitor circuit 3 is connected to the main circuit 2 and the control circuit 4 and used for the main circuit 2.
The output current value of the CMOS transistor having the MOS transistor is detected and a signal corresponding to the output current value is output to the control circuit 4.

The control circuit 4 is connected to the main circuit 2, the current monitor circuit 3 and the temperature raising circuit 5, detects the output current value of the transistor according to the input signal from the current monitor circuit 3, and outputs the current value. Is compared with a preset threshold value, and if the current value is below the threshold value,
The normal circuit operation of the circuit 2 is stopped and an operation signal is output to the temperature raising circuit 5.

The temperature raising circuit 5 is connected to the control circuit 4 and operates by receiving an actuation signal input from the control circuit 4 to heat the semiconductor chip (semiconductor device 1) on which the main circuit 2 and the like are formed. To do. The temperature raising circuit 5 generates Joule heat by, for example, passing an electric current through an aluminum wiring having an appropriate resistance formed in an upper layer, and the temperature raising circuit 5 is, for example, 100 to 1
The temperature of the semiconductor device 1 is raised to about 50 ° C. The wiring that generates the Joule heat is, for example,
It is arranged on the entire surface of the semiconductor device 1 and designed so that the temperature rises uniformly.

The operation of the semiconductor device according to this embodiment described above will be described with reference to the flowchart shown in FIG.

First, in step ST1, during normal circuit operation, the current monitor circuit 3 monitors the output current values of a plurality of transistors in the circuit 2, and a signal corresponding to the output current value is sent to the control circuit 4. The control circuit 4 receives the input and compares the output current value with a preset threshold value (step ST2).

Then, in step ST2, when the output current value of the predetermined number of transistors is less than or equal to the predetermined threshold value, the control circuit 4 stops the normal circuit operation in the circuit 2 (step ST3). The temperature raising circuit 5 is operated (step ST4). Since the normal circuit operation is stopped here, this circuit 2
No voltage is applied to the gate electrode of the transistor.

As described above, by raising the temperature of the transistor, the thermal energy causes electric charges to be released from the traps in the gate insulating film, which causes the threshold voltage to rise, thereby recovering the circuit characteristics. It will be.

Next, effects of the semiconductor device according to the present embodiment described above will be described.

FIG. 3 shows the result of measuring the deterioration amount of the drain current value of the pMOS transistor under high temperature conditions. In the measurement shown in FIG. 3, the temperature was set to 150 ° C., a stress voltage of −3.0 V was applied to the gate electrode,
It shows the change over time in the amount of deterioration of the drain current value when the drain voltage is set to 0V. Note that the deterioration amount of the drain current value on the vertical axis of FIG. 3 means that when the initial drain current of the transistor before stress is I ₀ ds and the drain current at a predetermined time point after stress is Ids,
₀ ds-Ids) / I ₀ ds.

As shown in FIG. 3, it can be seen that the drain current of the pMOS transistor becomes smaller by leaving it for 1000 seconds while keeping the above state. NBTI (Negative Bias Temperature Inst)
literally indicates deterioration of the transistor characteristics when a negative voltage is applied to the gate electrode of the pMOS transistor under high temperature conditions, and the above results indicate the phenomenon due to this NBTI.

In FIG. 4, application of the stress voltage to the gate electrode is stopped from the state of FIG. 3 described above, that is, the gate voltage is 0V, the drain voltage is 0V, and the temperature is 15V.
The results of measuring the amount of deterioration of the drain current value when held at 0 ° C. are shown. As for the deterioration amount of the drain current value on the vertical axis of FIG. 4, the initial drain current of the transistor before the stress is I ₀ ds and the drain current at a predetermined time point after the stress is I ds, as in FIG. In this case, the value of (I ₀ ds-Ids) / I ₀ ds is shown.

As shown in FIG. 4, by leaving the above state for 1000 seconds, the deterioration amount of the drain current of the pMOS transformer is reduced, that is,
It can be seen that the drain current value has recovered.

As described above, according to the above-described semiconductor device of this embodiment, when the temperature raising circuit 5 is provided and the circuit characteristic of the present circuit 2 is deteriorated due to the rise of the threshold voltage due to NBTI or the like. By operating the temperature raising circuit 5, the temperature of the main circuit 2 is raised, and the heat energy causes
The charge trapped in the trap in the gate insulating film, which causes the increase in the threshold voltage, is released. As a result, the threshold voltage of the MOS transistor is lowered,
This has the effect of recovering the circuit speed and drive current of the circuit 2. Therefore, due to the above effects, the reliability of the product in which the semiconductor device is mounted can be improved.

Second Embodiment FIG. 5 is a schematic configuration diagram of a semiconductor device according to this embodiment. As shown in FIG. 5, the semiconductor device 1 according to the present embodiment
Has a main circuit 2 in which a predetermined circuit pattern is formed in a semiconductor chip, a current monitor circuit 3, a control circuit 4, and a reverse bias application circuit 6.

The circuit 2 is not particularly limited in circuit pattern, and is composed of a circuit including a CMOS transistor and the like. For example, a memory cell of DRAM, a booster circuit,
Various circuits such as an I / O circuit or an analog circuit are formed.

The current monitor circuit 3 is connected to the main circuit 2 and the control circuit 4 and used for the main circuit 2.
The output current value of the CMOS transistor having the MOS transistor is detected and a signal corresponding to the output current value is output to the control circuit 4.

The control circuit 4 is connected to the main circuit 2, the current monitor circuit 3 and the reverse bias applying circuit 6, detects the output current value of the transistor according to the input signal from the current monitor circuit 3, and outputs the current. The value is compared with a preset threshold value, and when the current value is equal to or less than the threshold value, the normal circuit operation of the circuit 2 is stopped and the reverse bias applying circuit 6 receives an operation signal. Is output.

The reverse bias applying circuit 6 is connected to the control circuit 4 and the main circuit 2 and operates by receiving an operation signal input from the control circuit 4 to apply a reverse bias to the transistors in the main circuit. Here, the reverse bias refers to applying a positive voltage to the gate electrode of a pMOS transistor to which a negative voltage is usually applied.

The operation of the semiconductor device according to this embodiment described above will be described with reference to the flowchart shown in FIG.

First, in step ST11, the output current values of the plurality of transistors in the main circuit 2 are monitored by the current monitor circuit 3 during the normal circuit operation, and a signal corresponding to the output current value is sent to the control circuit 4. The control circuit 4 receives the input and compares the output current value with a preset threshold value (step ST12).

Then, in step ST12, when the output current value of the predetermined number of transistors is less than or equal to the predetermined threshold value, the control circuit 4 stops the normal circuit operation in the main circuit 2 (step ST13). The reverse bias applying circuit 6 is operated (step ST14).
Here, since the normal circuit operation is stopped, no voltage is applied to the gate electrode of the transistor of this circuit.

As described above, by applying a reverse bias to the transistor, the potential barrier between the gate insulating film of the transistor and the silicon substrate is lowered, and the gate insulating film in the gate insulating film which causes the increase of the threshold voltage is reduced. The charge trapped in the trap is released and the circuit characteristics are restored.

As described above, according to the semiconductor device of this embodiment, the reverse bias applying circuit 6 is provided and the NB
When the circuit characteristics of the circuit 2 are deteriorated due to a rise in the threshold voltage due to TI, a reverse bias is applied to the transistor to lower the potential barrier between the gate insulating film of the transistor and the silicon substrate. The trapped charge in the gate insulating film, which causes the increase in the threshold voltage, is released. As a result, the threshold voltage of the MOS transistor is lowered, and the circuit speed and drive current of the circuit 2 are restored. Therefore, due to the above effects, the reliability of the product in which the semiconductor device is mounted can be improved.

The semiconductor device of the present invention is not limited to the above description of the embodiments. For example, in the present embodiment, the deterioration of the transistor characteristics is determined by monitoring the output current value, but the present invention is not limited to this, and the threshold voltage rises due to NBTI or the like. By monitoring, it is possible to determine the deterioration of the transistor characteristics. In this case, a predetermined threshold value is determined in advance, and when the monitored threshold voltage is higher than the threshold voltage, the temperature increasing circuit 5 or the reverse bias applying circuit 6 is operated. However, when this threshold voltage is monitored, it cannot be performed during the operation of the circuit 2 as described above, and it is necessary to separately set an operation mode for periodically monitoring the threshold voltage. .

Further, since the threshold voltage of the transistor rises due to NBTI or the like, the leak current value of the transistor also decreases. Therefore, by monitoring the leak current value, it is possible to judge the deterioration of the transistor characteristics. . In this case, a predetermined threshold value is determined in advance, and when the monitored leak current value is smaller than the threshold value, the temperature increasing circuit 5 or the reverse bias applying circuit 6 described above is operated. However, even when monitoring the leak current value, it cannot be performed during the operation of the circuit 2 as described above, and it is necessary to separately set an operation mode for regularly monitoring the leak current value.

Further, the operating time of the temperature raising circuit 5 or the reverse bias applying circuit 6 is not particularly limited, and it is possible to operate the temperature raising circuit 5 or the reverse bias applying circuit 6 only for a predetermined time which is determined in advance. The current value may be monitored and operated until the output current value returns to a predetermined value.

Further, not only when the silicon oxynitride film is used as the gate insulating film, but also when the silicon oxide film is used as the gate insulating film, when the silicon nitride film exists in the vicinity, it is caused by NBTI. The phenomenon of
In particular, the structure of the transistor is not limited. Besides, various modifications can be made without departing from the scope of the present invention.

[0067]

According to the semiconductor device of the present invention, the NBTI
It is possible to recover the deterioration of the transistor characteristics caused by the above.

[Brief description of drawings]

FIG. 1 is a schematic configuration diagram of a semiconductor device according to a first embodiment.

FIG. 2 is a flowchart for explaining the operation of the semiconductor device according to the first embodiment.

FIG. 3 is a diagram for explaining effects of the semiconductor device according to the first embodiment.

FIG. 4 is a diagram for explaining effects of the semiconductor device according to the first embodiment.

FIG. 5 is a schematic configuration diagram of a semiconductor device according to a second embodiment.

FIG. 6 is a flowchart for explaining the operation of the semiconductor device according to the second embodiment.

[Explanation of symbols]

1, 1a ... Semiconductor device, 2 ... Main circuit, 3 ... Current monitor circuit, 4 ... Control circuit, 5 ... Temperature raising circuit, 6 ... Reverse bias applying circuit.

─────────────────────────────────────────────────── ─── Continuation of front page (51) Int.Cl. ⁷ Identification code FI theme code (reference) H01L 27/092 G01R 31/28 V 29/78 F term (reference) 2G003 AA02 AA07 AB05 AD06 AD07 AE01 AH00 2G132 AA00 AB20 AC07 AK07 AK09 AL00 5F038 AV06 BG03 DF05 DF06 DF07 DF12 DT12 DT18 EZ04 EZ20 5F048 AA07 AB01 AB03 AB10 AC03 BA01 BB06 BB07 BB11 BB14 5F140 AA06 BF03 AC01 AC32 BD03 AC01 AC32 BD03 BA01 AC32 BD03 BA01 AC32 BD03 BA01 AC32 BD03 BA01 BD32 AC09 BD03 AC01 AC32 BD33

Claims (18)

[Claims] 1. A monitor circuit for monitoring a characteristic of a transistor to which a predetermined voltage is applied to a gate electrode, a temperature raising circuit for raising a temperature of the transistor, and a characteristic of the transistor monitored by the monitor circuit. And a control circuit that activates the temperature increasing circuit when the deterioration of the characteristics of the transistor is equal to or higher than a predetermined threshold value. 2. The monitor circuit monitors the output current value of the transistor, and the control circuit compares the output current value of the transistor monitored by the monitor circuit with a predetermined threshold value, The semiconductor device according to claim 1, wherein the temperature increasing circuit is operated when the output current value is equal to or less than a predetermined threshold value. 3. The monitor circuit monitors the output current value during operation of the transistor, and the control circuit controls the gate of the transistor when the output current value is equal to or less than a predetermined threshold value. The semiconductor device according to claim 1, wherein application of voltage to the electrodes is stopped to operate the temperature increasing circuit. 4. The monitor circuit monitors a threshold voltage of the transistor, and the control circuit compares a threshold voltage of the transistor monitored by the monitor circuit with a predetermined threshold value. 2. The semiconductor device according to claim 1, wherein the temperature raising circuit is operated when the threshold voltage is equal to or higher than a predetermined threshold value. 5. The monitor circuit monitors a leak current value of the transistor, and the control circuit compares a leak current value of the transistor monitored by the monitor circuit with a predetermined threshold value, The semiconductor device according to claim 1, wherein the temperature increasing circuit is operated when the leak current value is equal to or less than a predetermined threshold value. 6. The semiconductor device according to claim 1, wherein the monitor circuit monitors a characteristic of a p-channel transistor in which a negative voltage is applied to the gate electrode. 7. A monitor circuit for monitoring characteristics of a transistor to which a predetermined voltage is applied to a gate electrode, a reverse bias application circuit for applying a reverse bias to the transistor, and characteristics of the transistor monitored by the monitor circuit. And a control circuit for activating the reverse bias applying circuit when the deterioration of the characteristics of the transistor is equal to or more than a predetermined threshold value. 8. The monitor circuit monitors the output current value of the transistor, and the control circuit compares the output current value of the transistor monitored by the monitor circuit with a predetermined threshold value, 8. The semiconductor device according to claim 7, wherein the reverse bias applying circuit is operated when the output current value is equal to or less than a predetermined threshold value. 9. The monitor circuit monitors the output current value during operation of the transistor, and the control circuit controls the gate of the transistor when the output current value is equal to or less than a predetermined threshold value. 9. The semiconductor device according to claim 8, wherein the application of voltage to the electrodes is stopped and the reverse bias application circuit is operated. 10. The monitor circuit monitors the threshold voltage of the transistor, and the control circuit compares the threshold voltage of the transistor monitored by the monitor circuit with a predetermined threshold value. The reverse bias applying circuit is operated when the threshold voltage is equal to or higher than a predetermined threshold value.
The semiconductor device described. 11. The monitor circuit monitors a leak current value of the transistor, and the control circuit compares a leak current value of the transistor monitored by the monitor circuit with a predetermined threshold value, 8. The reverse bias applying circuit is operated when the leak current value is less than or equal to a predetermined threshold value.
The semiconductor device described. 12. The semiconductor device according to claim 7, wherein the monitor circuit monitors the characteristics of a p-channel transistor in which a negative voltage is applied to the gate electrode. 13. A monitor circuit for monitoring the characteristics of the transistor that fluctuates due to charges trapped in the gate insulating film of the transistor, and the characteristics of the transistor monitored by the monitor circuit are within a predetermined range. A control circuit that determines whether or not there is a gate isolation circuit, and if the control circuit determines that the characteristic of the transistor exceeds a predetermined range, the gate isolation is performed until the characteristic of the transistor falls within a predetermined range. And a charge discharging means for discharging the charges trapped in the film. 14. The semiconductor device according to claim 13, wherein said charge discharging means has a temperature raising circuit for raising the temperature of said transistor. 15. The semiconductor device according to claim 13, wherein said charge discharging means has a reverse bias applying circuit for applying a reverse bias to said transistor. 16. The semiconductor device according to claim 13, wherein the monitor circuit monitors an output current value of the transistor that fluctuates due to charges trapped in the gate insulating film. 17. The semiconductor device according to claim 13, wherein the monitor circuit monitors a threshold voltage of the transistor that varies due to charges trapped in the gate insulating film. 18. The semiconductor device according to claim 13, wherein the monitor circuit monitors a leak current value of the transistor which varies due to charges trapped in the gate insulating film.