JP2003077965A - Inspection apparatus for semiconductor device and method of inspecting semiconductor device using same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a probing technique for preventing a short circuit caused when wiring contacts a semiconductor chip while securing strength of beams. SOLUTION: A plurality of beams 11 in a double-supported-beam structure are placed in parallel on a wafer. A projection 12 is formed in the center of each beam 11 of the wafer. The projection 12 is coated with a metal film 13 as a contactor, and an electrode is formed for connection to the other side of the wafer. Wiring 14 for connecting the contactor and electrode derives the metal film 13 coated on the projection 12 from one side through the side of the beam 11 to the other side of the beam, where the wiring extends to connect the contractor and electrode, thus wiring does not extend on a surface to be inspected and the short circuit is prevented. Furthermore, the double- supported-beam structure of the beam 11 provides sufficient strength.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device inspection, and more particularly to a technique most effectively applied to a characteristic test of a semiconductor device performed in a wafer state.

[0002]

2. Description of the Related Art In the manufacture of semiconductor devices, semiconductor elements or wiring patterns are collectively formed in a plurality of element forming regions provided on a wafer such as single crystal silicon to form a predetermined circuit, and adjacent elements are formed. The wafer is cut in the scribing region between the formation regions and dicing is performed to separate each element formation region as individual semiconductor chips, and the individual semiconductor chips thus separated are fixed to, for example, a base substrate or a lead frame. Through a mounting process such as die bonding and wire bonding, resin sealing and the like are performed to complete a semiconductor device.

Prior to the dicing, in order to exclude a nonstandard semiconductor chip from the mounting process, a probe test for measuring the characteristics of the formed circuit is performed. Usually, in a probe test, the tip of a needle-shaped contactor called a probe is brought into contact with a signal pad connected to a circuit formed in the element formation region of a wafer to electrically connect the probe to the circuit. The measurement is performed by connecting the probe to a measuring device by a coaxial cable attached to the rear end of the probe or a transmission line such as a microstrip line, and transmitting a measurement signal between the circuit and the measuring device. .

In semiconductor devices, the size of semiconductor chips has been reduced, and at the same time the size of the product has been reduced. In the CSP (Chip Size Package) type, the size of the product is approximately the same as that of the semiconductor chip on which the product is mounted. Has become.

A WPP (Wafer Pro) that seals the CSP type semiconductor device and forms external terminals in a wafer state
Technology such as cess package) has been considered, and in the case of semiconductor devices by WPP, it is necessary to perform the characteristic test etc. which were conventionally performed on individual semiconductor devices in a sealed state in a wafer state, so the importance of the probe test increases. ing.

Similarly, in order to reduce the mounting area or volume, in the case of bare chip mounting in which a semiconductor chip is directly mounted on a mounting substrate or MCM (Multi Chip Module), a semiconductor chip which is not packaged or Since the wafers are shipped in the state of wafers, it is necessary to distinguish between a good product that is actually usable (Known Good Die) and a defective product before shipping, and a probe test at the wafer stage becomes important.

[0007]

In a semiconductor device, the size of a semiconductor chip to be mounted has been reduced due to higher integration due to the progress of miniaturization. On the other hand, due to the higher integration, the size of the semiconductor chip to be mounted on the semiconductor chip area has been reduced. The scale of the circuits or the types of the circuits has been expanded, and more pads or more multifunctional circuits are mounted by such high integration, so that more pads are required for the semiconductor device.

Due to such a reduction in the size of the semiconductor chip and an increase in the number of pads, the pads of the semiconductor device will be further miniaturized and the pitch will be narrowed. Therefore, along with the progress of miniaturization of these pads, the probe is also required to be miniaturized and have a large number of pins. However, in the conventional probe card, a large number of individual probe pins made of needles of tungsten etc. are processed with high accuracy. Since a mechanical manufacturing method is employed in which the elements are arranged and fixed with an epoxy resin or the like and connected to a printed circuit board, it is difficult to miniaturize and increase the number of pins, and it is difficult to respond to miniaturization of semiconductor devices.

For this reason, the present inventors have developed a technique for processing a silicon wafer to produce a probe card by utilizing a semiconductor device manufacturing technique such as photolithography and etching which can be easily miniaturized.

In this probe card, as shown in FIG. 1, a plurality of beam-shaped beams 1 are arranged side by side in parallel, a protrusion 2 is formed at the center of each beam 1, and a metal film 3 is formed on this protrusion 2. Is attached to form a contactor, and the contactor is brought into contact with a pad 5 formed on a semiconductor chip 4 to be tested as shown in FIG. Then, an electrode for relaying with the test head is formed on the other surface (hereinafter, referred to as a connection surface) opposite to the one surface (hereinafter, referred to as a measurement surface) on which the protrusion 2 is formed.

Therefore, the wiring 6 for connecting the contactor and the electrode is required, and the through hole 7 is formed as shown in the vertical cross section in FIG.
Although the wiring of the measurement surface is led out to the connection surface through this hole 7, the wiring 6 extends to the measurement surface from the protrusion 2 to the hole 7 in this configuration. The wiring 6 needs to have a certain thickness in order to reduce the resistance. Therefore, the wiring 6 is
May contact the semiconductor chip 4 to be measured and cause a short circuit. In addition, there is a problem that it takes time to form the through holes 7 and the manufacturing cost increases.

This problem can be avoided if the beam 1 has a cantilever structure and the wiring 6 is led out to the opposite surface through the tip of the contactor as shown in FIG. is there. However, when the beam 1 is cantilevered, the beam 1
There is a problem that the mechanical strength of the is reduced.

An object of the present invention is to solve these problems and to provide a technique for preventing the occurrence of a short circuit in which the wiring contacts the semiconductor chip while the strength of the beam is ensured. The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

[0014]

Among the inventions disclosed in the present application, a brief description will be given to the outline of typical ones.
It is as follows. Beam-shaped beams are arranged in parallel on the wafer in a double-supported structure.On one side of the wafer, a protrusion is formed in the center of each beam, and a metal film is applied to the protrusion to form a contact. , A wiring for forming a connection electrode on the other surface of the wafer and connecting the contact and the electrode, the metal film adhered to the projection is passed through the side surface of the beam from one surface to the other surface. And the wiring extends to the other surface to connect the contactor and the electrode.

Further, a plurality of beam-shaped beams are arranged in parallel in parallel with each other on the wafer in a double-supported structure, and a protrusion is formed at the center of each beam on one surface of the wafer, and a metal film is deposited on the protrusion. To form a contact for an electrode on the other surface of the wafer, and a wiring for connecting the contact and the electrode is formed by passing the metal film deposited on the protrusion through one side of the beam. From the surface to the other surface, the wiring extends on the other surface, using an inspection tool to connect the contact and the electrode, the contact is brought into contact with the pad of the semiconductor chip in a wafer state, A measuring device is connected to the electrode on the other surface to perform a characteristic test of the semiconductor chip.

According to the present invention described above, since the wiring does not extend to the measurement surface, it is possible to prevent the occurrence of the above-mentioned short circuit. Moreover, since the beam has a double-supported structure, sufficient strength can be obtained.

Embodiments of the present invention will be described below. In all the drawings for explaining the embodiments, the same reference numerals are given to those having the same function, and the repeated description thereof will be omitted.

[0018]

FIG. 4 is a perspective view showing a probe used for inspecting a semiconductor device according to an embodiment of the present invention. FIG. 5A is a plane orthogonal to the beam in FIG. 5B is a vertical side view of the surface along the beam in FIG. 4, and the beam portion in FIG. 5 is shown with a partially enlarged view.

In this probe card, as shown in FIG. 4, a beam-shaped beam 11 is formed on a wafer 10 made of single crystal silicon or the like.
Is a double-sided structure and is installed in parallel in parallel.
A pyramidal projection 12 is formed at the center of the, and a metal film 13 is deposited on the projection 12 to form a contact. When conducting the test, the contact is brought into contact with a pad formed in the circuit to be tested to conduct the test.

The metal film 13 to be deposited on the protrusions 12 is, for example, titanium / gold / nickel / gold laminated in order, and has a thickness of 0.6 μ
A relatively thin metal film having a thickness of about m to 3 μm is formed. By forming the metal film 13 thin, the tips of the protrusions 12 can be maintained at an acute angle. Therefore, the natural oxide film formed on the surface of the pad of the semiconductor chip during measurement is broken by the acute angle protrusions 12 and the The contact conduction with the contact can be ensured. If the metal film 13 is formed thick, the tips of the protrusions 12 are blunted by the metal film 13, the natural oxide film cannot be broken, and contact failure due to the natural oxide film occurs.

By thinning the thickness of the wafer 10 in the region where the beam 11 is formed, elastic deformation of the beam 11 is facilitated, and the pressing force when contacting the pad of the semiconductor chip depends on the width and thickness of the beam 11. Adjustments can be made to ensure more reliable contact between the probe and the pad. Further, since the plurality of beams 11 arranged in parallel can be independently deformed, even if there is some error in the height of the pad, it can be absorbed.

Then, an electrode for relaying with the test head is formed on the other surface (hereinafter referred to as a connection surface) opposite to the one surface (hereinafter referred to as a measurement surface) on which the projection 12 is formed. There is.

The wiring 14 connecting the contactor and the electrode is formed by leading the metal film 13 adhered to the protrusion 12 to the connection surface through the side surface of the beam 11, and the wiring 14 extends to the electrode at the connection surface. Then, the contact and the electrode are connected by the wiring 14, and since the wiring 14 does not extend on the measurement surface, the occurrence of the above-mentioned short circuit can be prevented. Further, on the connection surface, for example, titanium / gold / copper / nickel / gold is sequentially laminated on the wiring 14 to form a relatively thick metal film of about 6 μm to 10 μm to reduce the wiring resistance.

In the probe of the present embodiment, the miniaturized probe can be easily provided with a large number of pins by utilizing the semiconductor device manufacturing technique. Therefore, even if the pad size of the semiconductor chip is reduced, the probe can be easily manufactured. And a probe test can be performed reliably.

Further, since the beam 11 has a double-supported structure, sufficient strength is ensured and a through hole for connecting the measurement surface and the connection surface is not required. Therefore, the time and cost for forming the through hole are increased. Is reduced.

Further, since this through hole penetrates the wafer in a vertical direction and the size of the opening portion becomes large, which hinders miniaturization of the probe card. However, by eliminating this through hole, The probe card can be easily miniaturized.

Next, the formation of the metal film and wiring in this probe manufacturing method will be described with reference to FIGS. 6 to 14. First, as shown in FIG. 6, in a wafer 10 made of single crystal silicon or the like, a region of the wafer where beams are formed is first thinned by etching or the like using photolithography, and a plurality of through grooves are formed to form a beam shape. A plurality of beams 11 are arranged in parallel and a protrusion 12 is formed at the center of each beam 11 to form the outer shape of the probe. Subsequently, titanium and gold are applied to both sides of the wafer 10 and the side surfaces of the beam 11 in an amount of 0.05 μm and 1 μm, respectively.
FIG. 7 shows a state in which the metal film 13 having a thickness of about m is deposited by sputtering.

Next, as shown in FIG. 8, resist masks 15 made of electrodeposited photoresist are formed on the respective surfaces, gold is etched by etching using the resist masks 15, and then titanium is patterned using the patterned gold as a mask. 9, the unnecessary portions of gold and titanium are removed to pattern the metal film 13 of the contactor and the lower layer film of the wiring 14 by etching, and then the resist mask 15 is removed to remove the metal of the contactor. A film and wiring are formed. This state is shown in FIG.

Next, in order to reduce the resistance of the wiring, FIG.
As shown in FIG. 3, the contactor and its surroundings are covered with an electrodeposition photoresist 16, and a plating process is performed to stack copper and nickel on the wiring 14 to about 5 μm and 0.5 μm, respectively.
This state is shown in FIG.

Next, as shown in FIG.
6 is removed, plating is applied, and nickel and gold are added to 1
About 14 μm and 0.5 μm wiring 14 and metal film 1 of contactor
Stack to 3. This state is shown in FIG.

Next, in order to prevent unexpected conduction, a COVB electrodeposition photoresist 17 that partially insulates the wiring is formed and the state shown in FIGS. 4 and 5 is obtained.

Further, as an application example of the present invention, as shown in FIG. 15, the metal film 13 covering the projection 12 serving as a contactor is led out from the side surface of the beam to the connection surface and connected to a relatively thick wiring at the connection surface. In addition to the configuration, relatively thin wiring 1 on the connection surface
8 may be extended. Since the wiring 18 is thin, it is unlikely to cause a short circuit with the semiconductor chip, and there is the convenience that various connections can be made on the connection surface.

Although the present invention has been specifically described based on the above embodiment, the present invention is not limited to the above embodiment, and various modifications can be made without departing from the scope of the invention. Of course.

[0034]

The effects obtained by the typical ones of the inventions disclosed in the present application will be briefly described as follows. (1) According to the present invention, there is an effect that a probe can be manufactured using a semiconductor device manufacturing technique. (2) According to the present invention, due to the above effect (1), there is an effect that a fine and multi-pin probe card can be easily manufactured. (3) According to the present invention, there is an effect that the wiring can be formed on the side surface of the beam. (4) According to the present invention, due to the above effect (3), there is an effect that the occurrence of short circuit is eliminated because the wiring does not extend to the measurement surface. (5) According to the present invention, due to the above effect (3), since the through hole is unnecessary, there is an effect that the time and cost required for manufacturing are reduced. (6) According to the present invention, since the beam can have a double-supported structure, there is an effect that sufficient strength can be secured.

[Brief description of drawings]

FIG. 1 is a perspective view showing a probe used in a conventional probe test.

FIG. 2 is a vertical cross-sectional view showing a probe used in a conventional probe test.

FIG. 3 is a vertical cross-sectional view showing a probe used in a conventional probe test.

FIG. 4 is a perspective view showing a probe used in a probe test according to an embodiment of the present invention.

5 is a vertical side view of a plane along the beam and a plane orthogonal to the beam in FIG.

FIG. 6 is a vertical cross-sectional side view showing each step of the method for manufacturing the probe according to the embodiment of the present invention.

FIG. 7 is a vertical cross-sectional side view showing each step of the method for manufacturing the probe according to the embodiment of the present invention.

FIG. 8 is a vertical cross-sectional side view showing each step of the method for manufacturing the probe according to the embodiment of the present invention.

FIG. 9 is a vertical cross-sectional side view showing each step of the probe manufacturing method according to the embodiment of the present invention.

FIG. 10 is a vertical cross-sectional side view showing each step of the method for manufacturing a probe that is an embodiment of the present invention.

FIG. 11 is a vertical cross-sectional side view showing each step of the method for manufacturing the probe according to the embodiment of the present invention.

FIG. 12 is a vertical cross-sectional side view showing each step of the method for manufacturing the probe according to the embodiment of the present invention.

FIG. 13 is a vertical cross-sectional side view showing each step of the method for manufacturing the probe according to the embodiment of the present invention.

FIG. 14 is a vertical cross-sectional side view showing each step of the probe manufacturing method according to the embodiment of the present invention.

FIG. 15 is a perspective view showing a modification of the probe according to the embodiment of the present invention.

[Explanation of symbols]

1, 11 ... Beam, 2, 12 ... Protrusion, 3, 13 ... Metal film, 4
... Semiconductor chip, 5 ... Pad, 6,14 ... Wiring, 7 ...
Hole, 10 ... Wafer, 15 ... Resist mask, 16, 17
… Photoresist, 18… Wiring.

   ─────────────────────────────────────────────────── ─── Continued front page    (72) Inventor Kazuhiro Ban             5-20-1 Kamimizuhonmachi, Kodaira-shi, Tokyo Stock             Ceremony Company within Hitachi Semiconductor Group (72) Inventor Yuichi Nezu             5-22-1 Kamimizuhonmachi, Kodaira-shi, Tokyo Stock             Ceremony Company Hitachi Cho-LS System             Within (72) Inventor Kenji Kawakami             5-20-1 Kamimizuhonmachi, Kodaira-shi, Tokyo Stock             Ceremony Company within Hitachi Semiconductor Group (72) Inventor Naoto Fujiki             3-3 Fujibashi, Ome City, Tokyo 2 Hitachi Higashi             Inside Kyo Electronics Co., Ltd. (72) Inventor Takashi Yamagami             3-3 Fujibashi, Ome City, Tokyo 2 Hitachi Higashi             Inside Kyo Electronics Co., Ltd. (72) Inventor Riki Nagakura             3-3 Fujibashi, Ome City, Tokyo 2 Hitachi Higashi             Inside Kyo Electronics Co., Ltd. (72) Inventor Hiroyuki Amari             5-20-1 Kamimizuhonmachi, Kodaira-shi, Tokyo Stock             Ceremony Company within Hitachi Semiconductor Group (72) Inventor Yukinori Sugiyama             5-20-1 Kamimizuhonmachi, Kodaira-shi, Tokyo Stock             Ceremony Company within Hitachi Semiconductor Group F-term (reference) 2G003 AA07 AG03 AG04 AG08 AG12                       AH00 AH07                 2G011 AA09 AA15 AA21 AB06 AB08                       AC14 AC21 AE03 AF07                 2G132 AA00 AF02 AF03 AL00                 4M106 AA01 BA01 DD03 DD04 DD10

Claims (4)

[Claims] 1. A plurality of beam-shaped beams are juxtaposed in parallel on a wafer in a double-supported structure, and a projection is formed at the center of each beam on one surface of the wafer, and a metal film is deposited on the projection. To form a contact for an electrode on the other surface of the wafer, and a wiring for connecting the contact and the electrode is formed by passing the metal film deposited on the protrusion through one side of the beam. An inspection tool for a semiconductor device, characterized in that the wiring is extended from one surface to the other surface, and the wiring extends on the other surface to connect the contactor and the electrode. 2. A relatively thin metal film having a thickness of about 0.6 μm to 3 μm is formed as a metal film deposited on the contactor on the one surface, and 6 μm to a wiring extending to the other surface.
The semiconductor device inspection tool according to claim 1, wherein a relatively thick metal film having a thickness of about 10 μm is formed. 3. A wafer is provided with a plurality of beam-shaped beams arranged in parallel in a double-supported structure, and a protrusion is formed in the center of each beam on one surface of the wafer, and a metal film is deposited on the protrusion. To form a contact for an electrode on the other surface of the wafer, and a wiring for connecting the contact and the electrode is formed by passing the metal film deposited on the protrusion through one side of the beam. From the surface to the other surface, the wiring extends on the other surface, using an inspection tool to connect the contact and the electrode, the contact is brought into contact with the pad of the semiconductor chip in a wafer state, A method of inspecting a semiconductor device, which comprises connecting a measuring device to an electrode on the other surface and performing a characteristic test of a semiconductor chip. 4. A relatively thin metal film having a thickness of about 0.6 μm to 3 μm is formed as a metal film adhered to the contactor on the one surface, and 6 μm is formed as a wiring extending to the other surface.
4. The method for inspecting a semiconductor device according to claim 3, wherein a relatively thick metal film having a thickness of about 10 [mu] m is formed.