JP2003060964A - Electronic camera and clock control method therefor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce power consumption and enhance battery utilizing efficiency by incorporating control of a system clock to a sequence of camera operations and switching a clock frequency, depending on processing contents of a system, independently of the state of battery voltage. SOLUTION: Switching control of a system block is incorporated to a photographic sequence of the digital camera. For example, during the display of a through-movie, the clock frequency is set to a 'medium speed'. When a shutter button is half depressed (S1=ON), the clock frequency is switched to the 'highest speed' and AE/AF processing is conducted at a high-speed. After the end of the S1 processing, the 'medium speed' is again selected, and the processing restores to the display of a movie image. In the case of an S2 processing (shutter drive and CCD capturing), the clock frequency is set to the 'medium speed' in order to prevent a rush current by shutter drive, in the case of compression and write processing to a recording medium, the clock frequency is switched to the 'highest speed', to attain high-speed processing. Then, the system clock frequency is switched to a 'low speed', and a strobe charging is conducted.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electronic camera such as a digital still camera or a camcorder, and a system clock switching control technology applied to the electronic camera.

[0002]

2. Description of the Related Art Japanese Unexamined Patent Publication (Kokai) No. 5-143186 discloses a method of varying the frequency of a system clock by following a voltage drop of a battery in order to achieve a long battery life in a portable information processing device such as a small personal computer. Disclosure. Not only changing the clock frequency, but also CPU, ROM and R
A method of varying the supply voltage to various devices such as AM has also been proposed (Japanese Patent Laid-Open No. 5-333976).

The electronic device disclosed in Japanese Unexamined Patent Publication No. 7-234741 detects the voltage of the power supply battery and sets the reference voltage as the reference voltage in order to increase the time margin until the battery becomes inoperable due to exhaustion of the battery. When it is lower than the value, the CPU clock frequency is controlled to be lowered. Further, the computer system disclosed in Japanese Patent Application Laid-Open No. 9-237132 stabilizes the system by controlling the clock frequency according to the system status such as CPU load status, heat generation temperature status, and battery remaining capacity. There is.

[0004]

However, each of the above publications does not describe a photographing device such as a digital camera, and a technical problem peculiar to the camera has not been examined. If the conventional clock control method is applied to the electronic photographing apparatus, the voltage of the battery must be finely detected in the photographing sequence. Depending on the type of battery, it is difficult to detect a voltage drop, and a voltage that hardly changes is detected to control the clock, which is extremely difficult to control.

Therefore, in the conventional digital camera, in order to avoid a current rush in the shooting sequence, the power supply of the liquid crystal monitor (LCD) is turned off or the backlight is controlled to interrupt the display (black). Out) or raise the battery end voltage (determination voltage for battery replacement time) to replace the battery early.

The present invention has been made in view of the above circumstances, and does not require difficult control, eliminates the occurrence of blackout at the time of shooting, and improves the battery use efficiency, and its clock control. The purpose is to provide a method.

[0007]

In order to achieve the above object, the invention according to claim 1 has an image pickup means for converting an optical image into an electric signal, and records an image picked up by the image pickup means. In an electronic camera for recording on a medium, the electronic camera includes a clock generation means for generating a clock necessary for the operation of the present camera system, a control means for controlling the system according to the clock, and a system for controlling according to a control sequence by the control means. And a clock frequency switching means for switching the frequency of the clock according to the contents of the process.

According to the present invention, the operation of the camera is controlled according to a pre-programmed control sequence.
Since the control of the clock frequency is incorporated in the control sequence that defines the processing procedure of the system, the clock frequency is switched in synchronization with the processing steps of the system regardless of the detection result of the battery voltage. This enables appropriate clock control according to the camera operation.

According to one aspect of the present invention, as described in claim 2, a clock frequency switching control step is incorporated in an image capturing sequence which defines a control procedure of the image capturing operation, and image capturing by the image capturing sequence is performed. It is characterized in that at least two kinds of clock frequencies are selectively switched during control.

For example, when the procedure of <awaiting input of a shooting instruction → AE / AF processing → shutter driving (exposure) / reading processing → compressed recording processing → strobe charging processing> is performed as a shooting operation, a plurality of processings are performed depending on the processing contents. A series of sequences is carried out while selectively switching the clock frequency. The clock frequency at the time of processing is determined by comprehensively considering the processing speed and current consumption required in each processing step. This makes it possible to reduce the power consumption of the system, suppress the peak current (maximum current consumption), and realize stable system operation.

As another aspect of the present invention, as set forth in claim 3, in the above electronic camera, mode setting means for setting an operation mode of the electronic camera is added, and the mode is set by the mode setting means. There is also a mode in which the frequency of the clock is switched according to the operation mode.

In order to provide a method invention for achieving the above object, the invention according to claim 4 is an electronic camera which converts an optical image into an electric signal and records the obtained electronic image information in a recording medium. A clock control method applied, wherein the clock frequency is configured to be switchable for operation of the camera system, and a clock frequency switching control step is included in a control sequence that defines a processing procedure of the system. It is characterized in that the frequency of the clock is switched in association with the processing content of the system by incorporating the control sequence.

Specifically, as described in claim 5, there is a mode in which the clock frequency is lowered when the strobe charging process is performed. According to a sixth aspect of the present invention, the clock frequency is increased during at least one of the AE process and the AF process, and the clock frequency is decreased during shutter driving as compared with the AE / AF process. is there. In addition, as described in claim 8, when performing image data compression processing and recording medium writing processing, control is performed to increase the clock frequency, and as described in claim 9, a countdown period during self-timer shooting There is a mode in which the control for lowering the clock frequency is performed so that the clock frequency becomes equivalent to the input waiting period for the instruction to start shooting.

[0014]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT A preferred embodiment of an electronic camera and its clock control method according to the present invention will be described in detail below with reference to the accompanying drawings.

FIG. 1 is a block diagram of a digital camera according to an embodiment of the present invention. The camera 10 includes a central processing unit (CPU) 1 for controlling the camera system.
2. Clock control unit 14 for generating a clock signal used for CPU operation, power supply control unit 16, strobe control unit 1
8, photographing lens 20, diaphragm 22, shutter mechanism 23,
CCD image sensor (hereinafter referred to as CCD) 24,
CDS circuit 26, gain control amplifier 28, A /
D converter 30, signal processing unit 32, compression / expansion block 3
4. Media control unit 3 for reading and writing the recording medium 36
8, ROM 40, RAM 42, memory control unit 44, LCD drive control unit 4 for controlling a liquid crystal monitor (LCD) 46
8, an image encoding unit 50 for controlling the image data to be displayed on the liquid crystal, an operation block 5 for the user to input various instructions
2, and a communication interface unit 54 for communicating with an external device (not shown). Instead of the CCD 24, a CMOS sensor or other imaging device may be used.

The clock control unit 14 can switch the clock frequency in a plurality of stages (for example, three stages of <highest speed / medium speed / low speed>) in accordance with a command from the CPU 12.
The ROM 40 stores programs processed by the CPU 12 and various data necessary for control. RAM4
In addition to the image processing area, reference numeral 2 has a work area in which the CPU 12 performs various kinds of arithmetic processing. The memory control unit 44
The access to the ROM 40 and the RAM 42 is controlled according to the instruction of the CPU 12.

The operation block 52 includes input operation means of various forms such as a power switch, a shutter button (shooting instruction means), a mode dial as a mode setting means, a cross button, a menu / execute button, a cancel button, and a touch panel. It is a block. The power supply control unit 16 includes a DC / DC converter. This power control unit 1
6 converts the voltage of the battery 56 into a required voltage according to a command from the CPU 12 and supplies power to each circuit block. The strobe control unit 18 performs charge control of a capacitor (not shown), discharge (light emission) timing control of a strobe light emitting unit 58 (for example, a xenon tube) based on a command from the CPU 12, and a strobe light adjustment sensor ( The light emission stop control is performed based on the detection result (not shown). CP
The U12 controls the electronic volume (EVR) 60 to adjust the strobe charging voltage and the power supply voltage.

The power switch in the operation block 52 is turned on.
When operated and power is supplied to the system from the power supply control unit 16, the CPU 12 executes the program written in the ROM 40 and stores the program in the ROM 40 in the RAM.
Expand to 42. After that, the CPU 12 executes various controls according to the program expanded in the RAM 42.

The photographing lens 20 is composed of one or a plurality of lenses, and may be a single focus lens or a variable focal length lens such as a zoom lens. The light passing through the taking lens 20 has its amount adjusted by the diaphragm 22, and then enters the CCD 24 through the shutter mechanism 23. CC
A large number of photosensors are arranged in a plane on the light-receiving surface of D24, and the subject image formed on the light-receiving surface of the CCD 24 via the taking lens 20 is a signal of an amount corresponding to the amount of incident light by each photosensor. Converted to electric charge. Note that CC
The D24 has a so-called electronic shutter function that controls the charge storage time (shutter speed) of each photo sensor.

The signal charges thus accumulated are sequentially read out as a voltage signal (image signal) corresponding to the signal charges based on the pulse given from the V-driver 70. C
The image signal output from the CD 24 (image signal in analog signal format) is subjected to correlated double sampling processing in the CDS circuit 26 and then amplified by the gain control amplifier 28. The gain-adjusted image signal is A /
After being converted into a digital signal by the D converter 30, the signal is sent to the signal processing unit 32.

The timing generator (TG) 72 is
A timing signal is given to the V-driver 70, the CDS circuit 26, the gain control amplifier 28, and the A / D converter 30 in accordance with a command from the CPU 12, and each circuit is synchronized by this timing signal. Further, the TG 72 gives a control signal to the iris motor driver 74 and the shutter driver 76 in accordance with a command from the CPU 12.

The signal processing section 32 is a digital signal processor (DS) including a luminance / color difference signal generation circuit, a gamma correction circuit, a contour correction circuit, a white balance correction circuit and the like.
P), and processes an image signal received from the A / D converter 30 in accordance with a command from the CPU 12. The image data input to the signal processing unit 32 is converted into a luminance signal (Y signal) and a color difference signal (Cr, Cb signal) and is subjected to predetermined processing such as gamma correction, and then the memory control unit 44. It is stored in the RAM 42 via the.

When displaying the image being picked up on the liquid crystal monitor 46, the image data is read from the RAM 42 and transferred to the image encoding section 50. Image encoding unit 5
The data sent to 0 is converted into a signal of a predetermined system for display (for example, a color composite video signal of NTSC system) and then output to the liquid crystal monitor 46 via the LCD drive control unit 48.

The image data in the RAM 42 is periodically rewritten by the image signal output from the CCD 24,
The video signal generated from the image data is the liquid crystal monitor 4
By being supplied to 6, the image contents being picked up by the CCD 24 are displayed on the liquid crystal monitor 46 in real time. The photographer can capture a moving image (hereinafter,
It is called "through movie" or simply "movie image". )
You can check the shooting angle of view.

The shutter button is divided into two stages depending on the pushing position, and when S1, which is shallow at the pushing position, is pressed, automatic focusing (AF) and automatic exposure control (AE) are performed and the shutter button is pushed further from S1. Deep S
When 2 is pressed, shooting operation for recording (exposure, reading)
Is executed.

That is, the CPU 12 performs various calculations such as focus evaluation calculation and AE calculation from the image data taken in response to the "half-press (S1 = ON)" operation of the shutter button, and based on the calculation result, While controlling the lens driving unit (not shown) to move the taking lens 20 to the in-focus position, the diaphragm 22 and the shutter mechanism 23 are controlled, and the charge storage time of the CCD 24 is controlled. And C
PU12 presses the shutter button "Fully press (S2 = O
N) ”, the TG7
The operation of the diaphragm 22 and the shutter mechanism 23 is controlled by issuing a command for shooting to 2 and outputting a control signal to the iris mode driver 74 and the shutter triver 76 via the TG 72. Also, at this time,
The CPU 12 issues an instruction to the strobe control unit 18 as necessary to cause the strobe light emitting unit 58 to emit light.

Fully press the shutter button (S2 = ON)
The image data captured in response to the
Input to the compression / expansion block 34, after undergoing YC processing and other predetermined signal processing. The compression / decompression block 34 converts the image data into a predetermined format (for example,
Compress according to JPEG method. The compressed data is recorded on the recording medium 36 via the medium control unit 38. After the recording process, the CPU 12 instructs the strobe control unit 18 to charge and performs a series of photographing sequences.

As the recording medium 36, a smart medium (Solid-State Floppy Disk Card), a PC card,
Various media such as compact flash (registered trademark), magnetic disks, and magneto-optical disks can be used.
The signal processing means and interface according to the medium used are applied. Regardless of different or same kind of recording media,
You may make it the structure which can mount several media. The recording medium is not limited to the removable medium, and may be a recording medium (internal memory) built in the camera 10.

When the reproduction mode is selected by the mode dial in the operation block 52, the image file is read from the recording medium 36. The compressed data of the read image file is decompressed by the compression / decompression block 34, and then is decompressed via the image encoding unit 50.
6 is output. After that, when the right key of the cross button is pressed, the frame is advanced in the forward direction, and when the left key is pressed, the frame is advanced in the reverse direction. Then, the image file at the frame position instructed by frame advance is read from the recording medium 36, and the recorded image is reproduced on the liquid crystal monitor 46 in the same manner as described above. The liquid crystal monitor 46 functions not only as an image display unit but also as a unit for displaying various information such as a menu display, the number of photographable frames, and a reproduction frame number.

Further, the camera 10 has an external communication mode, and can perform bidirectional communication with a personal computer (not shown) or other external equipment via the communication interface section 54. Communication methods include USB, IEEE1394, Bl
Various methods can be applied regardless of wired / wireless such as uetooth.

Next, the operation of the camera 10 configured as described above will be described. In the camera 10 of this embodiment,
The CPU 12 controls the clock controller 14 to execute a series of photographing sequences at a plurality of system clock frequencies, thereby reducing the power consumption of the system.
Hereinafter, a specific control example will be described.

[Photographing Sequence when LCD is ON] FIG. 2 shows an example of control of the system clock in the photographing sequence when the liquid crystal monitor is ON. As shown in the figure,
While displaying the through movie (waiting for the shutter button to be pressed), the system clock frequency is set to "medium speed",
Display processing of movie images is being performed. When the shutter button is operated by the photographer, the processing speed is required, so the system clock frequency is switched to the “highest speed” and the S1 processing (the AE processing for shooting and the AF processing) is performed.
When the S1 process is completed, the process returns to the movie image display (through movie display state) again, the system clock is switched to "medium speed", and the S2 ON operation is waited (S1 lock state).

When S2 is pressed in the S2 standby state,
The system clock is maintained at "medium speed", and S2 processing (shutter drive and CCD capture) is performed. The reason why the S2 process is performed in the "medium speed" mode is to prevent current rush due to shutter driving.

After that, the system clock is switched to the "highest speed", and YC processing, compression processing, and recording (medium writing) processing are performed. The "highest speed" is set here because the YC conversion process, the compression process, and the media recording process take time, and therefore the process speed is increased.

When the recording process is completed, the strobe charge state is confirmed, and if charging is necessary, the system clock is switched to "low speed" to perform strobe charging. During strobe charging, the clock is set to "low speed" in order to reduce the power consumption of other circuits as much as possible and concentrate the power on the charging process.
In addition, one of the reasons for switching to "low speed" is that the processing speed is not required for the charging processing itself without performing processing other than charging.

When the strobe charge is completed, the system clock is switched to the "highest speed" in order to output the movie image, and the AE / AF process is performed again for outputting the movie image. When the preparation for movie output is completed, the system clock is switched to "medium speed" to return to the normal through movie display state.

[Shooting Sequence When LCD is Off] FIG. 3 shows an example of control of the system clock in the shooting sequence when the liquid crystal monitor is off. LCD monitor OFF
At the time, there is no need to output a movie image in the standby state.
Since the processing of the PU 12 is also only the operation key monitoring, it operates at "low speed" during standby. When the shutter button is operated by the photographer, a sequence similar to the above-described photographing sequence when the LCD is turned on flows to perform photographing. At the end of the strobe charging process, there is no need to output a movie image, so the system enters the standby state with the same "low speed" clock as when strobe charging.

[Self-timer Shooting Sequence] FIG. 4 shows an example of control of the system clock in the self-timer shooting sequence when the liquid crystal monitor is ON, and FIG. 5 shows an example of control when the liquid crystal monitor is OFF. As shown in these drawings, during the self-timer photographing, the countdown of the timer is started at the time when S2 is turned on from the S1 locked state. Counting down (eg 10
For a second), when the LCD is turned on, a movie image is output with a "medium speed" clock (Fig. 4). On the other hand, when the LCD is off, the clock is switched to the same "low speed" clock as in the standby state during the countdown (FIG. 5).

End predetermined count (count up)
Then, the process proceeds to S2 processing, but at this time, the clock is switched to the "medium speed". The subsequent operation is the same as the sequence described with reference to FIGS.

FIGS. 6 and 7 show current waveforms when control for switching the frequency of the system clock (hereinafter referred to as clock gear control) is performed. FIG. 6A is a waveform of a control method (conventional method) in which the clock gear control is not performed in the shooting sequence when the LCD is turned on, and FIG.
Shows a waveform when clock gear control is performed. Also,
FIG. 7A is a waveform of a control method in which the clock gear control is not performed in the shooting sequence when the LCD is off, and FIG.
Shows a waveform when clock gear control is performed.

In these drawings (a),
As is clear from a comparison of the waveforms in (b), the peak current in the S2 process is lower in the case with the clock gear control than in the case without the clock gear control, and the system due to the power supply drop in the S2 process. You can prevent down.

Not only the above-described clock gear control linked with the photographing sequence, but also a mode in which the clock gear control is performed according to the operation mode of the camera 10 is preferable. FIG. 8 shows a setting example of the clock gear in each operation mode. When the camera 10 has a moving image shooting mode for recording a moving image on the recording medium 36 as an operation mode, unlike the still image (still) recording shooting mode, a processing speed higher than that in normal operation is required. , When the movie shooting mode is set, operate the system with the "high speed" clock.

In the playback mode, the recording medium 36 is frequently accessed, and the power consumption during playback is lower than that during shooting. Therefore, the clock gear operates at "highest speed". Preferably. This can reduce the stress caused by media access.

In the external communication mode (PC communication mode), in this system, the system clock is set to "highest speed" in order to perform high-speed bidirectional data transmission / reception with an external device such as a personal computer (PC). There is.

As shown in FIG. 8, by controlling the clock in conjunction with the operation mode, it is not necessary to detect the state of the battery voltage, power consumption in the shooting sequence can be reduced, and the number of shots can be reduced. Improvements can be realized.

In the above-described embodiment, three types of clock frequencies are selectively switched, but the number of switching stages can be designed to be two or more and any number of stages.

Further, in the above embodiment, the camera having the AF function has been described, but the present invention can be applied to the camera having no AF function. For example, by using a single focus pan focus lens as the photographing lens 20, the AF function described above is omitted.

The scope of application of the present invention is not limited to the above-described embodiment, but a digital camera for recording only a still image, a digital camera for recording both a still image and a moving image, a digital signal of a moving image on a magnetic tape or an optical signal. It can be applied to various electronic photographing devices such as digital camcorders for recording on recording media such as magnetic disks.

[0049]

As described above, according to the present invention, the system clock is switched according to the processing contents of the system regardless of the state of the battery voltage, so that the power consumption of the system can be reduced. As a result, it is possible to suppress the consumption of the battery and increase the number of shots that can be taken with one battery. Further, since the peak current during the system operation can be suppressed, it is possible to avoid the unattractive processing that has been conventionally performed such as blacking out the display system.

Further, there is an advantage that the cost of the power supply circuit can be reduced by suppressing the peak current and the erroneous determination of the battery consumption can be prevented.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of a digital camera according to an embodiment of the present invention.

FIG. 2 is a timing chart showing a control example of a system clock in a shooting sequence when the LCD is turned on.

FIG. 3 is a timing chart showing an example of system clock control in a shooting sequence when the LCD is off.

FIG. 4 is a timing chart showing an example of system clock control in a self-timer shooting sequence when the LCD is turned on.

FIG. 5 is a timing chart showing an example of system clock control in a self-timer shooting sequence when the LCD is off.

FIG. 6 is a current waveform diagram comparing a case without clock gear control and a case with clock gear control in the shooting sequence when the LCD is turned on.

FIG. 7 is a current waveform diagram comparing the case without clock gear control and the case with clock gear control in the shooting sequence when the LCD is off.

FIG. 8 is a chart showing a setting example of a clock gear in each operation mode of the digital camera of this example.

[Explanation of symbols]

10 ... Camera, 12 ... CPU, 14 ... Clock control unit,
16 ... Power control unit, 18 ... Strobe control unit, 20 ... Shooting lens, 22 ... Aperture, 23 ... Shutter mechanism, 24 ... C
CD, 30 ... A / D converter, 32 ... Signal processing unit, 34 ...
Compression / expansion block, 36 ... Recording medium, 38 ... Media control section, 46 ... Liquid crystal monitor (LCD), 52 ... Operation block, 54 ... Communication interface section, 56 ... Battery

─────────────────────────────────────────────────── ─── Continuation of front page (51) Int.Cl. ⁷ Identification symbol FI theme code (reference) // H04N 101: 00 G03B 3/00 AF term (reference) 2H002 CC00 FB84 2H011 AA03 BB04 DA00 2H051 AA00 EA28 GB08 GB15 2H053 BA01 5C022 AA13 AB02 AB15 AB22 AB40 AB64 AB67 AC42 AC52 AC69 AC73

Claims (9)

[Claims] 1. An electronic camera having image pickup means for converting an optical image into an electric signal and recording an image picked up by the image pickup means on a recording medium, the electronic camera being necessary for the operation of the camera system. A clock generation means for generating a different clock, a control means for controlling the system according to the clock, and a clock frequency switching means for switching the frequency of the clock according to the processing content of the system according to the control sequence by the control means. An electronic camera characterized by that. 2. A clock frequency switching control step is incorporated in a shooting sequence that defines a control procedure of a shooting operation, and at least two types of clock frequencies are selectively switched during shooting control according to the shooting sequence. The electronic camera according to claim 1, wherein: 3. A mode setting means for setting an operation mode of the electronic camera, wherein the frequency of the clock is switched according to the operation mode set by the mode setting means. Alternatively, the electronic camera described in 2. 4. A clock control method applied to an electronic camera for converting an optical image into an electric signal and recording the obtained electronic image information on a recording medium, the method being necessary for the operation of the camera system. The frequency of the clock is configured to be switchable, and a clock frequency switching control step is incorporated in the control sequence that defines the processing procedure of the system. By implementing the control sequence, the frequency of the clock is linked to the processing content of the system. A clock control method characterized by switching between. 5. The clock control method according to claim 4, wherein the control for lowering the clock frequency is performed when the strobe charging process is performed. 6. The control according to claim 4, wherein when at least one of the automatic exposure (AE) processing and the automatic focus adjustment (AF) processing is performed, control for increasing the clock frequency is performed. Clock control method. 7. The clock frequency is set to be lower than that at the time of at least one of the AE processing and the AF processing when the shutter driving is performed in response to the input of the instruction to start the photographing. Clock control method. 8. The control for increasing the clock frequency is performed when the image data compression process and the recording medium write process are performed.
The clock control method according to item. 9. The control for lowering the clock frequency during the countdown period at the time of self-timer photographing is performed so that the clock frequency becomes equal to the clock frequency of the input standby period for the instruction to start photographing. The clock control method according to any one of 1.