JP2003060230A - Semiconductor light-emitting element and manufacturing method therefor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To solve the problem of cost reduction of a semiconductor light- emitting element which is low in power consumption and operating voltage being difficult. SOLUTION: In the semiconductor light-emitting element, a composite buffer layer 12 formed by alternately laminating a plurality of AlN first layers 12a and a plurality of GaN second layers 12b upon another is provided on a low- resistance silicon substrate 11 one main surface 11a of which is oriented in the (111) crystal plane. Then an n-type gallium nitride semiconductor region 13, a gallium - indium nitride active layer 14, and a p-type gallium nitride semiconductor region 15 are successively formed on the buffer layer 12. In addition, an anode electrode 17 is provided on the semiconductor region 15 and a cathode electrode 18 is provided on the rear surface of the substrate 11.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor light emitting device using a nitride compound semiconductor and a method for manufacturing the same.

[0002]

2. Description of the Related Art GaN (gallium nitride), AlGaN
A semiconductor light emitting device such as a blue light emitting diode using a gallium nitride-based compound semiconductor such as (gallium aluminum nitride), InGaN (gallium indium aluminum), AlInGaN (gallium indium aluminum) is known. A typical conventional light emitting device is an insulating substrate made of sapphire, and is formed on one main surface (upper surface) of this insulating substrate, for example, Japanese Patent Laid-Open No. 4-29.
Ga _x Al _1-x N (provided that x
Is a numerical value in the range of 0 <x ≦ 1. ), A gallium nitride-based compound semiconductor (for example, Ga) formed on the buffer layer by epitaxial growth.
N), an n-type semiconductor region, an active layer made of a gallium nitride-based compound semiconductor (for example, InGaN) formed on the n-type semiconductor region by an epitaxial growth method, and an epitaxial layer formed on the active layer. It has a p-type semiconductor region. The cathode electrode is connected to the n-type semiconductor region, and the anode electrode is connected to the p-type semiconductor region.

[0003]

By the way, as is well known, a light emitting device is manufactured by cutting a wafer in which a large number of devices are formed by dicing, scribing, cleavage or the like. At this time, since the insulating substrate made of sapphire has high hardness, it was difficult to perform this dicing favorably and with good productivity. Further, since sapphire is expensive, the cost of the light emitting device is high. Further, since the substrate made of sapphire is an insulator, the cathode electrode cannot be formed on the substrate. For this reason, it is necessary to expose a part of the n-type semiconductor region and connect the cathode electrode thereto, and the area of the semiconductor substrate, that is, the chip area, becomes relatively large, and the cost of the light emitting element becomes high accordingly. became. Further, in the conventional light emitting device using the sapphire substrate, current flows not only in the vertical direction of the n-type semiconductor region but also in the horizontal direction, that is, the direction along the main surface of the sapphire substrate. Since the thickness of the portion of the n-type semiconductor region in which the horizontal current flows is as thin as about 4 to 5 μm, the resistance of the horizontal current path of the n-type semiconductor region becomes considerably large, and the power consumption and the operating voltage increase. Invited. Further, it is necessary to remove the active layer and the p-type semiconductor region by etching in order to expose the connection portion of the cathode electrode of the n-type semiconductor region. It had to be formed to be a little thick. Therefore, the time required for the epitaxial growth of the n-type semiconductor region is long and the productivity is low. Further, a light emitting device using a conductive substrate made of silicon carbide (SiC) instead of the sapphire substrate is known. In this light emitting device, the cathode electrode can be formed on the lower surface of the conductive substrate. Therefore, as compared with the light emitting device using the sapphire substrate, the light emitting device using the SiC substrate has advantages that the chip area can be reduced and the wafer can be easily separated by cleavage. However, since SiC is much more expensive than sapphire, it is difficult to reduce the cost of the light emitting element. Further, it is difficult to bring the n-type semiconductor region into low resistance contact on the SiC substrate, and the power consumption and operating voltage of this light emitting device are relatively high as in the light emitting device using the sapphire substrate.

Therefore, an object of the present invention is to provide a semiconductor light emitting device capable of improving productivity and performance and reducing cost, and a manufacturing method thereof.

[0005]

The present invention for solving the above problems and achieving the above objects provides a semiconductor light emitting device having a nitride-based compound semiconductor, which comprises silicon or a silicon compound containing impurities. Substrate having low resistivity and one main surface being a (111) just plane or a plane tilted in the range of −4 to +4 degrees from the (111) plane in the crystal plane orientation indicated by the Miller index And a first layer of Al _x Ga _{1 -x} N (where x is a numerical value satisfying 0 <x ≦ 1), which is disposed on one main surface of the substrate, and GaN or Al _y. Ga _1-y N (where y is y <x and 0
It is a numerical value that satisfies <y <1. And a semiconductor layer including a plurality of nitride-based compound layers disposed on the buffer layer to obtain a light emitting function, The present invention relates to a semiconductor light emitting device, comprising: a first electrode arranged on a part of the surface of the substrate and a second electrode arranged on the other main surface of the substrate. Incidentally, the second
The layers formula Al _y Ga _1-y N (where, y is a number which satisfies y <x and 0 ≦ y <1.) May also be represented by. In this chemical formula, when y is 0, the second layer is GaN.

According to a second aspect of the present invention, the buffer layer includes a plurality of _first layers made of Al _x Ga _{1 -x} N and G.
It is preferable to have a plurality of second layers made of aN or Al _y Ga _1-y N, and the first layers and the second layers be alternately laminated. Further, as set forth in claim 3, the thickness of the first layer in the buffer layer is set so that a quantum mechanical tunnel effect occurs, and the thickness of the second layer is set to 10 nm to 300 nm. Is desirable. Further, as described in claim 4, it is desirable that the second layer contains silicon as an n-type impurity. Further, as described in claim 5, each of the plurality of nitride-based compound semiconductor layers in the semiconductor region for obtaining a light emitting function includes a GaN (gallium nitride) layer, an AlInN (indium aluminum nitride) layer, and an AlGaN ( Gallium aluminum nitride layer, InGaN (gallium nitride)
Indium) layer and AlInGaN (gallium nitride)
It is preferably selected from the Indium Aluminum layer. That is, for example, each of the nitride-based compound semiconductor layers such as the semiconductor layer 13, the active layer 14, and the semiconductor layer 15 of the embodiments described later is a gallium nitride-based compound semiconductor layer or an indium nitride-based compound semiconductor layer. desirable. Further, as described in claim 6, the semiconductor region includes a first semiconductor layer of a first conductivity type formed of a nitride-based compound semiconductor, which is disposed on the buffer layer,
An active layer made of a nitride-based compound semiconductor arranged on the first semiconductor layer, and a conductivity made of a nitride-based compound semiconductor arranged on the active layer and having a conductivity opposite to the first conductivity type. And a second semiconductor layer having a shape. According to a seventh aspect of the present invention, in the method for manufacturing a semiconductor light emitting device having a nitride-based compound semiconductor, the semiconductor light emitting device is made of silicon or a silicon compound containing impurities and has a low resistivity and one main surface has a Miller index. A step of preparing a substrate which is a (111) just plane or a plane tilted in the range of −4 to +4 degrees from the (111) plane in the plane orientation of the crystal shown, and Al on the substrate by vapor phase epitaxy. _x Ga _1-x N (where x is 0 <x ≦ 1
Is a numerical value that satisfies. ) And a second layer of GaN or Al _y Ga _1-y N (where y is a numerical value satisfying y <x and 0 <y <1) are sequentially formed. To obtain a buffer layer, and on the buffer layer,
A step of forming a semiconductor region composed of a plurality of nitride compound layers for obtaining a light emitting function by a vapor phase epitaxy method, and forming a first electrode on a part of the surface of the semiconductor region, And a step of forming a second electrode on the main surface of.

[0007]

According to the invention of each claim, the following effects can be obtained. Since the substrate is silicon or a silicon compound which is relatively inexpensive, the cost of the light emitting element can be reduced. The lattice constant of the first layer made of Al _x Ga _1-x N (where x is a number satisfying 0 <x <1) is a lattice of a nitride-based compound semiconductor for obtaining a light emitting function. It has a value closer to the lattice constant of silicon than the constant. Therefore, including the first layer in the buffer layer improves the buffer function,
The crystallinity and flatness of the nitride compound semiconductor layer having a light emitting function can be improved. The buffer layer has a second layer in addition to the first layer. First
And the buffer layer composed of the composite layer of the second layer exerts a good buffer function, and it becomes possible to form a light emitting semiconductor region which succeeds favorably the crystal orientation of the substrate made of silicon or a silicon compound, and the crystallinity is improved. Also, a light emitting semiconductor region having good flatness can be obtained. In short, the combination of the first layer and the second layer according to the present invention provides a buffer layer having a small electric resistance and a good buffer function as a whole, and as a result, the flatness of the light emitting semiconductor region and The light emission characteristics are improved. If a buffer layer composed of only a GaN semiconductor layer is formed on one main surface of a substrate composed of silicon or a silicon compound, the substrate and GaN
Since there is a large difference in lattice constant between and, it is impossible to form a nitride-based compound semiconductor region having excellent flatness on the upper surface of this buffer layer. Since the crystal plane orientation of the main surface of the substrate is a (111) just plane or a plane having a small off-angle from the (111) just plane, a buffer layer and a semiconductor region having a light emitting function should be favorably formed on the substrate. Therefore, the luminous efficiency can be improved. That is, the plane orientation of the main surface of the substrate is (11
1) Eliminating or reducing atomic steps on the crystal surface of the buffer layer and the semiconductor region having a light emitting function, that is, steps at the atomic level, by making the off surface from the just surface or the (111) just surface small. You can If a buffer layer and a semiconductor region having a light emitting function are formed on the main surface having a large off-angle from the (111) just plane, a relatively large step occurs at the atomic level. If the epitaxial growth layer is relatively thick, some steps are not so problematic. However, in the case of a light emitting device having a thin layer of several nm order, such as an active layer, the light emitting device should be turned on. When this is done, a current that does not contribute to light emission, that is, a reactive current, flows in the vicinity of the step, and the light emission efficiency decreases. On the other hand, if the main surface of the substrate is a (111) just surface or a surface with a small off angle, the number of steps is small, the reactive current is small, and the luminous efficiency is large. Since the buffer layer has conductivity, the first and second electrodes are arranged so as to face each other. As a result, it is possible to reduce the resistance value of the current path between the first and second electrodes and reduce the power consumption and operating voltage. At least the first layer of the buffer layers contains Al. A
The coefficient of thermal expansion of the first layer including l is equal to that of the substrate and Ga
It has an intermediate value with the thermal expansion coefficient of the light emitting semiconductor region made of an N-based compound semiconductor. Therefore, the buffer layer relatively well suppresses the occurrence of strain due to the difference in thermal expansion coefficient between the substrate and the light emitting semiconductor region. In the invention of claim 2, since the plurality of first layers and the plurality of second layers are alternately laminated to form the buffer layer, the plurality of thin first layers are dispersed and arranged. As a result, the conductivity of the buffer layer can be secured and a good buffer function can be obtained as the entire buffer layer, and the crystallinity of the semiconductor region formed on the buffer layer can be improved. According to the invention of claim 3, since the thickness of the second layer is limited to the range of 10 nm to 300 nm, it is possible to suppress the increase in the resistance value of the buffer layer and reduce the power consumption and the operating voltage of the light emitting element. You can That is, if the thickness of the second layer is less than 10 nm, discrete energy levels are generated in the valence band and the conduction band of the second layer, which contributes to the conduction of carriers in the second layer. The energy level that appears is increased apparently. As a result, the substrate and the second
The energy band discontinuity between the first and second layers becomes relatively large, and the resistance and voltage between the first and second electrodes during the operation of the light emitting element become relatively large. On the other hand, when the thickness of the second layer is 10 nm or more, generation of discrete energy levels in the valence band and the conduction band of the second layer is suppressed, and the conduction of carriers in the second layer is suppressed. The increase in energy levels involved is suppressed. As a result, deterioration of the energy band discontinuity between the substrate and the second layer is suppressed, and the resistance and voltage between the first and second electrodes during operation of the light emitting element are reduced. According to the invention of claim 4, not only the second layer can be an n-type semiconductor region, but also the second layer contains impurities, so that the resistance becomes small, and thus the resistance between the first and second electrodes is reduced. It is possible to reduce the resistance and voltage of the device, and to provide a light emitting element with less power loss. According to the invention of claim 5, the semiconductor region having a light emitting function can be favorably formed on the buffer layer. According to the invention of claim 6, the active layers have conductivity types opposite to each other.
Since it has a structure sandwiched between two semiconductor layers, it is possible to provide a semiconductor light emitting device having excellent light emitting characteristics. According to the invention of claim 7, it is possible to inexpensively and easily form a semiconductor light emitting device having good characteristics.

[0008]

First Embodiment Next, a gallium nitride-based compound blue light emitting diode as a semiconductor light emitting device according to a first embodiment of the present invention will be described with reference to FIGS. 1 and 2.

The blue light emitting diode according to the first embodiment of the present invention shown in FIGS. 1 and 2 is a semiconductor region 10 including a plurality of gallium nitride-based compound semiconductor layers for obtaining a light emitting function, and a sub region including a silicon semiconductor. It has a straight or substrate 11 and a buffer layer 12. The semiconductor region 10 having a light emitting function includes an n-type semiconductor layer 13 as a first semiconductor layer made of GaN (gallium nitride), a light emitting layer or active layer 14 made of p-type InGaN (gallium indium nitride), and a second layer. Ga as a semiconductor layer of
And a p-type semiconductor layer 15 made of N (gallium nitride). Therefore, each layer of the semiconductor region 10 is made of a gallium nitride-based compound semiconductor. Substrate 1 composed of a laminated body of a substrate 11, a buffer layer 12, and a semiconductor region 10 having a light emitting function
6, the anode electrode 17 as the first electrode is arranged on one main surface (upper surface) of the p-type semiconductor layer 15, and the other main surface (lower surface) of the base 16 is the other main surface of the substrate 11. A cathode electrode 18 as a second electrode is arranged on the surface. Buffer layer 12, n-type semiconductor layer 13, active layer 1
4 and the p-type semiconductor layer 15 are epitaxially grown on the substrate 11 with the respective crystal orientations sequentially aligned.

The substrate 11 contains As as a conductivity determining impurity.
It consists of an n ^{+ type} silicon single crystal containing (arsenic). The main surface 11a of the substrate 11 on the side where the buffer layer 12 is arranged
Is (111) in the crystal plane orientation indicated by the Miller index.
It is a just side. The impurity concentration of this substrate 11 is 5 ×
It is about 10 ¹⁸ cm ^{−3 to} 5 × 10 ¹⁹ cm ⁻³ , and the resistivity of this substrate 11 is 0.0001 Ω · cm to 0.01 Ω · c.
It is about m. The substrate 11 having a relatively low resistivity functions as a current path between the anode electrode 17 and the cathode electrode 18. The substrate 11 has a relatively large thickness of about 350 μm, and functions as a support for the semiconductor region 10 having the light emitting function and the buffer layer 12, which is composed of the p-type semiconductor layer 15, the active layer 14, and the n-type semiconductor layer 13. To do.

The buffer layer 12 arranged so as to cover the entire one main surface of the substrate 11 includes a plurality of first layers 12a.
And a plurality of second layers 12b are alternately laminated. 1 and 2, for convenience of illustration, the buffer layer 12 is shown as two first layers 12a and two second layers 12b.
1st layer 12a and 10 2nd layers 12b.

The first layer 12a is formed of a material that can be represented by the chemical formula Al _x Ga _{1 -x} N, where x is any numerical value satisfying 0 <x≤1. That is, the first layer 12a is made of AlN (aluminum nitride) or AlGaN.
(Gallium aluminum aluminum). In the embodiment of FIGS. 1 and 2, AlN (aluminum nitride) corresponding to the material in which x in the above formula is set to 1 is the first layer 12a.
Is used for. The first layer 12a is an extremely thin film having an insulating property. The lattice constant and the thermal expansion coefficient of the first layer 12a are closer to the silicon substrate 11 than the second layer 12b.
Therefore, the first layer 11a has a larger buffering action than the second layer 12b.

The second layer 12b may be represented by GaN (gallium nitride) or the chemical formula Al _y Ga _1-y N, where y is any numerical value satisfying y <x and 0 <y <1. It is an extremely thin film of n-type semiconductor made of a material that can be used. Al _y Ga _1-y N is used as the second layer 12b.
When using an n-type semiconductor consisting of
In order to suppress the increase in the electrical resistance of b, y is 0 <y <0.
It is desirable that the value satisfying 8 is larger than 0 and smaller than 0.8. The second layer 12b is the first layer 1
It functions as an electrical connection conductor or semiconductor of 2a.

The thickness of the first layer 12a of the buffer layer 12 is preferably 0.5 nm to 10 nm, that is, 5 to 100 Å, and more preferably 1 nm to 8 nm. When the thickness of the first layer 12a is less than 0.5 nm, the flatness of the n-type semiconductor region 13 formed on the upper surface of the buffer layer 12 cannot be maintained well. The thickness of the first layer 12a is 10 nm
When it exceeds, the quantum mechanical tunnel effect cannot be obtained well, and the electrical resistance of the buffer layer 12 increases.

The thickness of the second layer 12b is preferably 10
nm to 300 nm, that is, 100 to 3000 angstroms
The thickness is more preferably 10 nm to 300 nm. When the thickness of the second layer 12b is less than 10 nm,
The discontinuity of the energy band between the substrate 11 and the second layer 12b becomes relatively large, and the resistance and voltage V between the anode electrode 17 and the cathode electrode 18 during the operation of the light emitting element.
f becomes relatively large. When the thickness of the second layer 12b is less than 10 nm, one first layer 11a formed on the second layer 12b and the other first layer 11a formed under the second layer 12b. The electrical connection between the first layer 11a and the first layer 11a is not achieved well, and the electrical resistance of the buffer layer 12 increases. When the thickness of the second layer 12b exceeds 300 nm, the ratio of the first layer 11a to the entire buffer layer 12 decreases, the buffer function becomes relatively small, and the flatness of the semiconductor region 10 becomes good. I can't keep it.

FIG. 4 shows the relationship between the thickness T2 of the second layer 12b and the voltage Vf between the anode electrode 17 and the cathode electrode 18 during the light emitting operation of the light emitting element. As is apparent from FIG. 4, when the thickness T2 is smaller than 10 nm, the voltage Vf becomes higher than about 4V. On the other hand, when the thickness T2 is 10 nm or more,
The voltage Vf becomes smaller than 4V. When the thickness T2 of the second layer 12b is less than 10 nm, the function of electrically connecting the first layer 12a to each other by the second layer 12b is deteriorated and the energy between the silicon substrate 11 and the second layer 12b is reduced. Band discontinuity increases. That is, the second layer 12b
Is less than 10 nm, discrete energy levels are generated in the valence band and conduction band of the second layer 12b, and the energy levels involved in carrier conduction are apparent in the second layer 12b. To increase. That is, the first layer 1
2a and the second layer 12b are in a superlattice state. As a result, the discontinuity of the energy band between the substrate 11 and the second layer 12b becomes relatively large, and the resistance and the voltage Vf between the anode electrode 17 and the cathode electrode 18 during the operation of the light emitting element are compared. Grows larger. On the other hand, the second layer 12
When the thickness of b is 10 nm or more, generation of discrete energy levels in the valence band and the conduction band of the second layer 12b is suppressed, and the energy levels involved in the conduction of carriers in the second layer 12b are suppressed. Is suppressed. That is,
The first layer 12a and the second layer 12b are prevented from becoming a superlattice state. As a result, the substrate 11 and the second layer 12
The deterioration of the discontinuity of the energy band with b is suppressed, and the resistance between the anode electrode 17 and the cathode electrode 18 and the voltage Vf are lowered. Therefore, in this embodiment, the thickness T1 of the first layer 12a is set to 5 nm and the thickness T2 of the second layer 12b is set to 30 nm. Therefore, the thickness of the entire buffer layer 12 is 350 nm.

Next, a method of manufacturing a semiconductor light emitting device in which the first layer 12a is AIN and the second layer is GaN will be described.

First, a substrate 11 made of an n ^{+ type} silicon semiconductor having an n type impurity introduced therein is prepared as shown in FIG. Silicon substrate 1 for forming buffer layer 12
One main surface 11a of 1 is a (111) just plane in the crystal plane orientation indicated by the Miller index, that is, an exact (11) plane.
1) surface. However, in FIG.
1) Substrate 1 within the range of -θ to + θ with respect to the just surface
The main surface 11a of No. 1 can be inclined. −θ to + θ
Is -4 ° to + 4 °, preferably -3 ° to +3
°, and more preferably −2 ° to + 2 °.

FIG. 5 shows (111) of the main surface 11a of the substrate 11.
The relationship between the off-angle θ with respect to the just surface and the emission intensity ratio is shown. The light emission intensity ratio here is the light emission intensity when the light emitting element in which the main surface 11a of the substrate 11 is (111) just faced is driven by a predetermined current, that is, the generated light amount Q1 and the main surface 1 of the substrate 11.
1a shows a light emission intensity when a light emitting element whose surface is inclined by an angle θ in the (112) plane direction with respect to the (111) plane is driven by a predetermined current, that is, a ratio Q2 / Q1 to a generated light quantity Q2. As is apparent from FIG. 5, the emission intensity ratio Q2 / Q1 is in the range where the off angle θ from the (111) plane is -4 ° to + 4 °.
Is about 0.05 or more, the emission intensity ratio Q2 / Q1 is about 0.5 or more in the range of -3 ° to + 3 °, and -2 ° to + 2 °.
In this range, the emission intensity ratio Q2 / Q1 becomes 0.8 or more. Here, a large emission intensity ratio means that the luminous efficiency of the light emitting element is large. Main surface 11a of silicon substrate 11
By setting the crystal orientation of the (111) just plane or a plane having a small off angle from the (111) just plane, the buffer layer 12 and the semiconductor region 1 having a light emitting function.
It is possible to eliminate or reduce steps at the atomic level when epitaxially growing 0. if,
When the crystal orientation of the main surface 11a is set so that the off angle from the (111) just plane becomes large, the buffer layer 12 and the semiconductor region 10 having a light emitting function are formed on the main surface 11a of the silicon substrate 11. When formed by epitaxial growth, relatively large steps occur at the atomic level. If the epitaxial growth layer is relatively thick, some steps are not so important, but the active layer 14
For example, when the thickness is as thin as 2 nm, a current that does not contribute to light emission, that is, a reactive current flows near the step when the light emitting element is energized, and the light emission efficiency decreases. On the other hand, the main surface 11a of the silicon substrate 11 is (111)
If it is a just surface or a surface with a small off angle, steps will be eliminated or reduced, and reactive current will also decrease.
Luminous efficiency increases.

Next, as shown in FIG. 3B, the buffer layer 12 is formed on the main surface 11a of the substrate 11. The buffer layer 12 is a well-known MOCVD (Metal Organic Chem).
ical Vapor Deposition), that is, the first layer 12a made of AlN and the second layer 12b made of GaN are repeatedly laminated by metal organic chemical vapor deposition. That is, the silicon single crystal substrate 11 is subjected to MOCVD.
It is placed in the reaction chamber of the apparatus and first subjected to thermal annealing to remove the oxide film on the surface. Next, T in the reaction chamber
MA (trimethylaluminum) gas and NH ₃ (ammonia) gas are supplied for about 24 seconds to form a first layer 12a made of an AlN layer having a thickness of about 5 nm on one main surface of the substrate 11. In this embodiment, the heating temperature of the substrate 11 is set to 1120.
After the temperature was set to 0 ° C., the flow rate of TMA gas, that is, the supply amount of Al was about 63 μmol / min, and the flow rate of NH ₃ gas, that is, the supply amount of NH ₃ was set to about 0.14 mol / min. Then, the heating temperature of the substrate 11 is set to 1120 ° C., the supply of TMA gas is stopped, and then TMG (trimethylgallium) is introduced into the reaction chamber.
Gas and NH ₃ (ammonia) gas and SiH ₄ (silane)
A gas is supplied for about 83 seconds, and on the upper surface of the first layer 12a made of AlN formed on one main surface of the substrate 11,
Second layer 12b made of n-type GaN having a thickness of about 30 nm
To form. Here, the SiH ₄ gas is for introducing Si as an n-type impurity into the formed film. In this embodiment, the flow rate of TMG gas, that is, the supply amount of Ga is about 63 μm.
mol / min, the flow rate of NH ₃ gas, that is, the supply amount of NH ₃ was about 0.14 mol / min, and the flow rate of SiH ₄ gas, that is, the supply amount of Si was about 21 nmol / min. In this embodiment, the first layer 12a made of AlN and GaN described above are used.
The formation of the second layer 12b of Al is repeated 10 times.
First layer 12a made of N and second layer 1 made of GaN
A buffer layer 12 in which 20 layers of 2b are alternately laminated is formed. Of course, the first layer 12a made of AlN and the second layer 12b made of GaN can be changed to an arbitrary number such as 50 layers.

Next, a well-known MO is formed on the upper surface of the buffer layer 12.
The n-type semiconductor layer 13, the active layer 14 and the p layer are formed by the CVD method.
Shaped semiconductor layer 15 is sequentially and continuously formed. That is, the substrate 11 having the buffer layer 12 formed on the upper surface thereof is placed in the reaction chamber of the MOCVD apparatus, and trimethylgallium gas, that is, TMG gas, NH ₃ (ammonia) gas,
SiH ₄ (silane) gas is supplied to form the n-type semiconductor region 13 on the upper surface of the buffer layer 12. Here, the silane gas is for introducing Si as an n-type impurity into the n-type semiconductor layer 13. In this embodiment, the buffer layer 12
After the heating temperature of the substrate 11 on which is formed is 1040 ° C., the flow rate of TMG gas, that is, the supply amount of Ga is about 4.3 μmo.
l / min, the flow rate of NH ₃ gas, that is, the supply amount of NH ₃ was about 53.6 mmol / min, and the flow rate of silane gas, that is, the supply amount of Si was about 1.5 nmol / min. Further, in this embodiment, the thickness of the n-type semiconductor layer 13 is set to about 0.2 μm. In the case of the conventional general light emitting diode, since the thickness of the n-type semiconductor layer is about 4.0 to 5.0 μm, the thickness of the n-type semiconductor layer 13 of this embodiment of FIG. Has been formed. The impurity concentration of the n-type semiconductor layer 13 is about 3 × 10 ¹⁸ cm ⁻³ , which is sufficiently lower than the impurity concentration of the substrate 11. According to this embodiment, the buffer layer 1
Since 2 is interposed, the n-type semiconductor layer 13 can be formed at a relatively high temperature such as 1040 ° C.

Then, the heating temperature of the substrate 11 is set to 800 ° C., TMG gas and ammonia gas are added to the reaction chamber, and trimethylindium gas (hereinafter, referred to as TMI gas) and biscyclopentaenyl magnesium gas (hereinafter, referred to as C).
It is called p ₂ Mg gas. ) Is supplied to form an active layer 14 made of p-type InGaN (indium gallium nitride) on the upper surface of the n-type semiconductor layer 13. Here, the Cp ₂ Mg gas is for introducing Mg (magnesium) as an impurity of the p-type conductivity type into the active layer 14. In this embodiment, the flow rate of TMG gas is about 1.1 μmol / min, NH
The flow rate of ₃ gas is about 67 mmol / min, the flow rate of TMI gas, that is, the amount of supplied In is about 4.5 μmol / min, Gp2
The flow rate of Mg gas, that is, the supply amount of Mg is about 12 nmol / mi
It was set to n. The thickness of the active layer 14 is about 2 nm, that is, 20
Angstrom. The impurity concentration of the active layer 14 is about 3 × 10 ¹⁷ cm ⁻³ .

Subsequently, the heating temperature of the substrate 11 is set to 1040 ° C.
And TMG gas, ammonia gas and Cp in the reaction chamber.
₂ Mg gas is supplied to p-type GaN on the upper surface of the active layer 14.
A p-type semiconductor layer 15 made of (gallium nitride) is formed. In this embodiment, the flow rate of TMG gas at this time is about 4.
3 μmol / min, flow rate of ammonia gas is about 53.6
μmol / min, Cp ₂ Mg gas flow rate about 0.12μ
It was set to mol / min. The thickness of the p-type semiconductor layer 15 is about 0.2 μm. The impurity concentration of the p-type semiconductor layer 15 is about 3 × 10 ¹⁸ cm ⁻³ .

According to the MOCVD growth method described above, the buffer layer 12 can be formed in which the crystal orientation of the substrate 11 made of silicon single crystal is favorably inherited. In addition, the n-type semiconductor layer 1 with respect to the crystal orientation of the buffer layer 12
3. The crystal orientations of the active layer 14 and the p-type semiconductor layer 15 can be aligned.

The anode electrode 17 as the first electrode is
For example, nickel and gold are formed by adhering to the upper surface of the semiconductor substrate 16, that is, the upper surface of the p-type semiconductor layer 15 by a well-known vacuum deposition method or the like, and brought into low resistance contact with the surface of the p-type semiconductor layer 15. The anode electrode 17 has a circular planar shape as shown in FIG. 2, and is arranged substantially at the center of the upper surface of the semiconductor substrate 16. A region 19 where the anode electrode 17 is not formed on the upper surface of the semiconductor substrate 16.
Function as a light extraction region.

The cathode electrode 18 as the second electrode is
For example, titanium and aluminum are formed on the entire lower surface of the substrate 11 by the well-known vacuum deposition method or the like without forming the n-type semiconductor layer 13.

When the blue light emitting diode shown in FIG. 1 is attached to an external device, for example, the cathode electrode 18 is fixed to an external electrode such as a circuit board with solder or a conductive adhesive, and the anode electrode 17 is formed by a well-known wire bonding method. A wire is electrically connected to the external electrode.

According to the blue light emitting diode of this embodiment, the following effects can be obtained. (1) Since the substrate 11 made of silicon, which is significantly lower in cost than sapphire and has good workability, can be used, the material cost and the production cost can be reduced. Therefore, the cost of the GaN-based light emitting diode can be reduced. (2) The first layer 12a made of AlN and having a lattice constant having a value between silicon and GaN formed on the one main surface of the substrate 11 favorably inherits the crystal orientation of the substrate 11 made of silicon. You can As a result, the GaN-based semiconductor region 10 including the n-type semiconductor layer 13, the active layer 14, and the p-type semiconductor layer 15 can be favorably formed on one main surface of the buffer layer 12 with the crystal orientations aligned. Therefore, the characteristics of the GaN-based semiconductor region 10 are improved and the emission characteristics are also improved. (3) When the semiconductor region 10 is formed via the buffer layer 12 formed by stacking a plurality of first layers 12a and second layers 12b, the semiconductor region 10 has improved flatness. That is, if a buffer layer composed of only a GaN semiconductor layer is formed on one main surface of the substrate 11 made of silicon, the difference in lattice constant between silicon and GaN is large,
A GaN-based semiconductor region having excellent flatness cannot be formed on the upper surface of this buffer layer. Also, relatively thick AlN
If the buffer layer is formed only by itself, the resistance of the buffer layer increases. In addition, if the buffer layer is made of only relatively thin AlN, a sufficient buffer function cannot be obtained. On the other hand, in the present embodiment, the substrate 11 and the GaN-based semiconductor region 10 are
And AlN having a relatively small lattice constant difference with silicon
A buffer layer 12 having a composite structure is provided in which a plurality of first layers 12a consisting of and a second layer 12b are interposed between the first layers 12a. Therefore, the GaN-based semiconductor region 10 having good flatness and crystallinity can be formed on the buffer layer 12. As a result, the emission characteristics of the GaN-based semiconductor region 10 are improved. (4) Since each of the plurality of first layers 12a included in the buffer layer 12 is set to have a thickness that causes a quantum mechanical tunnel effect, an increase in the resistance of the buffer layer 12 can be suppressed. . (5) It is possible to suppress the occurrence of strain due to the difference in thermal expansion coefficient between the substrate 11 and the GaN-based semiconductor region 10. That is, since the coefficient of thermal expansion of silicon and the coefficient of thermal expansion of GaN are significantly different, if the both are directly laminated, distortion due to the difference in coefficient of thermal expansion is likely to occur. However, the thermal expansion coefficient of the first layer 12a made of AlN in this example has an intermediate value between the thermal expansion coefficient of the substrate 11 and the thermal expansion coefficient of the GaN-based semiconductor region 10. Also. The average thermal expansion coefficient of the buffer layer 12 composed of the composite layer of the first layer 12a and the second layer 12b has an intermediate value between the thermal expansion coefficient of the substrate 11 and the thermal expansion coefficient of the GaN-based semiconductor region 10. . Therefore, the buffer layer 12 can suppress the occurrence of strain due to the difference in thermal expansion coefficient between the substrate 11 and the GaN semiconductor region 10. (6) Since the crystal plane orientation of the main surface 11a of the silicon substrate 11 is the (111) just plane, steps in the semiconductor region 10 are suppressed and the light emission efficiency can be improved. (7) The thickness of the second layer 12b is 30 nm, which is 10 nm or more.
Since m is set to m, generation of discrete energy levels in the valence band and the conduction band of the second layer 12b is suppressed, and the energy levels involved in the conduction of carriers in the second layer 12b are suppressed. Growth is suppressed. That is, the first layer 12a and the second layer 12b are prevented from entering the superlattice state. As a result, the deterioration of the discontinuity of the energy band between the substrate 11 and the second layer 12b is suppressed, and the resistance between the anode electrode 17 and the cathode electrode 18 and the voltage Vf.
Will be lower. (8) Since the buffer layer 12 has conductivity, when a forward voltage is applied between the anode electrode 17 and the cathode electrode 18 which are arranged to face each other, the forward direction is applied in the thickness direction (vertical direction) of the semiconductor substrate 16. An electric current flows. Therefore, the resistance value between the anode electrode 17 and the cathode electrode 18 and the voltage Vf
Can be lowered, and the power consumption of the light emitting diode can be reduced. (9) The cathode electrode 18 can be formed more easily than in a light emitting device using a conventional sapphire substrate. That is, in the case of a light emitting device using a conventional sapphire substrate, parts of the p-type semiconductor layer 15 and the active layer 14 in FIGS. 1 and 2 are removed to expose a part of the n-type semiconductor layer 13. Then, it becomes necessary to connect a cathode electrode to the exposed n-type semiconductor layer 13. Therefore, the conventional light emitting device has a drawback that the cathode electrode is difficult to form, and that the area of the n-type semiconductor layer is large because the cathode electrode is formed. The light emitting device of FIGS. 1 and 2 does not have the above drawbacks.

[0029]

Second Embodiment Next, a semiconductor device according to a second embodiment will be described with reference to FIG. However, in FIG. 6, the substantially same parts as those in FIG. 1 are designated by the same reference numerals, and the description thereof will be omitted.

In the semiconductor device shown in FIG. 6, a transistor 20 as another semiconductor element is provided on the silicon substrate 11 of the light emitting diode shown in FIG. Transistor 2
0 consists of a collector region C, a base region B and an emitter region E formed in a P-type semiconductor region 21 for element isolation. In this way, by combining the light emitting diode and the transistor, it is possible to reduce the size and cost of the circuit device including them.

[0031]

[Modification] The present invention is not limited to the above-described embodiment, and the following modifications are possible. (1) The conductivity type of each layer of the semiconductor substrate 16 can be reversed from that of the embodiment. (2) Each of the n-type semiconductor layer 13, the active layer 14, and the p-type semiconductor layer 15 can be configured by combining a plurality of semiconductor layers. (3) n-type semiconductor layer 13, active layer 14 and p-type semiconductor layer 1
GaN (gallium nitride), Al
InN (Indium Aluminum Nitride), AlGaN
A gallium nitride-based compound semiconductor or an indium nitride-based compound semiconductor selected from (gallium aluminum nitride), InGaN (gallium indium aluminum), and AlInGaN (gallium indium aluminum) can be used. (4) The active layer 14 made of GaInN can be directly contacted on the buffer layer 12 by omitting the n-type semiconductor layer 13. As a result, the tensile stress applied to the active layer 14 is relaxed as compared with the case where the active layer 14 is formed with a thick AlGaN cladding layer interposed. Therefore, the crystallinity of the active layer 14 is improved, and the light emitting characteristics of the light emitting element are further improved. (5) A P ^{+ type} semiconductor region for ohmic contact can be provided under the anode electrode 17. (6) The anode electrode 17 can be a transparent electrode. (7) The number of the first layers 12a of the buffer layer 12 is increased by one more than that of the second layers 12b, and the uppermost layer of the buffer layer 12 is
It may be one layer 12a. On the contrary, the second layer 1
It is also possible to increase the number of 2b by one more than the number of first layers 12a. (8) The first layer 12a and the second layer 12b may contain impurities as long as the functions thereof are not impaired. (9) The substrate 11 can be made of polycrystalline silicon other than single crystal silicon or a silicon compound such as SiC.

[Brief description of drawings]

FIG. 1 is a central longitudinal sectional view showing a light emitting diode according to a first embodiment of the present invention.

FIG. 2 is a perspective view of the light emitting diode of FIG.

FIG. 3 is a cross-sectional view showing the structure of the light emitting diode of FIG. 1 in an enlarged manner in the order of manufacturing steps.

FIG. 4 is a diagram showing a relationship between a thickness of a second layer and a forward voltage.

FIG. 5 is a diagram showing the relationship between the off angle of the main surface of the silicon substrate with respect to the (111) just surface and the emission enhancement ratio.

FIG. 6 is a cross-sectional view showing a semiconductor device of a second embodiment.

[Explanation of symbols]

10 GaN-based semiconductor region 11 Substrate made of silicon single crystal 12 buffer layers 12a First layer of AlN 12b Second layer composed of GaN 13 n-type semiconductor layer 14 Active layer 15 p-type semiconductor layer 16 base 18 Anode electrode 19 Cathode electrode

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Claims (7)

[Claims] 1. A semiconductor light emitting device having a nitride-based compound semiconductor, which is made of silicon containing impurities or a recon compound and has a low resistivity and one main surface of which has a crystal plane orientation indicated by a Miller index. (111) Just surface or (111)
A substrate, which is a surface inclined in the range of −4 degrees to +4 degrees from the plane, and is disposed on one main surface of the substrate, and is made of Al _x Ga _{1 -x} N
(However, x is a numerical value satisfying 0 <x ≦ 1) and GaN or Al _y Ga _1-y N (where y satisfies y <x and 0 <y <1) A semiconductor layer including a buffer layer formed of a composite layer with a second layer of (3) and a plurality of nitride compound layers disposed on the buffer layer to obtain a light emitting function. And a first electrode arranged on a part of the surface of the semiconductor region, and a second electrode arranged on the other main surface of the substrate. 2. The buffer layer has a plurality of _first layers made of Al _x Ga _1-x N and a plurality of second layers made of GaN or Al _y Ga _1-y N, and The semiconductor light emitting device according to claim 1, wherein the first layer and the second layer are alternately laminated. 3. The thickness of the first layer in the buffer layer is set so that a quantum mechanical tunnel effect is produced, and the thickness of the second layer is set to 10 nm to 300 nm. The semiconductor light emitting device according to claim 1. 4. The semiconductor light emitting device according to claim 1, wherein the second layer contains silicon as an n-type impurity. 5. Each of the plurality of nitride-based compound semiconductor layers in the semiconductor region is GaN (gallium nitride).
Layer, AlInN (indium aluminum nitride) layer,
AlGaN (gallium aluminum nitride) layer, InG
aN (gallium nitride indium) layer and AlInG
The semiconductor light emitting device according to claim 1, 2 or 3 or 4, wherein the semiconductor light emitting device is selected from an aN (gallium indium aluminum nitride) layer. 6. The semiconductor region is disposed on the buffer layer, the first conductivity type first semiconductor layer made of a nitride-based compound semiconductor, and the semiconductor region disposed on the first semiconductor layer. An active layer made of a nitride-based compound semiconductor, and a second conductive type disposed on the active layer and having a second conductivity type opposite to the first conductivity type. The semiconductor light-emitting device according to claim 1, 2 or 3 or 4 or 5, further comprising: 7. A method of manufacturing a semiconductor light emitting device having a nitride-based compound semiconductor, comprising a crystal made of silicon or a silicon compound containing impurities and having a low resistivity and one main surface of which has a Miller index. A step of preparing a substrate that is a (111) just plane or a plane inclined in a range of −4 to +4 degrees from the (111) plane in the crystal orientation of the plane orientation; Al _x by phase growth method
Ga _1-x N (where x is a numerical value satisfying 0 <x ≦ 1) and GaN or Al _y Ga _1-y N
(Where y is a numerical value satisfying y <x and 0 <y <1) to obtain a buffer layer by sequentially forming a second layer, and a light emitting function is provided on the buffer layer. Forming a semiconductor region composed of a plurality of nitride-based compound layers by a vapor phase epitaxy method for obtaining the above, and forming a first electrode on a part of the surface of the semiconductor region,
And a step of forming a second electrode on the other main surface of the substrate.