JP2003051795A - Receiver capable of performing high-speed synchronization - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a receiver that uses synchronizing timing information already stored to start decode processing of a broadcast wave without awaiting the result of frame synchronization processing. SOLUTION: The receiver for a broadcast wave comprising information items of a large unit each consisting of the particular number of consecutive information items in a small unit, having a period in a large unit of signals multiplexed by each information in a small unit and needing synchronization with the large unit for reproduction of the information items, is provided with a timing storage circuit 21 that obtains synchronizing timing of large unit information through the synchronization detection by each of a plurality of small unit information items to store information with respect to the synchronizing timing and with a control information storage circuit 20 that obtains control information including a transmission system and a modulation system to store the control information corresponding to the frequency of a received broadcast wave, and the receiver uses the stored control information without awaiting synchronization with the large unit information to execute reproduction processing including decode processing of the set reception broadcast wave.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a digital broadcast receiver which requires synchronization in a specific unit such as a frame, and more particularly to a terrestrial digital broadcast receiver.

[0002]

2. Description of the Related Art Compared with conventional analog broadcasting, digital broadcasting has a time direction interleaving process and MP.
Since EG decoding processing is required, it takes time from the start of channel selection to the start of video / audio reproduction.

For this reason, the receiving device has been devised so that the clock synchronization and the method of specifying the broadcasting system can be performed at high speed so that the reproduction can be started as soon as possible.

As shown in FIG. 1, in known terrestrial digital broadcasting, a small unit signal called a symbol,
A large unit signal called a frame made up of continuous 204 symbols is modulated or modulated.

FIG. 2 shows a block diagram of the front end section of the terrestrial digital broadcast receiving apparatus. Tuner part 1 to I
F (Intermediate Frequency)
The broadcast wave input as the signal 11 includes an A / D (analog-digital conversion) unit 2, a symbol synchronization unit 3, an FFT unit 4, a frame synchronization unit 5, an equivalent unit 6, an OFDM (Orth
Ogonal Frequency Division
Multiplexing: Orthogonal Frequency Division Multiplexing) Decoding unit 7 becomes an MPEG stream, and MPE
It is output to the G decoder.

[0006]

The frame synchronization section 5 in the front end section of the terrestrial digital broadcast receiving apparatus shown in FIG. 2 has a TMCC (Tra) which is decoded for each symbol.
nsmission Multiplexing Co
n symbol control signal is used to detect a pattern for 16 symbols, and the symbol with the matched pattern is determined as the first symbol of the frame.

Since the pattern to be detected is transmitted once per frame, the frame synchronization will not end unless the worst one frame is waited.

An object of the present invention is to start the decoding process of a broadcast wave using the already held synchronization timing information without waiting for the result of the frame synchronization process.

[0009]

In order to solve the above problems, the present invention mainly adopts the following configurations. A specific number of consecutive small units of information form a large unit of information, and a signal multiplexed for each small unit of information has a large unit cycle, and synchronization with the large unit is required for reproduction of information. In the broadcast wave receiving device, the timing holding for holding the information related to the synchronization timing by obtaining the synchronization timing of the large unit information by the synchronization detection for each of the plurality of small unit information corresponding to the frequency of the received broadcast wave A circuit is provided, and a control information holding circuit that obtains control information including a transmission method and a modulation method corresponding to the frequency of the received broadcast wave and saves the control information is provided. A receiving device that performs a reproduction process including a decoding process of a set reception broadcast wave using the stored control information without waiting for synchronization with the unit information.

Further, the receiving device is provided with a comparator for comparing the large unit first synchronization timing information held in the timing holding circuit with the second synchronization timing information obtained for each large unit information. A receiving device provided with a synchronization timing reset circuit for re-adjusting the first synchronization timing information with the second synchronization timing information when different results are obtained by the comparator.

Further, in the receiving device, a plurality of systems are provided in parallel with the receiving device, and one of the plurality of systems cyclically tunes each frequency of the broadcast wave, and selects one of the timing holding circuit and the control information holding circuit. A receiving device that updates the storage result.

[0012]

BEST MODE FOR CARRYING OUT THE INVENTION A digital broadcast receiving apparatus according to an embodiment of the present invention will be described below with reference to the drawings. First, general functions and actions of the FFT unit and the frame synchronization unit in the front end unit of the terrestrial digital broadcasting receiver will be outlined. FFT (Fast
By the Fourier Transformation processing, one symbol is converted into 1405 (1405 in mode 1, 2809 in mode 2, and 5617 in mode 3) carriers per symbol. Each of these carriers is information of 1 bit. This information includes TMCC (Transmismi) as well as effective data actually used for decoding.
sion Multiplexing Configu
relation control signal and pilot signal. Here, the pilot signal is used for waveform equalization processing, AGC processing, clock synchronization processing, and the like. Also, the TMCC signal is used for frame synchronization processing,
It is used for modulation system and parameter transmission for decoding.

In the frame synchronization circuit 5, the TMCC is used.
The signal is used to detect frame synchronization and decode decoding parameters. Further, the pilot signal, the TMCC signal, and the effective data are extracted from the positional relationship between the symbol and the carrier.

The position of the symbol in the frame cannot be determined without frame synchronization. Subsequent waveform equalization processing and decoding processing require decoding of the decoding parameters described in the TMCC signal and the pilot signal and effective data extracted by the frame synchronization circuit 5.
Therefore, shortening the frame synchronization processing time leads to shortening the signal reproduction time.

For comparison and comparison with the present invention, FIG. 3 shows a block diagram of a conventional frame synchronization circuit 5. In the frame synchronization circuit, first, a symbol synchronization signal sent from the symbol synchronization unit 3 and a mode determination signal (determination signal from any one of mode 1, mode 2 and mode 3)
To operate the carrier counter. The signal extraction unit determines the content of the FFT output (carrier data) based on the output value of the counter and extracts the signal. However, there is a limit to the signals that can be extracted before the frame synchronization detection, and it is necessary to wait for the frame synchronization detection to extract all the signals.

Next, of the extracted data, TMC
Using the C signal, the differential decoding unit decodes it to 0 or 1.
Subsequently, the TMCC signal statistical determination / code determination unit for one symbol determines the code of the TMCC signal in the symbol. Since the TMCC signal contains a lot of important information in decoding, the same value (0 or 1) is included in one symbol.
Is described multiple times, and the value that appears most often is adopted as the TMCC value in the symbol.

In this way, the TMC within one symbol
When the C value is determined, the frame synchronization detection unit stores this value for 16 symbols and detects that they match a specific pattern. Then, the symbol having the matched pattern is determined to be the 16th symbol, and the symbol counter is operated.

After that, in the TMCC signal decoding section, the TMC
The C information is decoded to obtain the carrier modulation method and other decoding parameters. Further, all the signals are extracted by giving the position information of the symbol frame as the output value of the symbol counter to the signal extraction unit.

Here, the TMCC signal will be generally described below. Terrestrial digital broadcasting has various conditions such as hierarchical transmission and partial reception, and the TMCC signal contains important transmission control information that the receiving device should first combine. TM
The CC signal is composed of 204 bits per OFDM frame, and, for example, the synchronization signal is a 16-bit word that is inverted every frame, and 3 bits are used for segment identification of synchronous / differential modulation. The TMCC control information is composed of 102 bits, and 13 layers are provided instead of 13 bits for the coding rate of the inner code of the layer transmission parameter, the modulation method, and the time interleave, and three layers are prepared.

As described above, the processes that can be performed only after the frame synchronization is detected are the signal extraction process and the TMCC signal decoding process. On the contrary, if these two types of processing can be performed before the frame synchronization detection, the subsequent processing such as waveform equalization can be started without waiting for the frame synchronization detection.

Here, FIG. 4 shows a block diagram of the frame synchronization circuit 5 for the receiver according to the first embodiment of the present invention. In FIG. 4, the period information holding circuit 20 representing the structural feature of the first embodiment of the present invention is a register circuit for storing the decoding result of the TMCC signal for each frequency of the received broadcast wave. . Further, the timing holding circuit 21, which represents the structural feature of the first embodiment, keeps counting the symbol counter for each frequency of the received broadcast wave.
It is a counter circuit for holding.

When a frequency of an unselected station is selected, the frame synchronization circuit shown in FIG. 4 operates similarly to the conventional example shown in FIG. However, when a frequency that has been selected once is selected, first, the decoding result of the TMCC signal at the time of the previous selection, which is stored in the period information holding circuit 20, and the timing holding circuit 21 are stored. The signal extraction process is performed using the symbol counter value that has been continued since the previous channel selection, and the information is sent to the subsequent process such as the waveform equalization unit 6 together with the decoding result of the TMCC signal.

Then, the acquisition of frame synchronization is awaited with the regular information, and the regular symbol counter value and the regular decoding result of the TMCC signal are replaced.

As described above, by using the receiving apparatus according to the first embodiment of the present invention, the FFT output can be immediately discriminated into valid data and other pilot signals without waiting for the detection of frame synchronization. , The waveform equalization process and the decoding process can be started immediately.

Next, a receiving apparatus according to the second embodiment of the present invention will be described. Now, it is possible that the carrier modulation method, the hierarchical structure, etc. have been changed since the last time the channel was selected. Here, as a transmission method, hierarchical transmission by a method of band division within a channel is used in order to enable a composition in which programs for fixed reception and programs for mobile reception are mixed. The hierarchy is a layer in which three elements of the channel coding, that is, the modulation method, the coding rate of the convolutional correction code, and the length of the time interleave are independently set. Modulation methods include QPSK, 16QAM, 64QAM, DQPSK
There is.

Therefore, when it is determined that the data has been changed, it is necessary to replace the normal processing result with the incorrect result and notify the subsequent processing that the frame synchronization has been detected again.

Therefore, FIG. 5 shows a block diagram of the frame synchronization circuit 5 for a receiver according to the second embodiment of the present invention. Compared with the block diagram of FIG. 4, the period information holding circuit 20
The selector of the output stage of the timing holding circuit 21 is doubled, and comparators 30 and 31 for the normal processing result are added. With this comparator, if the result held since the last tuning was different from the regular result, the frame synchronization is reset once, the regular processing result is replaced with the incorrect processing result, and the frame synchronization is restarted. Can be reissued. Specifically, when the input signals to the comparators 30 and 31 do not match, each frequency register / counter control unit is operated by the output of the comparator to reset each register and the symbol counter.

In the second embodiment, even if the waveform equalization process and the decoding process are started in advance with an erroneous processing result, the normal processing result is immediately resumed when the normal frame synchronization is obtained. it can.

Therefore, when the current broadcast wave has the same modulation method as that used when the channel was selected last time, the decoding process is started immediately, and when it is different, the processing time is the same as that of the unselected station. Decryption is possible with.

Next, a frame synchronization circuit for a receiver according to the third embodiment of the present invention will be described. In order for this circuit to operate effectively, it is desired that the information in the period information holding circuit and the timing holding circuit match the current state of the broadcast wave.

Therefore, FIG. 6 shows a block diagram of a frame synchronization circuit for a receiver according to the third embodiment of the present invention.
In FIG. 6, two frame synchronization circuits shown in FIG. 5 are prepared in parallel, and each period information holding circuit 20 and timing holding circuit 21 are shared.

By adopting this circuit configuration, each broadcast wave is cyclically selected by using the second tuner section 41 while the desired program is provided to the viewer by the input from the first tuner section 40. The result stored in the period information holding circuit 20 and the timing holding circuit 21 is always updated to the latest information, and when the first tuner unit 40 selects a new frequency, the latest processing result is always returned. It is possible.

By using this circuit configuration, the effectiveness of the holding result of the period information holding circuit 20 and the timing holding circuit 21 is dramatically increased, and the tuning speed can be improved.

Next, a receiving apparatus according to the fourth embodiment of the present invention will be described. For example, when two tuners are built in the receiving device, one of them is relatively rarely used for frequency circulation. The original purpose of multiple tuners is often for dual-screen display or reverse recording function. Therefore,
The cyclic tuning of each frequency is performed only when the second tuner is open (when it is not in operation).
In such a case (for example, after the back recording is finished), a long time has passed since the last time the channel was selected, and the stored information is old and unreliable.

Therefore, the receiving apparatus according to the fourth embodiment of the present invention is provided with a function of prohibiting the use of such old information. Specifically, when a certain period of time has passed, or when a program transition such as 0 hour / hour or 30 hour / hour has passed, a receiving apparatus having an internal program guide can determine a change in the hierarchical structure or the like from the program guide. On the basis of a case or the like, when the reference is satisfied, the holding circuits 20 and 21 are invalidated. With this method, even in a receiving device that causes inconvenience when starting waveform equalization processing or decoding processing with old erroneous information,
The probability of occurrence of inconvenience can be suppressed.

Next, a receiver according to the fifth embodiment of the present invention will be described. When cyclically selecting each frequency using multiple tuners, the frequencies currently selected by the other tuner have already been updated to the latest information,
There is no need to update it again.

Therefore, the frequency being selected by the other tuner is omitted and the next frequency is selected. Specifically, when performing a cyclic tuning, whether to detect a match with the other frequency,
On the other hand, in the list of selected frequencies for patrol, the frequency being selected on the other side is marked.

By this method, extra channel selection is reduced, the update cycle of the held information is shortened, and the reliability of information can be improved. As a result, the operating efficiency of the present invention also increases,
By doing so, the tuning time can be shortened.

Next, a receiving apparatus according to the sixth embodiment of the present invention will be described. Providing the holding circuits 20 and 21 of the present invention for all frequencies broadcast is as follows.
It can be difficult in terms of cost and circuit area. Therefore, the holding circuit of the present invention is provided in a number smaller than the number of receivable broadcasts and is efficiently allocated to create a receiving device having a high reception time shortening effect at a low cost.

As a method of determining the frequency to be allocated to the holding circuit, it is conceivable that a reception history is provided and the frequency of reception is high, the reception history is new, the viewing time is long. It is also effective to ignore a channel whose viewing time is less than a certain time. By this method, it is possible to create a receiving device with fast tuning at low cost.

As described above, the feature of the embodiment of the present invention is that the frame synchronization holding circuit for the frequency to be selected for the received broadcast wave and the register circuit for storing the transmission system and the modulation system are provided. By providing the broadcast wave, the decoding of the broadcast wave is started immediately after the symbol synchronization without waiting for the frame synchronization.

Further, in order to prevent malfunction when the content of the frame synchronization holding circuit is incorrect, a comparison circuit with the frame synchronization timing from the conventional tuning circuit and a reset for re-performing OFDM demodulation when it is incorrect. Provide a circuit.

Further, in order to make the contents of the frame synchronization holding circuit reliable, a second tuner for periodically updating the frame synchronization is provided. As a result, the frame synchronization is frequently updated, so that the latest processing result is always reflected and the reliability of the internal synchronization timing is improved.

[0044]

According to the present invention, the decoding processing of the broadcast wave is started immediately after the symbol synchronization is acquired by using the synchronization timing information held inside without waiting for the result of the regular frame synchronization processing. It becomes possible.

[Brief description of drawings]

FIG. 1 is a schematic diagram of a broadcast wave form of terrestrial digital broadcasting.

FIG. 2 is a block diagram of a general front end unit of a terrestrial digital broadcast receiving apparatus.

FIG. 3 is a diagram showing a configuration of a frame synchronization circuit in a conventional technique.

FIG. 4 is a diagram showing a configuration of a frame synchronization circuit according to the first embodiment of the present invention.

FIG. 5 is a diagram showing a configuration of a frame synchronization circuit according to a second embodiment of the present invention.

FIG. 6 is a diagram showing a configuration of a frame synchronization circuit according to a third embodiment of the present invention.

[Explanation of symbols]

1 tuner section 2 A / D section 3 Symbol synchronization section 4 FFT section 5 frame synchronization section 6 Equivalent part 7 Decoding section 11 IF signal 12 TS signal 20 Period information holding circuit 21 Timing holding circuit 30,31 comparator 40 First tuner frame synchronization unit 41 Frame Synchronizer for Second Tuner

Claims (6)

[Claims] 1. A specific number of consecutive small units of information constitute a large unit of information, and a signal multiplexed for each small unit of information has a large unit period, and the large unit of information is used for reproducing information. In a broadcast wave receiving device that requires synchronization with the information about the synchronization timing, the synchronization timing of the large unit information is obtained by the synchronization detection for each of the plurality of small unit information corresponding to the frequency of the received broadcast wave. A timing holding circuit for holding the control information is provided, and a control information holding circuit for obtaining the control information including the transmission method and the modulation method corresponding to the frequency of the received broadcast wave and storing the control information is provided, and the reception frequency is set. At this time, the receiving apparatus is characterized in that the reproduction processing including the decoding processing of the set reception broadcast wave is executed using the stored control information without waiting for the synchronization with the large unit information. 2. The receiving apparatus according to claim 1, wherein the large unit first synchronization timing information held in the timing holding circuit is compared with the second synchronization timing information obtained for each large unit information. And a synchronization timing reset circuit that resets the first synchronization timing information to the second synchronization timing information when different results are obtained by the comparator. 3. The receiving device according to claim 1, wherein the receiving devices are provided in parallel in a plurality of systems, and one of the plurality of systems cyclically selects each frequency of a broadcast wave, and the timing holding circuit. And a receiving device for updating the storage result of the control information holding circuit. 4. The receiving device according to claim 3, wherein when the update intervals of the timing holding circuit and the control information holding circuit corresponding to each frequency of the received broadcast wave have exceeded a reference time, A receiving apparatus comprising a configuration for invalidating stored contents. 5. The receiving device according to claim 3, wherein the frequency currently being viewed is omitted when cyclically selecting each of the frequencies. 6. The receiving apparatus according to claim 1, 2, 3, 4, or 5, wherein the timing holding circuit and the control information holding circuit are not provided corresponding to all frequencies of a received broadcast wave. The receiving apparatus is characterized in that an appropriate number is provided corresponding to frequencies in a channel selection state including an order of high reception frequency or an order of reception history.