JP2003017670A - Semiconductor substrate and field effect transistor, and manufacturing method therefor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor substrate and field effect transistor as well as manufacturing methods therefor, of less defects and leak current while a manufacturing cost is low. SOLUTION: A semiconductor substrate has an SiGe layer on an Si substrate with an insulating layer in between. The manufacturing method therefor comprises a process where an SiGe layer 5 and an Si first surface layer 6 are formed in this order on a first Si substrate 1 directly or through another layer to provide a first substrate A, a process where a first substrate B is tightly fitted and jointed to a second substrate in which a second surface layer 8 of an Si oxide film is formed on a second Si substrate 7 through the first and second surface layers, and a process where at least the first Si substrate of the first substrate is removed after the previous process.

Description

Detailed Description of the Invention

[0001]

TECHNICAL FIELD The present invention relates to a high speed MOSFET.
The present invention relates to a semiconductor substrate used for, for example, a field effect transistor using the same, and a manufacturing method thereof.

[0002]

2. Description of the Related Art In recent years, SiG has been formed on a Si (silicon) substrate.
High-speed MO using a strained Si layer epitaxially grown through an e (silicon germanium) layer as a channel region
SFET, MODFET and HEMT have been proposed.
In this strained Si-FET, tensile strain occurs in the Si layer due to SiGe having a lattice constant larger than that of Si, so that the band structure of Si is changed, degeneracy is released, and carrier mobility is increased. Therefore, by using this strained Si layer as a channel region, the speed can be increased by about 1.3 to 8 times as much as usual. In addition, a normal Si substrate by the CZ method can be used as a substrate as a process,
The high-speed CMOS can be realized by the conventional CMOS process.

However, in order to epitaxially grow the strained Si layer required as the channel region of the FET, it is necessary to epitaxially grow a high-quality SiGe layer on the Si substrate. However, due to the difference in lattice constant between Si and SiGe, There was a problem in crystallinity due to dislocations and the like. To this end, various proposals have been made in the past.

For example, a method using a buffer layer in which the Ge composition ratio of SiGe is changed with a certain gentle slope, a method using a buffer layer in which the Ge (germanium) composition ratio is changed stepwise (stepwise), a Ge composition A method using a buffer layer whose ratio has been changed to a superlattice shape, a method using a buffer layer whose Ge composition ratio has been changed at a constant gradient using an Si off-cut substrate, and the like have been proposed (USPatent).
5,442,205, USPatent 5,221,413, PCT WO98 / 00857, JP-A-6-252046, etc.).

On the other hand, a buried oxide film (BO
An SOI (Silicon On Insulator) substrate in which a Si single crystal thin film (called an SOI layer) is formed on an X layer) has been variously developed as a substrate for next-generation devices. This SOI substrate is a substrate and a device fabrication layer S
Since the OI layer is electrically isolated, a high withstand voltage is obtained, and the parasitic capacitance is low, the radiation resistance is large, and there is no substrate bias effect. Therefore, effects such as high speed, low power consumption, and soft error free are expected.

A so-called substrate bonding technique is a typical technique for manufacturing this SOI substrate. The substrate bonding technique involves forming an oxide film on one or both of two substrates and bonding the two substrates with the oxide film in between. The bonding is performed by mechanically connecting the two substrates. The SOI layer is manufactured by mirror-finishing the bonded substrates by grinding and polishing.
Since the crystallinity of the SOI film obtained by bonding the substrates is the same as that of the bulk silicon substrate, there are few problems such as defects and the like.
The characteristics of the device formed in the I layer are excellent.

As a new technique for bonding substrates,
A method called hydrogen ion stripping method (also called smart cut method) has been developed. This technology is to implant hydrogen ions from the upper surface of one of the two Si substrates on which an oxide film is formed, and then It adheres to the other substrate through the oxide film, and then heat treatment is applied to form a microbubble layer inside the substrate, and one substrate is peeled off in a thin film shape with the microbubble layer as the cleavage surface, and further heat treatment is applied. A strongly bonded SOI substrate (for example, US
Patent 5,882,987). This technique does not require the substrate to be thinned by grinding and polishing, a thin film having a uniform thickness can be easily obtained, and the peeled substrate can be reused. In addition, porous S on the surface of the silicon substrate
An SiO ₂ layer is formed via an i layer and a Si single crystal layer, and this silicon substrate is bonded to a supporting substrate with the SiO ₂ layer as a superposed surface, and the silicon substrate and porous S
High-pressure water flow separation method for stripping i-layer with high-pressure water flow (T. Yoneyama,
US Patent, 5371037, US filed: August 9.1991, US patent
December 6.1994) is known. On the other hand, SIM
The OX method is a technique in which oxygen is ion-implanted into a Si wafer and heat treatment is performed at a high temperature to convert a region containing oxygen into supersaturation into an oxide film. A Si thin film remains on the BOX layer, and SOI remains. It is a technology that is formed.

In recent years, a semiconductor substrate has been developed in which the strained Si layer capable of speeding up is formed on these SOI substrates. For example, SIM is used as an SOI substrate manufacturing technique.
It has been proposed to form an embedded oxide film in the SiGe layer by combining the OX technology and the strain relaxation SiGe layer regrowth technology (Proceedings of the 47th Joint Lecture on Applied Physics, p.884, 30p-YK-11 etc.).

[0009]

However, the above-mentioned conventional techniques have the following problems. That is, the technique of forming a strained Si layer using the SIMOX technique has a disadvantage that many defects remain in the strain relaxation SiGe layer in the oxygen ion implantation process and the subsequent annealing process. As a result, the leakage current becomes high in the device characteristics. In addition, the strain relaxation SiGe layer and B
There are disadvantages that the roughness of the interface with the OX layer is large, the number of particles is large, and the manufacturing cost is high.

The present invention has been made in view of the above-mentioned problems, and a semiconductor substrate having a good quality SiGe layer on an SOI structure, a field effect transistor, a method of forming a SiGe layer, and a strained Si layer using the same. It is an object to provide a forming method and a method for manufacturing a field effect transistor.

[0011]

The present invention has the following features to attain the object mentioned above. That is, the method for manufacturing a semiconductor substrate of the present invention is a method for manufacturing a semiconductor substrate having a SiGe layer on a Si substrate via an insulating layer,
The SiG is formed directly on the first Si substrate or through another layer.
a step of forming a first substrate by forming an e layer and a first surface layer of Si in this order, and a second substrate in which a second surface layer of a Si oxide film is formed on a second Si substrate And the first substrate are brought into close contact with each other via the first surface layer and the second surface layer to bond them, and after the step, at least the first Si substrate of the first substrate is removed. It is characterized by having and. A method for manufacturing a semiconductor substrate of the present invention is a method for manufacturing a semiconductor substrate having a SiGe layer on a Si substrate via an insulating layer, which is directly or on another layer on the first Si substrate. A step of forming a first substrate by forming the SiGe layer and a first surface layer which is an oxide film of Si in this order directly or through the Si layer; and a step of forming a second substrate having Si or an oxide film thereof on the surface. And closely bonding the Si substrate and the first substrate via the first surface layer, and
After the step, at least the first Si of the first substrate
And a step of removing the substrate.
The semiconductor substrate of the present invention is a semiconductor substrate in which an insulating layer or a SiGe layer is formed on an Si substrate via an insulating layer and a Si layer, and is manufactured by the method for manufacturing a semiconductor substrate of the present invention. Is characterized by.

In the method of manufacturing a semiconductor substrate, the first S
The SiGe layer and S on the i substrate directly or through another layer
a first substrate having a first surface layer of i formed in this order;
A second substrate having a second surface layer of a Si oxide film formed on a second Si substrate is brought into close contact with and bonded to the second substrate via the first surface layer and the second surface layer, or A SiGe layer and a first surface layer which is an oxide film of Si are formed in this order on a Si substrate directly or via another layer to form a first substrate and Si or a Si layer on the surface. The second Si substrate having the oxide film is adhered to and bonded to the second Si substrate through the first surface layer, and the first Si substrate is removed.
There is no problem of defects and interface roughness in MOX technology,
The problem of particles and manufacturing cost is reduced, and good quality S is formed on the surface side of the second substrate having an insulating layer (Si oxide film).
An iGe layer can be formed. In addition, since the semiconductor substrate is manufactured by the method for manufacturing a semiconductor substrate of the present invention, a high-quality SiGe film is formed on the insulating film or the Si oxide film.
Layer, for example a strained Si layer on the Si oxide film SiGe
It is suitable as a substrate for an SOI wafer provided through layers.

The method of manufacturing a semiconductor substrate of the present invention is
It is preferable to form a graded composition region in which the Ge composition ratio is gradually increased toward the surface in at least a part of the SiGe layer. That is, in this semiconductor substrate manufacturing method, S
By forming a graded composition region in which the Ge composition ratio is gradually increased toward the surface in at least a part of the iGe layer, S
Generation and growth of dislocations in the iGe layer, particularly near the surface, can be suppressed, and the dislocation density on the surface of the SiGe layer can be reduced.

The method of manufacturing a semiconductor substrate according to the present invention is
The thickness of the first surface layer of the Si or the Si layer is
It is preferably less than the critical film thickness for the iGe layer.
That is, in the method of manufacturing a semiconductor substrate, the first Si substrate is used.
By making the thickness of the surface layer or Si layer below the critical film thickness (thickness that causes dislocation and lattice relaxation) with respect to the SiGe layer, dislocation and lattice relaxation do not occur in the first surface layer, Generation of dislocations is also suppressed in the SiGe layer.

The method of manufacturing a semiconductor substrate of the present invention is
A step of forming the first substrate, a step of forming an underlayer of SiGe and an etch stop layer of Si on the Si substrate in this order before the formation of the SiGe layer;
Of the underlayer remaining after the step of removing the Si substrate of
It is preferable to include a step of removing the Si by etching with an etching solution having an etching rate of Si lower than that of Ge.

That is, in this method of manufacturing a semiconductor substrate, the underlayer remaining after the removal of the first Si substrate is replaced with SiGe.
Since Si is removed by etching with an etchant having a slower etching rate than Si, it is possible to obtain a surface having a higher degree of flatness than that obtained by polishing,
Thickness is several hundred nm, while the limit is ~ 3 μm
The following SOI layer can be obtained with high accuracy. In addition, S
The etching layer of i is removed after these steps to remove SiG.
The e layer may be exposed on the surface.

Further, in the method for manufacturing a semiconductor substrate of the present invention, it is preferable that the thickness of the etch stop layer is less than the critical film thickness with respect to the underlying layer. That is, in this method for manufacturing a semiconductor substrate, by making the thickness of the etch stop layer less than the critical film thickness with respect to the underlying layer, dislocation and lattice relaxation do not occur in the etch stop layer and the SiGe layers before and after the etch stop layer are not generated. Also, the generation of dislocations is suppressed.

The method of manufacturing a semiconductor substrate according to the present invention is the method of manufacturing a SiG on a Si substrate through an insulating layer or an insulating layer and a Si layer.
A method of manufacturing a semiconductor substrate having an e layer, and further including a strained Si layer via the SiGe layer, wherein the strain is formed on the SiGe layer of the semiconductor substrate manufactured by the method of manufacturing a semiconductor substrate of the present invention. It is characterized in that a Si layer is formed. The semiconductor substrate of the present invention is a semiconductor substrate in which a SiGe layer is formed on an Si substrate via an insulating layer or an insulating layer and a Si layer, and a strained Si layer is further formed via the SiGe layer, It is characterized by being manufactured by the method for manufacturing a semiconductor substrate having a strained Si layer of the present invention.

In the method of manufacturing a semiconductor substrate, the strained Si layer is formed on the SiGe layer of the semiconductor substrate manufactured by the method of manufacturing a semiconductor substrate of the present invention. In the semiconductor substrate, the strained Si layer of the present invention is formed. Since the semiconductor substrate is manufactured by the method for manufacturing a semiconductor substrate having the above, the Si layer is formed on the SiGe layer having a good surface state, and the SOI structure having the good quality strained Si layer is formed.

A method of manufacturing a field effect transistor according to the present invention comprises a strain S epitaxially grown on a SiGe layer.
A method of manufacturing a field effect transistor in which a channel region is formed in an i-layer, the strained Si of a semiconductor substrate manufactured by the method of manufacturing a semiconductor substrate having a strained Si layer described above.
It is characterized in that the channel region is formed in a layer. The field-effect transistor of the present invention is a field-effect transistor in which a channel region is formed in a strained Si layer epitaxially grown on a SiGe layer, and is manufactured by the method for manufacturing the field-effect transistor of the present invention. It is characterized by that.

In the method of manufacturing the field effect transistor, the channel region is formed in the strained Si layer of the semiconductor substrate manufactured by the method of manufacturing the semiconductor substrate having the strained Si layer. Since the field effect transistor is manufactured by the method for manufacturing a field effect transistor of the present invention, a field effect transistor having high characteristics can be obtained with a high yield due to a high-quality strained Si layer in an SOI structure.

[0022]

BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, one embodiment of a semiconductor substrate, a field effect transistor and a method of manufacturing them according to the present invention will be described with reference to FIGS.

The semiconductor substrate according to the present invention is a substrate having a SiGe layer on a Si substrate with a Si oxide film interposed therebetween, and an SOI substrate having a strained Si layer formed on the SiGe layer of the substrate. It will be described below together with the steps.

[A Plate (First Substrate) Manufacturing Step] First, the mirror-polished first Si substrate 1 is washed, and then the first substrate is cleaned.
The Si substrate 1 is placed in an epitaxial growth apparatus and hydrogen baking is performed. After this, as shown in FIG.
On the first Si substrate 1, a gradient composition layer (underlayer) 2 of SiGe whose Ge composition ratio is gradually increased, and a final Ge composition ratio (for example, 0.3 etc)
A first constant composition layer (base layer) 3 of SiGe, which is the same as and is constant, is epitaxially grown in this order. Further, the surface of the first constant composition layer 3 of this substrate is polished to remove the unevenness of the surface called so-called crosshatch and to flatten it. Since the cross hatch has unevenness of about 20 nm, the polishing for planarization may be omitted if such unevenness does not hinder the subsequent steps or device formation.

Next, as shown in FIG. 1B, when the crosshatch removal polishing is performed, the same first constant composition layer 3 is again formed on the polished first constant composition layer 3. Form a film.
Further, on the first constant composition layer 3, a Si etch stop layer 4, a second constant composition layer 5 of SiGe having the same Ge composition ratio as that of the first constant composition layer 2, and a first surface of Si. The layer 6 is epitaxially grown in this order to form an A plate (first substrate) A.

The film thicknesses of the etch stop layer 4 and the first surface layer 6 are the critical film thickness with respect to the Ge composition ratio of the first constant composition layer 2 and the second constant composition layer 5 (when dislocations occur). (Thickness at which lattice relaxation occurs), for example, when the Ge composition ratio of the first constant composition layer 2 and the second constant composition layer 5 is 0.3, the thickness is less than 36 nm. In addition,
After forming the first surface layer 6, the first surface layer 6 may be thermally oxidized to form a Si oxide film on the surface, which may be newly used as the first surface layer.

The above-mentioned epitaxial growth is performed by, for example, low pressure CVD (Chemical Vapor Deposition), MBE (Mole).
cular Beam Epitaxy), GSMBE (Gas Source MBE) or UHV-CVD (Ultra High Vacuum Chemical Vapor)
Deposition) etc. In addition, the Ge composition ratio in the thickness direction of each of the layers on the first Si substrate 1 is shown in FIG.
Is shown in the graph.

[B Plate (Second Substrate) Manufacturing Step] On the other hand, after cleaning the mirror-polished second Si substrate 7, as shown in FIG. 3, thermal oxidation is performed on the second Si substrate 7. BOX
A second surface layer 8 of a Si oxide film (SiO ₂ ) serving as a layer is formed, and a B plate (second substrate) B is manufactured. In addition, A plate A
When a Si oxide film is formed on the surface of the Si layer as the first surface layer in B., the B plate in which the second surface layer 8 is not formed in the B plate and the surface remains Si may be used. Absent.

[Laminating Process] Next, after cleaning the A plate A and the B plate B, as shown in FIG. 4A, the surface of the A plate A (the surface of the first surface layer 6) and the B plate The surface of the plate B (the surface of the second surface layer 8) is brought into close contact with and bonded.

[Polishing Step] Then, in the A plate A and the B plate B bonded together, as shown in FIG. 4B, the gradient composition layer 2 is formed from the first Si substrate 1 rear surface side of the A plate A.
Is removed by polishing up to the middle. At this time, leave A plate A
(The thickness from the first surface layer 6 to the remaining gradient composition layer 2) is set to about 1 to 3 μm.

[Etching Step] Further, as shown in FIG. 5, the graded composition layer 2 and the first constant composition layer 3 remaining on the A plate A on the B plate B after the polishing step are selectively removed by etching. Then, the surface is used as the etch stop layer 4 to be the strained Si layer. That is, the graded composition layer 2 and the first constant composition layer 3 are removed by etching with an etchant having an etching rate of Si lower than that of SiGe, so that the etching is stopped by the etch stop layer 4 and the surface is removed via the SiGe layer. An SOI structure semiconductor substrate W having a strained Si layer is manufactured.

As the etching liquid, for example, 3
An etchant or the like of a mixed solution of HNO ₃ : H ₂ O: dHF in a ratio of 5:20:10 is used. Alternatively, the etch stop layer 4 of the semiconductor substrate may be selectively removed by etching or the like, and the SiGe layer and the Si layer may be epitaxially grown again on the surface thereof.

As described above, in the present embodiment, the SiGe second constant composition layer 5 and the Si constant second composition layer 5 are formed on the first Si substrate 1 via the graded composition layer 2, the first constant composition layer 3 and the etch stop layer 4. Alternatively, the A plate A having the first surface layer 6 of the thermal oxide film formed in this order and the B plate B having the second surface layer 8 of the Si oxide film formed on the second Si substrate 7 The first surface layer 6 and the second surface layer 8 are closely contacted and bonded together,
Since the Si substrate 1 of 1 is removed, there are no problems of defects and interface roughness in SIMOX technology, and problems of particles and manufacturing cost are also reduced, and good quality SiGe is provided on the surface side of the B plate B having an insulating layer (Si oxide film). It is possible to form a layer (second constant composition layer 5) and a strained Si layer (etch stop layer 4) to be an SOI layer.

By setting the thicknesses of the etch stop layer 4 and the first surface layer 6 to be less than the critical film thicknesses for the first constant composition layer 3 and the second constant composition layer 5, Dislocations and lattice relaxation do not occur in the first surface layer 6, and dislocations are also suppressed in the first constant composition layer 3 and the second constant composition layer 5. Furthermore, since the graded composition layer 2 and the first constant composition layer 3 remaining after the removal of the first Si substrate 1 are removed by etching, a surface having a higher degree of flatness than that obtained by polishing can be obtained, and
An SOI layer with a thickness of several hundreds nm or less can be obtained with high accuracy.

Further, since the graded composition layer (gradient composition region) 2 is formed on a part of the underlayer, generation and growth of dislocations in the SiGe layer can be suppressed, and the first constant composition layer 3
The dislocation density on the surface can be reduced, and the good-quality etch stop layer 4, second constant composition layer 5, and first surface layer 6 can be obtained.

Next, a field effect transistor (MOSFET) using the semiconductor substrate of the above embodiment according to the present invention.
Will be described with reference to FIG. 6 together with the manufacturing process thereof.

FIG. 6 shows a schematic structure of the field effect transistor of the present invention. To manufacture this field effect transistor, strained Si on the surface of the semiconductor substrate manufactured by the above manufacturing process is used. Etch stop layer 4
A gate oxide film 17 of SiO ₂ and a gate polysilicon film 18 are sequentially deposited on top. Then, a gate electrode (not shown) is patterned and formed on the gate polysilicon film 18 on the portion to be the channel region.

Next, the gate oxide film 17 is also patterned to remove a portion other than under the gate electrode. Further, by ion implantation using the gate electrode as a mask, an n-type or p-type source region S and drain region D are formed in the etch stop layer 4 and the second constant composition layer 5 in a self-aligned manner. After that, a source electrode and a drain electrode (not shown) are respectively formed on the source region S and the drain region D, and an n-type or p-type MOSFET in which the etch stop layer 4 which is a strained Si layer serves as a channel region is manufactured. It

In the MOSFET thus manufactured,
Since the channel region is formed in the etch stop layer 4 of the strained Si layer of the semiconductor substrate manufactured by the above-described manufacturing method, a MOSFET with high characteristics can be obtained with high yield by the strained Si layer of good quality.

The technical scope of the present invention is not limited to the above embodiment, and various modifications can be made without departing from the spirit of the present invention. For example, in each of the above-described embodiments, the SiGe graded composition layer in which the Ge composition ratio is gradually increased at a constant increase rate is formed, but the graded composition layer or the stepwise increase in which the Ge composition ratio is stepwise increased is formed. And a constant gradient increase, that is, a step of epitaxially growing a layer having a composition gradient at a constant increase rate and a step of epitaxially growing a constant composition layer are repeated a plurality of times, and the Ge composition ratio is stepped with a gradient in the film formation direction. The graded composition layer may be a step-graded layer that changes in shape. Further, for example, the present invention also includes a semiconductor substrate having a SiGe layer on the strained Si layer 4 of the above embodiment.

[0041]

The present invention has the following effects.
According to the method for manufacturing a semiconductor substrate and the semiconductor substrate of the present invention, the S is directly formed on the first Si substrate or through another layer.
The first substrate having the iGe layer and the first surface layer of Si formed in this order, and the second substrate having the second surface layer of the Si oxide film formed on the second Si substrate are The first surface layer and the second surface layer are brought into close contact with each other and bonded, or the first Si layer
A SiGe layer and a first surface layer, which is an oxide film of Si, are formed in this order on the substrate directly or via another layer to form a first substrate and Si or its surface on the surface. Since the second Si substrate having an oxide film is adhered to and bonded to the second Si substrate via the first surface layer, and the first Si substrate is removed, there are no problems of defects and interface roughness in SIMOX technology. Problems of particles and manufacturing cost are also reduced, and a good-quality SiGe layer can be formed on the surface side of the second substrate having an insulating layer (Si oxide film). Therefore, according to the semiconductor substrate of the present invention, a good quality SiGe layer is provided on the insulating film or the Si oxide film, and for example, the strained Si layer is S
It is suitable as an SOI substrate provided on the i oxide film via a SiGe layer.

According to the method of manufacturing a semiconductor substrate having a strained Si layer of the present invention, a strained Si layer is formed on the SiGe layer of the semiconductor substrate manufactured by the method of manufacturing a semiconductor substrate of the present invention, and Since the semiconductor substrate of the present invention is manufactured by the method for manufacturing a semiconductor substrate including the strained Si layer of the present invention, it is suitable as a substrate for an integrated circuit using a MOSFET having a strained Si layer as a channel region, for example. Is.

Further, according to the method of manufacturing a field effect transistor of the present invention, a channel region is formed in the strained Si layer of the semiconductor substrate manufactured by the method of manufacturing the semiconductor substrate having the strained Si layer, and the present invention is also provided. Since the field effect transistor of No. 1 is manufactured by the method for manufacturing the field effect transistor of the present invention, the strain S of good quality is obtained.
With the i layer, a MOSFET with high characteristics can be obtained with a high yield.

[Brief description of drawings]

FIG. 1 is a cross-sectional view showing an A plate manufacturing process in process order in one embodiment according to the present invention.

FIG. 2 shows a first S according to an embodiment of the present invention.
6 is a graph schematically showing the Ge composition ratio in the thickness direction of each layer laminated on the i substrate.

FIG. 3 is a cross-sectional view showing a B plate according to the embodiment of the present invention.

FIG. 4 is a cross-sectional view showing a laminating step and a polishing step in one embodiment according to the present invention.

FIG. 5 is a cross-sectional view showing an etching process in one embodiment according to the present invention.

FIG. 6 is a MOSFE in one embodiment according to the present invention.
It is a schematic sectional drawing which shows T.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 1st Si substrate 2 Gradient composition layer (gradient composition area | region) 3 1st constant composition layer 4 Etch stop layer (strained Si layer) 5 2nd constant composition layer 6 1st surface layer 7 2nd Si substrate 8 Second Surface Layer 17 SiO ₂ Gate Oxide Film 18 Gate Polysilicon Film A A Plate (First Substrate) BB Plate (Second Substrate) S Source Region D Drain Region

─────────────────────────────────────────────────── ─── Continuation of front page (51) Int.Cl. ⁷ Identification code FI theme code (reference) H01L 29/786 H01L 29/78 627D (72) Inventor Kazuki Mizushima 1-297 Kitabukuro-cho, Saitama City Saitama Prefecture Mitsubishi Material Co., Ltd. Omiya Research Center Material Process Research Department (72) Inventor Kenji Yamaguchi 1-297 Kitabukurocho, Saitama City Saitama Prefecture Mitsubishi Materials Co., Ltd. Omiya Research Center Material Process Research Department F Term (reference) ) 5F043 AA07 BB12 DD30 5F052 DA01 DA03 DB01 DB02 DB06 KB04 5F110 AA06 CC02 DD05 DD13 EE09 FF02 GG01 GG02 GG12 GG19 GG22 GG42 HJ13 QQ16 QQ19

Claims (11)

[Claims] 1. A method of manufacturing a semiconductor substrate comprising a SiGe layer on a Si substrate with an insulating layer interposed between the SiG layer and the first Si substrate directly or via another layer.
a step of forming a first substrate by forming an e layer and a first surface layer of Si in this order, and a second substrate in which a second surface layer of a Si oxide film is formed on a second Si substrate And the first substrate and the first surface layer and the second surface layer in close contact with each other to bond, and at least the first Si of the first substrate after the step.
And a step of removing the substrate. 2. A method of manufacturing a semiconductor substrate comprising a SiGe layer on a Si substrate with an insulating layer interposed between the SiG layer and the first Si substrate, either directly or via another layer.
The first oxide film is a Si oxide film directly with the e layer or through the Si layer
And a second Si substrate having Si or an oxide film thereof on the surface, and the first substrate through the first surface layer. And bringing them into close contact with each other and joining them, and after the step, at least the first Si of the first substrate.
And a step of removing the substrate. 3. The method of manufacturing a semiconductor substrate according to claim 1, wherein a graded composition region in which a Ge composition ratio is gradually increased toward the surface is formed in at least a part of the SiGe layer. Of manufacturing a semiconductor substrate. 4. The method of manufacturing a semiconductor substrate according to claim 1, wherein a thickness of the first surface layer of Si or the Si layer is less than a critical film thickness with respect to the SiGe layer. A method of manufacturing a semiconductor substrate, comprising: 5. The method of manufacturing a semiconductor substrate according to claim 1, wherein in the step of manufacturing the first substrate, a SiGe layer is formed on the Si substrate before the SiGe layer is formed. A step of forming a base layer and a Si etch stop layer in this order, and a step of etching the underlayer remaining after the step of removing the first Si substrate with an etching solution having a slower etching rate of Si than SiGe. A method of manufacturing a semiconductor substrate, comprising: 6. The method of manufacturing a semiconductor substrate according to claim 5, wherein the thickness of the etch stop layer is less than a critical film thickness of the underlying layer. 7. A method of manufacturing a semiconductor substrate, comprising: an Si substrate, an insulating layer or a SiGe layer via the insulating layer and the Si layer, and a strained Si layer via the SiGe layer. 7. The method for manufacturing a semiconductor substrate, wherein the strained Si layer is formed on the SiGe layer of the semiconductor substrate manufactured by the method for manufacturing a semiconductor substrate according to any one of 1 to 6. 8. A method of manufacturing a field-effect transistor in which a channel region is formed in a strained Si layer epitaxially grown on a SiGe layer, the semiconductor substrate manufactured by the method of manufacturing a semiconductor substrate according to claim 7. And forming the channel region in the strained Si layer of 1. 9. A semiconductor substrate in which an SiGe layer is formed on an Si substrate via an insulating layer or an insulating layer and a Si layer, and is manufactured by the method for manufacturing a semiconductor substrate according to claim 1. A semiconductor substrate characterized by being processed. 10. A SiGe layer is formed on a Si substrate via an insulating layer or an insulating layer and a Si layer, and the SiGe layer is further formed.
A semiconductor substrate in which a strained Si layer is formed via a Ge layer, wherein the semiconductor substrate is manufactured by the method for manufacturing a semiconductor substrate according to claim 7. 11. A field effect transistor in which a channel region is formed in a strained Si layer epitaxially grown on a SiGe layer, which is manufactured by the method for manufacturing a field effect transistor according to claim 8. Field effect transistor.