JP2003017483A - Semiconductor device and method for manufacturing the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an insulation film of a low dielectric constant and high mechanical strength. SOLUTION: This semiconductor device is provided with the insulation film, provided with a porus structure formed on the surface of a substrate and consisting of the holes of three-dimensional network structure.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and a method of manufacturing the same, and more particularly to a low dielectric constant inorganic dielectric film.

[0002]

2. Description of the Related Art In order to speed up and reduce power consumption of semiconductor devices, it is important to reduce the dielectric constant of an interlayer insulating film. Although various efforts have been made to reduce the dielectric constant, in the conventional semiconductor device, (1) fluorine is added to the silica film which is the inorganic insulating film. (2) An organic insulating material having a low dielectric constant is formed as a base material. (3) A porous film is intentionally formed. And other methods have been proposed.

However, in the case of the method (1), since the heat resistance of the insulating film is deteriorated, only a few percent of the element ratio can be added, so that the relative dielectric constant is 10% higher than that of the conventional silica-based interlayer insulating film. There is a problem that it can only be reduced by 15%.

Further, in the case of the method (2), since it is an organic material, the heat resistance is markedly deteriorated as compared with the conventional silica-based interlayer insulating film, and the reliability of the semiconductor element is deteriorated. is there. Further, in the case of an organic material, there is also a problem that mechanical strength is generally easily deteriorated.

Further, in the case of (3), since the porous structure is random, the mechanical strength of the interlayer insulating film is remarkably reduced, and the interlayer insulating film is easily damaged during packaging, which causes a decrease in reliability of the semiconductor element. Was there.

Further, the porous structure is often not closed, and if it is not closed, the moisture resistance of the interlayer insulating film is remarkably reduced, which causes the reliability of the semiconductor element to be lowered.

[0007]

As described above, the conventional insulating film has a problem that the dielectric constant cannot be sufficiently lowered and the mechanical strength is not sufficient.

The present invention has been made in view of the above circumstances, and an object thereof is to provide an insulating film having a low dielectric constant and a high mechanical strength.

[0009]

In view of the above, the present invention is characterized by including an inorganic insulating film having a porous structure formed on the surface of a substrate and having pores forming a three-dimensional network.

According to this structure, since the permittivity of air is low, it is possible to further lower the permittivity as compared with adding fluorine, and it is possible to achieve an extremely low permittivity of the insulating film. Become. Further, since the pores form a three-dimensional network, it is possible to make the physical properties of the film uniform, and the electrical characteristics are isotropic. Furthermore, the path of the pores becomes long, the openings can be easily closed together in the straight line direction, and the moisture resistance is as excellent as that of the dense film. Furthermore, it becomes possible to obtain a low dielectric constant thin film having excellent mechanical strength and ultimately having a low dielectric constant.

Desirably, it is characterized by having a porous structure having holes forming a periodic three-dimensional network.

According to such a structure, the holes are periodic
Since it has a porous structure having pores forming a dimensional network, the mechanical strength can be increased and a highly reliable insulating film can be obtained.

Further, preferably, the inorganic insulating film is an interlayer insulating film interposed between a semiconductor substrate or a lower layer wiring conductor formed on the semiconductor substrate and an upper layer wiring conductor.

According to this structure, since it is possible to reduce the dielectric constant of the interlayer insulating film, it is possible to reduce the interlayer capacitance and provide a high-speed driving semiconductor device.

In the second aspect of the present invention, a step of producing a precursor solution containing a silica derivative and a surfactant, a step of contacting the precursor solution with a substrate surface, and a step of contacting the precursor solution Baking the substrate to decompose and remove the surfactant.

According to such a constitution, it becomes possible to provide an insulating film having excellent controllability, excellent mechanical strength and an extremely low dielectric constant. Further, since it can be formed at a low temperature, an insulating film having high reliability can be formed without affecting the base even when used as an interlayer insulating film of an integrated circuit.

Desirably, prior to the contacting step, a pre-crosslinking step of raising the temperature of the precursor solution to start a crosslinking reaction may be included.

With this structure, productivity can be improved.

Further, by adjusting the concentration of the precursor liquid, the porosity can be appropriately changed, and it becomes possible to form an insulating thin film having a desired dielectric constant with extremely good workability.

Preferably, the contacting step is a step of immersing the substrate in the precursor solution.

According to this structure, the low dielectric constant insulating film can be formed with high productivity.

Further preferably, the contacting step is a step of immersing the substrate in the precursor solution and pulling it up at a desired speed.

According to this structure, the low dielectric constant insulating film can be formed with high productivity.

Preferably, the contacting step is a step of applying the precursor solution onto the substrate.

According to this structure, it is possible to form the low dielectric constant insulating film with high productivity.

Preferably, the contacting step is a spin coating step in which the precursor solution is dropped on the substrate and the substrate is rotated.

According to this structure, the film thickness and the porosity can be easily adjusted, and the low dielectric constant insulating film can be formed with high productivity.

[0028]

BEST MODE FOR CARRYING OUT THE INVENTION A semiconductor device and a method of manufacturing the same according to an embodiment of the present invention will be described in detail with reference to the drawings. First Embodiment As a first embodiment of the present invention, an FRAM using this low dielectric constant thin film as an interlayer insulating film will be described.

This FRAM is shown in FIGS. 1 (a) and 1 (b).
As shown in FIG. 2, the switching transistor formed in the element region surrounded by the element isolation insulating film 2 formed on the surface of the silicon substrate 1 and the ferroelectric capacitor are used in the present invention. The low dielectric constant thin film 7 of the present invention is used as an interlayer insulating film between the lower electrode 9 and the lower electrode 9 of the body capacitor. This low dielectric constant thin film is formed to have a porous structure having pores h formed on the substrate surface and having a three-dimensional network structure, as shown in the enlarged perspective view of the main part in FIG. 1 (b). It is composed of a mesoporous silica thin film.

Others are formed by a usual method. This switching transistor has a gate electrode 4 formed on the surface of a silicon substrate 1 via a gate insulating film 3, a source region 5 and a drain region 6 formed so as to sandwich the gate electrode 4, and a contact to the drain region 6. The lower electrode 9 is connected via 8 while the source / drain region is connected to the bit line BL.

On the other hand, the ferroelectric capacitor has a ferroelectric thin film 10 made of PZT sandwiched between a lower electrode 9 and an upper electrode 11.

The manufacturing process of this FRAM will be described with reference to FIGS.

First, the gate electrode 4 is formed on the surface of the silicon substrate 1 with the gate insulating film 3 interposed therebetween, and impurities are diffused by using the gate electrode 4 as a mask by a usual method. 6 is formed (FIG. 2A).

Then, by the method of the present invention, a mesoporous silica thin film is formed so as to have a porous structure having pores having a three-dimensional network structure (FIG. 2).
(B)).

That is, as shown in FIG. 3 (a), first, a cationic cetyltrimethylammonium bromide (CTAB: C ₁₆ H ₃₃ N ⁺ (CH ₃ ) ₃ as a surfactant is used.
Br ⁻ ), tetramethoxysilane (TMOS: Tetramethoxy Silane) as a silica derivative, and hydrochloric acid (HCl) as an acid catalyst are dissolved in a H ₂ O / alcohol mixed solvent, and the precursor (precursor) is dissolved in a mixing container. ) Prepare the solution. The molar ratio of the precursor solution charged was 10% solvent.
0, surfactant 0.02, silica derivative 0.4,
The acid catalyst 2 is mixed, the substrate on which the MOSFET is formed is dipped in the mixed solution, and the mixing container is sealed as shown in FIG. 3 (b), and then kept at 30 to 150 ° C. for 1 to 120 hours. By doing so, the silica derivative is polymerized by a hydrolysis polycondensation reaction (pre-crosslinking step) to form a mesoporous silica thin film using the periodic self-aggregate of the surfactant as a template.

This self-aggregate is as shown in FIG.
C ₁₆ H ₃₃ N ⁺ (CH ₃ ) Br ⁻ forms a spherical micelle structure (FIG. 4 (b)) formed by aggregating a plurality of molecules, each of which is a molecule,
By increasing the concentration (FIG. 4 (c)), a cylindrical body (FIG. 4 (d)) in which the surfactant is oriented is formed.
It changes into a three-dimensional network cylinder.

Then, the substrate was pulled up, washed with water and dried, and then heated and baked in an oxygen atmosphere at 400 ° C. for 3 hours,
The surface-active agent in the template is completely removed by thermal decomposition to form a pure mesoporous silica thin film having a three-dimensional network-like porous structure. Note that this firing atmosphere requires consideration.

In this way, the low dielectric constant thin film 7 of the embodiment of the present invention is formed as shown in FIG. 2B. However, since the bit line BL is actually formed, this low dielectric constant thin film is formed.
It must be formed in two steps.

Thereafter, a contact hole 8 is formed in the low dielectric constant thin film 7 by a usual method. Then, a highly doped polycrystalline silicon layer is buried in the contact hole to form a plug, and then an iridium oxide layer is formed by using iridium as a target and using a mixed gas of argon and oxygen. Then, a platinum layer is formed on the upper layer by using platinum as a target. Thus, as shown in FIG. 2C, an iridium oxide layer having a film thickness of about 50 nm and a platinum layer having a film thickness of about 200 nm are formed and patterned by photolithography to form the lower electrode 9.

Next, a PZT film is formed as the ferroelectric film 10 on the lower electrode 9 by the sol-gel method.
As starting _{materials, Pb (CH 3 COO) 2} · 3H 2 O, Zr (t-OC 4 H 9) 4, Ti (i
Using a mixed solution of -OC ₃ H _{7) 4.} This mixed solution was spin-coated, dried at 150 ° C., and pre-baked at 400 ° C. for 30 minutes in a dry air atmosphere. This 5
After repeating the process twice, heat treatment was performed at 700 ° C. or higher in an O ₂ atmosphere. Thus, the ferroelectric film 10 having a thickness of 250 nm was formed. Here, in PbZr _x Ti _1-x O ₃ , x was set to 0.52 (hereinafter referred to as PZT (52/48)) to form a PZT film (FIG. 2D).

Further, a laminated film 1 of iridium oxide and iridium is formed on the ferroelectric film 10 by sputtering.
1 is formed. The laminated film of the iridium oxide layer and the iridium layer is used as the upper electrode 11. Here, the iridium layer and the iridium oxide layer were formed so as to have a total thickness of 200 nm. In this way, the ferroelectric capacitor can be obtained, and the FRAM shown in FIG. 1 is formed.

According to this structure, since the interlayer insulating film is composed of a low dielectric constant thin film made of a mesoporous silica thin film having a three-dimensional network structure, the capacitance due to the interlayer insulating film is reduced and the switching characteristics are improved. It is possible to form a good FRAM that can operate at high speed.

Further, since the holes are formed on the surface of the substrate so as to have a three-dimensional network structure, it has a low dielectric constant uniformly over the entire surface of the substrate. On the other hand, it is possible to take a closed structure having no opening, and it becomes an effective low dielectric constant thin film having excellent moisture resistance and high reliability. Therefore, there is no leak current and the interlayer insulating film has a long life.

The composition of the precursor solution is not limited to the composition of the above embodiment, the solvent is 100, the surfactant is 0.05 to 0.5, the silica derivative is 0.1 to 1, and the acid is Catalysts 0 to 5 are desirable. By using the precursor solution having such a constitution, it becomes possible to form a low dielectric constant insulating film having pores of a three-dimensional network structure.

In particular, when CATB is used as the surfactant and TEOS is used as the silica derivative, it is known that the ratio of these changes the structure of the resulting structure.

It is known that a network structure (cubic) is formed when the molecular ratio of the surfactant such as CATB / TEOS and the silica derivative is 0.3 to 0.8. When it is smaller than this molecular ratio, it becomes a low dielectric constant insulating film in which columnar holes are oriented, while when it is larger than this molecular ratio, it becomes a low dielectric constant insulating film in which layered holes are oriented. .

In the above embodiment, the cationic type cetyltrimethylammonium bromide (CTAB: C ₁₆ H ₃₃ N ⁺ (CH ₃ ) ₃ Br ⁻ ) is used as the surfactant, but the surfactant is not limited thereto. Needless to say, other surfactants may be used.

However, when alkali ions such as Na ions are used as the catalyst, it causes deterioration of the semiconductor material. Therefore, it is desirable to use a cationic surfactant and use an acid catalyst as the catalyst. As an acid catalyst, H
In addition to Cl, nitric acid (HNO ₃ ), sulfuric acid (H ₂ SO ₄ ), phosphoric acid (H ₃ PO ₄ ), H ₄ SO _{4 and the} like may be used.

The silica derivative is not limited to TMOS, but tetraethoxysilane (TEOS:
It is desirable to use a silicon alkoxide material such as Tetraethoxy Silane).

Although a water H ₂ O / alcohol mixed solvent was used as the solvent, only water may be used.

Furthermore, although an oxygen atmosphere was used as the firing atmosphere, it may be in the air, under reduced pressure, or in a nitrogen atmosphere. Desirably, by adding firing using a forming gas composed of a mixed gas of nitrogen and hydrogen, the moisture resistance is improved and the leak current can be reduced.

The mixing ratio of the surfactant, the silica derivative, the acid catalyst and the solvent can be changed appropriately.

Further, the prepolymerization step is carried out in the range of 30 to 150.
The temperature is kept at 1 ° C. for 1 to 120 hours, preferably 60 to 120 ° C., more preferably 90 ° C.

Although the firing process is performed at 400 ° C. for 1 hour, it may be performed at 300 ° C. to 500 ° C. for about 1 to 5 hours. Desirably, the temperature is set to 350 ° C to 450 ° C.

Further, as shown in FIG.
If the inorganic insulating film having the pores h of the dimensional network structure is formed, it becomes possible to further homogenize the dielectric constant. Embodiment 2 In the first embodiment, the mesoporous silica thin film was formed by immersion in a precursor solution. However, it is not limited to immersion, and as shown in FIG. The method may be used.

That is, the substrate is vertically lowered with respect to the liquid surface of the prepared precursor solution at a speed of 1 mm / s to 10 m / s to be submerged in the solution, and then allowed to stand for 0 seconds to 1 hour.

After a desired time has passed, the substrate is again lifted vertically at a speed of 1 mm / s to 10 m / s and taken out from the solution.

Finally, as in the case of the first embodiment, the surface-active agent is completely pyrolyzed by firing.
By removing it, a pure mesoporous silica thin film composed of pores with a three-dimensional network structure is formed. Embodiment 3 In the first embodiment, the mesoporous silica thin film was formed by immersion in a precursor solution. However, it is not limited to immersion, and spin coating may be performed as shown in FIG. It may be by law.

The precursor solution formed in the same manner as in the above embodiment is dropped onto the surface of the substrate to be processed placed on the spinner and rotated at 500 to 5000 rpm to obtain a mesoporous silica thin film.

Finally, as in the case of the first embodiment, the surface-active agent is completely pyrolyzed by firing.
By removing it, a pure mesoporous silica thin film composed of pores with a three-dimensional network structure is formed.

According to this structure, since it has a porous structure made up of holes having a three-dimensional network structure, it is possible to increase the mechanical strength and obtain a highly reliable insulating film. Further, when used as an interlayer insulating film, it can have a closed structure with no openings for the upper layer wiring and the lower layer wiring, and has excellent moisture resistance and high reliability as an effective low dielectric constant thin film. Play a role.

In the above embodiment, the coating method using the spinner has been described, but a so-called brush coating method of coating with a brush is also applicable.

In addition, although the interlayer insulating film of the FRAM has been described in the above embodiments, various semiconductor devices using silicon, high speed devices including devices using compound semiconductors such as HEMT, microwave ICs, etc. It is also applicable to a high frequency device, an MFMIS type highly integrated ferroelectric memory, a microwave transmission line using a film carrier or a multilayer wiring board, and the like.

[0064]

As described above, according to the present invention, it is possible to easily form a porous structure having pores of a three-dimensional network structure with good controllability, high mechanical strength and low dielectric constant. It is possible to obtain the insulating film of

[Brief description of drawings]

FIG. 1 is a diagram showing an FRAM using an insulating film formed by the method of the first embodiment of the present invention.

FIG. 2 is a diagram showing a manufacturing process of the FRAM of FIG.

FIG. 3 is an explanatory diagram showing a process of forming an insulating film according to the first embodiment of the present invention.

FIG. 4 is an explanatory diagram showing an insulating film according to the first embodiment of the present invention.

FIG. 5 is an explanatory diagram showing a process of forming an insulating film according to a second embodiment of the present invention.

FIG. 6 is an explanatory diagram showing a process of forming an insulating film according to a third embodiment of the present invention.

[Explanation of symbols]

h hole 1 Silicon substrate 2 element isolation insulating film 3 Gate insulation film 4 gate electrode 5 Source area 6 drain region 7 Insulating film 8 contact holes 9 Lower electrode 10 Ferroelectric film 11 Upper electrode

   ─────────────────────────────────────────────────── ─── Continued front page    (72) Inventor Yoshiaki Oku             21 Ryozo Mizozaki-cho, Saiin, Ukyo-ku, Kyoto             Inside the company F term (reference) 5F033 HH07 HH35 JJ04 KK01 MM05                       QQ37 RR29 SS22 XX24                 5F058 BA20 BC02 BC04 BF22 BF25                       BF46 BH01 BJ02                 5F083 FR02 JA15 JA38 JA43 JA56                       MA06 MA17 PR22 PR23

Claims (9)

[Claims] 1. A semiconductor device comprising an inorganic insulating film formed on the surface of a substrate and having a porous structure having pores forming a three-dimensional network. 2. The semiconductor device according to claim 1, wherein the inorganic insulating film has a porous structure having holes forming a periodic three-dimensional network. 3. The inorganic insulating film is an interlayer insulating film interposed between a semiconductor substrate or a lower layer wiring conductor formed on the semiconductor substrate and an upper layer wiring conductor. 2. The semiconductor device according to item 2. 4. A step of producing a precursor solution containing a silica derivative and a surfactant, a step of contacting the precursor solution with the surface of the substrate, and a step of baking the substrate contacted with the precursor solution, And a step of decomposing and removing the surfactant to form an insulating film. 5. The method of manufacturing a semiconductor device according to claim 4, further comprising a preliminary cross-linking step of raising the temperature of the precursor solution and starting a cross-linking reaction prior to the contacting step. 6. The method of manufacturing a semiconductor device according to claim 4, wherein the contacting step is a step of immersing the substrate in a precursor solution. 7. The method of manufacturing a semiconductor device according to claim 4, wherein the contacting step is a step of immersing the substrate in a precursor solution and pulling it up at a desired speed. 8. The method of manufacturing a semiconductor device according to claim 4, wherein the contacting step is a step of applying a precursor solution onto a substrate. 9. The method of manufacturing a semiconductor device according to claim 8, wherein the contacting step is a spin coating step in which a precursor solution is dropped on a substrate and the substrate is rotated.