JP2003017445A - Cmp abrasive and method for polishing substrate - Google Patents

Cmp abrasive and method for polishing substrate

Info

Publication number
JP2003017445A
JP2003017445A JP2001197275A JP2001197275A JP2003017445A JP 2003017445 A JP2003017445 A JP 2003017445A JP 2001197275 A JP2001197275 A JP 2001197275A JP 2001197275 A JP2001197275 A JP 2001197275A JP 2003017445 A JP2003017445 A JP 2003017445A
Authority
JP
Japan
Prior art keywords
polishing
water
cerium
cmp
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2001197275A
Other languages
Japanese (ja)
Inventor
Takashi Sakurada
剛史 櫻田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Showa Denko Materials Co Ltd
Original Assignee
Hitachi Chemical Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Chemical Co Ltd filed Critical Hitachi Chemical Co Ltd
Priority to JP2001197275A priority Critical patent/JP2003017445A/en
Publication of JP2003017445A publication Critical patent/JP2003017445A/en
Pending legal-status Critical Current

Links

Abstract

PROBLEM TO BE SOLVED: To provide abrasives, capable of reducing polishing damages by improving a particle removal performance in cleaning after polishing, and to provide a method for polishing a substrate using the abrasives. SOLUTION: The CMP abrasives comprise cerium oxide particles, having a complex-forming agent concentration range of cerium of 0.1 wt.% to 10.0 wt.%, a water-soluble polymer, a complex-forming agent with the cerium and water. The method for polishing the substrate comprises the steps of supplying the CMP abrasives containing the cerium oxide particles, the water-soluble polymer, the complex-forming agent with the cerium and the water to a polishing pad on a polishing platen, contacting the pad with a surface to be polished of the substrate of the semiconductor chip formed with a silicon oxide insulating film, making the surface to be polished and the pad to move relatively, and polishing the surface of the substrate via the cerium oxide particles complex formed on the surface.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明は、半導体素子製造工
程のうち、基板表面、特に層間絶縁膜の平坦化工程また
はシャロー・トレンチ分離の形成工程等において使用さ
れるCMP(Chemical Mechanical
Polishing)研磨剤及び基板の研磨方法に関
する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a CMP (Chemical Mechanical) used in a semiconductor element manufacturing process, such as a flattening process of a substrate surface, particularly an interlayer insulating film, a shallow trench isolation forming process, or the like.
Polishing) Abrasive and substrate polishing method.

【0002】[0002]

【従来の技術】超大規模集積回路の分野において実装密
度を高めるために種々の微細加工技術が研究、開発され
ており、既に、デザインルールは、サブハーフミクロン
のオーダーになっている。このような厳しい微細化要求
を満足するための技術の一つにCMP研磨技術がある。
この技術は、半導体装置の製造工程において、露光を施
す層を完全に平坦化することによって微細化を可能と
し、歩留まりを向上させることができるため、例えば、
層間絶縁膜の平坦化やシャロー・トレンチ分離等を行う
際に必要となる技術である。
2. Description of the Related Art Various microfabrication techniques have been researched and developed in order to increase the packaging density in the field of ultra-large scale integrated circuits, and the design rule has already been in the order of sub-half micron. The CMP polishing technique is one of the techniques for satisfying such strict miniaturization requirements.
This technique enables miniaturization by completely flattening the layer to be exposed in the manufacturing process of the semiconductor device and can improve the yield, so that, for example,
This is a technique required when flattening the interlayer insulating film and separating shallow trenches.

【0003】従来、集積回路内の素子分離にはLOCO
S(シリコン局所酸化)法が用いられてきたが、素子分
離幅をより狭くするため、近年ではシャロー・トレンチ
分離法が用いられている。シャロー・トレンチ分離法で
は、ウエハ基板上に成膜した余分の酸化珪素膜を除くた
めにCMPが必須であり、研磨を停止させるために、酸
化珪素膜の下に窒化珪素膜がストッパとして形成される
のが一般的である。
Conventionally, LOCO is used for element isolation in an integrated circuit.
Although the S (silicon local oxidation) method has been used, the shallow trench isolation method has been used in recent years in order to narrow the element isolation width. In the shallow trench isolation method, CMP is indispensable to remove the excess silicon oxide film formed on the wafer substrate, and a silicon nitride film is formed as a stopper under the silicon oxide film to stop polishing. It is common to

【0004】半導体装置の製造工程において、プラズマ
−CVD(Chemical Vapor Depos
ition、化学的蒸着法)、低圧−CVD等の方法で
形成される酸化珪素絶縁膜等を平坦化するためのCMP
研磨剤としては、従来、ヒュームドシリカを研磨粒子と
するpHが9を超えるアルカリ性のシリカ系研磨剤が広
く用いられてきた。一方、フォトマスクやレンズ等のガ
ラス表面研磨剤として多用されてきた酸化セリウムを研
磨粒子とする研磨剤が近年CMP研磨剤として注目され
るようになった。この技術は、例えば特開平5−326
469号公報に開示されている。酸化セリウム系研磨剤
はシリカ系研磨剤と比べて酸化珪素膜の研磨速度が早
く、研磨傷も比較的少ないという点で優るため種々の適
用検討がなされ、その一部は半導体用研磨剤として実用
化されるようになっている。この技術は、例えば特開平
9−270402号公報に開示されている。
In the process of manufacturing a semiconductor device, plasma-CVD (Chemical Vapor Depos) is used.
CMP for planarizing a silicon oxide insulating film and the like formed by a method such as an ionization method, a chemical vapor deposition method) or a low pressure-CVD method.
As the polishing agent, conventionally, an alkaline silica-based polishing agent having fumed silica as polishing particles and having a pH of more than 9 has been widely used. On the other hand, an abrasive containing cerium oxide as abrasive particles, which has been frequently used as a glass surface abrasive for photomasks, lenses and the like, has recently attracted attention as a CMP abrasive. This technique is disclosed in, for example, Japanese Patent Laid-Open No. 5-326.
It is disclosed in Japanese Patent Publication No. 469. Cerium oxide-based abrasives are superior to silica-based abrasives in that they have a faster polishing rate for silicon oxide films and comparatively less polishing scratches, so various application studies have been conducted, and some of them have been commercialized as semiconductor abrasives. It is supposed to be done. This technique is disclosed in, for example, Japanese Patent Laid-Open No. 9-270402.

【0005】近年、半導体素子の多層化・高精細化が進
むにつれ、半導体素子の歩留り及びスループットのさら
なる向上が要求されるようになってきている。それに伴
い研磨剤を用いたCMPプロセスに対しても、研磨傷フ
リーで且つより高速な研磨が望まれるようになってい
る。酸化セリウム研磨剤を用いたCMPプロセスにおい
て研磨傷をさらに低減する方法としては、研磨圧力もし
くは定盤回転数低減といったプロセス改良法や砥粒の濃
度もしくは密度低減といった研磨剤改良法が挙げられ
る。しかし、いずれの方法を用いた場合にも研磨速度が
低下してしまう問題点があった。
In recent years, as the number of layers of semiconductor elements has increased and the resolution has increased, further improvement in the yield and throughput of semiconductor elements has been demanded. Along with this, even with respect to the CMP process using an abrasive, polishing scratch-free and higher-speed polishing is desired. Examples of methods for further reducing polishing scratches in the CMP process using a cerium oxide abrasive include a method for improving the polishing pressure or the number of rotations of the platen, and an method for improving the abrasive such as reducing the concentration or density of abrasive grains. However, there is a problem in that the polishing rate is lowered regardless of which method is used.

【0006】[0006]

【発明が解決しようとする課題】請求項1〜4記載の発
明は、研磨後の洗浄における粒子除去性能を向上させ、
高い研磨速度、高平坦性を有し、かつ研磨傷を低減する
ことのできる研磨剤を提供するものである。請求項5記
載の発明は、研磨後の洗浄における粒子除去性能を向上
させ、高い研磨速度、高平坦性を有し、かつ研磨傷を低
減することのでき、歩留まり、作業性の優れたものであ
る。
The inventions according to claims 1 to 4 improve the particle removal performance in the cleaning after polishing,
The present invention provides an abrasive having a high polishing rate and high flatness and capable of reducing polishing scratches. The invention according to claim 5 improves particle removal performance in cleaning after polishing, has a high polishing rate and high flatness, and can reduce polishing scratches, and is excellent in yield and workability. is there.

【0007】[0007]

【課題を解決するための手段】本発明は、酸化セリウム
粒子、水溶性高分子、セリウムとの錯形成剤及び水を含
みセリウムとの錯形成剤濃度が0.1重量%以上10.
0重量%以下であるCMP研磨剤に関する。また、本発
明は、錯形成剤が一般式(I)
According to the present invention, cerium oxide particles, a water-soluble polymer, a complexing agent with cerium and water, and the concentration of the complexing agent with cerium are 0.1% by weight or more and 10.
It relates to a CMP abrasive which is 0% by weight or less. Further, in the present invention, the complexing agent is represented by the general formula (I).

【化2】 (式中、R及びRは置換もしくは無置換アルキル基
を表し、Rは水素原子または炭素数が1〜3の置換も
しくは無置換アルキル基を表す)で示されるβ―ジケト
ンである前記のCMP研磨剤に関する。また、本発明
は、錯形成剤がアセチルアセトンである前記のCMP研
磨剤に関する。また、本発明は、水溶性高分子が水溶性
陰イオン性界面活性剤及び水溶性非イオン性界面活性剤
からなる群選ばれる少なくとも1種である前記のいずれ
かのCMP研磨剤に関する。また、本発明は、酸化セリ
ウム粒子、水溶性高分子、セリウムとの錯形成剤及び水
を含むCMP研磨剤を研磨定盤上の研磨パッドに供給
し、酸化珪素絶縁膜が形成された半導体チップである基
板の被研磨面と接触させて被研磨面と研磨パッドを相対
運動させて、表面に錯形成した酸化セリウム粒子を介し
て基板表面を研磨することを特徴とする基板の研磨方法
に関する。一般式(I)で示されるβ−ジケトンとセリ
ウム粒子の錯形成は、一般式(II)
[Chemical 2] (In the formula, R 1 and R 2 represent a substituted or unsubstituted alkyl group, and R 3 represents a hydrogen atom or a substituted or unsubstituted alkyl group having 1 to 3 carbon atoms), which is a β-diketone. Of CMP abrasives. The present invention also relates to the above CMP abrasive, wherein the complexing agent is acetylacetone. The present invention also relates to any of the above CMP abrasives, wherein the water-soluble polymer is at least one selected from the group consisting of water-soluble anionic surfactants and water-soluble nonionic surfactants. The present invention also provides a semiconductor chip on which a silicon oxide insulating film is formed by supplying a CMP abrasive containing cerium oxide particles, a water-soluble polymer, a complexing agent with cerium and water to a polishing pad on a polishing platen. The present invention relates to a method for polishing a substrate, which comprises bringing the surface to be polished into relative contact with the surface to be polished of the substrate and moving the polishing pad relatively to polish the surface of the substrate through the cerium oxide particles complexed on the surface. The complex formation of the β-diketone represented by the general formula (I) with the cerium particles is represented by the general formula (II).

【化3】 (式中、R、R及びRは一般式(I)におけると
同意義)で示される。このように酸化セリウム粒子表面
に錯形成すると、セリウム粒子表面を疎水性の有機官能
基が覆う形となるため、酸化珪素等の親水性の金属を表
面に有する膜との相互作用が低下し、酸化セリウム粒子
の酸化珪素膜表面への付着防止効果が発現すると推定さ
れる。
[Chemical 3] (In the formula, R 1 , R 2 and R 3 have the same meanings as in formula (I)). By complexing the surface of the cerium oxide particles in this manner, the surface of the cerium particles is covered with the hydrophobic organic functional group, so that the interaction with the film having a hydrophilic metal such as silicon oxide on the surface is reduced, It is presumed that the effect of preventing the cerium oxide particles from adhering to the surface of the silicon oxide film is exhibited.

【0008】[0008]

【発明の実施の形態】本発明における酸化セリウム粒子
は、炭酸塩、硝酸塩、硫酸塩、しゅう酸塩等のセリウム
化合物を焼成または酸化することによって得られる。本
発明の実施例において、酸化セリウム粉末を作製する方
法として焼成または過酸化水素等による酸化法が使用で
きる。焼成温度は350℃以上900℃以下が好まし
い。
BEST MODE FOR CARRYING OUT THE INVENTION The cerium oxide particles in the present invention are obtained by calcining or oxidizing a cerium compound such as carbonate, nitrate, sulfate and oxalate. In the examples of the present invention, firing or oxidation with hydrogen peroxide or the like can be used as a method for producing the cerium oxide powder. The firing temperature is preferably 350 ° C or higher and 900 ° C or lower.

【0009】上記の方法により製造された酸化セリウム
粒子は凝集しているため、機械的に粉砕することが好ま
しい。粉砕方法として、ジェットミル等による乾式粉砕
や遊星ビーズミル等による湿式粉砕方法が好ましい。ジ
ェットミルは例えば化学工業論文集第6巻第5号(19
80)527〜532頁に説明されている。
Since the cerium oxide particles produced by the above method are agglomerated, it is preferable to mechanically grind them. As the crushing method, a dry crushing method using a jet mill or a wet crushing method using a planetary bead mill is preferable. A jet mill is, for example, a collection of chemical industry papers Vol. 6 No. 5 (19
80) pp. 527-532.

【0010】CMP研磨剤は、上記方法で合成された酸
化セリウム粒子を洗浄し、水溶性高分子、セリウムとの
錯形成剤、水及び必要に応じて分散剤を加えた組成物を
分散させることによって得られる。洗浄は、遠心分離等
で固液分離を数回繰り返す方法等が使用できる。
The CMP abrasive is obtained by washing the cerium oxide particles synthesized by the above method and dispersing the composition containing a water-soluble polymer, a cerium complex-forming agent, water and, if necessary, a dispersant. Obtained by For washing, a method in which solid-liquid separation is repeated several times by centrifugation or the like can be used.

【0011】CMP研磨剤のpHは、3以上9以下であ
ることが好ましく、5以上8以下であることがより好ま
しい。pHが3未満では、化学的作用が小さくなり、研
磨速度が低下する。pHが9より大きいと、粒子が凝集
して被研磨膜との接触面積が低下し、研磨速度が低下す
る傾向がある。また、半導体チップ研磨に使用すること
から、アルカリ金属及びハロゲン類の含有率は酸化セリ
ウム粒子中10ppm以下に抑えることが好ましい。
The pH of the CMP abrasive is preferably 3 or more and 9 or less, and more preferably 5 or more and 8 or less. When the pH is less than 3, the chemical action becomes small and the polishing rate is lowered. When the pH is higher than 9, the particles tend to aggregate to reduce the contact area with the film to be polished and the polishing rate to decrease. Further, since it is used for polishing semiconductor chips, it is preferable to keep the content of alkali metals and halogens in the cerium oxide particles to 10 ppm or less.

【0012】水に分散させた酸化セリウム粒子は完全に
は1ヶずつバラバラになってはいないと一般に考えられ
ており、水に分散させた酸化セリウムの粒子径測定値
は、粉体状態でのSEM写真撮影等の方法を用いて得ら
れる1次粒子径測定値より大きくなる。
It is generally considered that the cerium oxide particles dispersed in water are not completely separated one by one, and the measured value of the particle diameter of cerium oxide dispersed in water is in a powder state. It is larger than the primary particle size measurement value obtained by using a method such as SEM photography.

【0013】水に分散させた酸化セリウムの2次粒子径
は、1nm以上300nm以下であることが望ましい。
2次粒子径が1nmより小さいと、砥粒として被研磨膜
への影響が低下し、研磨速度が低下する。2次粒子径が
300nmより大きいと、被研磨膜との接触面積が小さ
くなり、研磨速度が低下する傾向がある。粒子径は、光
子相関法(例えばマルバーン社製ゼータサイザー300
0HS)で測定する。
The secondary particle size of cerium oxide dispersed in water is preferably 1 nm or more and 300 nm or less.
If the secondary particle diameter is smaller than 1 nm, the effect of the abrasive grains on the film to be polished is reduced, and the polishing rate is reduced. When the secondary particle diameter is larger than 300 nm, the contact area with the film to be polished becomes small and the polishing rate tends to decrease. The particle size is determined by the photon correlation method (for example, Zetasizer 300 manufactured by Malvern Instruments Ltd.).
0HS).

【0014】また、酸化セリウムの1次粒子径は、0n
mより大きく300nm以下であることを要する。1次
粒子径が0nmでは、全く酸化珪素膜が研磨されない。
また、結晶子径が300nmより大きいと、2次粒子径
が300nmより大きくなり研磨速度が低下する。酸化
セリウム粒子の濃度に制限はないが、分散液の取り扱い
やすさから0.5重量%以上20重量%以下の範囲が好
ましい。
The primary particle diameter of cerium oxide is 0n.
It is necessary to be larger than m and 300 nm or less. When the primary particle size is 0 nm, the silicon oxide film is not polished at all.
If the crystallite size is larger than 300 nm, the secondary particle size will be larger than 300 nm and the polishing rate will decrease. The concentration of the cerium oxide particles is not limited, but is preferably in the range of 0.5% by weight or more and 20% by weight or less from the viewpoint of easy handling of the dispersion liquid.

【0015】水溶性高分子としては、ポリビニルスルホ
ン酸、ポリメタクリル酸、ポリスチレンスルホン酸、ポ
リアクリル酸、ポリアクリル酸誘導体、ポリ(4−ビニ
ルピリジニウム塩)、ポリ(1(3−スルホニル)−2
−ビニルピリジニウムベタイン−co−p−スチレンス
ルホン酸)、ポリビニルアルコール誘導体、ポリアクロ
レイン、ポリ(酢酸ビニル−co−メタクリル酸メチ
ル)、ポリ(スチレン−co−無水マレイン酸)、ポリ
(オレフィン−co−無水マレイン酸)、ポリアクリル
アミド部分加水分解物、ポリ(アクリルアミド−co−
アクリル酸)、アルギン酸、ポリアクリル酸メチル、ポ
リメタクリル酸メチル、及びポリアクリル酸もしくはポ
リメタクリル酸のアンモニウム塩、アミン塩もしくはカ
リウム塩等の水溶性陰イオン性界面活性剤;ポリビニル
ピロリドン等の水溶性非イオン性界面活性剤;から選ば
れた少なくとも1種を用いることができ、好ましくは、
ポリメタクリル酸、ポリアクリル酸、ポリビニルアルコ
ール誘導体、ポリアクリルアミド部分加水分解物、ポリ
(アクリルアミド−co−アクリル酸)、ポリアクリル
酸もしくはポリメタクリル酸のアンモニウム塩、アミン
塩を用いることができる。ここでアミン塩としてはN,
N−ジメチルアミノエタノールによる塩等が挙げられ
る。また、水溶性高分子の重量平均分子量(GPC測定
し、標準ポリスチレン換算した値)は、1,000〜1
00,000が好ましい。
As the water-soluble polymer, polyvinyl sulfonic acid, polymethacrylic acid, polystyrene sulfonic acid, polyacrylic acid, polyacrylic acid derivative, poly (4-vinylpyridinium salt), poly (1 (3-sulfonyl) -2
-Vinylpyridinium betaine-co-p-styrene sulfonic acid), polyvinyl alcohol derivative, polyacrolein, poly (vinyl acetate-co-methyl methacrylate), poly (styrene-co-maleic anhydride), poly (olefin-co- Maleic anhydride), polyacrylamide partial hydrolyzate, poly (acrylamide-co-
Acrylic acid), alginic acid, polymethyl acrylate, polymethyl methacrylate, and water-soluble anionic surfactants such as ammonium salts, amine salts or potassium salts of polyacrylic acid or polymethacrylic acid; water-soluble polyvinylpyrrolidone, etc. At least one selected from nonionic surfactants can be used, and preferably,
Polymethacrylic acid, polyacrylic acid, polyvinyl alcohol derivative, polyacrylamide partial hydrolyzate, poly (acrylamide-co-acrylic acid), ammonium salt of polyacrylic acid or polymethacrylic acid, and amine salt can be used. Here, the amine salt is N,
Examples thereof include salts with N-dimethylaminoethanol. The weight average molecular weight of the water-soluble polymer (value measured by GPC and converted into standard polystyrene) is 1,000 to 1
0,000 is preferred.

【0016】水溶性高分子のモノマー単位のモル数/水
溶性高分子と塩を作るアミンのモル数の比に特に制限は
ないが、研磨剤のpHを3以上9以下にする必要から、
10/7以上10/14以下であることが好ましい。水
溶性高分子は、その量が酸化セリウム粒子に対して1〜
3重量倍となるようにCMP研磨剤に混合する必要があ
る。1重量倍未満では水溶性高分子の効果が薄れ平坦化
特性が悪くなり、3重量倍を超えると、研磨速度が低く
なる傾向にある。また、水溶性高分子の濃度は、取り扱
い性、混合作業性等の点から1〜5重量であることが好
ましい。
The ratio of the number of moles of the monomer unit of the water-soluble polymer / the number of moles of the water-soluble polymer and the amine forming a salt is not particularly limited, but since the pH of the polishing agent must be 3 or more and 9 or less,
It is preferably 10/7 or more and 10/14 or less. The amount of the water-soluble polymer is 1 to the cerium oxide particles.
It is necessary to mix with the CMP polishing agent so that the amount is 3 times by weight. If it is less than 1 times by weight, the effect of the water-soluble polymer is weakened and the flattening property is deteriorated, and if it exceeds 3 times by weight, the polishing rate tends to be low. Further, the concentration of the water-soluble polymer is preferably 1 to 5 weight from the viewpoint of handleability, mixing workability and the like.

【0017】セリウムとの錯形成剤は、セリウムと錯形
成可能なものであれば特に制限はなく、例えば、α―ジ
ケトン、一般式(I)
The complexing agent with cerium is not particularly limited as long as it can form a complex with cerium, and examples thereof include α-diketone and general formula (I).

【化4】 (式中、R及びRは置換もしくは無置換アルキル基
を表し、Rは水素原子または炭素数が1〜3の置換も
しくは無置換アルキル基を表す)に示したβ―ジケト
ン、γ―ジケトン等のジケトン、エチレンジアミン、エ
チレンジアミン四酢酸等のジアミンなどから選ばれた少
なくとも1種を用いることができ、錯形成能力が高い点
でβ―ジケトンが好ましい。
[Chemical 4] (In the formula, R 1 and R 2 represent a substituted or unsubstituted alkyl group, and R 3 represents a hydrogen atom or a substituted or unsubstituted alkyl group having 1 to 3 carbon atoms). At least one selected from diketones such as diketone, diamines such as ethylenediamine and ethylenediaminetetraacetic acid can be used, and β-diketone is preferable from the viewpoint of high complex forming ability.

【0018】一般式(I)において、R及びRは置
換もしくは無置換アルキル基を表し、研磨剤水溶液とし
て取り扱うことを考慮すると、より極性で親水性となる
炭素数が1〜3であることが水への溶解度が高い点でよ
り好ましく、メチル基であることが特に好ましい。ま
た、Rは水素原子または炭素数が1〜3の置換もしく
は無置換アルキル基を表し、研磨剤水溶液として取り扱
うことを考慮すると、水素原子またはメチル基であるこ
とがより好ましく、水素原子が特に好ましい。すなわ
ち、R、Rがメチル基でありRがHである、2,
4−ペンタンジオン(慣用名:アセチルアセトン)が特
に好ましい。一般式(I)で示されるβ−ジケトンとセ
リウム粒子の錯形成は、一般式(II)
In the general formula (I), R 1 and R 2 each represent a substituted or unsubstituted alkyl group, and in consideration of handling as an aqueous polishing agent solution, the number of carbon atoms which becomes more polar and hydrophilic is 1 to 3. Is more preferable in terms of high solubility in water, and a methyl group is particularly preferable. Further, R 3 represents a hydrogen atom or a substituted or unsubstituted alkyl group having 1 to 3 carbon atoms, and in view of handling as an aqueous polishing agent solution, a hydrogen atom or a methyl group is more preferable, and a hydrogen atom is particularly preferable. preferable. That is, R 1 and R 2 are methyl groups and R 3 is H, 2,
4-Pentanedione (conventional name: acetylacetone) is particularly preferred. The complex formation of the β-diketone represented by the general formula (I) with the cerium particles is represented by the general formula (II).

【化5】 (式中、R、R及びR3は一般式(I)におけると
同意義)で示される。このように酸化セリウム粒子表面
に錯形成すると、セリウム粒子表面を疎水性の有機官能
基が覆う形となるため、酸化珪素等の親水性の金属を表
面に有する膜との相互作用が低下し、酸化セリウム粒子
の酸化珪素膜表面への付着防止効果が発現すると推定さ
れる。
[Chemical 5] (In the formula, R 1 , R 2 and R 3 have the same meanings as in formula (I)). By complexing the surface of the cerium oxide particles in this manner, the surface of the cerium particles is covered with the hydrophobic organic functional group, so that the interaction with the film having a hydrophilic metal such as silicon oxide on the surface is reduced, It is presumed that the effect of preventing the cerium oxide particles from adhering to the surface of the silicon oxide film is exhibited.

【0019】上記錯形成剤の濃度は、水への溶解性を考
慮して取り扱い性、混合作業性等の点から0.1重量%
以上10重量%以下であることを要し、0.5重量%以
上2重量%以下であることがより好ましい。0.1重量
%未満ではセリウムに対する添加量が不足して望ましい
研磨傷低減効果が得られない傾向があり、10重量%よ
り大きいと水への溶解性が低下する恐れがある。
The concentration of the above complex-forming agent is 0.1% by weight from the viewpoint of handleability, mixing workability, etc. in consideration of solubility in water.
It is necessary to be 10% by weight or less and more preferably 0.5% by weight or more and 2% by weight or less. If it is less than 0.1% by weight, the amount of cerium added is insufficient, and the desired effect of reducing polishing scratches tends not to be obtained. If it is more than 10% by weight, the solubility in water may decrease.

【0020】CMP研磨剤においては、必要に応じて研
磨剤に分散剤を加えて組成物を分散させたものを使用す
ることができる。分散剤としては、上述した水溶性高分
子の他、水溶性陰イオン性分散剤、水溶性非イオン性分
散剤、水溶性陽イオン性分散剤、水溶性両性分散剤から
選ばれた少なくとも1種類を含む2種類以上の分散剤を
使用することができる。
As the CMP abrasive, a composition in which a dispersant is added to the abrasive as necessary to disperse the composition can be used. As the dispersant, in addition to the above-mentioned water-soluble polymer, at least one selected from water-soluble anionic dispersants, water-soluble nonionic dispersants, water-soluble cationic dispersants, and water-soluble amphoteric dispersants. It is possible to use two or more dispersants including

【0021】水溶性陰イオン性分散剤としては、例え
ば、ラウリル硫酸トリエタノールアミン、ラウリル硫酸
アンモニウム、ポリオキシエチレンアルキルエーテル硫
酸トリエタノールアミン等が挙げられるが、後述するア
ニオン系水溶性高分子を用いてもよい。
Examples of the water-soluble anionic dispersant include lauryl sulfate triethanolamine, ammonium lauryl sulfate, polyoxyethylene alkyl ether sulfate triethanolamine, and the like. Anionic water-soluble polymers described later are used. Good.

【0022】水溶性非イオン性分散剤としては、例え
ば、ポリオキシエチレンラウリルエーテル、ポリオキシ
エチレンセチルエーテル、ポリオキシエチレンステアリ
ルエーテル、ポリオキシエチレンオレイルエーテル、ポ
リオキシエチレン高級アルコールエーテル、ポリオキシ
エチレンオクチルフェニルエーテル、ポリオキシエチレ
ンノニルフェニルエーテル、ポリオキシアルキレンアル
キルエーテル、ポリオキシエチレン誘導体、ポリオキシ
エチレンソルビタンモノラウレート、ポリオキシエチレ
ンソルビタンモノパルミテート、ポリオキシエチレンソ
ルビタンモノステアレート、ポリオキシエチレンソルビ
タントリステアレート、ポリオキシエチレンソルビタン
モノオレエート、ポリオキシエチレンソルビタントリオ
レエート、テトラオレイン酸ポリオキシエチレンソルビ
ット、ポリエチレングリコールモノラウレート、ポリエ
チレングリコールモノステアレート、ポリエチレングリ
コールジステアレート、ポリエチレングリコールモノオ
レエート、ポリオキシエチレンアルキルアミン、ポリオ
キシエチレン硬化ヒマシ油、アルキルアルカノールアミ
ド等が挙げられる。
Examples of the water-soluble nonionic dispersant include polyoxyethylene lauryl ether, polyoxyethylene cetyl ether, polyoxyethylene stearyl ether, polyoxyethylene oleyl ether, polyoxyethylene higher alcohol ether, polyoxyethylene octyl. Phenyl ether, polyoxyethylene nonylphenyl ether, polyoxyalkylene alkyl ether, polyoxyethylene derivative, polyoxyethylene sorbitan monolaurate, polyoxyethylene sorbitan monopalmitate, polyoxyethylene sorbitan monostearate, polyoxyethylene sorbitan tri Stearate, polyoxyethylene sorbitan monooleate, polyoxyethylene sorbitan trioleate, tetrao Inoxy acid polyoxyethylene sorbit, polyethylene glycol monolaurate, polyethylene glycol monostearate, polyethylene glycol distearate, polyethylene glycol monooleate, polyoxyethylene alkylamine, polyoxyethylene hydrogenated castor oil, alkyl alkanolamide, etc. To be

【0023】水溶性陽イオン性分散剤としては、例え
ば、ココナットアミンアセテート、ステアリルアミンア
セテート等が挙げられ、水溶性両性分散剤としては、例
えば、ラウリルベタイン、ステアリルベタイン、ラウリ
ルジメチルアミンオキサイド、2−アルキル−N−カル
ボキシメチル−N−ヒドロキシエチルイミダゾリニウム
ベタイン等が挙げられる。
Examples of the water-soluble cationic dispersant include coconut amine acetate and stearyl amine acetate, and examples of the water-soluble amphoteric dispersant include lauryl betaine, stearyl betaine, lauryl dimethylamine oxide, and 2 -Alkyl-N-carboxymethyl-N-hydroxyethyl imidazolinium betaine and the like can be mentioned.

【0024】これらの分散剤添加量は、分散性及び沈降
防止、さらに研磨傷と分散剤添加量との関係から酸化セ
リウム粒子100重量部に対して、0.01重量部以上
2.0重量部以下の範囲が好ましい。これらの酸化セリ
ウム粒子を水中に分散させる方法としては、通常の攪拌
機による分散処理の他にホモジナイザー、超音波分散
機、湿式ボールミルなどを用いることができる。
The amount of these dispersants added is 0.01 parts by weight or more and 2.0 parts by weight or more with respect to 100 parts by weight of the cerium oxide particles in view of dispersibility and prevention of sedimentation, and the relationship between polishing scratches and the amount of the dispersants added. The following range is preferable. As a method for dispersing these cerium oxide particles in water, a homogenizer, an ultrasonic disperser, a wet ball mill, or the like can be used in addition to the usual dispersion treatment using a stirrer.

【0025】CMP研磨剤を用いて研磨する対象である
無機絶縁膜の作製方法として、定圧CVD法、プラズマ
CVD法等が挙げられる。
As a method for producing an inorganic insulating film to be polished with a CMP polishing agent, a constant pressure CVD method, a plasma CVD method and the like can be mentioned.

【0026】定圧CVD法による酸化珪素絶縁膜形成
は、Si源としてモノシラン:SiH 、酸素源として
酸素:Oを用いる。このSiH−O系酸化反応を
400℃程度以下の低温で行わせることにより得られ
る。高温リフローによる表面平坦化を図るためにリン:
Pをドープするときには、SiH−O−PH系反
応ガスを用いることが好ましい。
Silicon oxide insulating film formation by constant pressure CVD method
Is a monosilane as a Si source: SiH Four, As an oxygen source
Oxygen: OTwoTo use. This SiHFour-OTwoSystem oxidation reaction
Obtained by performing at a low temperature of about 400 ° C or less
It Phosphorus for surface flattening by high temperature reflow:
When doping P, SiHFour-OTwo-PHThreeAntithesis
It is preferable to use a reactive gas.

【0027】プラズマCVD法は、通常の熱平衡下では
高温を必要とする化学反応が低温でできる利点を有す
る。プラズマ発生法には、容量結合型と誘導結合型の2
つが挙げられる。反応ガスとしては、Si源としてSi
、酸素源としてNOを用いたSiH−NO系
ガスとテトラエトキシシラン(TEOS)をSi源に用
いたTEOS−O系ガス(TEOS−プラズマCVD
法)が挙げられる。基板温度は250℃〜400℃、反
応圧力は67〜400Paの範囲が好ましい。酸化珪素
絶縁膜にはリン、ホウ素等の元素がド−プされていても
良い。
The plasma CVD method has an advantage that a chemical reaction that requires a high temperature under normal thermal equilibrium can be performed at a low temperature. There are two types of plasma generation methods, capacitive coupling type and inductive coupling type.
One is. As the reaction gas, Si as the Si source
H 4, SiH 4 -N 2 O-based gas and TEOS-O 2 based gas using tetraethoxysilane (TEOS) to Si source using N 2 O as oxygen source (TEOS-plasma CVD
Law). The substrate temperature is preferably 250 ° C. to 400 ° C., and the reaction pressure is preferably 67 to 400 Pa. Elements such as phosphorus and boron may be doped in the silicon oxide insulating film.

【0028】同様に、低圧CVD法による窒化珪素膜形
成は、Si源としてジクロルシラン:SiHCl
窒素源としてアンモニア:NHを用いる。このSiH
Cl−NH系酸化反応を900℃の高温で行わせ
ることにより得られる。プラズマCVD法は、Si源と
してSiH、窒素源としてNHを用いたSiH
NH系ガスが挙げられる。基板温度は300〜400
℃が好ましい。
Similarly, for forming a silicon nitride film by the low pressure CVD method, dichlorosilane: SiH 2 Cl 2 as a Si source,
Ammonia: NH 3 is used as a nitrogen source. This SiH
The 2 Cl 2 -NH 3 based oxidation reaction can be obtained by performed at a high temperature of 900 ° C.. In the plasma CVD method, SiH 4 − using SiH 4 as a Si source and NH 3 as a nitrogen source is used.
NH 3 based gas may be used. Substrate temperature is 300-400
C is preferred.

【0029】基板として、図1(a)(b)に示す様
に、半導体基板すなわち回路素子と配線パターンが形成
された段階の半導体基板、回路素子が形成された段階の
半導体基板等の半導体基板上に酸化珪素膜或いは酸化珪
素膜及び窒化珪素膜が形成された基板が使用できる。こ
のような半導体基板上に形成された酸化珪素膜層を上記
研磨剤で研磨することによって、酸化珪素膜層表面の凹
凸を解消し、半導体基板全面に渡って平滑な面とする。
As the substrate, as shown in FIGS. 1A and 1B, a semiconductor substrate, that is, a semiconductor substrate at a stage where a circuit element and a wiring pattern are formed, a semiconductor substrate at a stage where a circuit element is formed, and the like. A substrate having a silicon oxide film or a silicon oxide film and a silicon nitride film formed thereon can be used. By polishing the silicon oxide film layer formed on such a semiconductor substrate with the above-mentioned polishing agent, unevenness on the surface of the silicon oxide film layer is eliminated, and a smooth surface is formed over the entire surface of the semiconductor substrate.

【0030】具体的には、酸化セリウム粒子、水溶性高
分子、セリウムとの錯形成剤及び水を含むCMP研磨剤
を研磨定盤上の研磨パッドに供給し、酸化珪素絶縁膜が
形成された半導体チップである基板の被研磨面と接触さ
せて被研磨面と研磨パッドを相対運動させて、表面に錯
形成した酸化セリウム粒子を介して基板表面を研磨す
る。
Specifically, a CMP abrasive containing cerium oxide particles, a water-soluble polymer, a complexing agent with cerium, and water was supplied to a polishing pad on a polishing platen to form a silicon oxide insulating film. The surface of the substrate, which is a semiconductor chip, is brought into contact with the surface of the substrate and the polishing pad is moved relatively to polish the surface of the substrate through the cerium oxide particles complexed on the surface.

【0031】シャロー・トレンチ分離の場合には、酸化
珪素膜層の凹凸を解消しながら下層の窒化珪素層まで研
磨することによって、素子分離部に埋め込んだ酸化珪素
膜のみを残す。この際、ストッパーとなる窒化珪素との
研磨速度比が大きければ、研磨のプロセスマージンが大
きくなる。また、シャロー・トレンチ分離に使用するた
めには、研磨時に傷発生が少ないことも必要である。
In the case of shallow trench isolation, the lower silicon nitride layer is polished while eliminating the irregularities of the silicon oxide film layer, leaving only the silicon oxide film embedded in the element isolation portion. At this time, if the polishing rate ratio with respect to the silicon nitride serving as the stopper is large, the polishing process margin becomes large. Further, in order to use for shallow / trench separation, it is also necessary that the number of scratches generated during polishing is small.

【0032】ここで、研磨する装置としては、半導体基
板を保持するホルダーと研磨布(パッド)を貼り付けた
(回転数が変更可能なモータ等を取り付けてある)定盤
を有する一般的な研磨装置が使用できる。図2は本発明
において使用するCMP装置を示す概略図である。研磨
定盤18の上に貼り付けられた研磨パッド17の上に、
酸化セリウム粒子、水溶性高分子、セリウムとの錯形成
剤及び水を含むCMP研磨剤を供給し、半導体チップで
ある基板13に形成された酸化珪素絶縁膜14を被研磨
面としてウエハホルダ11に貼り付け、酸化珪素絶縁膜
14を研磨パッドと接触させ、被研磨面と研磨パッドを
相対運動、具体的にはウエハホルダ11と研磨定盤18
を回転させてCMPすなわち基板の研磨を行う構造とな
っている。
Here, as a polishing apparatus, a general polishing having a holder for holding a semiconductor substrate and a surface plate to which a polishing cloth (pad) is attached (a motor or the like whose rotation speed is changeable is attached) is used. The device can be used. FIG. 2 is a schematic diagram showing a CMP apparatus used in the present invention. On the polishing pad 17 attached on the polishing platen 18,
CMP abrasive containing cerium oxide particles, water-soluble polymer, complexing agent with cerium and water is supplied, and the silicon oxide insulating film 14 formed on the substrate 13 which is a semiconductor chip is attached to the wafer holder 11 as the surface to be polished. Then, the silicon oxide insulating film 14 is brought into contact with the polishing pad to relatively move the surface to be polished and the polishing pad, specifically, the wafer holder 11 and the polishing platen 18.
Is rotated to perform CMP, that is, polishing of the substrate.

【0033】研磨パッドとしては、一般的な不織布、発
泡ポリウレタン、多孔質フッ素樹脂などが使用でき、特
に制限がない。また、研磨パッドには研磨剤が溜まる様
な溝加工を施すことが好ましい。研磨条件には制限はな
いが、定盤の回転速度は半導体が飛び出さない様に10
0min−1以下の低回転が好ましい。被研磨膜を有す
る半導体基板の研磨パッドへの押しつけ圧力が10〜1
00kPaであることが好ましく、研磨速度のウエハ面
内均一性及びパターンの平坦性を満足するためには、2
0〜50kPaであることがより好ましい。研磨してい
る間、研磨パッドには研磨剤をポンプ等で連続的に供給
する。この供給量には制限はないが、研磨パッドの表面
が常に研磨剤で覆われていることが好ましい。
As the polishing pad, general nonwoven fabric, foamed polyurethane, porous fluororesin, etc. can be used without any particular limitation. Further, it is preferable that the polishing pad is grooved so that the polishing agent is accumulated. There are no restrictions on the polishing conditions, but the rotation speed of the surface plate is 10 so that the semiconductor does not jump out.
A low rotation speed of 0 min -1 or less is preferable. The pressing pressure of the semiconductor substrate having the film to be polished against the polishing pad is 10 to 1
00 kPa is preferable, and in order to satisfy the uniformity of the polishing rate in the wafer surface and the flatness of the pattern, 2
It is more preferably 0 to 50 kPa. During polishing, a polishing agent is continuously supplied to the polishing pad by a pump or the like. Although there is no limitation on the supply amount, it is preferable that the surface of the polishing pad is always covered with the abrasive.

【0034】また、図3は本発明におけるCMPプロセ
スを示す図である。研磨パッドの表面状態を常に同一に
してCMPを行うため、CMPの前に研磨パッドのコン
ディショニング工程を入れる。具体的には、ダイヤモン
ド粒子のついたドレッサを用いて少なくとも水を含む液
で研磨を行う。続いて本発明の研磨工程を実施し、さら
に、 1)研磨後の基板に付着した粒子等の異物を除去するた
めのブラシ洗浄、 2)研磨剤等を水に置換するためのメガソニック洗浄、 3)基板表面から水を除去するためのスピン乾燥、 からなるウエハ洗浄工程を加える。
FIG. 3 is a diagram showing the CMP process in the present invention. In order to perform CMP with the surface state of the polishing pad always the same, a polishing pad conditioning step is inserted before CMP. Specifically, polishing is performed with a liquid containing at least water using a dresser with diamond particles. Subsequently, the polishing step of the present invention is performed, and further, 1) brush cleaning for removing foreign matters such as particles attached to the substrate after polishing, 2) megasonic cleaning for replacing the polishing agent with water, 3) Add a wafer cleaning step consisting of spin drying for removing water from the substrate surface.

【0035】研磨終了後の半導体基板は、流水中で良く
洗浄後、スピンドライヤ等を用いて半導体基板上に付着
した水滴を払い落としてから乾燥させることが好まし
い。このようにして、Si基板上にシャロー・トレンチ
分離を形成したあと、酸化珪素絶縁膜層及びその上にア
ルミニウム配線を形成し、その上に形成した酸化珪素絶
縁膜を平坦化する。平坦化された酸化珪素絶縁膜層の上
に、第2層目のアルミニウム配線を形成し、その配線間
および配線上に再度上記方法により酸化珪素膜を形成
後、上記研磨剤を用いて研磨することによって、酸化珪
素絶縁膜表面の凹凸を解消し、半導体基板全面に渡って
平滑な面とする。この工程を所定数繰り返すことによ
り、所望の層数の半導体を製造する。
It is preferable that the semiconductor substrate after the polishing is thoroughly washed in running water, and then water droplets adhering to the semiconductor substrate are removed by using a spin dryer or the like and then dried. Thus, after forming the shallow trench isolation on the Si substrate, the silicon oxide insulating film layer and the aluminum wiring are formed thereon, and the silicon oxide insulating film formed thereon is flattened. A second layer of aluminum wiring is formed on the flattened silicon oxide insulating film layer, and a silicon oxide film is formed again between the wirings and on the wiring by the above method, and then polished with the above polishing agent. As a result, the unevenness on the surface of the silicon oxide insulating film is eliminated and the entire surface of the semiconductor substrate is made smooth. By repeating this process a predetermined number of times, a semiconductor having a desired number of layers is manufactured.

【0036】CMP研磨剤は、半導体基板に形成された
酸化珪素膜や窒化珪素膜だけでなく、所定の配線を有す
る配線板に形成された酸化珪素膜、ガラス、窒化珪素等
の無機絶縁膜、フォトマスク・レンズ・プリズムなどの
光学ガラス、ITO等の無機導電膜、ガラス及び結晶質
材料で構成される光集積回路・光スイッチング素子・光
導波路、光ファイバ−の端面、シンチレ−タ等の光学用
単結晶、固体レ−ザ単結晶、青色レ−ザ用LEDサファ
イア基板、SiC、GaP、GaAS等の半導体単結
晶、磁気ディスク用ガラス基板、磁気ヘッド等の基板を
研磨するために使用される。
The CMP abrasive is not only a silicon oxide film or a silicon nitride film formed on a semiconductor substrate, but also a silicon oxide film formed on a wiring board having a predetermined wiring, an inorganic insulating film such as glass or silicon nitride, Optical glass such as photomasks, lenses and prisms, inorganic conductive films such as ITO, optical integrated circuits, optical switching elements and optical waveguides composed of glass and crystalline materials, optical fiber end faces, optics such as scintillators It is used for polishing substrates such as semiconductor single crystals for lasers, solid-state lasers single crystals, LED sapphire substrates for blue lasers, semiconductor single crystals for SiC, GaP, GaAs, etc., glass substrates for magnetic disks, magnetic heads, etc. .

【0037】[0037]

【実施例】以下、実施例により本発明を説明する。EXAMPLES The present invention will be described below with reference to examples.

【0038】実施例1 (添加液Aの作製)重量平均分子量6000で、アンモ
ニウムイオンのモル数/ポリアクリル酸中のカルボキシ
ル基のモル数=1のポリアクリル酸アンモニウム塩を脱
イオン水で希釈し、3重量%の水溶液(添加液A)とし
た。
Example 1 (Preparation of Additive A) A polyacrylic acid ammonium salt having a weight average molecular weight of 6000 and a molar number of ammonium ions / a molar number of carboxyl groups in polyacrylic acid = 1 was diluted with deionized water. A 3% by weight aqueous solution (additive solution A) was used.

【0039】(添加液Bの作製)炭酸セリウム水和物2
kgを白金製容器に入れ、850℃で2時間空気中で焼
成することにより黄白色の酸化セリウム粒子を約1kg
得た。上記作製の酸化セリウム粒子1kg、アセチルア
セトン10g、ポリアクリル酸アンモニウム塩水溶液
(重量平均分子量15000、40重量%)23g及び
脱イオン水8967gを混合し、撹拌しながら超音波分
散を10分間施した。得られたスラリーを1μmフィル
ターを介してろ過し、さらに脱イオン水を加えて2倍に
希釈した(酸化セリウム粒子濃度5重量%)。
(Preparation of Additive Liquid B) Cerium Carbonate Hydrate 2
1 kg of yellow-white cerium oxide particles by putting 1 kg in a platinum container and baking in air at 850 ° C. for 2 hours.
Obtained. 1 g of the cerium oxide particles prepared above, 10 g of acetylacetone, 23 g of an aqueous solution of ammonium polyacrylate (weight average molecular weight: 15,000, 40% by weight) and 8967 g of deionized water were mixed and ultrasonically dispersed for 10 minutes while stirring. The obtained slurry was filtered through a 1 μm filter, and deionized water was further added to dilute it twice (cerium oxide particle concentration 5% by weight).

【0040】(研磨剤の作製)上記の添加液A/添加液
B/脱イオン水の重量比2/1で混合し、酸化セリウム
粒子濃度1.7重量%、ポリマ濃度2重量%のCMP研
磨剤を作成した。研磨剤のpHは6.8であった。研磨
剤原液を用いる光子相関法により2次粒子径を測定した
ところ、その中央値は270nmであった。
(Preparation of Abrasive) CMP polishing with the above additive solution A / additive solution B / deionized water in a weight ratio of 2/1 and a cerium oxide particle concentration of 1.7% by weight and a polymer concentration of 2% by weight. The agent was created. The pH of the polishing agent was 6.8. When the secondary particle diameter was measured by a photon correlation method using an abrasive stock solution, the median value was 270 nm.

【0041】(絶縁膜層及びシャロートレンチ分離層の
研磨)8インチSi基板上にLine/Space幅が
0.05〜5mmで高さが1000nmのAl配線Li
ne部を形成した後、その上にTEOS−プラズマCV
D法で酸化珪素膜を2000nm形成した絶縁膜層パタ
ーンウエハを作製する。上記のCMP研磨剤で、3分間
研磨(定盤回転数:50min−1、研磨荷重:30k
Pa、研磨剤供給量:200ml/分)した。その結
果、研磨後の凸部と凹部の段差が40nmとなり高平坦
性を示した。
(Polishing of Insulating Film Layer and Shallow Trench Separation Layer) Al wiring Li having a Line / Space width of 0.05 to 5 mm and a height of 1000 nm is formed on an 8-inch Si substrate.
After forming the ne portion, TEOS-plasma CV is formed on the ne portion.
An insulating film layer patterned wafer having a silicon oxide film formed to a thickness of 2000 nm is manufactured by the D method. Polished for 3 minutes with the above CMP polishing agent (plate rotation number: 50 min −1 , polishing load: 30 k
Pa, abrasive supply rate: 200 ml / min). As a result, the step difference between the convex portion and the concave portion after polishing was 40 nm, which showed high flatness.

【0042】また、図1(a)に示す様に、8インチS
i基板に一辺350nm〜0.1mm四方の凸部、深さ
が400nmの凹部を形成し、凸部密度がそれぞれ2〜
40%となるようなシャロートレンチ分離層パターンウ
エハを作製した。続いて図1(b)に示す様に、凸部上
に酸化窒素膜を100nm形成し、その上にTEOS−
プラズマCVD法で酸化珪素膜を600nm成膜した。
上記のCMP研磨剤で、このパターンウエハを2分間研
磨(定盤回転数:50min−1、研磨荷重:30kP
a、研磨剤供給量:200ml/分)した。その結果、
図1(c)の様に、凸部の研磨は窒化珪素膜でストップ
し、研磨後の段差は40nmとなり、高平坦性を示し
た。いずれの研磨においても研磨傷は観察されなかっ
た。
Further, as shown in FIG. 1 (a), 8 inches S
An i substrate is formed with a convex portion having a side of 350 nm to 0.1 mm square and a concave portion having a depth of 400 nm, and the convex portion density is 2 to 2, respectively.
A shallow trench isolation layer pattern wafer having a 40% content was produced. Subsequently, as shown in FIG. 1B, a nitric oxide film having a thickness of 100 nm is formed on the convex portion, and TEOS- is formed thereon.
A silicon oxide film having a thickness of 600 nm was formed by the plasma CVD method.
This patterned wafer was polished for 2 minutes with the above CMP polishing agent (plate rotation number: 50 min −1 , polishing load: 30 kP
a, supply amount of abrasive: 200 ml / min). as a result,
As shown in FIG. 1C, polishing of the convex portion was stopped by the silicon nitride film, and the step difference after polishing was 40 nm, which showed high flatness. No polishing scratches were observed in any polishing.

【0043】(絶縁膜層ブランケットウエハの研磨)次
に、8インチの酸化珪素膜ブランケットウエハ及び窒化
珪素ブランケットウエハを上記のCMP研磨剤で各々研
磨(定盤回転数:50min−1、研磨荷重:30kP
a、研磨剤供給量:200ml/分)した。研磨後、ウ
エハをホルダーから取り外して、脱イオン水を流しなが
らPVAスポンジブラシで洗浄した。洗浄後、ウエハを
スピンドライヤー上で1000min−1で1分間回転
させて水滴を除去した。最後にレーザー散乱式異物検査
装置を用いて乾燥済みウエハ表面の異物を数えた。
(Polishing of Insulating Film Layer Blanket Wafer) Next, an 8-inch silicon oxide film blanket wafer and a silicon nitride blanket wafer were each polished with the above CMP polishing agent (plate rotation speed: 50 min −1 , polishing load: 30 kP
a, supply amount of abrasive: 200 ml / min). After polishing, the wafer was removed from the holder and washed with a PVA sponge brush while flowing deionized water. After cleaning, the wafer was rotated on a spin dryer at 1000 min −1 for 1 minute to remove water droplets. Finally, the number of foreign substances on the dried wafer surface was counted using a laser scattering type foreign substance inspection device.

【0044】その結果、酸化珪素膜については、研磨速
度が150nm/分、0.2μm以上の異物はウエハ1
枚当たり30個であった。また、窒化珪素膜について
は、研磨速度が5nm/分となり、0.2μm以上の異
物はウエハ1枚当たり50個であった。また、いずれの
研磨においても研磨傷は観察されなかった。
As a result, with respect to the silicon oxide film, the polishing rate is 150 nm / min, and foreign matters of 0.2 μm or more are detected on the wafer 1.
It was 30 per sheet. Further, with respect to the silicon nitride film, the polishing rate was 5 nm / min, and the number of foreign matters of 0.2 μm or more was 50 per wafer. Further, no polishing scratch was observed in any polishing.

【0045】実施例2 (研磨剤の作製)実施例1の添加液Bの作製において使
用するアセチルアセトンの量を10g→1000gと
し、それに伴い脱イオン水の量を8967g→7977
gとすること以外は、実施例1と同一にしてCMP研磨
剤を作製した。研磨剤のpHは6.6で、2次粒子径の
中央値は250nmであった。
Example 2 (Preparation of Abrasive) The amount of acetylacetone used in the preparation of the additive liquid B of Example 1 was changed from 10 g to 1000 g, and the amount of deionized water was accordingly changed from 8967 g to 7977.
A CMP polishing slurry was produced in the same manner as in Example 1 except that the amount was g. The pH of the abrasive was 6.6, and the median secondary particle diameter was 250 nm.

【0046】(絶縁膜層及びシャロートレンチ分離層の
研磨)上記の通り作製したCMP研磨剤を用いて、実施
例1と同一の絶縁膜層パターンウエハを、同一の研磨条
件で5分間研磨した。その結果、研磨後の凸部と凹部の
段差が55nmとなった。
(Polishing of Insulating Film Layer and Shallow Trench Separation Layer) Using the CMP polishing agent prepared as described above, the same insulating film layer patterned wafer as in Example 1 was polished under the same polishing conditions for 5 minutes. As a result, the step difference between the convex portion and the concave portion after polishing was 55 nm.

【0047】また、上記のCMP研磨剤を用いて、実施
例1と同様にシャロートレンチ分離層パターンウエハの
凸部上に酸化窒素膜を100nm形成しその上にTEO
S−プラズマCVD法で酸化珪素膜を600nm成膜し
たものを実施例1と同一の研磨条件で4分間研磨した。
その結果、研磨後の段差は42nmとなり高平坦性を示
した。いずれの研磨においても研磨傷は観察されなかっ
た。
Further, using the above CMP abrasive, a nitric oxide film having a thickness of 100 nm was formed on the convex portion of the shallow trench isolation layer pattern wafer in the same manner as in Example 1, and TEO was formed thereon.
A silicon oxide film having a thickness of 600 nm formed by the S-plasma CVD method was polished for 4 minutes under the same polishing conditions as in Example 1.
As a result, the step difference after polishing was 42 nm, which showed high flatness. No polishing scratches were observed in any polishing.

【0048】(絶縁膜層ブランケットウエハの研磨)次
に、実施例1と同一の8インチ酸化珪素膜ブランケット
ウエハ及び窒化珪素膜ブランケットウエハについても上
記のCMP研磨剤を用いて実施例1と同一の研磨条件で
各々研磨した。
(Polishing of Insulating Film Layer Blanket Wafer) Next, the same 8-inch silicon oxide film blanket wafer and silicon nitride film blanket wafer as in Example 1 were also processed in the same manner as in Example 1 by using the above CMP abrasive. Each was polished under the polishing conditions.

【0049】その結果、酸化珪素膜については、研磨速
度が80nm/分、0.2μm以上の異物はウエハ1枚
当たり20個であった。また、窒化珪素膜については、
研磨速度が6nm/分となり、0.2μm以上の異物は
ウエハ1枚当たり40個であった。また、いずれの研磨
においても研磨傷は観察されなかった。
As a result, with respect to the silicon oxide film, the polishing rate was 80 nm / min, and the number of foreign matters of 0.2 μm or more was 20 per wafer. Regarding the silicon nitride film,
The polishing rate was 6 nm / min, and there were 40 foreign matters of 0.2 μm or more per wafer. Further, no polishing scratch was observed in any polishing.

【0050】比較例1 (研磨剤の作製)実施例1の添加液Bの作製において使
用するアセチルアセトンを10g→0となくすこと、及
びそれに伴い脱イオン水の量を8967g→8977g
とすること以外は、実施例1と同一にしてCMP研磨剤
を作製した。研磨剤のpHは6.8で、2次粒子径の中
央値は280nmであった。
Comparative Example 1 (Preparation of Abrasive) The amount of acetylacetone used in the preparation of the additive liquid B of Example 1 was eliminated from 10 g to 0, and accordingly, the amount of deionized water was 8967 g to 8977 g.
A CMP polishing slurry was produced in the same manner as in Example 1 except that The pH of the abrasive was 6.8, and the median secondary particle diameter was 280 nm.

【0051】(絶縁膜層及びシャロートレンチ分離層の
研磨)上記の通り作製したCMP研磨剤を用いて、実施
例1と同一の絶縁膜層パターンウエハを、同一の研磨条
件で3分間研磨した。その結果、研磨後の凸部と凹部の
段差が45nmとなった。
(Polishing of Insulating Film Layer and Shallow Trench Separation Layer) Using the CMP polishing agent prepared as described above, the same insulating film layer patterned wafer as in Example 1 was polished for 3 minutes under the same polishing conditions. As a result, the step difference between the convex portion and the concave portion after polishing was 45 nm.

【0052】また、上記のCMP研磨剤を用いて、実施
例1と同様にシャロートレンチ分離層パターンウエハの
凸部上に酸化窒素膜を100nm形成しその上にTEO
S−プラズマCVD法で酸化珪素膜を600nm成膜し
たものを実施例1と同一の研磨条件で2分間研磨した。
その結果、研磨後の段差は40nmとなり高平坦性を示
した。いずれの研磨においても研磨傷は観察されなかっ
た。
Further, using the above CMP abrasive, a nitric oxide film having a thickness of 100 nm was formed on the convex portion of the shallow trench isolation layer pattern wafer in the same manner as in Example 1, and TEO was formed thereon.
A silicon oxide film having a thickness of 600 nm formed by the S-plasma CVD method was polished for 2 minutes under the same polishing conditions as in Example 1.
As a result, the step difference after polishing was 40 nm, indicating high flatness. No polishing scratches were observed in any polishing.

【0053】(絶縁膜層ブランケットウエハの研磨)次
に、実施例1と同一の8インチ酸化珪素膜ブランケット
ウエハ及び窒化珪素膜ブランケットウエハについても上
記のCMP研磨剤を用いて実施例1と同一の研磨条件で
各々研磨した。
(Polishing of Insulating Film Layer Blanket Wafer) Next, the same 8-inch silicon oxide film blanket wafer and silicon nitride film blanket wafer as in Example 1 were also processed in the same manner as in Example 1 using the above CMP abrasive. Each was polished under the polishing conditions.

【0054】その結果、酸化珪素膜については、研磨速
度が160nm/分、0.2μm以上の異物はウエハ1
枚当たり200個であった。また、窒化珪素膜について
は、研磨速度が6nm/分となり、0.2μm以上の異
物はウエハ1枚当たり200個であった。また、研磨に
よる研磨傷については、酸化珪素膜ブランケットウエハ
においてのみわずかに傷が観察された。
As a result, with respect to the silicon oxide film, the polishing rate is 160 nm / min, and foreign matter of 0.2 μm or more is removed from the wafer 1.
It was 200 pieces per sheet. For the silicon nitride film, the polishing rate was 6 nm / min, and there were 200 foreign particles of 0.2 μm or more per wafer. Regarding polishing scratches due to polishing, slight scratches were observed only on the silicon oxide film blanket wafer.

【0055】セリウムとの錯形成剤濃度が0.1重量%
以上10.0重量%以下である酸化セリウム粒子、水溶
性高分子、セリウムとの錯形成剤及び水を含むCMP研
磨剤を用いた実施例1に対して比較例1は、研磨速度に
関しては同等であるが、研磨後の洗浄による異物すなわ
ち粒子除去性能が劣る。また、研磨傷に関しても、実施
例1は比較例1に優っており、高研磨速度、高平坦化
性、低研磨傷の両立が可能であることが分かった。
The concentration of the complexing agent with cerium is 0.1% by weight.
Comparative Example 1 is equivalent in polishing rate to Example 1 using a CMP abrasive containing 10.0% by weight or less of cerium oxide particles, a water-soluble polymer, a complexing agent with cerium and water. However, the performance of removing foreign matters, that is, particles by cleaning after polishing is poor. Regarding polishing scratches, Example 1 was superior to Comparative Example 1, and it was found that high polishing rate, high flatness, and low polishing scratches were compatible.

【0056】[0056]

【発明の効果】請求項1〜4記載の発明は、研磨後の洗
浄における粒子除去性能を向上させ、高い研磨速度、高
平坦性を有し、かつ研磨傷を低減することのできる研磨
剤を提供するものである。請求項5記載の発明は、研磨
後の洗浄における粒子除去性能を向上させ、高い研磨速
度、高平坦性を有し、かつ研磨傷を低減することので
き、歩留まり、作業性の優れたものである。
The invention according to claims 1 to 4 provides a polishing agent which improves particle removal performance in cleaning after polishing, has a high polishing rate and high flatness, and can reduce polishing scratches. It is provided. The invention according to claim 5 improves particle removal performance in cleaning after polishing, has a high polishing rate and high flatness, and can reduce polishing scratches, and is excellent in yield and workability. is there.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の基板表面の凹凸平坦化を示す説明図で
ある。
FIG. 1 is an explanatory view showing flattening of unevenness on a substrate surface of the present invention.

【図2】本発明を実施したCMP装置を示す図である。FIG. 2 is a diagram showing a CMP apparatus embodying the present invention.

【図3】本発明のCMPプロセスを示す説明図である。FIG. 3 is an explanatory diagram showing a CMP process of the present invention.

【符号の説明】[Explanation of symbols]

1 Si基板 2 窒化珪素膜 3 酸化珪素膜 11 ウエハホルダ 12 リテーナ 13 半導体チップである基板 14 酸化珪素絶縁膜 15 研磨剤供給機構 16 酸化セリウム粒子、水溶性高分子、セリウムとの
錯形成剤及び水を含む研磨剤 17 研磨パッド 18 研磨定盤
1 Si Substrate 2 Silicon Nitride Film 3 Silicon Oxide Film 11 Wafer Holder 12 Retainer 13 Semiconductor Chip Substrate 14 Silicon Oxide Insulating Film 15 Abrasive Supplying Mechanism 16 Cerium Oxide Particles, Water-Soluble Polymer, Complexing Agent with Cerium and Water Polishing agent including 17 Polishing pad 18 Polishing surface plate

Claims (5)

【特許請求の範囲】[Claims] 【請求項1】 酸化セリウム粒子、水溶性高分子、セリ
ウムとの錯形成剤及び水を含みセリウムとの錯形成剤濃
度が0.1重量%以上10.0重量%以下であるCMP
研磨剤。
1. A CMP containing cerium oxide particles, a water-soluble polymer, a complexing agent with cerium, and water, and the concentration of the complexing agent with cerium is 0.1% by weight or more and 10.0% by weight or less.
Abrasive.
【請求項2】 錯形成剤が一般式(I) 【化1】 (式中、R及びRは置換もしくは無置換アルキル基
を表し、Rは水素原子または炭素数が1〜3の置換も
しくは無置換アルキル基を表す)で示されるβ―ジケト
ンである請求項1記載のCMP研磨剤。
2. The complexing agent has the general formula (I): (Wherein R 1 and R 2 represent a substituted or unsubstituted alkyl group, and R 3 represents a hydrogen atom or a substituted or unsubstituted alkyl group having 1 to 3 carbon atoms). Item 1. The CMP abrasive according to Item 1.
【請求項3】 錯形成剤がアセチルアセトンである請求
項1又は2記載のCMP研磨剤。
3. The CMP abrasive according to claim 1, wherein the complexing agent is acetylacetone.
【請求項4】 水溶性高分子が水溶性陰イオン性界面活
性剤及び水溶性非イオン性界面活性剤からなる群選ばれ
る少なくとも1種である請求項1から3に記載のいずれ
かのCMP研磨剤。
4. The CMP polishing according to claim 1, wherein the water-soluble polymer is at least one selected from the group consisting of water-soluble anionic surfactants and water-soluble nonionic surfactants. Agent.
【請求項5】 酸化セリウム粒子、水溶性高分子、セリ
ウムとの錯形成剤及び水を含むCMP研磨剤を研磨定盤
上の研磨パッドに供給し、酸化珪素絶縁膜が形成された
半導体チップである基板の被研磨面と接触させて被研磨
面と研磨パッドを相対運動させて、表面に錯形成した酸
化セリウム粒子を介して基板表面を研磨することを特徴
とする基板の研磨方法。
5. A semiconductor chip on which a silicon oxide insulating film is formed by supplying a CMP abrasive containing cerium oxide particles, a water-soluble polymer, a complexing agent with cerium and water to a polishing pad on a polishing platen. A method for polishing a substrate, which comprises bringing the surface to be polished into contact with the surface to be polished of a substrate and moving the polishing pad relative to each other to polish the surface of the substrate through cerium oxide particles complexed on the surface.
JP2001197275A 2001-06-28 2001-06-28 Cmp abrasive and method for polishing substrate Pending JP2003017445A (en)

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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7071105B2 (en) 2003-02-03 2006-07-04 Cabot Microelectronics Corporation Method of polishing a silicon-containing dielectric
CN100411110C (en) * 2003-05-12 2008-08-13 株式会社上睦可 Slurry composition for chemical-mechanical polishing capable of compensating nanotopography effect and method for planarizing surface of semiconductor device using same
JP2011129211A (en) * 2009-12-18 2011-06-30 Showa Denko Kk Method for manufacturing magnetic recording medium, and magnetic recording and playback device
JP4872919B2 (en) * 2005-11-11 2012-02-08 日立化成工業株式会社 Polishing agent for silicon oxide, additive liquid and polishing method
CN104974714A (en) * 2014-04-03 2015-10-14 昭和电工株式会社 Polishing composition and method for polishing substrate using the same

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JPH10310766A (en) * 1997-05-14 1998-11-24 Fujimi Inkooporeetetsudo:Kk Grinding composition
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Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7071105B2 (en) 2003-02-03 2006-07-04 Cabot Microelectronics Corporation Method of polishing a silicon-containing dielectric
US8486169B2 (en) 2003-02-03 2013-07-16 Cabot Microelectronics Corporation Method of polishing a silicon-containing dielectric
CN100411110C (en) * 2003-05-12 2008-08-13 株式会社上睦可 Slurry composition for chemical-mechanical polishing capable of compensating nanotopography effect and method for planarizing surface of semiconductor device using same
JP4872919B2 (en) * 2005-11-11 2012-02-08 日立化成工業株式会社 Polishing agent for silicon oxide, additive liquid and polishing method
JP2012044197A (en) * 2005-11-11 2012-03-01 Hitachi Chem Co Ltd Polishing agent for silicon oxide, additive liquid and method for polishing
CN102965025A (en) * 2005-11-11 2013-03-13 日立化成工业株式会社 Polishing agent for silicon oxide, liquid additive, and method of polishing
JP2011129211A (en) * 2009-12-18 2011-06-30 Showa Denko Kk Method for manufacturing magnetic recording medium, and magnetic recording and playback device
CN104974714A (en) * 2014-04-03 2015-10-14 昭和电工株式会社 Polishing composition and method for polishing substrate using the same
JP2015196826A (en) * 2014-04-03 2015-11-09 昭和電工株式会社 Polishing composition, and method for polishing substrate using the polishing composition

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