JP2003008976A - Digital still camera - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a digital device the operation of which is controlled by a controller and the interruption of power of which is made by the controller and which is reset by method causing no sense of incongruity to a user. SOLUTION: A discrimination device monitors selection of an OFF operation by a switch and a normal operation/abnormity operation of the controller and when the switch is turned off for a period in a hang-up state so, the controller is reset.

Description

Description: BACKGROUND OF THE INVENTION [0001] 1. Field of the Invention [0002] The present invention relates to a reset method when a CPU goes out of control and falls into a hang-up state, and in particular, the number of operation switches of a digital still camera or the like is reduced. The present invention relates to a technology effective when applied to a small number of electronic devices. 2. Description of the Related Art In recent years, portable devices such as digital still cameras, information devices, and the like have been increasing in number of products requiring advanced processing. Hereinafter, the CPU will be referred to as “CPU”). On the other hand, the program processing of the CPU is complicated, and the time required for commercialization of the product is short, so that there is a possibility that a “bug” such as a hang-up may occur. In many cases, it will be released. Therefore, in the above products, C
It is common to provide a CPU reset means for resetting the PU. A dedicated reset switch is provided as one of the CPU reset means as described above. When an abnormal state such as a hang-up occurs, the user presses the dedicated reset switch to reset the CPU. There is a known way to do this. Further, as another means, a method of resetting the CPU by simultaneously pressing a plurality of switches other than the power switch, or a method of simultaneously pressing the power switch and another switch and setting two switches for a certain period of time. There is known a method of resetting a CPU when pressed. A counter circuit is provided, and a CPU is provided.
Resets the counter periodically when the
When U becomes abnormal, a reset operation is not performed, and a so-called watchdog timer that detects an abnormal state by exceeding a certain counter number is known. [0007] However, the CPU
In the method of providing a dedicated switch as a resetting means, providing a dedicated switch inevitably causes an increase in the cost of the product, and also requires a device that impairs the appearance design or cannot be easily pressed. There was a problem that becomes. According to a method of simultaneously pressing a plurality of switches as the CPU reset means, the above-mentioned problem can be solved. However, for example, two keys are simultaneously pressed in a key input of a word processor or the like. Since the operation is generally performed, resetting the CPU by simultaneously pressing two switches easily causes an erroneous operation. For this reason, the method of simultaneously pressing a plurality of switches as the CPU reset means has a problem that its application is difficult unless the product has three or more operation switches. Further, the determination as to whether or not a reset is required is left to the judgment of the user. For this reason, the user is forced to reset due to an erroneous judgment, and the data being processed is lost. there were. Further, reset by the watchdog timer is reset means for automatic recovery. Therefore, the watchdog timer reset is suitable for a product such as a surveillance camera which is assumed to operate constantly, but is not suitable for a product used by general consumers. The present invention has been made to solve the above-mentioned problems of the prior art, and an object of the present invention is to provide a CPU.
In the reset method of the above, the user operates the C
An object of the present invention is to provide a technology that enables a PU to be reset. Another object of the present invention is to provide a method for resetting a CPU, which can prevent the data being processed from being destroyed even if the reset switch is pressed by mistake during normal operation. It is to provide a new technology.
The above and other objects and novel features of the present invention will become apparent from the description of the present specification and the accompanying drawings. Means for Solving the Problems Of the inventions disclosed in the present application, the outline of a representative one will be briefly described.
It is as follows. In a digital device in which the operation of the device is controlled by the control device and the power is turned off by the control device, the selection of the OFF operation by the switch and the normal operation / abnormal operation of the control device are monitored by the determination device. When the control device is in the hang-up state and the switch is
If it is FF, reset the control device. Embodiments of the present invention will be described below with reference to the drawings. In all the drawings for describing the embodiments of the present invention, components having the same functions are denoted by the same reference numerals, and their repeated description will be omitted. FIG. 1 is a schematic block diagram of a digital still camera according to an embodiment of the present invention. 100 is a digital still camera. 101 is a lens, lens 1
01, a subject image is input. A subject image input through the lens 101 is input to a CCD solid-state imaging device 102.
Is converted into an analog electric signal. The analog electric signal is converted into a digital signal by the analog-to-digital conversion circuit 103. The digital signal is subjected to image processing such as white balance by the digital signal processor 104, and a digital image is created. This digital image is converted into an image compression circuit (JPE).
G) At 105, the data amount is compressed and stored as a JPEG image in a recording medium 106 such as a smart media or a compact flash (trade name, the same applies hereinafter). The stored JPEG image is stored in the recording medium 106.
Is taken out of the digital still camera 100, read out using a personal computer or the like, and displayed and printed. Alternatively, in a state where the recording medium 106 is built in the digital still camera 100, data is transferred using a communication method such as USB and is taken into a personal computer or the like. 107 is a USB interface. Reference numeral 108 denotes a motor for driving a zoom lens, a focus lens, and the like of the lens 101. Reference numeral 109 denotes a monitor which can check a captured image, a reproduced image, and the like. Also,
The user operates the key 110 to operate the digital still camera 1.
Operate 00. 10 is a central processing unit (hereinafter referred to as CP
In U), the operation of the digital still camera 100 is controlled by monitoring the key operation by the user. Reference numeral 111 denotes a power supply circuit. Although the connection is omitted in FIG. 1, the necessary voltage is applied to each circuit.
Supplied from The digital still camera 100
The battery 112 is used as a power supply. As the battery 112, a primary battery such as an alkaline battery and a secondary battery such as a lithium ion battery are used. The power supply circuit 111 is in an OFF state during standby, and when turned on by a user operation, supplies a voltage generated by the power supply circuit to each block, and the system including the CPU 10 starts up. When the photographing is ended and the OFF operation is performed, the CPU 10 recognizes this and turns off the power supply circuit 111. If an OFF operation is performed before the image data is stored in the recording medium 106, such as immediately after photographing, the CPU 10 waits for the image data to be stored in the recording medium 106 before the CPU 10 Turn off circuit 111
I do. FIG. 2 is a block diagram related to the power supply of the digital still camera. 10 is a central processing unit (CP
U) controls the operation of the digital still camera. Reference numeral 12 denotes a mode dial. The user of the digital still camera operates (rotates) the mode dial 12 to set the operation mode of the digital still camera. Reference numeral 13 denotes a voltage dividing resistor circuit. The mode dial 12 and the voltage dividing resistance circuit 13 are electrically connected, and a specific voltage is input to the mode dial 12. The CPU 10 has an analog-to-digital conversion circuit input unit (hereinafter, AD conversion input) ADC, and inputs the voltage value selected by the mode dial 12 to the AD conversion input ADC. The CPU 10 detects the operation mode set by the user by referring to the voltage value input to the AD conversion input ADC. Next, the starting operation will be described using the case where the mode dial 12 is switched from OFF to photographing. In FIG. 2, reference numeral 14 denotes an ON / OFF detection circuit. The ON / OFF detection circuit 14 monitors the output voltage from the mode dial 12. A flip-flop circuit 15 outputs a signal for turning on / off the power supply circuit 111. The voltage VB is directly supplied from the battery 112 to the voltage dividing resistance circuit 13, the ON / OFF detection circuit 14, the flip-flop circuit 15, and the power supply circuit 111. These circuits are necessary to activate the power supply circuit 111,
Therefore, it is necessary that the voltage is always supplied from the power supply. When the mode dial 12 is turned from OFF to photographing, the ON / OFF detection circuit 14
It is detected that the switch has been turned on based on the change in the voltage from 3 and the output a is set to 1. Since 1 is set to the set terminal S of the flip-flop circuit 15, the output Q outputs 1.
When the ON / OFF input becomes 1, the power supply circuit 111 is turned ON.
In this state, the power supply circuit 111 outputs the power supply voltage VDD. When the power supply voltage VDD is output, the CPU 10 and
The power supply voltage VDD is supplied to the other peripheral circuits, and the digital still camera 100 starts. After a certain start-up operation, the CPU 10 refers to the voltage from the mode dial 12 with the AD conversion input ADC, recognizes that the mode is the shooting mode, and enters a shooting state. Next, the termination operation will be described. When the mode dial 12 is set to OFF, the CPU 10
A change in voltage is detected by the conversion input ADC, and a predetermined end process is performed by recognizing that the mode is the OFF mode. Thereafter, the general-purpose port PO1 is set to 1, the reset terminal R of the flip-flop circuit 15 is reset, the output Q of the flip-flop circuit 15 is set to 0, and the power supply circuit 111 is turned off.
State. As a result, the output of the power supply voltage VDD is cut off, and the operation of the CPU 10 and other peripheral circuits ends. The general-purpose port PO2 of the CPU 10
Used for key scan. The digital still camera 10 requires many switches such as a zoom key, macro switching, and strobe setting. When the general-purpose port of the CPU 10 is insufficient, switch detection is performed by a key scan method. The key scan signal is output from the CPU 10 at regular intervals. The key scan signal is a signal formed and output by the CPU 10 through programming. In the circuit shown in FIG. 2, for some reason C
If the PU 10 hangs up, a problem occurs that the power supply circuit 111 cannot be turned off even if the mode dial 12 is turned off. That is, the voltage indicating the OFF mode is supplied from the mode dial 12 to the AD conversion input A.
Even if input to DC, the CPU 10 is hung up, and cannot recognize that there is the OFF mode.
A signal for turning off the power supply circuit 111 cannot be output from the general-purpose port PO1. In this case, the only way to escape from the hang-up state is to remove the battery 112 from the digital still camera 100 or wait until the battery 112 is exhausted. FIG. 3 shows a circuit for preventing hang-up of the CPU 10. Reference numeral 20 denotes a hang-up countermeasure circuit which includes a determination circuit 21 and an OR circuit 22. ON for the judgment circuit 21
The output b of the / OFF detection circuit 14 and the key scan output are input. The judgment circuit 21 is an ON / OFF detection circuit 14
When the output b is 1 indicating OFF and the key scan signal is not input for a certain period, the determination output is output to the OR circuit 22. When the determination output is 1, 1 is set from the OR circuit 22 to the reset terminal R of the flip-flop circuit 15, and thus the output Q outputs 0. The power supply circuit 111 is ON /
When the OFF input becomes 0, the power is turned off and the CPU 10 and other peripheral circuits are turned off. During normal operation, the output of the general-purpose port PO1 of the CPU 10 is connected to one input of the OR circuit 22, and the power supply circuit 111 is turned off by the CPU 10.
It is also possible. FIG. 4 shows a schematic circuit diagram of the determination circuit 21 and a timing chart. 23 is a flip-flop circuit. When the digital still camera is in the ON state (the position of the mode dial is other than OFF), since 0 is output from the output b of the ON / OFF detection circuit 14, the negative logic set terminal / S of the flip-flop circuit 23 is set,
The output Q becomes 1, and the diode 25 becomes non-conductive. On the other hand, since the diode 24 is in a conductive state, it is ON / OFF.
When the output b of the detection circuit 14 is 0, the judgment output is always 0. Next, the operation at the time of normal termination will be described. Time t
The mode dial is turned off by 1 and turned on / off.
When the output b of the detection circuit 14 changes from 0 to 1, the diode 24 is turned off and the diode 25 is also turned off, so that the capacitor 27 is charged by the resistor 26 and the charging voltage is gradually increased. Note that the capacitor 2
The time constant of the resistor 7 and the resistor 26 is set sufficiently longer than the key scan period T. For this reason, the charging voltage is set so that the determination output does not become high level during about one cycle of the key scan. For example, if the key scan cycle T is performed at 10 ms, the charging time constant is 1
It is about 00 ms. At time t2 when the first key scan pulse is input after t1, the flip-flop circuit 23 inputs the rising edge of the key scan pulse to the clock terminal CK. When the input of the clock terminal CK changes from 0 to 1, the data terminal D is connected to GND, so that the flip-flop circuit 23 holds the value of the data terminal D and the output Q becomes 0. When the output Q becomes 0, the diode 25 conducts and the capacitor 27 discharges instantaneously. As described above, the time from time t1 to t2 is the key scan period T
Therefore, the charging voltage is low, and the value of the determination output is 0 from time t1 to t2. Thereafter, the flip-flop circuit 23 latches 0 at each rising edge of the key scan pulse, and the output Q holds 0. Therefore, the diode 25 continues to conduct and the determination output remains 0.
That is, since the output of the determination circuit 21 is 0 during normal operation, the control for turning off the power supply circuit 111 is performed by the CPU 10.
Of the general control by the general-purpose port PO1. Next, the operation at the time of a hang-up will be described. When the mode dial is turned off at time t1 and the output b of the ON / OFF detection circuit 14 changes from 0 to 1 at the time t1, charging of the capacitor 27 starts at time t1. However, since the CPU 10 has already hung up, the key scan output from the general-purpose port PO2 has stopped at 0 or 1. Therefore, the value input to the clock terminal CK of the flip-flop circuit 23 does not change, so that the output Q of the flip-flop circuit 23 does not change to 1. Therefore, the voltage charged in the capacitor 27 continues to increase, and the judgment output eventually changes from 0 to 1. That is, at the time of hang-up, 1
Output, the power supply circuit 111 can be turned off. Although a description has been given of the case where a key scan pulse is used to determine the hang-up state, if a periodic pulse-like signal output from the CPU 10 and the output is stopped when the CPU 10 hangs up, the hang-up state is detected. It can be used to determine the up state. Of course, even an output from a single circuit that monitors the hang-up of the CPU 10 can be used. Although the flip-flop circuit is used in the determination circuit of FIG. 4, the determination circuit is not limited to the flip-flop circuit. As in the rectifying circuit shown in FIG. 5, a high level is output during key scan output,
While the key scan is stopped, a circuit that outputs a GND level can be used. In FIG. 5, reference numeral 28 denotes a capacitor through which the AC component of the key scan signal passes. 29 and 30 are diodes having a rectifying function. 31 is a charging capacitor
32 is a discharge resistor. FIG. 6 shows an outer shape of a digital still camera 100 according to an embodiment of the present invention. Mode dial 12
Are provided at positions where the user can easily operate. Conventionally, it is natural for a user to turn off the power when he or she feels an abnormality in the operation. However, in a digital device, even when the power switch is turned off, the control circuit often turns off the power circuit. In this case, even if the control circuit hangs up and the user feels an abnormality and turns off the power switch, the control circuit hangs up and the power supply circuit cannot be turned off. Therefore, a reset switch is separately provided in the digital device to deal with a hang-up of the control circuit. However, since the operation of the reset switch is not familiar to home appliances, the present invention in which the control circuit is reset by turning off the power switch is effective. FIG. 7 shows a telephone as an embodiment in which the present invention is applied to home electric appliances. In FIG. 7, reference numeral 200 denotes a telephone. The telephone 200 has a function of an image input device, and includes a lens 101, an image sensor 102, and a digital signal processor 104. Also, the monitor 109
Can display an image. Further, image information and the like can be recorded on the recording medium 106 as needed. 211 is a communication control circuit. The communication control circuit 211 includes a communication line 22
0 is connected. In the communication control circuit 211, the communication line 2
Necessary control is performed according to the rules for each 20. The telephone 200 includes a power supply circuit 111 and a battery 112. The battery 112 is used for backup at the time of a power failure. Therefore, even if the home power supply is turned off, much of the data in telephone 200 is stored by the backup battery. Therefore, the control circuit 21
If 0 hangs up, an external reset is required. Reference numeral 212 denotes a handset, and reference numeral 213 denotes a hook detection circuit. The hook detection circuit 213 detects whether the hook is on-hook or off-hook. When the control circuit 210 hangs up, for example, it is detected that the on-hook state is longer than a predetermined period, and the control circuit 210 is reset. Note that the above-described circuit can be used as the determination circuit and the like. When a problem occurs in the telephone 200 due to the image displayed on the monitor 109 being frozen or the like, the user puts the receiver on the hook and puts the telephone in the on-hook state. It is natural to talk for a certain period of time and then end the call in an on-hook state. Therefore, the on-hook state, which means the end of the operation of the telephone 200, and the reset of the control circuit are linked, and the reset operation can be performed reliably, preventing a failure that would occur if the user forgets the reset operation. It is possible to do. The effects obtained by typical aspects of the invention disclosed in the present application will be briefly described as follows. According to the present invention, the control circuit is reset by the natural action of the user to turn off the power, and a reset method that does not make the user feel uncomfortable as compared with a reset method such as pressing a reset button. Is feasible. According to the present invention, the act of turning off the power is linked with the act of resetting, so that the operation of the device expected to be terminated by turning off the power is reliably performed, and the abnormal operation of the device due to a hang-up, Failure due to heat generation or the like can be prevented.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram showing a schematic configuration of a digital still camera according to an embodiment of the present invention. FIG. 2 is a block diagram showing a power supply unit of the digital still camera according to the embodiment of the present invention. FIG. 3 is a block diagram showing a power supply unit of the digital still camera according to the embodiment of the present invention. FIG. 4 is a schematic circuit diagram and a timing chart showing a determination circuit of the digital still camera according to the embodiment of the present invention. FIG. 5 is a schematic circuit diagram showing a determination circuit of the digital still camera according to the embodiment of the present invention. FIG. 6 is a schematic perspective view showing an outer shape of a digital still camera according to an embodiment of the present invention. FIG. 7 is a block diagram showing a schematic configuration showing an outer shape of the telephone according to the embodiment of the present invention. [Description of Signs] 10 CPU, 12 mode dial, 13 voltage dividing resistor circuit, 14 ON / OFF detection circuit, 15 flip-flop circuit, 20 hang-up handling circuit, 21 determination circuit, 22 OR Circuit, 23 ... flip-flop circuit,
24, 25 ... diode, 26 ... resistor, 27, 28 ... capacitor, 29, 30 ... diode, 31 ... capacitor, 32 ... resistor, 33 ... AND circuit, 100 ... digital still camera, 101 ... lens, 102 ... CCD solid state imaging Element, 103 AD conversion circuit, 104 Digital signal processor, 105 JPEG conversion circuit, 106
Recording media 107 USB interface 108
... Motor, 109 ... Monitor, 110 ... Key, 111 ... Power circuit, 112 ... Battery, 200 ... Telephone, 210 ... Control circuit, 211 ... Communication control circuit, 212 ... Handset, 21
3: hook detection circuit, 220: communication line,

Claims (1)

1. A control device, an image input circuit, a power supply circuit whose output is stopped by a signal from the control device, and a power supply O
A switch for selecting an FF, and a determination device for inputting a pulse signal of a constant cycle output by the control device, wherein the determination device determines that the input of the pulse signal is in a state where the switch is selected to be OFF. A digital still camera, which outputs a signal for resetting a control device after stopping for a certain period of time.