JP2002516525A - Explicit rate marking for flow control in ATM networks - Google Patents

Abstract

(57) [Summary] The explicit rate marking system includes a virtual bandwidth value generation module and an explicit rate value generation module. The virtual bandwidth value generation module includes: an available bandwidth capacity value; an explicit rate value associated with each bottleneck virtual circuit where the switching node (12) forms part of a path (13); 12) generates a virtual bandwidth value reflecting the minimum cell rate value associated with each non-bottleneck virtual circuit forming part of path (13). An explicit rate value generation module relates to the virtual bandwidth value and the minimum cell rate value associated with the virtual circuit and another virtual circuit in which the switching node (12) forms part of a path (13). To generate the explicit rate value.

Description

DETAILED DESCRIPTION OF THE INVENTION

FIELD OF THE INVENTION [0001] The present invention relates generally to the field of digital communication systems, and in particular, for example,
A digital network for facilitating communication of digital data within a digital image, audio and video distribution system, and between digital computer systems. The present invention provides a method, in particular, where a message transfer path is provided with various classes of transfer services, such as a chaotic available bit rate service, and based on congestion along the path between the source device and the destination device. Relates to digital networks that provide a mechanism that allows the network to control the rate at which it sends messages over the network.

BACKGROUND OF THE INVENTION Digital networks have been developed to facilitate the transfer of information, such as data and programs, between computer systems and other digital devices. Various types of networks have been developed and implemented using various information transfer methodologies. In networks that transfer information using the well-known "ATM" (asynchronous transfer mode) transfer methodology, communications are handled through a mesh of switching nodes. In an ATM network, computer systems and other devices provide a variety of switching nodes to provide information to be transferred over the network as a source of information and / or to receive information from the network as a destination. Connected to. Information is transferred over paths called "virtual paths" and "virtual circuits" that are established through switching nodes that make up the network. Virtual circuits through an ATM network can be assigned to various types of service classes. The class of service controls the rate at which information is transferred in the form of "cells." In some service classes, the virtual circuit is guaranteed a maximum rate at which information can be transferred. Other service classes, on the other hand, provide an "Available Bit Rate" (ABR) service that guarantees each virtual circuit a minimum information transfer rate called the "minimum cell rate" (MCR), and a virtual circuit with a guaranteed maximum rate Allows the use of bandwidth not allocated to For virtual circuits given a guaranteed maximum rate, the sources already know the rate at which they can send information.

However, for virtual circuits associated with the ABR service class, the rate at which a source can transmit can be a number of factors, including, but not limited to,
It changes based on the congestion condition at the destination and the congestion condition at each switching node along each path from the source to the destination. To facilitate notifying each source of a virtual circuit that is using the highest rate ABR service class that each source can transfer on the virtual circuit, the source may use the MCR assigned to the virtual circuit. The “Resource Management” (RM) cell that contains it is transmitted periodically on the virtual circuit. When a destination receives an RM cell, the destination sends the RM cell back along the virtual circuit and back to the destination. The destination can include in the reverse RM cell an explicit rate value indicating the maximum rate at which the source can transmit information. Each switching node along the path can also determine the maximum rate at which information can be sent to the source. And if that rate is lower than the explicit rate contained in the reverse RM cell,
The node may replace the rate as an explicit rate value in the reverse RM cell. Thus, when the source receives a reverse RM cell, the explicit rate contained therein is the maximum value generated by the destination and all switching nodes along the path defined by the virtual circuit. .

SUMMARY OF THE INVENTION The present invention provides a new and improved system for performing explicit rate marking of resource management (RM) cells in an ATM network, referred to herein as a virtual bandwidth explicit rate marking system. Provide a way.

[0005] Briefly stated, the present invention provides an explicit rate marking system used in connection with a switching node to generate an explicit rate value for use in a resource management cell associated with a virtual circuit in an ATM network. I do. The explicit rate marking system includes a virtual bandwidth value generation module and an explicit rate value generation module. The virtual bandwidth value generation module includes: an available bandwidth capacity value; an explicit rate value associated with each bottleneck virtual circuit in which the switching node forms part of a path; and the switching node forms part of a path. A virtual bandwidth value is generated reflecting the minimum cell rate value associated with each non-bottleneck virtual circuit to be implemented. An explicit rate value generation module, wherein the explicit rate value is related to the virtual bandwidth value and the minimum cell rate value associated with another virtual circuit in which the virtual circuit and the switching node form part of a path. Generate

[0006] The invention is pointed out by the specificity of the appended claims. The above and different advantages of the present invention will be better understood with reference to the following description taken in conjunction with the accompanying drawings.

FIG. 1 is a block diagram of an ATM constructed in accordance with the present invention that includes a system for performing explicit rate marking for flow control in an ATM network using a virtual bandwidth-based methodology. 1 schematically shows a network. Referring to FIG. 1, network 10 includes a plurality of switching nodes 11 (1) -11 (5) (generally identified by reference numeral 11 (n)). These are multiple devices 1
2 (1) to 12 (10) (generally identified by reference numeral 12 (m)) for transferring signals representing data. Device 12 (m) is any of a number of types of devices, for example, a digital computer system, other network, customer premises equipment, and the like. In these operations, one device 12 (m _S ) (the subscript “S” indicates “source”) is designated as the source device by another, destination, device 12 (m _D ) ( The subscript “D” indicates “destination (destination)”. The address,
The transferred information needs to be used for its operation. Each device 12 (m)
Connected to switching node 11 (n) over a communication link generally identified by reference numeral 13 (j) to facilitate transmitting data to or receiving data therefrom. Switching nodes 11 (n) are also interconnected by communication links, also generally identified by reference numeral 13 (j), to facilitate data transfer therebetween. Communication link 13 (j) can use any convenient data transmission medium. In one embodiment, the transmission medium of each communication link 13 (j) is selected to make up one or more fiber optic links. To enable switching nodes 11 (n) to transmit and receive signals between each other and on the same link as devices 12 (m) connected thereto, each communication link 13 (
j) is preferably bidirectional. In embodiments where communication link 13 (j) is an optical fiber link, two optical fibers are provided for each communication link 13 (j), each optical fiber facilitating one-way transfer of an optical signal.

In one embodiment, network 10 transfers data using the well-known “ATM” (Asynchronous Transfer Mode) transfer methodology. This methodology is described in Partridge, Gigabit Networking, Rea
ding MA: Addison Wesley Publishing Company, 1994), Chapters 3 and 4, and McDysan et al., "ATM Theory and Applications" (D. McDysan, et al., ATM Theory And
Application, McGraw Hill, 1995) and will not be described in detail below. Generally, with reference to FIG. 2, in an ATM methodology, device 12 (m) and switching node 11 (n) transmit data in the form of fixed length "cells". In the ATM data transfer methodology, a packet 20 transmitted from the source device 12 (m _S ) to the destination device 12 (m _D )
2 (m _S ) allocates the data packet 20 to a plurality of “cells” identified by CELL (1) to CELL (I) (generally identified by “CELL (i)”). This is for transmitting data serially on the communication link 13 (j) and starting transfer to the network 10. Each cell includes a header part HEADER (i) and a data part DATA (i). The header part HEADER (i) contains circuit information for controlling cell transfer over the network 10 and the data part DATA (i) contains data from the packet 20. The data portion DATA (i) of each cell has a predetermined fixed length (48 bytes in one embodiment).
Therefore, if the amount of data in the packet 20 is not an integer multiple of the size of the data portion DATA (i) of each cell, then to ensure that the final data portion DATA (i) has the required length: source device 12 _{(m S)} embeds the data into the final data portion dATA (i).

As described above, when the source device 12 (m _S ) sequentially transmits a series of cells CELL (1) to CELL (i) generated from the packet 20, the network 10 transmits the cells CELL (1) to CELL (i). , In the order in which they are transmitted to the destination device 12 (m _D ). Destination device 12 (m _D ) must receive all cells sent by source device 12 (m _S ) in order to reconstruct packet 20. In the ATM transfer methodology described above, since the cells do not include ordering information, the destination device 12 (m _D ) determines the appropriate order for reconstructing the packet 20 from the order of the received cells. The last cell CELL (i) contains the set end of the packet flag, indicated by EOP in FIG. 2, to indicate that it is the last cell of the packet.

As described further, the header portion HEADER (i) contains “virtual circuit” information that controls the transfer of cells on the network 10. Each switching node 11 (n) uses the virtual circuit information for cell CELL (j) received on the incoming communication link to transmit that cell to the next switching node or destination device 12 (m _D ). Identify the outgoing communication link. Packet 20
, The virtual circuit information in the header HEADER (i) of the cell CELL (i) is the same, but different for the cells associated with different packets. Although the destination device 12 (m _D ) receives the cells generated for the unusual packet 20 in the order of the data in that packet, at the same time it receives several source devices 12 ( The cell received in an interleaved manner from the network 10 oriented to m _s ) is received. The virtual circuit information in each CELL (i) allows the destination device 12 (m _D ) to determine the packet 20 with which the cell is associated.

The cells are transferred using the ATM ABR (Available Bit Rate) service.
Virtual circuit as described above with respect to FIG. 2 for transferring data.
In addition to cells, the network 10 also includes a respective source device 12 (m_S ) Are used by them to regulate the rate at which cells are transmitted on each virtual circuit.
Transfer resource management ("RM") cells to carry the flow control information used. one
Generally, device 12 (m) is the source device 12 (m_S) For each virtual circuit
The device 12 (m_S) Periodically sends the destination device 12 (m_D ) To the RM cell. Destination device 12 (m_D) Indicates that an RM cell has been received.
To transmit it (ie, the RM cell) on the virtual circuit in the reverse direction,
12 (m_S). The RM cell is the source device 12 (m_S) From the destination device
Chair 12 (m_D) When traversing the path to the “forward” RM cell (“F
RM ”) and the destination device 12 (m_D) To the source device 12 (m _S ) When traversing the path to the "backward" RM cell ("BRM").
Devour. Destination device 12 (m_D) And the destination device 12 (m_D) From source
Vise 12 (m_S) Along the path of the virtual circuit to each switching node 11 (n
) Can give flow control information to the BRM cell. Destination device 12 (
m_D) Or the flow control information given from the switching node 11 (n)
For example, each destination device 12 (m_D) Or switching node 11 (
n), etc., reflects the degree of congestion. The flow control information service is
Vise 12 (m_S) Is the minimum cell rate (“MCR”)
It is more restrictive. This minimum cell rate is assigned to the virtual circuit.
Source device 12 (m_S) Sends a FRM cell,
(That is, the source device 12 (m_S)) Is included in the FRM cell
.

Typically, the switching node 11 (n) generates flow control information when receiving a BRM cell for a virtual circuit, and transmits a lower cell transmission than indicated in the received BRM cell. A rate may be determined whether the flow control information indicates. If not shown, the switching node 11 (n) transmits a BRM cell with the same flow control information as the one received. On the other hand, when the switching node 11 (n) determines that the flow control information generated by the switching node 11 (n) indicates a lower cell transmission rate than indicated in the received BRM cells, the switching node 11 (n) switches the BRM cells. Before transmitting, it replaces the received flow control information in the BRM cell with the flow control information it generates. In this manner, when the source device 12 (m _S ) receives the BRM cell, the flow control information indicates that the switching device 1 has received the BRM cell and the destination device 12 (m _D ).
1 (n), thus reflecting the minimum value of the flow control information, and thus the minimum value for the virtual circuit. The present invention provides an explicit rate marking system for generating an explicit rate marking system used by switching node 11 (n) to generate flow control information contained in a BRM cell.

The switching nodes 11 (n) making up the network 10 all have substantially the same configuration as described with reference to FIG. Referring to FIG. 3, each switching node 11 (n) has an input interface 30, a buffer 32, and an output interface 34, all under the control of a control element 35. To facilitate two-way communication, input interface 30 and output interface 34 are connected to all communication links 13 (p). This communication link 13 (
For p), the switching node 11 (n) is connected and the network 10
Signal transmission / reception to / from another switching node within the device 12 or the device 12 (m) to which the switching node 11 (n) is connected is promoted. Communication link 13
In the case of the embodiment described above in which (p) takes the form of an optical fiber, the input interface 30 is connected to a special communication link, namely the input communication link 13 (p) (i), through which the switching node 11 ( n) receives the optical signal. Also,
The output interface 34 is connected to another communication link, that is, the output communication link 13 (p).
(O), through which the switching nodes transmit optical signals. Each incoming communication link 13 (p) (i) constitutes an outgoing communication link through which devices 12 (m) or other switching nodes in network 11 transmit signals, and each outgoing communication link 13 (p) (O) is understood to constitute an input communication link through which devices 12 (m) or other switching nodes in the network 11 receive signals.

As mentioned above, the present invention is included in the control element 35 of each switching node 11 (n) and forms an explicit rate marking system 3 which forms part of it.
6 is provided. The explicit rate marking system 36 is for generating flow control information contained in the received RBM cell. The explicit rate marking system 36 is described with reference to the network 10 where five virtual circuits are established between each source device and destination device, as follows.

(I) Communication links 13 (1) to 13 (4) between the source device 12 (1) and the destination device 12 (6) through the switching nodes 11 (1) to 11 (4).
, 13 (5) and 13 (1) have a virtual circuit (1) of 10 (in arbitrary units)
Has CR.

(Ii) Communication links 13 (1), 13 () between the source device 12 (2) and the destination device 12 (7) through the switching nodes 11 (1) and 11 (2).
The virtual circuit (2) on 6) and 13 (11) has an MCR of 2.

(Iii) a communication link 13 between the source device 12 (3) and the destination device 12 (3) through the switching nodes 11 (1), 11 (2) and 11 (3)
The virtual circuit (3) on (1), 13 (2) and 13 (7) has 3 MCRs.

(Iv) A communication link 13 () between the source device 12 (4) and the destination device 12 (9) through the switching nodes 11 (1), 11 (2) and 11 (4).
2), 13 (3), 13 (8) and the virtual circuit (4) on 13 (13)
MCR.

(V) Communication links 13 (4), 13 between source device 12 (5) and destination device 12 (10) through switching nodes 11 (4) and 11 (5).
The virtual circuit (5) on (9) and 13 (14) has 50 MCRs.

In addition, the communication links 13 (1) -13 (4) interconnecting the respective switching nodes 11 (n) have a maximum bandwidth capacity C _j available for ABR service. In the illustrated network 10, communication link 13 (1) has a capacity C ₁ = 150 (in arbitrary units) and communication links 13 (2) and 13 (3) have a capacity C ₂ = C ₃ = 100. The communication link 13 (4) has a capacity C ₄ = 60. The explicit rate R _i for the ith (i = 1,..., 5) virtual circuit is
Obviously, this will be the minimum value of the link explicit rate R _{i, j} on the communication link 13 (j) forming the path to the virtual circuit. That is,

[0021]

(Equation 9)

[0022] Here, J (i) corresponds to a set of communication links forming a path to the i-th virtual circuit.

As will be appreciated, the communication links 13 (1) -13 (4) interconnecting the switching nodes 11 (n) can form paths to multiple virtual circuits. In general, determining the link explicit rate R _{i, j} for each virtual circuit is “fair” for each virtual circuit and maximizes the utilization (utilization) of each communication link 13 (j). It is desirable to do. There are generally two methodologies for determining fairness, an equal sharing method and a proportional method. In the equal sharing methodology, the bandwidth of communication link 13 (j) is
3 (j) is the portion above the MCR for all virtual circuits forming part of the path (
Hereinafter referred to as “excess bandwidth”) is evenly divided among the virtual circuits, and the link explicit rate R _{i, j} for the _ith virtual circuit is
It becomes the sum with R. That is,

[0024]

(Equation 10)

## EQU1 ## Here, | I (j) | represents the number of virtual circuits in which the communication link 13 (j) forms part of a path. On the other hand, in the proportional sharing methodology, the entire bandwidth is divided between virtual circuits in proportion to their MCR. That is,

[0026]

[Equation 11]

[0027] Under the equal sharing methodology, the virtual circuits (1), (2) and (3) have link explicit rates R _{i, j} of 55, 47 and 48 respectively, but under the proportional sharing methodology, they It is clear to have link explicit rates R _{i, j} of 100, 20 and 30, respectively.

A similar operation is performed for each link and virtual circuit with a link explicit rate R _{i, j} Is performed on all communication links 13 (j) to determine
, As described above, the explicit rate R for each virtual circuit_iIs the respective virtual circuit
Link explicit rate R for_{i, j}Is the minimum value of In that connection, a communication link
13 (4) corresponds to the virtual circuits (1) and (5) forming part of the respective paths.
Is the sum of the capacitances C₄= 60, the virtual circuit (1) is temporarily
It is possible to allocate an explicit rate greater than 10 on link 13 (1).
However, since the virtual circuit is bottlenecked by the communication link 13 (4),
, It (ie, virtual circuit (1)) has an explicit rate of 10 on communication link 13 (1).
R_iCan only be allocated. Therefore, the virtual circuit (
The explicit rate for 1) is assigned to the virtual circuit for communication link 13 (1).
Since it is far below what is possible, a virtual circuit (
There is additional bandwidth that can be allocated for 2) and (3)
become. In this case, for them, using a proportional sharing methodology, for example, 56
And 84 link explicit rates, respectively.

The explicit rate marking system 36 provided by the present invention determines the explicit rate using a virtual bandwidth methodology. In this, for the communication link 13 (j), if the virtual circuit forming part of the path of the communication link 13 (j) is bottlenecked on another virtual circuit, the explicit rate marking system 36 A
Generate a virtual bandwidth value C _j ′ available for the BR service, and further, as described above with respect to equations (2) and (3), similar to the real bandwidth value C _j available for the ABR service. Determining the link explicit rate using the virtual bandwidth value C _j ′ to determine the link explicit rate of other virtual circuits that use it (ie, communication link 13 (j)) as part of the path. I do. For a virtual circuit that is not bottlenecked, the link explicit rate R _{i, j} will be the link explicit rate so determined, but not for the bottlenecked virtual circuit. The explicit rate marking system 36 calculates the virtual bandwidth value C _j ′ for an equal sharing methodology:

[0030]

(Equation 12)

[0031] And for the proportional sharing methodology,

[0032]

(Equation 13)

Is determined by Here, I _B (j) corresponds to a set of virtual circuits that have been bottlenecked by another, I _U (j) corresponds to a set of virtual circuits that have not been bottlenecked by another, and N _J is: The communication link 13 (j) represents the number of virtual circuits that formed part of the path (this corresponds to | I (j) | in equation (2)).

For the proportional sharing methodology (reference equation (5)), the virtual bandwidth C _j ′ for communication link 13 (j) is the non-blocked virtual bandwidth for which communication link 13 (j) forms part of a path. Clearly, the MCR for the circuit corresponds to the available bandwidth capacity for the virtual circuit that is not bottlenecked. that is,

[0035]

[Equation 14]

In the meantime, the communication link 13 (j) has MCs for all the virtual circuits forming a part of the path.
It corresponds to the product of the ratio of R. If virtual bandwidth C _j ′ is used in equation (3) instead of bandwidth capacity C _j ,

[0037]

(Equation 15)

Is as follows. That is, the link explicit rate for a non-bottlenecked virtual circuit is calculated by adding the bandwidth capacity available for the non-bottlenecked virtual circuit to the ratio of the MCR of each virtual circuit to the sum of the MCR of the non-bottlenecked virtual circuit. Multiplied by.

The virtual bandwidth C _j ′ for an equal sharing methodology is somewhat complicated. Its coefficient

[0040]

(Equation 16)

Corresponds to the amount of bandwidth capacity for the communication link 13 (j) that can be used to distribute non-bottlenecks to the virtual circuit. That is, the bandwidth capacity taken by the bottlenecked virtual circuit from the total bandwidth capacity C (j)

[0042]

[Equation 17]

And the bandwidth capacity required to provide MCR for non-bottleneck virtual circuits

[0044]

(Equation 18)

Is reduced. coefficient

[0046]

[Equation 19]

When the virtual bandwidth C _j ′ (Equation (4)) is used to determine the link explicit rate (Equation (2)) for the virtual circuit,

[0048]

(Equation 20)

Given a coefficient, the bandwidth capacity available for distribution to non-bottleneck virtual circuits is effectively divided by the number of non-bottleneck virtual circuits. For an even sharing methodology, the virtual bandwidth (Equation (4)) is used to determine the link explicit rate R _{i, j} . Addend in equation (4)

[0050]

(Equation 21)

Cancels the same value in the quotient. As a result, the link explicit rate R _{i, j} of the equal sharing methodology is:

[0052]

(Equation 22)

Corresponds to The general operations performed by the explicit rate marking system 36 of the switching node 11 (n) to determine the explicit rate R _i for each virtual circuit will be described with reference to the flowchart shown in FIG. Referring to FIG. 4, each explicit rate marking system 36 is selected for each virtual circuit and each connection using the actual bandwidth capacity C _j of the respective communication link 13 (j) available for ABR service. A link explicit rate R _{i, j} for each communication link 13 (j) is first determined using equation (2) or (3) for the methodology described (step 100). The explicit rate marking system 36 then marks each bottlenecked virtual circuit and assigns it to its explicit rate according to equation (1) (step 101). The explicit rate marking system 36 then determines if there are any unmarked virtual circuits (step 102). If the explicit rate marking system 36 makes a positive decision in step 102, it has not determined the explicit rates R _i for all virtual circuits, so in this case it proceeds to step 103 where the explicit rate marking system 36
Identifies each communication link 13 (j) forming part of the path to at least one non-bottlenecked virtual circuit and then determines a virtual bandwidth value for it according to equation (4) or (5). (Step 104). The explicit rate marking system 36 then determines the link explicit rate R _{i, j} for each of the unmarked virtual circuits by the equation (2) or (3) using the virtual bandwidth value instead of the actual bandwidth capacity C _j. (Step 105) and returns to step 101 to identify and mark the virtual circuit determined to be bottlenecked using the new link explicit rate. The explicit rate marking system 36
Steps 101 to 105 are repeated, and when it is determined in step 102 that all the virtual circuits are marked, the routine exits (step 106). By the time the explicit rate marking system 36 all the virtual circuit is determined to be already marked, it is clear that the explicit rate R _i is for all virtual circuits are determined.

In one embodiment, as described above in connection with equation (4) or (5), AB
Instead of updating the explicitly available virtual bandwidth value C _j ′ for the R service, the explicit rate marking system 36 maintained by each switching node 11 (n) generates the virtual bandwidth value once. After that, the virtual bandwidth coefficient “vbf
And update it periodically as ATM cells are received and transmitted. This virtual band coefficient is calculated according to C _j ′ = vbf * C _j (where “*
Is the multiplication operator) and relates to the bandwidth capacity C _j available for ABR service for the virtual bandwidth C _j ′. In the above embodiment, the communication link 13 (j)
The operation performed by the explicit rate marking system 36 when one ATM cell arrives at the switching node 11 (n) through is described with reference to the flowchart shown in FIG. Referring to FIG. 5, the switching node 11
When (n) receives one ATM cell (step 120), the explicit rate marking system 36 initially updates a number of counters used to monitor the traffic load and capacity of the cell. In particular, the explicit rate marking system 36 increments a sum counter that identifies the total number of cells received since the start of the interval (step 121). The explicit rate marking system 36 also determines whether the ATM cell is for a virtual circuit using the ABR service (step 122), and if so, the interval AB
The R cell counter and the ABR cell counter with buffer are incremented (step 123). The interval ABR cell counter identifies the number of ATM cells received so far from the start of the same interval. The buffered ABR cell counter identifies the number of cells for the virtual circuit currently using ABR service in the buffer 32 of the switching node. After that, explicit rate marking system 3
6 determines whether the value of the total counter corresponds to a predetermined update interval value (step 124). If the explicit rate marking system 36 makes a negative decision, it returns to step 120 and waits for the arrival of the next ATM cell.

On the other hand, if the explicit rate marking system 36 makes a positive decision in step 124, it goes on to a series of steps to update the variable bandwidth factor vbf. First, the explicit rate marking system 36 determines an update time interval value corresponding to a real time interval at which a number of cells corresponding to the update interval value have been received (step 125). Using the update time interval values, the explicit rate marking system 36 determines ABR and non-ABR rate values (step 1).
26). The ABR rate value corresponds to the value given by dividing the interval ABR cell counter by the update time interval value. The non-ABR rate value corresponds to the difference between the value provided by the sum counter and the interval ABR cell counter divided by the update time interval value. Thereafter, the explicit rate marking system 36 may reset the sum counter and the interval ABR cell counter for use during the next cell reception interval (step 127).

[0056] After the counter such is reset in step 127, the explicit rate marking system 36, ABR bandwidth capacity value (corresponding to the above _{C j)} to update the ABR utilization value (step 128). The ABR bandwidth capacity value reflects the bandwidth currently available for the ABR service. The explicit rate marking system 36 determines the smoothed value, the previously generated ABR bandwidth capacity value, and the respective communication link 1
Update the ABR bandwidth capacity value in relation to the difference determined in step 126 between the target bandwidth utilization capacity and the non-ABR rate value for 3 (j). This difference obviously corresponds roughly to the bandwidth capacity then available for ABR service on each communication link. Generally, the smoothing value is chosen between 0 and 1. Then, the smoothed value includes the target bandwidth utilization capacity and the non-AB for each communication link 13 (j).
The explicit rate marking system 36 calculates the updated ABR bandwidth capacity as multiplied by the difference from the R rate value, plus one minus the smoothing value multiplied by the current ABR bandwidth capacity value. Generate a value. The smoothing value is used to smooth the changes that occur during the bvf update, and in one embodiment, 1/8
Is selected in the order.

The ABR usage value updated in step 128 reflects the currently used portion of the ABR bandwidth capacity. The explicit rate marking system 36 updates the ABR usage value in relation to the smoothing value, the ABR rate value generated in step 126, the newly generated ABR bandwidth capacity value, and the current ABR usage value. I do. In general,
The ABR rate divided by the ABR bandwidth capacity value reflects the currently used portion of the ABR bandwidth capacity. Thus, the explicit rate marking system 36 assumes that the smoothing value is multiplied by the ABR rate, divided by the ABR capacity value, plus one, minus the smoothing value multiplied by the current ABR utilization value.
Generates an updated ABR usage value.

In a following step 128, the explicit rate marking system 36 is determined by the buffered ABR cell counter and three predetermined usage counts: a maximum usage count, an intermediate usage count, and a minimum usage count. A value of the vbf utilization coefficient is generated in relation to the current ABR cell occupation of the buffer 32. In this operation, the explicit rate marking system 36 first determines whether the current ABR cell occupancy is below a low threshold. If the explicit rate marking system 36 makes a positive decision in step 129, the number of cells for the virtual circuit utilizing the ABR service is relatively low. In this case, the explicit rate marking system 36 first generates a proportional value as the difference between the maximum utilization factor and the intermediate utilization factor divided by a low threshold, and then buffers the proportional utilization value from the maximum utilization factor value. A vbf utilization coefficient value is generated by subtracting a value corresponding to a value obtained by multiplying the value given by the attached ABR cell counter.

If the explicit rate marking system 36 makes a negative decision in step 129, it proceeds to step 132 to determine whether the current ABR cell occupancy is between the low threshold and the high threshold. I do. Explicit rate marking system 36 is step 1
If a positive determination is made at 32, a proportional value is determined as the difference between the intermediate utilization coefficient and the low utilization coefficient divided by the difference between the high threshold and the low threshold (step 133).
And the intermediate utilization coefficient minus the value corresponding to the proportional value determined in step 133 multiplied by the difference between the value given by the buffered ABR cell counter and the minimum threshold, A coefficient is determined (step 134).

Finally, if the explicit rate marking system 36 makes a negative decision in step 132, it is understood that the current ABR cell occupancy is above the high threshold. In that case, the explicit rate marking system 36 determines the vbf utilization factor as a low utilization factor (step 135).

The values for the high and low thresholds and the maximum, middle and minimum utilization factors are selected as follows.

(I) If the cell occupancy with buffer is 0, the vbf utilization coefficient value corresponds to the maximum utilization coefficient.

(Ii) As buffered cell occupancy increases and approaches the low threshold, vb
The f utilization factor value decreases from the high utilization factor and approaches the intermediate utilization factor.

(Iii) As buffered cell occupancy further increases and approaches the high threshold, the vbf utilization factor value continues to decrease from the intermediate utilization factor and approaches the minimum utilization factor.

(Iv) If the buffered cell occupancy is above the high threshold, the vbf utilization factor corresponds to the minimum utilization factor. In one embodiment, the maximum utilization factor is selected to have a value on the order of 1.2, the intermediate utilization factor is selected to have a value on the order of 0.9, and the minimum utilization factor is 0. .8.

The explicit rate marking system 36 proceeds to step 131, 134 or 135
After determining the vbf utilization coefficient in step (b), a series of steps are performed to actually generate a value for the virtual bandwidth coefficient (vbf). The explicit rate marking system 36 first saves the current vbf (step 136). Thereafter, the explicit rate marking system 36 determines whether (i) the ABR usage rate updated at step 128 is less than the predetermined target usage rate and the vbf usage factor is greater than 1, or (ii) updated at step 128. It is determined whether the ABR usage rate is higher than the predetermined target usage rate and the vbf usage coefficient is smaller than 1 (step 137).
And, if so, multiply the current vbf by the vbf utilization factor to obtain a new current bvf
Is generated (step 138). Following step 138, the explicit rate marking system 36 calculates the current vbf multiplied by the smoothing factor and the saved current vbf.
Is multiplied by (1−smoothing coefficient) to generate a new bvf. Thereafter, the explicit rate marking system 36 can determine whether the vbf is within a predetermined range, and if not, adjust the vbf to fall within that range (step 140).

The operations performed by the explicit rate marking system 36 when an ATM cell is transmitted will be described with reference to FIG. Referring to FIG. 6, when one cell is ready to be transmitted (step 160), the explicit rate marking system 36
Determines whether the cell is associated with a virtual circuit using ABR service (step 161). If the explicit rate marking system 36 makes a negative decision in step 161, the control element performs normal operations and transmits the cell on the appropriate communication link 13 (j) (step 162). On the other hand, if the explicit rate marking system 36 makes a positive decision in step 161, it first decrements the buffered ABR cell counter (step 163).
Thereafter, the explicit rate marking system 36 determines that the cell is a BRM (reverse RM).
) Determine whether the cell is a cell (step 164). If the explicit rate marking system 36 makes a positive decision in step 164, it moves to generating a link explicit rate R _{i, j} for the virtual circuit associated with the cell (step 165). If the explicit rate marking system 36 uses an equal sharing methodology, it uses equation (2), and if the explicit rate marking system 36 uses a proportional sharing methodology, it uses equation (3). In both cases, the explicit rate marking system 36 uses the virtual bandwidth value Cj 'instead of the bandwidth value Cj available for ABR service, and multiplies the ABR capacity by the most recently determined vbf value. Thus, the virtual bandwidth value Cj ′ is determined. The explicit rate marking system 36 then determines whether the link explicit rate R _{i, j} determined in step 165 is less than the explicit rate value contained in the BRM cell (step 1).
66) And if so, the link explicit rate value determined in step 165 is replaced with the explicit rate value in the BRM cell (step 167). Step 1
If a negative decision is made in step 166 following 67, or step 16
If a negative decision is made at 4, the control element 35 determines that the cell is in communication link 13 (j
) (Step 168).

The present invention offers a number of advantages. In particular, the present invention provides each switching node 11 (
n) the explicit rates for the virtual circuits using the respective switching nodes, generally their MCRs, the number of bottlenecked and unbottled virtual circuits, the ABR service Explicit rate marking system 36, which generates in relation to the amount of bandwidth capacity available to each virtual circuit, and simplifies the allocation of ABR bandwidth capacity to each virtual circuit, even if one or more virtual circuits are bottlenecked. I will provide a.

A system according to the present invention may be constructed in whole or in part from special purpose hardware or a general purpose computer system, or a combination thereof, some of which are controlled by suitable programs. It is understood that. Any program may form part of, or be stored on, this system in the usual manner, or the program may be wholly or partly connected to the system in a network or conventional manner. Via other mechanisms for transferring information. In addition, the system may be directly connected to the system or an operator input element (not shown) that transfers information to the system via a network or other mechanism for transferring information in a conventional manner. Is used to operate and / or be controlled by information provided by the operator.

The foregoing description has been limited to a specific embodiment of this invention. However,
It is understood that various changes and modifications can be made to the invention while achieving some or all of the advantages of the invention. It is the object of the appended claims to cover these and other such variations and modifications that fall within the true spirit and scope of the invention.

To the extent claimed as new and desired to be protected by a US patent,

[Brief description of the drawings]

FIG. 1 schematically illustrates an ATM network constructed in accordance with the present invention that includes a system for performing explicit rate marking for flow control in an ATM network using a virtual bandwidth-based methodology.

FIG. 2 schematically shows the structure of a message packet and element message cells transferred on the network shown in FIG.

FIG. 3 schematically shows a switching node constructed according to the present invention for use in the computer network shown in FIG. 1;

FIG. 4 is a flowchart illustrating general operations performed by an explicit rate marking system constructed in accordance with the present invention.

5 and 6 are flowcharts showing details of the operations performed by the explicit rate marking system.

──────────────────────────────────────────────────続 き Continuation of the front page (72) Inventor One, Ping United States 01720 Acton Foster Street, Mass., Massachusetts 6 (72) Inventor Tsai, Wengan USA 01720 Boston, Westford, Mass. 5K030 HA10 LC09 LC13 LE17

Claims (10)

[Claims] 1. An explicit rate marking system used in connection with a switching node to generate an explicit rate value for use in a resource management cell associated with a virtual circuit in an ATM network, comprising: A) Available bandwidth A width capacitance value, an explicit rate value associated with each bottleneck virtual circuit in which the switching node forms part of a path, and a minimum rate value associated with each non-bottleneck virtual circuit in which the switching node forms part of a path. A virtual bandwidth value generation module configured to generate a virtual bandwidth value reflecting the cell rate value; and B) the virtual bandwidth value, the virtual circuit and the switching node form part of a path. Relative to the minimum cell rate value associated with the other virtual circuit to form,
An explicit rate value generation module configured to generate the explicit rate value. 2. The explicit rate marking system according to claim 1, wherein said explicit rate value is generated in accordance with an even sharing methodology, and said virtual bandwidth value generating module comprises: The has been configured to generate a virtual bandwidth value C _{j ',} C _j represents the available bandwidth capacity value, MCR _j represents minimum cell rate for the i th virtual circuit by, I _B (j) corresponds to the set of bottlenecked virtual circuits, I _U (j) corresponds to the set of non-bottlenecked virtual circuits, and N _j indicates that the switching node Related to the number of virtual circuits forming the part,
The explicit rate marking system according to claim 1. 3. The explicit rate value generation module comprises: The explicit rate marking system according to claim 2, wherein the explicit rate marking system is configured to generate the explicit rate value R _{i, j} . 4. The explicit rate marking system according to claim 1, wherein said explicit rate marking system generates said explicit rate value according to a proportional sharing methodology, and said virtual bandwidth value generating module comprises: The has been configured to generate a virtual bandwidth value C _{j ',} C _j represents the available bandwidth capacity value, MCR _j represents minimum cell rate for the i th virtual circuit by, I B _(j) corresponds to a set of bottleneck virtual circuit, I U _(j) corresponds to the set of virtual circuits that are not the bottleneck, explicit rate marking system according to claim 1. 5. The explicit rate value generation module comprises: The explicit rate marking system according to claim 4, wherein the explicit rate marking system is configured to generate the explicit rate value R _{i, j} . 6. An explicit rate marking method used in connection with a switching node to generate an explicit rate value for use in a resource management cell associated with a virtual circuit in an ATM network, comprising: A) Available bandwidth A width capacitance value, an explicit rate value associated with each bottleneck virtual circuit in which the switching node forms part of a path, and a minimum rate value associated with each non-bottleneck virtual circuit in which the switching node forms part of a path. A virtual bandwidth value generating step including a step of generating a virtual bandwidth value reflecting the cell rate value; and B) the virtual bandwidth value, the virtual circuit and the switching node form a part of a path. Relative to the minimum cell rate value associated with another virtual circuit,
An explicit rate value generating step having a step of generating the explicit rate value. 7. The explicit rate marking method promotes the generation of the explicit rate value according to an even sharing methodology, and the virtual bandwidth value generating step includes: Generating the virtual bandwidth value C _j ′, where C _j represents the available bandwidth capacity value, MCR _j represents the minimum cell rate for the ith virtual circuit, and I _B (j ) Corresponds to the set of bottlenecked virtual circuits, I _U (j) corresponds to the set of non-bottlenecked virtual circuits, and N _j is the switching node forming part of the path. Related to the number of virtual circuits,
The explicit rate marking method according to claim 6. 8. The step of generating an explicit rate value includes: The explicit rate marking system according to claim 7, comprising generating the explicit rate value R _{i, j} by: 9. The explicit rate marking method facilitates the generation of the explicit rate value according to a proportional sharing methodology, and the virtual bandwidth value generating step comprises: Generating the virtual bandwidth value C _j ′, where C _j represents the available bandwidth capacity value, MCR _j represents the minimum cell rate for the ith virtual circuit, and I _B (j 7.) The explicit rate marking method according to claim 6, wherein) corresponds to a set of bottlenecked virtual circuits and I _U (j) corresponds to a set of non-bottlenecked virtual circuits. 10. The step of generating an explicit rate value comprises: 10. The explicit rate marking method according to claim 9, comprising generating the explicit rate value R _{i, j} by: