JP2002366088A - Plasma display panel display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To maintain the quality of a picture by improving erroneous discharge due to degradation in a PDP(plasma display panel) during discharge of the PDP. SOLUTION: This plasma display panel display device prevents erroneous discharge or erroneous light extinction caused by the decrease of a sustaining voltage due to cumulative lapse of time of discharge of the PDP by controlling the driving voltage value of discharge cells of the device by using an arithmetic and control unit such as a microcomputer so as to conform to a sustaining voltage reduction curve which is set in accordance with a sustaining voltage secular change reduction curve obtained as a function of the cumulative lapse of time of discharge of the cells, thereby maintaining the quality of the picture.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a display device using a plasma display panel for displaying television images and the like, and more particularly to a display device in which erroneous discharge caused by deterioration of the plasma display panel due to discharge in the plasma display panel is improved. .

[0002]

2. Description of the Related Art There is a plasma display panel display (hereinafter abbreviated as PDP) using a plasma display panel (hereinafter abbreviated as PDP) as a thin type capable of displaying television images and the like. A PDP display device is suitable for large-screen display, and has attracted attention as a display device for a TV or the like.

[0003] The PDP utilizes the phenomenon of excitation and emission of a phosphor by ultraviolet rays generated by discharge of a rare gas such as Ne (neon) or Xe (xenon). FIG. 4 is a perspective view showing an example of a panel structure of an AC type PDP. In FIG. 4, reference numeral 100 denotes a PDP; 101, a glass substrate serving as a substrate on the display surface side; 102, a display electrode formed on the glass substrate 101; And a Y display electrode 102y,
Each display electrode includes a transparent electrode 102a and a metal auxiliary electrode 102b for reducing the resistance value. 103 is a display electrode 102
A dielectric layer 104 covering the display electrode 102 and the dielectric layer 1
03 is a thin protective film of MgO. 121 is a rear glass substrate disposed opposite to the glass substrate 101;
Reference numeral 125 denotes a stripe-shaped address electrode formed on the glass substrate 121, and reference numeral 122 denotes a partition wall formed to be adjacent to the address electrode. 123 is an address electrode 125
Phosphor (red), green (G), and green (G) corresponding to three adjacent address electrodes forming one pixel.
A blue (B) phosphor is separately applied, and discharge cells as shown in FIG. 4 are arranged in a matrix. 124
Is a discharge space surrounded by a partition wall 122 between the display electrode side substrate and the phosphor side substrate. Ne or Xe
Noble gas is sealed. Reference numeral 105 denotes a front-side substrate including a glass substrate 101, a display electrode 102, a dielectric layer 103, and an MgO protective film 104.

In FIG. 4, a driving circuit (not shown) first applies a voltage to the address electrode 125 and the Y display electrode 102y (this is referred to as an address drive) to cause a pilot discharge, and then the X display electrode 102x and the Y display electrode 102y. A voltage (hereinafter, this voltage is referred to as a sustain voltage) is applied to the display electrode 102y (this is referred to as main discharge driving) to maintain the discharge. Ultraviolet rays are generated by the discharge in the discharge space 124 due to the application to the electrodes, and the ultraviolet rays excite the phosphor 123 to emit red,
Green and blue light is generated, and the light is emitted through the glass substrate on the transparent display electrode side. It should be noted that a pair of X display electrodes 1
The discharge between 02x and the Y display electrode 102y is called a main discharge or a sustain discharge.

[0005]

FIG. 5 shows a state in the PDP at the time of discharging by rotating the front substrate 105 of FIG. 4 by 90 °. In FIG. 5, the same parts as those in FIG. 4 are denoted by the same reference numerals, and description thereof will be omitted. Since the PDP uses the discharge as described above, the discharge activates the MgO protective film 104 in the PDP as shown in FIG. 5, but the main discharge in the PDP is caused by the activation. The inventor of the present invention states that the lowest sustain voltage to be applied (hereinafter referred to as a discharge starting voltage) changes with the cumulative elapsed time of discharge, and the change is that the discharge starting voltage decreases with the cumulative elapsed time. Examination revealed a new one. Here, activation of the MgO protective film 104 refers to the X display electrode 1.
That is, the discharge start voltage between 02x and the Y display electrode 102y can be driven at a lower voltage due to the accumulated elapsed time. In response to the drop in the discharge start voltage, the applied voltage value for starting the discharge of the PDP drive circuit is substantially constant, so that if the cumulative elapsed time of the discharge becomes long, erroneous discharge is likely to occur.

Hereinafter, the erroneous discharge will be described in detail with reference to the drawings. FIG. 6 shows an example of a relationship between a sustain voltage, which is a voltage applied between the X and Y display electrodes of the PDP, and a stable output voltage of the drive circuit. FIG. 6 conceptually shows changes in the upper limit value and the lower limit value of the sustain voltage of the PDP on the vertical axis, and the accumulated cumulative elapsed time of the PDP on the horizontal axis. Hereinafter, this sustain voltage reduction curve is referred to as a sustain voltage change reduction curve. The upper limit value 3 of the PDP is a maximum value that can prevent erroneous lighting of any cell other than the desired cell forming the PDP, and the lower limit value 4 is a minimum value that can light up any desired cell of the PDP. . Hereinafter, the upper limit value 3 is referred to as an erroneous discharge voltage value 3 and the lower limit value 4 is referred to as an erroneous turn-off voltage value 4.

Conventionally, P by a driving circuit of a PDP display device
The initial voltage set value 1 (V _S1 ), which is the voltage applied to DP, is
It is set so that erroneous discharge and erroneous turn-off do not occur within the sustain voltage range 2 in the initial state of the PDP. But,
As shown in FIG. 6, when the accumulated elapsed time exceeds the time t1, the erroneous discharge voltage value 3 of the PDP becomes a voltage value equal to the initial voltage set value 1 of the drive circuit. The quality of the image is degraded due to the erroneous discharge in which the cells that should not be discharged are not discharged.

An object of the present invention is to solve the above-mentioned problems,
It is an object of the present invention to provide a plasma display panel display device which improves erroneous discharge caused by accumulated elapsed time.

[0009]

In order to solve the above-mentioned problems, the present invention has a display surface in which discharge cells are arranged in a matrix between substrates, and discharges by applying a driving pulse to the cells. A plasma display panel display device that performs display by performing the above operation, wherein a computing unit that computes an accumulated elapsed time for applying the drive pulse to the cell, and a control that controls a pulse value of the drive pulse based on the accumulated elapsed time Means.

A plasma display panel display device having a display surface in which discharge cells are arranged in a matrix between substrates and performing a display by applying a driving pulse to the cells by a driving circuit to cause the cells to discharge, A power supply having a variable output voltage for supplying a drive voltage to the drive circuit, a counter for counting an accumulated elapsed time of discharge of the cell, storage means for storing a drive voltage reduction curve based on the accumulated elapsed time, and the counter And an arithmetic control means for controlling the variable power supply by the storage means, wherein the arithmetic control means calculates the drive voltage reduction curve stored in the storage means based on the accumulated elapsed time from the counter. A value corresponding to the accumulated elapsed time is calculated, and the variable power supply is controlled based on the calculated value so that the drive voltage becomes a predetermined voltage value. It is configured.

[0011]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the present invention will be described below in detail with reference to the drawings.

According to the present invention, in order to prevent an erroneous discharge due to a decrease in the sustain voltage due to the cumulative elapsed time of the discharge of the PDP, the applied voltage value of the drive circuit is made to correspond to a sustain voltage aging change reduction curve with respect to the cumulative elapsed time of the PDP drive. Control is performed using arithmetic control means such as a microcomputer so as to match the set sustain voltage reduction curve. As a result, occurrence of erroneous discharge can be prevented, and image quality can be maintained.

FIG. 3 shows an example of a sustain voltage reduction curve. 5 sustain voltage derating curve, V _S1 is initially set value of the sustain voltage, the set value of the sustain voltage V _S2 from the cumulative elapsed time T51 to T52, V _S3 from accumulated elapsed time T52 T
Set value of the sustain voltage to 53, V _S4 are cumulative elapsed time
This is the set value of the sustain voltage after T53. The same reference numerals are given to the same parts in FIG. 6, and the description will be omitted.

In FIG. 3, a sustaining voltage reduction curve 5
As shown in (2), between the erroneous discharge voltage value 3 and the erroneous turn-off voltage value 4, the sustain voltage value is reduced stepwise with respect to the accumulated elapsed time to prevent erroneous discharge. In the following description, the accumulated value of the drive time of the drive circuit of the PDP is used as the accumulated elapsed time.

FIG. 1 is a block diagram showing a PDP display device according to an embodiment of the present invention.

In FIG. 1, reference numeral 11 denotes a microcomputer (hereinafter referred to as a CPU) as arithmetic control means, and 12 denotes a P
A counter for measuring the accumulated drive elapsed time of the DP drive circuit,
13 is a memory for storing the sustaining voltage reduction curve, 20
Is a power supply, 16 is a PDP 17 controlled by the CPU 11
Is a driving circuit.

The power supply 20 includes a voltage control section 14 and a voltage output section 15. The voltage control unit 14 outputs a digital signal of a pulse train for controlling the power output voltage value of the voltage output unit 15 applied to the drive circuit 16 to a desired value.
1 and converted into an analog signal by an internal DA converter (not shown) to regenerate a DC voltage and output as a reference voltage value of the voltage output unit 15. The voltage output unit 15 receives the reference voltage value from the voltage control unit 14, and controls and outputs the power supply output to a desired power supply output voltage value. The drive circuit 16 receives a power output from the voltage output unit 15 of the power supply 20 and outputs a pulse-shaped drive output up to the almost applied power output voltage value to the PDP 17. PDP17 is
The driving of the display is controlled by the driving circuit 16, and the ON and OFF of the display of the driving circuit 16 are controlled by the CPU 11. Therefore, the cumulative elapsed time of the display ON time can be obtained by measuring the cumulative elapsed time by the counter 12 via the CPU 11.

The counter 12 has a controller 1201 having an arithmetic control function and a measuring unit 12 for measuring an elapsed time.
02 and a storage unit 1203 for storing the elapsed time.

The controller 1201 instructs the measurement unit 1202 to measure the elapsed time in response to the elapsed time measurement instruction from the CPU 11, and periodically measures the measured value at predetermined time intervals.
It is added to the accumulated elapsed time stored in the storage unit 1203, is stored in the storage unit 1203 as a new accumulated elapsed time, the measurement unit 1202 is cleared, and measurement is continued. When the controller 1201 receives the instruction to stop the elapsed time measurement from the CPU 11, the measurement unit 1202 stops measuring the elapsed time, adds the measured value to the accumulated elapsed time in the storage unit 1203, and adds a new accumulated elapsed time. Is stored in the storage unit 1203, and the measurement unit 1202 is cleared. In addition, control
Upon receiving a request for the accumulated elapsed time from the CPU 11, the CPU 1201 reads the accumulated elapsed time from the storage unit 1203 and transmits the read accumulated elapsed time. The control process of the controller 1201 is simple, and the description using the process flow and the like is omitted. Further, the storage unit 1203 is, for example, backed up by a battery or configured by a non-volatile memory so that the stored contents are not erased even when the power is turned off.

The controller 1201 periodically adds the measured value to the accumulated elapsed time of the storage unit 1203 at predetermined time intervals, and generates a new accumulated elapsed time.
03 is stored, but this is to prevent an unpredictable power failure, and it is not necessary to perform the operation at short time intervals with high time accuracy. It may be stored every minute.

FIG. 2 is a flowchart for setting the voltage of the drive circuit. PD using FIG. 1, FIG. 2 and FIG.
The operation of setting the voltage of the drive circuit of the P display device will be described.

Step 21 (hereinafter, step is abbreviated as S)
Starts setting of the applied voltage of the drive circuit. First, S22
Then, the CPU 11 reads the current drive accumulated elapsed time from the counter 12. Next, in S23, the CPU 11 calculates the sustain voltage V _S corresponding to the current drive accumulated elapsed time t from the sustain voltage reduction curve stored in the memory 13 in advance. For example, the current driving cumulative elapsed time t is equal between T52 from T51 in FIG. 3, the sustain voltage V _S will be calculated as V _S2. In S24, the CPU
11 outputs a pulse train digital signal to the power supply 20 so that the calculated sustain voltage is output to the drive circuit 16 from the voltage output unit 15 of the power supply 20. In response to this, the voltage control unit 14 of the power supply 20 converts the voltage into a DC voltage,
The reference voltage of the voltage output unit 15 is used as the reference voltage, and the voltage output unit 15 controls the output voltage to the drive circuit 16 to be, for example, _VS2 . Thus, the voltage setting of the drive circuit is completed (S25).

As described above, according to the present invention,
As shown in the sustain voltage reduction curve 5, between the erroneous discharge voltage value 3 and the erroneous turn-off voltage value 4, the sustain voltage value can be reduced stepwise with respect to the accumulated elapsed time to prevent erroneous discharge. . In FIG. 3, the sustain voltage reduction curve 5 has a step shape, but is not limited thereto.
For example, each step change may be a straight inclined line, and the same effect can be obtained.

[0024]

As described above, according to the present invention, according to the present invention, the applied voltage value of the drive circuit is set in correspondence with the sustained voltage temporal change reduction curve with respect to the cumulative elapsed time of the discharge of the PDP. By performing control using arithmetic control means such as a microcomputer so as to match the sustain voltage reduction curve, it is possible to prevent erroneous discharge due to a decrease in the sustain voltage due to the cumulative elapsed time of the discharge of the PDP, and to improve the image quality of the image. It is possible to provide a plasma display panel display device that is maintained.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a configuration of an embodiment of a PDP display device according to the present invention.

FIG. 2 is a flowchart showing a voltage setting sequence of a drive circuit of the PDP display device according to the present invention.

FIG. 3 is a diagram illustrating an example of a sustain voltage reduction curve of the PDP display device according to the present invention.

FIG. 4 is a perspective view showing an example of a panel structure of an AC type PDP.

FIG. 5 is a configuration diagram showing a discharge mechanism of a PDP.

FIG. 6 is a diagram illustrating a relationship between an accumulated elapsed time and a sustained voltage temporal change reduction curve.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Initial voltage setting value, 2 ... Sustain voltage range, 3 ... Erroneous discharge voltage value, 4 ... Erroneous turn-off voltage value, 5 ... Sustain voltage reduction curve, 11 ... Microcomputer, 12 ... Cumulative elapsed time counter, 13 ... Memory, 14 ... voltage control unit,
15: voltage output unit, 16: drive circuit, 17: PDP, 2
0: power supply, 100: PDP, 101: front glass substrate,
Reference numeral 102: display electrode, 103: dielectric layer, 104: protective film (MgO film), 105: PDP front substrate, 121: glass substrate, 122: partition wall, 123: phosphor, 124: discharge space, 125: address electrode , 1201 ... Control
La, 1202: measuring unit, 1203: storage unit.

 ──────────────────────────────────────────────────続 き Continued on the front page (72) Inventor Masatoshi Sudo 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa Prefecture Inside Hitachi Eitech Co., Ltd. (72) Masahide Kawai 292, Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa F-term (reference) in Hitachi Ltd. 5C058 AA11 BA01 BB03 BB11 5C080 AA05 BB05 CC03 DD09 FF07 HH05 JJ02 JJ05 JJ06 JJ07

Claims (6)

[Claims] 1. A plasma display panel display device having a display surface in which discharge cells are arranged in a matrix between substrates and performing display by applying a drive pulse to the cells to discharge the cells. A plasma display panel display device, comprising: arithmetic means for calculating an accumulated elapsed time for applying a voltage to the cell; and control means for controlling a pulse value of the driving pulse based on the accumulated elapsed time. 2. The plasma display according to claim 1, wherein said control means changes said pulse value when said accumulated elapsed time is determined to be a preset time. Panel display device. 3. The plasma display panel according to claim 1, wherein said control means is configured to gradually change said pulse value to a small value in accordance with said accumulated elapsed time. Display device. 4. The arithmetic unit includes a measuring unit for measuring a time for applying the drive pulse to the cell, a storage unit for storing an accumulated elapsed time, and an accumulated elapsed time already stored in the storage unit. 2. The plasma display panel display device according to claim 1, further comprising: calculation means for calculating an accumulated elapsed time to be stored in the storage unit from the application time from the measurement unit. 5. A plasma display panel display device having a display surface in which discharge cells are arranged in a matrix between substrates, and performing display by applying a driving pulse to the cells by a driving circuit to cause discharge. A power supply having a variable output voltage for supplying a drive voltage to the drive circuit, a counter for counting the cumulative elapsed time of the cell discharge, a storage unit for storing a drive voltage reduction curve based on the cumulative elapsed time, and the counter And an arithmetic control unit for controlling the variable power supply with the storage unit, wherein the arithmetic control unit is configured to calculate the drive voltage reduction curve stored in the storage unit based on the accumulated elapsed time from the counter. A value corresponding to the accumulated elapsed time is calculated, and the variable power supply is controlled so that the drive voltage becomes a predetermined voltage value based on the calculated value. A plasma display panel display device, characterized in that configuration was. 6. A counter for counting an elapsed time of discharge of the cell, a storage unit for storing a value measured by the measurement unit, and a counter for measuring the measured value stored in the storage unit. 6. The plasma display panel display device according to claim 5, further comprising: a calculation unit that adds a measurement value obtained by the unit and stores the new measurement value in the storage unit.