JP2002351558A - Constant voltage generating circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To realize low power consumption without increasing a chip size and also to reduce the fluctuation of output potential in a constant voltage generation circuit. SOLUTION: This constant voltage generation circuit is provided with a reference potential generating means 1 for generating reference potential on the basis of a current outputted from a current source, a capacitor C1 for holding the reference potential generated by the reference potential generating means, an amplifying means 2 for generating output potential on the basis of the reference potential generated by the reference potential generating means, and a switching means QN1 for turning on/off the current source included in the reference potential generating means on the basis of an applied signal.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention generally relates to a constant voltage generating circuit for generating a constant voltage, and more particularly to a constant voltage generating circuit for performing an intermittent operation (hereinafter, referred to as a sampling operation) based on a sampling pulse signal. About.

[0002]

2. Description of the Related Art A constant voltage generating circuit is an oscillation circuit or the like that requires a critical power supply voltage (hereinafter referred to as a load circuit).
And is used in various fields such as information communication equipment and personal computer equipment.

For example, in a constant voltage generating circuit used in a wrist watch, reduction in current consumption and a semiconductor integrated circuit (I
When commercialized as C), a reduction in chip size is required. For this reason, a constant voltage generating circuit that always operates and a constant voltage generating circuit that performs a sampling operation to reduce power consumption are used for different purposes.

FIG. 3 shows a schematic configuration of a conventional constant voltage generating circuit of a type which always operates. This constant voltage generation circuit
A reference potential generator 11 for generating a reference potential, and an operational amplifier 1 for generating an output potential V _REG based on the reference potential
And 2. In this type of constant voltage generating circuit, since the reference potential generating unit 11 and the operational amplifier 12 are always operating, even if the power supply voltage before stabilization fluctuates suddenly, the output potential V _REG is stable in the load circuit. Can be supplied. However, there is a problem that power consumption is large.

In the case of the constant voltage generating circuit shown in FIG. 3, a current of about 10 nA is consumed in the reference potential generating section 11, and a current of about 5 nA is consumed in the operational amplifier 12. Therefore, in order to reduce the power consumption, it is conceivable to reduce the current supply capability of the transistor of the current source included in the reference potential generator 11. In order to reduce the current supply capability of the transistor, the ratio W / L between the channel width W and the channel length L of the transistor is generally reduced. However, since the channel width W cannot be reduced below a certain value, It is necessary to increase the channel length L. Then, the size of the transistor becomes very large, and the chip size is increased.

FIG. 4 shows a schematic configuration of a conventional constant voltage generating circuit of a type that performs a sampling operation. This constant voltage generation circuit includes P-channel transistors QP11 and QP12 as switching transistors for causing the reference potential generation unit 11 and the operational amplifier 12 to perform a sampling operation.
And N-channel transistors QN11 and QN12. The sampling pulse signal SP is applied to the gates of the transistors QN11 and QN12, and the sampling pulse signal SP is inverted and applied to the gates of the transistors QP11 and QP12 by the inverting circuit 13. When the sampling pulse signal SP is at a high level, these transistors are turned on, and the reference potential generator 11 and the operational amplifier 12 operate. on the other hand,
When the sampling pulse signal SP is at a low level, these transistors are turned off, and the reference potential generator 11 and the operational amplifier 12 stop operating.

FIG. 5 shows a specific circuit configuration of a conventional constant voltage generating circuit of a type that performs a sampling operation. Here, transistors QP11 and QP12 shown in FIG. 4 are replaced with one P-channel transistor QP10, and transistors QN11 and QN1 shown in FIG.
2 is replaced with one N-channel transistor QN10.

The constant voltage generating circuit shown in FIG.
Current source 14 and P-channel transistor constituting live part
QP13 and a P-channel transistor constituting an operational amplifier
Star QP14 to QP17 and N-channel transistor Q
N13 to QN16. To the output of the operational amplifier
Is the output potential V during the non-sampling period._REGHold
And a capacitor for phase compensation.
C12 is connected. Transistor with saturated connection
The star QP13 receives the current from the current source 34 and
Generate a potential. The operational amplifier is based on this reference potential
And the output potential V _REGOccurs. The constant current shown in FIG.
In the voltage generation circuit, the power supply potential V on the high potential side_DDIs grounded
And the output potential V_REGIs a negative value
You.

During the sampling period, the sampling pulse signal SP goes high, the inverted sampling pulse signal XSP goes low, and the transistor QP1
0 and QN10 are turned on, and a constant voltage generation operation is performed.
On the other hand, during the non-sampling period, the sampling pulse signal SP is at a low level, the inverted sampling pulse signal XSP is at a high level, the transistors QP10 and QN10 are turned off, and the constant voltage generation operation is not performed. By performing such an intermittent operation, power consumption can be reduced in a non-sampling period. Further, the capacitor C11, which holds the output potential V _REG of the sampling period, also in the non-sampling period, it is possible to maintain the output voltage V _REG to the substantially constant value.

However, when the impedance of the load circuit is low, the output potential V _REG fluctuates when switching from the non-sampling period to the sampling period, and power consumption increases because the capacitor C11 is charged. FIG. 6 shows the variation of the output potential V _REG in the constant voltage generation circuit of FIG.

As shown in FIG. 6, in the non-sampling period (OFF), the absolute value of the output potential V _REG gradually decreases due to the current flowing from the capacitor C11 to the load circuit. At the time of switching to (ON), the operation of the operational amplifier charging the capacitor C11 causes a change in the output potential V _REG . This change in the output potential adversely affects the load circuit. For example, in the case where the load circuit is an oscillation circuit, if the output potential of the constant voltage generation circuit fluctuates greatly, the oscillation circuit may stop oscillating.

By the way, Japanese Patent Application Publication (JP-A) 2
JP-A-000-298523 discloses an output circuit for supplying power to an oscillation circuit and the like, a feedback circuit for feedback-inputting the output of the output circuit and outputting a control signal for controlling the output of the output circuit,
A sampling circuit for continuously turning on / off the feedback circuit, a switch for turning on / off a signal line for outputting a control signal from the feedback circuit based on on / off of the sampling circuit, and a switch for turning off the signal line And a holding circuit for holding an input terminal of an output circuit for inputting a control signal at a signal level before the signal line is turned off in the case where the signal line is turned off. This constant voltage output circuit
The feedback circuit performs a sampling operation to realize low power consumption and reduce a change in output potential. However,
Since the constant voltage source (reference potential generating unit) included in the feedback circuit is always operating, there is a limit in reducing current consumption.

[0013]

SUMMARY OF THE INVENTION In view of the foregoing, the present invention provides a constant voltage generating circuit for generating a constant voltage, which realizes low power consumption without increasing the chip size. An object is to reduce fluctuations in output potential.

[0014]

In order to solve the above problems, a constant voltage generating circuit according to the present invention comprises: a reference potential generating means for generating a reference potential based on a current output from a current source; A capacitor for holding a reference potential generated by the generating means, an amplifying means for generating an output potential based on the reference potential generated by the reference potential generating means, and a reference potential generating means based on an applied signal Switch means for turning on / off the current source.

Here, the reference potential generating means may include a depletion transistor that functions as a current source, and a second transistor connected in saturation to generate a reference potential based on a current supplied from the depletion transistor. good. Further, the amplifying means may include an operational amplifier for performing impedance conversion between input and output. Further, the switch means may include a third transistor connected between a current source included in the reference potential generation means and a power supply potential.

According to the present invention configured as described above, the power consumption can be reduced without increasing the transistor size of the current source by performing the sampling operation of the reference potential generating means that consumes a large amount of current. Furthermore, since the output potential is generated by the amplifying means while the reference potential generated by the reference potential generating means is held by the capacitor, the fluctuation of the output potential can be reduced.

[0017]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a circuit diagram showing a configuration of the constant voltage generation circuit according to the first embodiment of the present invention. The constant voltage generation circuit shown in FIG. 1 includes a reference potential generation section 1 for generating a reference potential, a capacitor C1 for holding an output reference potential, an operational amplifier 2 for generating an output potential based on the reference potential, and a reference potential. An N-channel transistor QN1 as switching means for causing the generator 1 to perform a sampling operation is included.

The reference potential generator 1 includes a current source 3 and a P-channel transistor QP6. The capacitor C1 is connected between the output of the reference potential generator 1 (the connection point between the current source 3 and the drain of the transistor QP6) and the power supply potential V _DD (the ground potential in this embodiment) on the higher potential side. I have. The operational amplifier 2 includes P-channel transistors QP2 to QP5 and an N-channel transistor QN
2 to QN5. The output of the operational amplifier is connected to a capacitor C2 for phase compensation.

As the current source 3, it is desirable to use a depletion transistor that can be used as a minute current source without connecting a bias resistor that requires a large area when integrated. According to the present invention, since the non-sampling period can be lengthened, it is not necessary to make the current supply capability of the depletion transistor too small. Therefore, it is not necessary to increase the channel length L of the depletion transistor so much, and the chip size does not increase. A switching transistor QN1 is connected to the current source 3, and according to the sampling pulse signal SP supplied to the gate of the transistor QN1,
ON / OFF of the current source 3 is controlled.

The current flowing through the depletion transistor of the current source 3 is supplied to the transistor QP6 which is connected in saturation by using, for example, a current mirror circuit. As a result, a reference potential is generated at the drain of the transistor QP6. This reference potential is held by the capacitor C1 during the non-sampling period.
The operational amplifier 2 generates an output potential V _REG based on the reference potential output from the reference potential generator 1. Negative feedback is applied to the operational amplifier 2, the input impedance is extremely high, and the output impedance is extremely low.

Next, the sampling operation in the constant voltage generating circuit shown in FIG. 1 will be described. In the present embodiment, the sampling period is 1 msec, the sampling period is about 1/8 of the sampling period, and the non-sampling period is about 7/8 of the sampling period.

During the sampling period, the sampling pulse signal SP goes high. As a result, the transistor QN1 turns on and the current source 3 operates, so that
A current flows through the transistor QP6, and the transistor QP6
, A reference potential is generated at the drain. This reference potential is supplied to the capacitor C1, and the capacitor C1 performs charging. Further, the reference potential is input to the gate of the P-channel transistor QP2 which is the non-inverting input of the operational amplifier 2. Since the input impedance of the non-inverting input of the operational amplifier 2 is extremely high, even if the capacitor C1 has a small capacitance,
It is possible to hold the reference potential for a certain period.

The reference potential is applied to the gates of P-channel transistors QP4 and QP5 to perform a current mirror operation. As a result, a current according to the reference potential flows through transistors QP4 and QP5. The current flowing through the transistor QP4 is divided into a current flowing through the transistor QP2 and a current flowing through the transistor QP3.

The output potential V _REG of the operational amplifier 2 is fed back to the gate of a P-channel transistor QP3, which is the inverting input of the operational amplifier 2, via an N-channel transistor QN4. Thus, the operational amplifier 2 operates so that the potential of the non-inverting input is equal to the potential of the inverting input.

In the non-sampling period, the sampling pulse signal SP becomes low level, the transistor QN1 is turned off, and no current flows through the current source 3 and the transistor QP1. Therefore, the non-inverting input of the operational amplifier 2 is held at the same potential as in the sampling period by the capacitor C1 holding the reference potential in the sampling period. As a result, the operational amplifier 2 performs the same operation as in the sampling period, and can obtain a constant voltage output.

In this embodiment, the reference potential generator 1
Consumes about 10 nA in the operational amplifier 2
, A current of about 5 nA is consumed. Therefore, by performing the intermittent operation in the reference potential generating section 1, the power consumption of the entire constant voltage generating circuit can be greatly reduced. Also,
By always operating the operational amplifier 2, the output potential V _REG can be stabilized even if the power supply voltage before stabilization rapidly changes. In addition, by performing the intermittent operation in the reference potential generating unit 1, the channel length L does not have to be increased in order to reduce the current supply capability of the depletion transistor serving as the current source, so that the chip size does not increase.

Next, a constant voltage generation circuit according to a second embodiment of the present invention will be described. FIG. 2 is a block diagram showing a configuration of the constant voltage generation circuit according to the second embodiment of the present invention. The constant voltage generation circuit shown in FIG. 2 includes a P-channel transistor QP1 and an N-channel transistor QN1 as switching transistors for causing the reference potential generation unit 1 to perform a sampling operation. That is, the reference potential generating portion 1, instead of the power supply potential V _DD of the high potential side, the drain of the transistor QP1 is connected.

The sampling pulse signal SP is applied to the gate of the transistor QN1, and the transistor QP1
, The inverted sampling pulse signal XS obtained by inverting the sampling pulse signal SP by the inverting circuit 4.
P is applied. When the sampling pulse signal SP is at a high level, these transistors are turned on, and the reference potential generator 1 operates. On the other hand, when the sampling pulse signal SP is at a low level, these transistors are turned off, and the reference potential generator 11 stops operating. Other points are the same as in the first embodiment.

[0029]

As described above, according to the present invention, in a constant voltage generating circuit for generating a constant voltage, low power consumption can be achieved without increasing the transistor size of the current source. Further, fluctuation of the output potential can be reduced.

[Brief description of the drawings]

FIG. 1 is a circuit diagram showing a configuration of a constant voltage generation circuit according to a first embodiment of the present invention.

FIG. 2 is a block diagram illustrating a configuration of a constant voltage generation circuit according to a second embodiment of the present invention.

FIG. 3 is a block diagram showing a configuration of a conventional constant voltage generation circuit of a type that always operates.

FIG. 4 is a block diagram showing a configuration of a conventional constant voltage generation circuit of a type that performs a sampling operation.

FIG. 5 is a circuit diagram showing a specific circuit configuration of a conventional constant voltage generation circuit of a type that performs a sampling operation.

FIG. 6 is a diagram showing a change in output potential in a conventional constant voltage generation circuit of a type that performs a sampling operation.

[Description of Signs] 1, 11 Reference potential generator 2, 12 Operational amplifier 3, 14 Current source 4, 13 Inverting circuit QP1 to QP17 P-channel type transistor QN1 to QN16 N-channel type transistor C1, C2, C11, C12 Capacitor

Continued on the front page F-term (reference) 5H420 NA27 NB02 NB16 NB25 NB36 NC02 NC03 NC14 NC33 NC38 NE02 NE26 5J056 AA04 BB17 BB57 CC01 CC02 CC04 CC10 DD13 DD17 DD28 DD51 EE07 EE12 5J091 AA01 AA47 AA53 KA17 CA36 KA09 KA11 KA19 MA11 MA21 TA01 TA06 5J092 AA01 AA47 AA53 AA58 CA11 CA36 FA18 GR09 HA09 HA17 HA29 HA39 KA04 KA05 KA09 KA11 KA19 MA11 MA21 TA01 TA06

Claims (4)

[Claims] A reference potential generating means for generating a reference potential based on a current output from a current source; a capacitor for holding a reference potential generated by the reference potential generating means; A constant voltage generating circuit comprising: amplifying means for generating an output potential based on the generated reference potential; and switch means for turning on / off a current source included in the reference potential generating means based on an applied signal. 2. The reference potential generating means includes: a depletion transistor serving as a current source; and a second transistor connected in saturation to generate a reference potential based on a current supplied from the depletion transistor. The constant voltage generating circuit according to claim 1, 3. The constant voltage generation circuit according to claim 1, wherein said amplification means includes an operational amplifier for performing impedance conversion between input and output. 4. The constant according to claim 1, wherein said switch means includes a third transistor connected between a current source included in said reference potential generation means and a power supply potential. Voltage generation circuit.