JP2002337387A - Optical print head - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an optical print head in which a high resolution can be attained, connection with a drive IC is facilitated and the drive IC can be standardized while reducing the cost. SOLUTION: The optical print head comprises a plurality of light emitting elements 26 each having a plurality of light emitting parts 27a and arranged substantially linearly, a plurality of drive ICs 1 for driving the light emitting elements 26, a first connecting means 35 for connecting the first output terminal 33 of the drive IC1 directly with the light emitting element 26, and a second connecting means 36 for connecting the second output terminal 34 of the drive IC1 with other light emitting element 26 adjacent to the light emitting element 26 through a conductive pattern 22.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to an optical print head.

[0002]

2. Description of the Related Art Conventionally, as shown in, for example, Japanese Utility Model Publication No. 6-4887, individual electrodes are provided on the front side of an element in a one-to-one correspondence with a plurality of light emitting portions, and a common electrode is provided on the back side of the element. Was. As described above, since time-division driving cannot be performed,
It is necessary to provide the same number of individual electrodes as the number of light emitting units. for that reason,
As the density of the light emitting unit increases, the individual electrodes also have a high density arrangement, and there is a first disadvantage that the connection with the driving IC becomes difficult.

[0003]

In order to solve this drawback, the present inventor has divided the plurality of light emitting units into four groups, provided four common electrodes connected to each group, and provided light emitting units belonging to different groups. 96 individual electrodes connected to the section were provided. With this configuration, by selecting four common electrodes in a time-division manner, the number of individual electrodes can be reduced to 1/4 of the conventional one. For example, 12
It has a resolution of 00 dpi and a driving IC (1200 dpi
i dedicated) has become easier.

However, in the above configuration, for example, 600d
To obtain an optical printhead of 400 dpi or 400 dpi,
Driving IC for 600 dpi or 400 dpi for each
A dedicated driving IC is required. As a result, the driving IC
There is a second drawback that cannot be shared (generalized).

Further, the above configuration has a third disadvantage that one driving IC is required for one element, the number of driving ICs is large, and the cost is high. Accordingly, the present invention provides an optical print head which can provide high resolution, can be easily connected to a driving IC, can use a common driving IC, and is inexpensive in consideration of such conventional disadvantages.

[0006]

According to a first aspect of the present invention, there is provided a light emitting device comprising: a plurality of light emitting elements each having a plurality of light emitting portions; A plurality of driving ICs for driving the element, first connecting means for directly connecting the first output terminal of the driving IC to the light emitting element, and a second output terminal of the driving IC and adjacent to the light emitting element; A second connecting another light emitting element via a conductive pattern;
Connection means.

According to a second aspect of the present invention, the conductive pattern is provided on a substrate, an insulating layer is provided on the conductive pattern, the light emitting element is provided on the insulating layer, and the conductive pattern is provided with the light emitting element. It is arranged below the element and below another light emitting element adjacent to the light emitting element.

In the present invention, the total number of the light emitting elements is A, and the number of the driving ICs is A / N (N is A
> N ≧ 2) or an integer close to A / N.

According to a fourth aspect of the present invention, the light emitting element is
A plurality of common electrodes connected to the light emitting units belonging to the same group, and a plurality of individual electrodes connected to the light emitting units belonging to different groups, wherein the driving IC has individual terminals corresponding to the individual electrodes; And a common terminal corresponding to the common electrode.

According to a fifth aspect of the present invention, in the driving IC, the first driving section for driving the individual electrodes and the second driving section for selecting the common electrode are formed in the same IC. .

[0011]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An optical print head 20 according to a first embodiment of the present invention will be described below with reference to FIGS.
FIG. 1 shows a driving IC used in the optical print head 20.
2 is a circuit block diagram of FIG. 1, and FIG. 2 is a circuit block diagram of FIG.
10 is a main part circuit block diagram extracted focusing on a portion related to one output terminal DO1 to DO96. FIG. First, a description will be given with reference to these drawings.

As shown in FIG. 1, the driving IC 1 is connected to an individual terminal section composed of a plurality of (n) output terminals DO for driving an element (for an individual electrode 28 described later), and to each output terminal DO. A common terminal section composed of a first driving section 2 for supplying a predetermined current output as a driving signal thereto and a plurality (m) of common terminals CD for group selection (for a common electrode 27 described later). And a second drive unit 3 connected to each common terminal CD and selectively switching these to one power supply potential, for example, the ground potential VSS. In the following, n = 96 and m =
The case of No. 4 will be described as an example, but the present invention is not limited to this.

The first drive section 2 includes a data signal storage circuit 4 for temporarily storing a serial input data signal sequentially supplied from a data input terminal SI, and the first drive section 2 based on the data signal output from the data signal storage circuit 4. Each output terminal D
A drive circuit 5 that outputs a drive signal to O1 to DO96, a current supply circuit 6 that supplies a constant current to the drive circuit 5, and a predetermined timing signal to each of the first drive unit 2 and the second drive unit 3. And a timing control circuit 7 for supplying. As described above, the first drive unit 2 includes the individual terminals DO1 to DO
The individual electrodes 28 are driven via O96.

The data signal storage circuit 4 takes in a data signal serially input from the data input terminal SI in synchronization with the clock signal CLK1 and serially outputs the data signal from the data output terminal SO in an n × m (384) bit shift. The circuit includes a register 8 and a latch circuit 9 having an nxm (384) bit configuration, which takes in the data signals taken in by the shift register 8 in parallel based on the load signal LOAD1. The n × m (384) data signals output in parallel from the shift register 8 can be supplied to the storage circuit 10 without passing through the latch circuit 9.

When the data signal is composed of a plurality of bits, the configuration of the shift register 8 and the latch circuit 9 can be changed accordingly. For example, the shift register 8 can be replaced by a memory of an addressing system. It can also be configured.

The driving circuit 5 outputs n
A first selection circuit 11A for sequentially selecting and outputting data signals in units of n from × m (384) data signals, and the output terminals DO1 to DO96 are connected based on the output of the first selection circuit 11A. Output a constant current through n (9
6) A first drive circuit 12A having a bit configuration is provided as a basic configuration. The drive circuit 5 includes, in addition to the basic configuration, a correction data storage circuit 10 for storing nxm (384) correction data for data correction as needed, and a correction data storage circuit 10 A second selection circuit 11B for correction data, which sequentially selects and outputs correction data signals in units of n from the n × m (384) correction data signals output from the CPU, and a selection circuit for this correction data A second drive circuit 12B for correcting an n (96) bit configuration that outputs an output of a current value increased or decreased based on the output of 11B as a drive signal via the output terminals DO1 to DO96 can be provided.

The storage circuit 10 is, for example, a latch circuit having an S × n × m bit configuration so that n × m (384) correction data composed of S bits (for example, 3 bit configuration) can be stored. Can be configured. Writing of correction data to each correction data storage circuit 10 is performed based on n × m unit signals supplied in parallel from the shift register 8.

Writing to the correction data storage circuit 10 can be performed in advance. That is, the operation of storing each bit of the correction data via the shift register 8 with only the storage circuit 10 in the write state is repeated three times.

The drive circuit 12, as shown in FIG.
One output terminal DO is configured to include four current amplifiers 12a to 12d, each having a different current output, and the same number of output amplifiers as the number of output terminals DO. Four current amplifiers 12a to 12 to which current is supplied from the current supply circuit 6
d allows the total output current to be changed in a range of about 3 to 5 mA based on 4 mA by individually controlling the operation state.

The selection circuit 11 selects n × m pieces of data and correction data stored in the latch circuit 9 and the correction data storage circuit 10 in order to perform time-division driving in units of n, and performs m times of selection. It is a circuit for taking out and is constituted by a plurality of logic gate circuits. The gate of this selection circuit 11 is controlled by a strobe control signal generation circuit 14 constituting a part of the timing control circuit 7.

This strobe control signal generating circuit 14
Time-division timing (selection timing of the selection circuit)
Is a circuit for generating internal strobe signals (STB1 to STB4) based on a strobe signal (inverted STB) which is one of the control signals supplied from the outside so as to define, for example, two flip-flops FF1 , FF
It can be constituted by a counter combining two and a plurality (four) of logic gate circuits. As described above, the strobe control signal generation circuit 14 generates four internal strobe signals (STB1 to STB4) based on one external strobe signal (inverted STB).

That is, a control signal (external strobe signal) is generated using a smaller number of signal lines than the number of internal strobe signals.
Therefore, the number of control signal terminals to be connected to the outside can be reduced, the size of the IC can be reduced, and the number of external wires such as wire bond wires can be reduced.

The strobe control signal generation circuit 14
In addition to resetting by the reset signal RESET, resetting can be performed in synchronization with the input of a data signal for one line.
The configuration may be such that the flip-flops FF1 and FF2 are reset.

Next, referring to FIG. 2, one output terminal DO
The data flow will be described focusing on 1. The data for one IC (384 on / off data) stored in the latch circuit 9 is connected to the internal strobe signals STB1 to STB4 when the internal strobe signals STB1 to STB4 are sequentially switched to H level. As a result of opening only the AND gate circuit, data is selectively output during that time. In the example shown in FIG. 2, the first to fourth data inside one IC is sequentially used for driving the drive circuit 12.

Similarly, the correction data having a 3-bit configuration stored in the correction data storage circuit 10 is similarly opened as a result of the set of three AND gate circuits being opened by sequentially switching the internal strobe signals STB1 to STB4 to the H level. It is selectively output during that time. The output of the correction data storage circuit 10 is supplied to a drive circuit 12, and the three current amplifiers 1
2b to 12d are selectively operated.

Next, the second driving section 3 will be described. The second drive unit 3 is a circuit for selectively switching one of the common terminals CD1 to CD4 to the ground potential VSS, and is configured to switch at a timing synchronized with the internal strobe signals STB1 to STB4. It is also possible to adopt a configuration in which switching is performed using another signal synchronized with the selection timing of No. 11.

As described above, the second driver 3 is connected to the common terminal CD1.
To select the common electrode 27 through CD4. As described above, in the driving IC 1, the first driving unit 2 for driving the individual electrode 28 and the second driving unit 3 for selecting the common electrode 27 are configured in the same IC.
This concludes the description of the driving IC 1.

Next, the optical print head 20 will be described with reference to FIGS. FIG. 3 shows an optical print head 2
4 is a sectional view taken along line A1-A2 of FIG. 3, FIG. 5 is a sectional view taken along line B1-B2 of FIG. 3, and FIG. 6 is a partial circuit diagram of the optical print head 20.

The substrate 21 is, for example, an insulating substrate and is long. The conductive pattern 22 is
In this case, the same patterns are formed. An insulating layer 23 is formed on the conductive pattern 22. An exposed portion 24 is formed at the right end of the conductive pattern 22, and an exposed portion 25 is formed at the left end.

The light emitting element 26 is, for example, a light emitting diode in which a plurality of (m × n = 384) light emitting portions 27a are arranged on the upper surface thereof along the longitudinal direction. For example, the twenty light emitting elements 26-1 to 26-20 are fixed on the insulating layer 23 via the insulating adhesive 29a so as to be arranged substantially linearly (see FIGS. 4 and 5). .

As described above, the first conductive pattern 2 from the left
2 is below light emitting element 26-20 and light emitting element 26
It is arranged below the light emitting element 26-19 adjacent to -20.

The second conductive pattern 22 from the left is a light emitting element 26-1 below and adjacent to the light emitting element 26-18.
7 is arranged below. The third conductive pattern 22 from the left is disposed below the light emitting element 26-16 and below the adjacent light emitting element 26-15 (see FIG. 3).

Each of the ten driving ICs 1-1 to 1-10 is fixed on the substrate 21 via an insulating adhesive 29b (see FIG. 5). The driving ICs 1-1 to 1-10 are respectively light emitting elements 26-2, 26-4, 26-6, 26-
8, 26-10, 26-12, 26-14 (all not shown), 26-16, 26-18, and 26-20 are arranged below and close to each other (see FIG. 3). As described above, the driving ICs 1-1 to 1-10 are provided with the respective light emitting elements 26-1 to 26-26.
-20.

Wiring pattern 3 for signal and power supply
0 is formed on the substrate 21 (see FIG. 6). Each of the driving ICs 1-1 to 1-10 has a relay pattern 31-.
It is connected to the wiring pattern 30 via 1-31-10.

For example, in the light emitting element 26-20, each of the plurality of light emitting portions 27a is formed independently so as to be able to be driven in a time-division manner. It is divided into groups.

Light emitting section 27 constituting light emitting element 26-20
In a, the first, fifth and ninth from the right are the first group,
The case where the second, sixth, and tenth are divided into a second group, the third, seventh, and eleventh are classified into a third group, and the fourth, eighth, and twelfth are classified into a fourth group (see FIG. 6).

In the light emitting element 26-20, the common electrode 27- commonly connected to the light emitting section 27a belonging to the first group
1 and a common electrode 27-2 commonly connected to the light emitting units 27a belonging to the second group. Similarly, the third
A common electrode 27-3 commonly connected to the light emitting units 27a belonging to the group and a common electrode 27-4 commonly connected to the light emitting units 27a belonging to the fourth group are provided.

As described above, the light emitting element 26-20 includes a plurality (four in FIG. 6) of common electrodes 27-1, 27-2, 27- connected to the light emitting portions 27a belonging to the same group.
3, 27-4. That is, the light emitting element 26-
20 common electrodes are common terminals CD1 to CD of the driving IC1.
D4 is provided in the same number as the number m.

In the light emitting element 26-20, (n / 2 = 48) individual electrodes 28-1 to 28-48 connected to the four adjacent light emitting portions 27a are provided. Here, n is the number of individual terminals 32 included in the driving IC 1 as described above.

As described above, the light emitting element 26-20 has a plurality of (for example, 48) individual electrodes 28-1 to 28-48 connected to the light emitting sections 27a belonging to different groups. The light emitting elements 26-1 to 26-19 correspond to the light emitting element 2 described above.
It has the same configuration as 6-20.

Individual terminals 32 of the driving IC 1-10
Among them, the even-numbered terminal is the first output terminal 33, for example. That is, the first output terminal 33 is connected to the terminals DO2, DO4,
..., D96. The second output terminals 34 are odd-numbered terminals DO1, DO3,..., D95.

The first connecting means 35 includes a driving IC 1-10.
The first output terminal 33 is directly connected to the individual electrode 28 of the light emitting element 26-20, and is made of, for example, a thin metal wire.

That is, the first connection means 35 is wired between the first output terminal DO2 and the individual electrode 28-1 and is wired between the first output terminal DO4 and the individual electrode 28-2. It is wired between one output terminal D96 and the individual electrodes 28-48.

Similarly, the first connecting means 35 connects the first output terminal 33 of the driving IC 1-B to the light emitting element 26-2.
The B individual electrodes 28 are directly connected. However,
B represents an integer from 1 to 9. The driving IC 1-
The configuration of B is the same as that of the driving IC 1-10.

The common terminal CD of the driving IC 1-10
1 to CD4 are connected to the common electrodes 27-1 to 27-4 of the light emitting element 26-20 via the conductive pattern 22, respectively.

The second connecting means 36 includes a driving IC 1-10.
Is connected to a second light emitting element 26-19 adjacent to the light emitting element 26-20 by the conductive pattern 22.
Is connected via

That is, the second connecting means 36 is connected to the first thin metal wire 3.
7 and a second thin metal wire 38 (see FIGS. 4 and 5). The first thin metal wire 37 is wired between the second output terminal 34 of the driving IC 1-9 and the exposed portion 25 of the conductive pattern 22 (see FIG. 5). The second thin metal wire 38 is connected to the individual electrode 28 of the light emitting element 26-17 and the conductive pattern 22.
(See FIG. 4).

Thus, the second driving IC 1-10
The output terminal DO1 is connected to the exposed portion 25 of the conductive pattern 22 via the first thin metal wire 37. The exposed portion 24 of the conductive pattern 22 is connected to the individual electrode 28-1 of the light emitting element 26-19 via the second thin metal wire 38.
As a result, the second output terminal DO1 is connected to the light emitting element 26-19.
Is electrically connected to the individual electrode 28-1.

Similarly, the second output terminal D95 of the driving IC 1-10 is connected to the exposed portion 25 of the conductive pattern 22 via the first thin metal wire 37. Conductive pattern 22
The exposed portion 24 of the light-emitting element 2 is
6-19 are connected to individual electrodes 28-48. As a result, the second output terminal D96 is electrically connected to the individual electrodes 28-48 of the light emitting elements 26-19.

As described above, the driving IC 1-10 and the light emitting element 26-20 are directly connected by the first connection means 35. Then, the driving IC is driven by the second connecting means 36.
1-10 and the adjacent light emitting element 26-19 are connected via the conductive pattern 22.

Similarly, the driving IC 1 -B and the light emitting elements 26-2 · B are directly connected by the first connecting means 35. Here, B is an integer from 1 to 9. Then, the driving IC 1-B and the adjacent light emitting element 26- (2 · B-1) are connected via the conductive pattern 22 by the second connection means 36.

The common terminals CD1 to CD4 of the driving IC 1-10 are connected via the conductive pattern 22 respectively.
Common electrodes 27-1 to 27-of light emitting element 26-19
4 is connected.

A data supply source (eg, a printer or the like, not shown) is, for example, 20 × 48 ×
4 = 3840 print data are supplied. This print data is transmitted to the light emitting unit 27 located at the far right of the light emitting element 26-1.
From the data of NO1 (signal for instructing lighting and non-lighting) given to a, the data of NO3840 given to the light emitting unit 27a located on the far left of the light emitting element 26-20.

The data rearrangement circuit (not shown) changes the arrangement order of the print data and changes the input terminal SI (see FIG. 6).
Outputs a serial input data signal.

For example, the terminal DO1 of the driving IC 1-10
The serial input data signal can change the arrangement order of the print data so that the output signal becomes the print data of NO3644 to NO3648. In this manner, by applying the serial input data signal in which the order of the print data is changed to the input terminal S1, the light emission from the rightmost light emitting portion 27a of the light emitting element 26-1 to the leftmost light emission of the light emitting element 26-20 is performed. The print data NO1 to NO3840 can be accurately given to the unit 27a.

In the above example, each of the light emitting elements 26-1 to 26-26
The number of the individual electrodes 28 included in −20 is n / 2 (48), and the total number A of the light emitting elements 26-1 to 26-20 is 20. The number of individual terminals 32 of each of the driving ICs 1-1 to 1-10 is n (96), and the driving ICs 1-1 to 1-10 are n.
The total number of 1-10 is 10, which is A / N (N = 2).

With the above configuration, the driving ICs 1-1 to 1--1
The total number of 10 becomes 10, which can be reduced to half of the conventional case. At this time, the total number of the light emitting units 27a is 20 ×
48 × 4 = 3840, and the resolution is 600 dpi. The optical print head 20 is configured by the above components.

Next, the operation of the optical print head 20, including the operation of the drive IC 1, will be described with reference to FIGS.

The correction data to be stored in the storage circuit 10 uses light amount correction data obtained in advance in order to make the light amounts of the respective light emitting portions 27a of the light emitting elements 26-1 to 26-20 uniform. Is assumed to be already stored in the storage circuit 10.

First, a reset signal RESET is supplied, whereby each section is set to an initial state. Subsequently, the setting signal SET is switched from the L level to the H level. As a result, writing to the storage circuit 10 is prohibited.

A data signal (3840 serial input data signals) is sequentially applied to the data input terminal S1 of the twentieth driving IC 1-10, and the data signals are sequentially transmitted in synchronization with the clock signal CLK1 (signal T1). Is taken into the shift register 8 of the application IC 1.

Next, the load signal LOAD1 is held at the H level for a predetermined time, and n × m data signals held in the shift registers 8 of the ICs 1-1 to 1-10 are input. At this time, the latch circuit 9 is selected (latched) at the time of the falling of the load signal LOAD1, so that n × m data signals taken into the shift register 8 are input to the latch circuit 9 and stored.

Immediately after the load signal LOAD1 switches from the H level to the L level, the external strobe signal (STB) indicating the light emission timing is held at the L level for a predetermined period from the H level, and the strobe control signal is generated accordingly. STB of internal strobe signal output from circuit 14
Only 1 switches from L level to H level. When the external strobe signal (inverted STB) subsequently switches from H level to L level, only the internal strobe signal STB2 switches to H level, and similarly STB3, STB4.
Only switches to the H level.

By the switching of the internal strobes STB1 to STB4, the position of the data signal selected and output by the selection circuit 11 from the latch circuit 9 or the storage circuit 10 is sequentially switched. For example, the first, fifth,..., 3837th data is selected by the internal strobe STB1, and the second, sixth,.
The eighth data is selected.

These data (to which 3-bit correction data is added as necessary) are supplied to the drive circuit 12. The drive circuit 12 has four current amplifiers 12a to 12a based on the data signal and the correction data added thereto.
12d is selectively operated, and its output current is output to an output terminal D.
It supplies to each individual electrode 28 of the light emitting elements 26-1 to 26-20 via O.

The current corresponding to the data signal or the correction data can be supplied to the individual electrodes 28 of all the light emitting elements 26-1 to 26-20, but only one quarter of the light emitting portions 27 a have the common electrode 27. In this example, only every fourth light emitting unit 27a selectively emits light.

The selective light emission for one line is performed by the time-division driving by the switching of quarters as described above, and by repeating this sequentially, the exposure for one screen can be performed.

As described above, each of the driving ICs 1-1 to 1-20 for driving the light emitting elements 26-1 to 26-20 corresponding to the in-element time division driving is synchronized with the timing in units of groups. The second driving section 3 which operates as a light-emitting element 26 corresponding to the driving ICs 1-1 to 1-20.
Since the configuration is such that time-division driving of -1 to 26-20 is performed, the load can be distributed.

Therefore, the maximum load applied to the second driving unit 3 for performing the time-division driving is determined by the corresponding light emitting elements 26-1 to 26-1.
It can be determined based on the number of light emitting units 27a belonging to one group of 26-20. As a result, the circuit for the time-division driving is compared with the case of performing the time-division driving for all the light emitting elements using the dedicated IC for the time-division driving (for selecting the common electrode) as in the conventional dynamic driving method. Can be greatly reduced.

The second driving section 3 of the driving ICs 1-1 to 1-10 can be constituted by a small circuit capable of controlling a small current. Can be formed in the same shape as that of the static type IC, so that the overall circuit configuration can be reduced in size.

Even if the number of time divisions is increased, the timing for the time division (internal strobe signal) is generated using the supply lines of the control signals smaller than the number of divisions. The number of terminals and the number of assembling operations can be reduced.

Further, the driving ICs 1-1 to 1-10 can store all correction data and select and output the correction data. Therefore, when performing time-division driving using the correction data, Can easily correct the data signal based on the stored correction data.

As the light emitting elements 26-1 to 26-20, in addition to the light emitting elements 27a arranged in one row, those arranged in a staggered manner or those arranged in two or more rows can be used. Then, the light emitting elements 26-1 to 26-2
In addition to the case where the driving ICs 1-1 to 1-10 are arranged on one side of 0, the driving ICs 1-1 to 1-10 can be arranged on both sides of the light emitting elements 26-1 to 26-20.

Next, an optical print head 40 according to Embodiment 2 of the present invention will be described with reference to the plan view of FIG. FIG.
In this case, the conductive pattern 22a is provided on the substrate 21a, and an insulating layer (not shown) is provided on the conductive pattern 22a.

For example, 18 light emitting elements 26a-1 to 26a-2
6a-18 are provided on the insulating layer. However, 26a
Only -13 to 26a-18 are shown. Each of the light emitting elements 26a-1 to 26a-18 is provided with 128 light emitting units 27b, and has a resolution of, for example, 400 dpi. As described above, each of the light emitting elements 26a-1 to 26a-18 has the plurality of light emitting units 27b and is arranged in a substantially straight line.

In each of the light emitting elements 26a-1 to 26a-18, four common electrodes (not shown, the optical print head 20) connected to the light emitting section 27b belonging to the same group.
The same as the above). Further, 32 individual electrodes (not shown, but the same as the optical print head 20) connected to the light emitting units 27b belonging to different groups are provided.

The conductive pattern 22a is formed by a light emitting element 26a-
Light-emitting element 26a-1 below and adjacent to 17
8, 26a-16.

The driving ICs 1-1 to 1-6 are the same as those of the optical print head 20. However, only the driving ICs 1-5 and 1-6 are shown.

Each of the driving ICs 1-1 to 1-6 has 96 individual terminals corresponding to each individual electrode provided on each of the light emitting elements 26a-1 to 26a-18. Also, the driving I
C1-1 to 1-6 are light emitting elements 26a-1 to 26a-
18 has four common terminals (not shown) connected to the respective common electrodes.

The driving ICs 1-1 to 1-6 include light emitting elements 26a-2, 26a-5, 26a-
8, 26a-11, 26a-14, and 26a-17, which drive the light emitting elements 26a-1 to 26a-18.

The first connecting means 35a is provided with a driving IC 1-6.
The first output terminal 33a is connected to the individual electrodes of the light emitting elements 26a-17. The second connection means 36a connects the second output terminal 34a of the driving IC 1-6 and the individual electrode of the adjacent light emitting element 26a-18 via the conductive pattern 22a. The second connection means 36b connects the second output terminal 34b of the driving IC 1-6 and the individual electrode of the adjacent light emitting element 26a-16 via the conductive pattern 22a.

Similarly, the first connection means 35a connects the first output terminal 33a of the driving IC 1-B (B is an integer from 1 to 5) to the individual light emitting element 26a- (3 · B-1). It connects the electrodes.

The second connecting means 36a is connected to the second output terminal 3 of the driving IC 1-B via the conductive pattern 22a.
4a and the individual electrodes of the adjacent light emitting elements 26a-3.B.

The second connecting means 36b is connected to the conductive pattern 22.
a, the second output terminal 34b of the driving IC 1-B
And the individual electrode of the adjacent light emitting element 26a- (3.B-2).

The optical print head 40 is constituted by the above components. In the above example, each light emitting element 26
The individual electrodes of a-1 to 26a-18 have n / 3 (32
), And the total number A of the light emitting elements 26a-1 to 26a-18 is 18.

Each of the driving ICs 1-1 to 1-6 has n (96) individual terminals.
The total number of 1-6 is 6, which is A / N (N = 3).

With the above configuration, the driving ICs 1-1 to 1--1
The total number of 6 becomes 6, which can be reduced to 1/3 of the conventional one.
In addition, the same drive ICs 1-1 to 1-6 as the optical print head 20 (that is, the same resolution as 1200 dpi) can be used, and components can be shared.

At this time, the total number of the light emitting portions 27b is 1
8 × 32 × 4 = 2304, and the resolution is 400 dp
i.

As described above, the light emitting elements 26a-1 to 26a
The total number of driving ICs 1-1 to 1-6 is A / N (N is an integer satisfying A> N ≧ 2) or A / N.
It is provided in an integer number close to N.

[0090]

According to the first aspect of the present invention, there are provided a plurality of light emitting elements each having a plurality of light emitting portions and arranged substantially linearly,
A plurality of driving ICs for driving the light emitting element, a first connection means for directly connecting the first output terminal of the driving IC and the light emitting element, a second output terminal of the driving IC and the light emitting element; Second connecting means for connecting another adjacent light emitting element via a conductive pattern is provided. According to the above configuration, a plurality of light emitting elements are driven by using one driving IC. Therefore, even if the number of light emitting elements connected to one driving IC changes (that is, at a different resolution). , A fixed driving IC can be used. As a result, the driving I
C can be shared.

According to a second aspect of the present invention, the conductive pattern is provided on a substrate, an insulating layer is provided on the conductive pattern, and the light emitting element is provided on the insulating layer. It is arranged below the element and below another light emitting element adjacent to the light emitting element.
With the above structure, the conductive pattern is arranged below the light emitting element and the other light emitting element adjacent thereto, so that space can be saved and a small optical print head can be obtained.

According to the third aspect of the present invention, the total number of the light emitting elements is A, and the number of the driving ICs is A / N (N is A
> N ≧ 2) or an integer number close to A / N. In this way, the number of driving ICs is changed to A / N
By doing so, the number can be reduced to 1/2 times, 1/3 times, or 1 / N times the conventional number, and the cost can be reduced.

According to the present invention of claim 4, the light emitting element is:
A plurality of common electrodes connected to the light emitting units belonging to the same group, and a plurality of individual electrodes connected to the light emitting units belonging to different groups, wherein the driving IC has individual terminals corresponding to the individual electrodes; And a common terminal corresponding to the common electrode. With this configuration, by selecting a plurality of (m) common electrodes in a time-sharing manner, the number of individual electrodes can be reduced to 1 / m times the number of the conventional electrodes. as a result,
Connection between the individual electrodes and the driving IC becomes easy. Also, 1
Since m light emitting units are connected to the individual electrodes, the resolution is increased to m times the conventional one.

According to the fifth aspect of the present invention, the driving IC
According to the present invention, a first driver for driving the individual electrodes and a second driver for selecting the common electrode are configured in the same IC. In this way, by configuring the first drive unit and the second drive unit inside the same IC, the cost can be reduced and the space can be saved as compared with the case where they are separately configured.

[Brief description of the drawings]

FIG. 1 is a block diagram of a driving IC used in an optical print head 20 according to Embodiment 1 of the present invention.

FIG. 2 is a main block diagram of FIG. 1;

FIG. 3 is a partial plan view of the optical print head 20.

FIG. 4 is a sectional view taken along line A1A2 of FIG. 3;

FIG. 5 is a sectional view taken along the line B1B2 of FIG. 3;

FIG. 6 is a partial circuit diagram of the optical print head.

FIG. 7 is a partial plan view of an optical print head 40 according to Embodiment 2 of the present invention.

[Explanation of symbols]

 1-8, 1-9, 1-10 Driving IC 22 Conductive pattern 26-15, 26-16, 26-17, 26-18, 26-19, 26-20 Light emitting element 27a Light emitting section 33 First output terminal 34 second output terminal 35 first connection means 36 second connection means

Claims (5)

[Claims] 1. A plurality of light-emitting elements each having a plurality of light-emitting units and arranged in a substantially straight line, a plurality of driving ICs for driving the light-emitting elements, and a first output terminal of the driving IC. First connecting means for directly connecting the light emitting element to the light emitting element, and second connecting means for connecting a second output terminal of the driving IC to another light emitting element adjacent to the light emitting element via a conductive pattern. Optical print head characterized by things. 2. The method according to claim 1, wherein the conductive pattern is provided on a substrate,
An insulating layer is provided on the conductive pattern, the light emitting element is provided on the insulating layer, and the conductive pattern is arranged below the light emitting element and below another light emitting element adjacent to the light emitting element. The optical print head according to claim 1, wherein: 3. The total number of the light emitting elements is A, and the number of the driving ICs is A / N (N is an integer satisfying A> N ≧ 2).
2. The optical print head according to claim 1, wherein the optical print head is provided in an integral number close to A / N. 4. The driving IC has a plurality of common electrodes connected to light emitting units belonging to the same group and a plurality of individual electrodes connected to light emitting units belonging to different groups. The optical print head according to claim 1, further comprising: an individual terminal corresponding to the individual electrode; and a common terminal corresponding to the common electrode. 5. The driving IC according to claim 1, wherein a first driving unit for driving the individual electrode and a second driving unit for selecting the common electrode are formed in the same IC. An optical printhead according to claim 4.