JP2002329853A - Light receiving element with built-in circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve the deterioration in response speed due to the extension of travel distance of light carriers by diffusion and to improve a cut-off frequency, when a division section DB in a divided photodiode is illuminated with a light beam in a light receiving element 101 built-in circuit with that mounts a divided photodiode PD. SOLUTION: The light receiving element with built-in circuit comprises a P-type silicon substrate 1, a P-type epitaxial layer 2 formed on the substrate 1, and a plurality of N-type diffusion layers 3 selectively formed in the surface region of the epitaxial layer 2. Light detection photodiode sections D1, D2, D3, and D5 for detecting signal light for outputting the photoelectric conversion signal are composed by the P-type epitaxial layer 2. The divided photodiode PD is composed by the plurality of light detection photodiode sections.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a light receiving element with a built-in circuit having a circuit for processing a photoelectric conversion signal.
The present invention relates to a structure for improving the response speed of a light-receiving element having a divided light-receiving region, such as a divided photodiode including a plurality of light-detecting photodiode units.

[0002]

2. Description of the Related Art Such a divided photodiode has been conventionally used, for example, as a signal detecting element of an optical pickup.

In recent years, as optical disk devices have become smaller and more sophisticated, it has become important to reduce the size and weight of optical pickups.
In order to realize this, a function for generating a tracking beam, a function for performing optical branching, and a function for generating an error signal are integrated into one hologram element, and a laser diode, a photodiode, and the like are integrated into one hologram element. An optical module having a structure in which the hologram element is housed in a package (not shown) and the hologram element is arranged on the upper surface of the package has been proposed.

FIG. 9 shows a schematic configuration of an optical system of the pickup. The signal detection principle in this optical system will be briefly described. Light emitted from a laser diode LD is divided into two tracking sub-beams and one by a tracking beam generation diffraction grating 30 arranged on the back side of the hologram element 31. It is divided into three light beams, namely, one information signal reading main beam.

The light transmitted through the hologram element 31 on the upper surface of the package as the zero-order light is converted into a parallel light by a collimator lens 32, and then converted into a parallel light.
The light is condensed on the disk 34 by 3. The reflected light modulated by the pits on the disk 34 is transmitted through the objective lens 33 and the collimator lens 32, then diffracted by the hologram element 31, and divided into five first-order diffracted light beams. Photodiode section) D
The light is guided onto a five-segment photodiode PD having 1 to D5.

Here, the hologram element 31 is composed of two regions 31a and 31b having different diffraction periods. Of the reflected light of the main beam, the one that has entered the one region 31a is the photodetectors D2 and D3. Division D for dividing
B, the other region 31 of the reflected light of the main beam
The light incident on b is collected on the light detection unit D4. Of the reflected light of the two sub beams, those incident on the region 31a of the hologram element 31 are condensed on the photodetectors D1 and D5, respectively. In addition, the above-mentioned optical system changes the distance between the hologram element 31 and the disk 34 by changing the photodiode P of the reflected light of the main beam.
The position on D changes in the direction in which the photodetector photodiodes D2 and D3 are arranged. When the main beam is focused on the disk, the reflected light is reflected on the photodetector photodiodes D2 and D3. The light enters the division DB between D2 and D3.

Accordingly, the five-division photodiode PD
Outputs corresponding to the respective light detection units D1 to D5 are represented by S1 to S5.
Then, the focus error signal FES is given by FES = S2-S3.

On the other hand, a tracking error is detected by a so-called three-beam method. Since the two tracking sub-beams are respectively condensed on the photodetectors D1 and D5, the tracking error signal TES is given by TES = S1-S5. When the error signal TES is 0, it means that the main beam is located on the track to be irradiated. Further, the reproduction signal RF is given by RF = S2 + S3 + S4 as the sum of the outputs of the photodetectors D2 to D4 that receive the reflected light of the main beam.

FIG. 10 is a plan view showing the structure of a five-segment photodiode PD incorporated in the configuration of the optical system. Here, a signal processing circuit incorporated on the substrate together with the five-division photodiode is not shown. In the figure, reference numeral 200 denotes a light receiving element with a built-in circuit mounted with a conventionally used five-division photodiode PD for light detection, and 202 denotes each of the light detection photodiode units D1 to D1.
An anode electrode common to D5, and 203a to 203e are cathode electrodes corresponding to the respective photodetector photodiode sections D1 to D5.

The shape of the five-division photodiode is determined by the above-described optical system. Here, the light detecting portion of the photodiode has a vertically long shape, that is, a shape that is long in the direction of arrow Y in FIG. This shape is determined for the following reasons.

The laser diode L constituting the above optical system
D and the photodiode PD are incorporated in one package, and the hologram element 31 is adhered to the upper surface of the package. When the laser diode and the photodiode are aligned, the direction Y in which the photodetectors D2, D3 and the photodetector D4 are arranged, and the direction X perpendicular thereto.
Causes a relative deviation. Also, the oscillation wavelength of the laser diode LD varies among individuals,
It changes due to temperature fluctuations.

Here, the laser beam and the photodiode are incident on the light receiving surface of the photodiode PD due to the displacement in the Y direction and the change in the diffraction angle of the diffracted light due to the variation in the oscillation wavelength in the alignment between the laser diode and the photodiode. The position of the reflected light from the rotating disk changes in the Y direction.

Therefore, the light receiving surface of the photodiode PD needs to have a wide dimension in the Y direction, that is, the direction in which the position of incidence of the diffracted light on the photodiode changes due to the change in the diffraction angle, as shown in FIG. is there.

In the X direction orthogonal to the Y direction of the light receiving surface, even if the diffraction angle of the diffracted light changes due to the variation between the individual oscillation wavelengths of the laser diode and the change in the oscillation wavelength due to the temperature fluctuation, The incident position of the diffracted light on the photodiode does not change. In addition, when the hologram 31 is bonded to the upper surface of the package, the position of the laser diode and the photodiode in the X direction can be adjusted by rotating the hologram 31. Therefore, it is necessary to increase the size of the light receiving surface in the X direction. Absent. In addition, the dimension of the light receiving surface in the X direction is difficult to adjust when incorporating the optical pickup into the optical disc device if three beams arranged in the X direction, that is, one main beam and two sub beams are separated, Each photodetector D of the photodiode
It is necessary to reduce the width of 1 to D5 and the width of the division DB between the photodetectors.

From the above, as shown in FIG. 10, the shape of each light detecting portion of the photodiode PD is necessarily a vertically long structure, that is, the direction in which the incident position of the diffracted light to the photodiode changes due to the change of the diffraction angle. Results in a structure having a long dimension.

FIG. 11 is a diagram showing a cross-sectional structure taken along the line aa 'of the photodiode of the photodetector with a built-in circuit shown in FIG. In this figure, structures formed by steps subsequent to the metal processing step, for example, a multilayer wiring, a protective film, and the like are omitted.

In FIG. 11, reference numeral 200 denotes a light receiving element with a built-in circuit in which the five-division photodiode PD is mounted together with a signal processing circuit (not shown).
An N-type epitaxial layer 14 is formed thereon. At the boundary between the substrate 11 and the N-type epitaxial layer 14,
A P-type buried diffusion layer 12 is selectively formed, and a P-type isolation diffusion layer 15 is formed on the surface of the N-type epitaxial layer 14 so as to reach the P-type buried diffusion layer 12. The N-type epitaxial layer 14 is divided into a plurality of N-type semiconductor regions by the P-type buried diffusion layer 12 and the P-type separation / diffusion layer 15 connected thereto. Here, the divided individual N-type semiconductor regions and the substrate portion therebelow constitute light detection photodiode portions D1 to D5 for detecting signal light.

An oxide film 17 is formed on the surface of the N-type epitaxial layer 14, and the surface portion of the N-type epitaxial layer 14 and the divided photodiodes constituting the photodiode portions D1, D2, D3 and D5 are formed. The oxide film 17 has been removed from the surface of the P-type diffusion layer 15 serving as an isolation portion, and a P-type diffusion layer 16 has been formed in these portions. Then, on the surface of the P-type diffusion layer 16, a silicon nitride film 18 whose thickness is set in accordance with the wavelength of the laser diode so as to serve as an anti-reflection film.
Are formed. Reference numeral 19a denotes an electrode wiring which is formed on the P-type separation / diffusion layer 15 at both ends of the divided photodiode PD and constitutes the anode electrode 202;
Is a metal film formed on a portion of the surface of the nitride film 18 where the signal light is not applied.

The method of manufacturing this photodiode is as follows.

First, the P-type buried diffusion layer 1 is formed in a region on the P-type semiconductor substrate 11 which is to be a division portion for dividing the photodetection portion.
2 is formed (FIG. 12A).

Next, an N-type epitaxial layer 14 is formed on the entire surface of the P-type semiconductor substrate 11, as shown in FIG. Thereafter, a portion of the N-type epitaxial layer 14 located on the P-type buried diffusion layer 12 is
To form Thereby, electrically separated photodetectors D1 to D5 are formed.

Next, a P-type diffusion layer 16 is formed on the surface of the N-type epitaxial layer 14 and the surface of the P-type separation / diffusion layer 15 which is a division of the photodetectors D1 to D5 (FIG. 12).
(C)).

Further, as shown in FIG. 12D, an oxide film 17 formed on the surface of the P-type diffusion layer 16 when the P-type diffusion layer 16 is formed.
Of these, a portion corresponding to the light receiving region on the surface of the P-type diffusion layer 16 is removed, and a nitride film 18 is formed on the entire surface. At this time, the thickness of the nitride film 18 is set to the wavelength of the laser diode so that the nitride film 18 becomes an anti-reflection film.

Then, an electrode window is opened in the nitride film 18 and the oxide film 17 to form the electrode wiring 19a, and at the same time, the metal film 1 is formed on the surface of the nitride film 18 where signal light does not shine.
9 to obtain a five-division photodiode PD having the structure shown in FIG. The signal processing circuit portion (not shown) is formed on the semiconductor substrate 1 by a normal bipolar IC process.
1 is produced.

The light receiving element 200 with a built-in circuit having such a configuration.
In the five-division photodiode PD, the photodetectors D1 to D
Since the PN junction of the divisional portion 5 is covered with the P-type diffusion layer 16, even if the nitride film 18 is formed directly on the photodiode surface, problems such as an increase in junction leakage do not occur. Therefore, in the division portion DB between the photodetectors D2 and D3 of the photodiode to which the focused beam actually strikes, reflection of the focused beam on the light receiving surface is suppressed by the nitride film 18 to low reflection. High sensitivity can be realized.

In addition, the divided photodiode PD
Here, the light detecting portions D1 and D1
2 and between the photodetectors D3 and D5, the metal film 19 is less susceptible to stray light and the like,
The S / N of the photodiode can be improved.

However, the photodetectors D2, D3, and D4 that process the reproduction signal RF require particularly high-speed operations. Among them, in the light detection units D2 and D3, when a light beam is applied to these divided units DB, the cutoff frequency is lower than when the light beam is applied to the center of each light detection unit.

As a result of analyzing a state in which a light beam is applied to the divided portion DB of the adjacent photodetecting portion by using a device simulation, in this state, photocarriers are supplied to the P-type buried diffusion layer 12 of the divided portion DB. , And reaches the junction between the N-type epitaxial layer 14 and the P-type semiconductor substrate 11. Therefore, the fact that the distance traveled by diffusion of the optical carriers is long may be the cause of the decrease in the cutoff frequency. all right.

Therefore, photodetection split photodiodes which have taken measures against such a decrease in cutoff frequency have already been developed.

FIG. 13 is a view for explaining the structure of such an improved split photodiode.
2 shows a portion corresponding to the sectional structure of the divided photodiode PD of the light receiving element 200 with a built-in circuit.

In the figure, reference numeral 201 denotes a light receiving element with a built-in circuit on which an improved divided photodiode PD1 is mounted, which is a photodetector photodiode section D1, D2, or D2 of the substrate 11 in the divided photodiode PD shown in FIG. D
3, an N-type buried diffusion layer 13 is formed in a portion constituting D5.

The method of manufacturing the light receiving element with a built-in circuit 201 equipped with the photodiode PD1 of this structure is described in the light receiving element with a built-in circuit 200 mounted with the divided photodiode PD.
The only difference is that an N-type buried diffusion layer 13 is formed in advance in a part of a region where a photodetector photodiode is to be formed on the surface of a P-type semiconductor substrate 11. The processing after the formation of the diffusion layer is the same as that in the manufacturing process of the light receiving element 200 with a built-in circuit.

In the divided photodiode PD1 for photodetection having such a structure, the N-type buried diffusion layer 1 is located near the P-type buried diffusion layer 12, which is the division part DB, where the optical carrier bypasses.
3 will be located. For this reason, when a light beam is applied to the divided portion DB of the photodetector photodiode, the photocarriers move from the deep position below the divided portion DB to the separated portion DB.
In the path that bypasses the PN junction and moves to the PN junction surface, the depletion region expands to the vicinity of the split part, and the distance that the optical carrier moves by diffusion is shortened, thereby improving the cutoff frequency.

In the above-mentioned divided photodiode PD1, the P-type semiconductor substrate 11 and the N-type epitaxial layer
Since the junction position between the P-type semiconductor substrate 11 and the N-type buried diffusion layer 13 is deeper than the junction position, the distance that the optical carrier moves by diffusion in the depth direction is shorter. For this reason, the cutoff frequency when a light beam is irradiated to a part other than the division part is also improved.

[0035]

However, as described above, the N-type buried diffusion layer 13 is formed in each photodiode portion.
There is also room for improvement in the following points in the light receiving element with a built-in circuit equipped with the improved divided photodiode, which forms the above.

That is, in the above divided photodiode,
The problem that optical carriers generated in the lower part of the division DB dividing the light receiving region bypass the P-type buried diffusion layer 12 as the division DB has not been essentially solved. Therefore, in the improved split photodiode PD1,
Despite the cutoff frequency being improved, the light detectors D2 and D3 still irradiate these divisions DB with a light beam as compared with the case where the light beam is radiated to the center of each light detector. The cutoff frequency will decrease.

Further, when the frequency of the signal light is shortened, many optical carriers are generated in a shallow portion of the substrate.
P-type separation / diffusion layer 1 serving as a separation part of a divided photodiode
Since No. 5 has a high impurity concentration, there is also a problem that the lifetime of the optical carrier is short and the sensitivity is reduced.

Such a problem occurs as long as a P-type separation / diffusion layer is used as the separation part DB. For an essential solution, a division part must be formed without using a P-type separation / diffusion layer. However, the P-type separation / diffusion layer is indispensable for monolithically mounting a plurality of elements on a substrate, and the reason why the P-type separation / diffusion layer is necessary will be described below. .

First, in a light receiving element with a built-in circuit on which a signal processing circuit for a photoelectric conversion signal is mounted, a circuit element constituting the signal processing circuit is mounted on the same substrate as the substrate on which the light receiving element is formed.
For example, an NPN transistor or the like is formed. Each circuit element is formed in the N-type epitaxial layer from the viewpoint of conductivity or the like. In this case, in order to electrically isolate each element in the N-type epitaxial layer, a region where adjacent elements are arranged It is necessary to prevent current from flowing between the regions regardless of the potential level of each region. Therefore, in order to electrically separate the regions where the adjacent elements are arranged by the semiconductor layer, a P-type semiconductor having a conductivity type opposite to that of the N-type epitaxial layer is formed so that a PN junction and an NP junction are interposed between these regions. It is necessary to form a mold separation diffusion layer.

Such an element separation structure is also applied to a case where a plurality of photodiode units, which are photoelectric conversion elements, are provided on the same substrate, and in particular, a circuit built-in circuit having a signal processing circuit mounted thereon. In the light-receiving element, a plurality of photodetector photodiode portions constituting a divided photodiode, each including a P-type semiconductor substrate and an N-type epitaxial layer thereon, are also formed by a P-type separation / diffusion layer formed in the N-type epitaxial layer. A structure that electrically separates is adopted.

The present invention has been made to solve the above-described problem, and is a circuit capable of improving the deterioration of the response speed in a state where a light beam is applied to a division section that divides an adjacent photodetection section. It is intended to obtain a built-in light receiving element.

[0042]

A light receiving element with a built-in circuit according to the present invention (claim 1) has a first conductivity type semiconductor substrate and a first conductivity type semiconductor layer formed on the first conductivity type semiconductor substrate. And a plurality of second conductivity type semiconductor layers selectively formed in a surface region of the first conductivity type semiconductor layer.

In this light receiving element with a built-in circuit, the first conductivity type semiconductor layer and each of the second conductivity type semiconductor layers have a plurality of photodetection photodiode sections for detecting signal light and outputting the photoelectric conversion signal. A plurality of light-detecting photodiode portions, wherein a divided photodiode is formed, and the first conductive semiconductor layer is electrically separated from a region where the divided photodiode is formed. In the region, circuit elements that constitute a signal processing circuit that processes the photoelectric conversion signal are formed. Thereby, the above object is achieved.

According to a second aspect of the present invention, in the light receiving element with a built-in circuit according to the first aspect, the divided photodiode extends each of the second conductive type semiconductor layers from an adjacent second conductive type semiconductor layer. In this structure, the depletion layers are arranged so as to be in contact with each other.

According to a third aspect of the present invention, in the photodetector with a built-in circuit according to the second aspect, the divided photodiode is formed by a depletion layer extending from each of the second conductivity type semiconductor layers. The structure reaches the inside of the one conductivity type semiconductor substrate.

According to a fourth aspect of the present invention, in the photodetector with a built-in circuit according to the second or third aspect, the first conductive type semiconductor layer is formed on a P-type semiconductor substrate as the first conductive type semiconductor substrate. This is a grown P-type epitaxial layer.

The P-type epitaxial layer has an N-type diffusion layer as a second conductivity type semiconductor layer constituting the photodetection photodiode section, and an N-type diffusion layer as a region for forming an NPN transistor which is a circuit element of the signal processing circuit. It has a well diffusion layer and an N-type base diffusion layer constituting a vertical PNP transistor as the circuit element.

Further, the N-type diffusion layer constituting the light detecting photodiode portion is formed by the same process as the N-well diffusion layer for forming the NPN transistor and the N-type base diffusion layer of the vertical PNP transistor. It has become.

According to a fifth aspect of the present invention, there is provided a light receiving element with a built-in circuit according to any one of the first to fourth aspects.
As the first conductivity type semiconductor layer, a high specific resistance semiconductor layer having a specific resistance of 3 Ωcm or more is used.

According to a sixth aspect of the present invention, in the photodetector with a built-in circuit according to any one of the first to fourth aspects,
The first conductivity type semiconductor substrate has a specific resistance of 20 Ωcm
The above-described high resistivity substrate is used, and a high resistivity semiconductor layer having a resistivity of 3 Ωcm or more is used as the first conductivity type semiconductor layer.

A light receiving element with a built-in circuit according to the present invention (claim 7) includes a semiconductor substrate of a first conductivity type, a semiconductor layer of a first conductivity type formed on the semiconductor substrate of the first conductivity type, and a first conductive type. And a plurality of second conductivity type semiconductor layers selectively formed on the type semiconductor substrate and extending from the surface of the first conductivity type semiconductor layer to the inside of the first conductivity type semiconductor substrate.

In the light-receiving element with a built-in circuit, the first
A conductive type semiconductor layer and a first conductive type semiconductor substrate;
The conductive semiconductor layer constitutes a plurality of photodetection photodiode sections for detecting signal light and outputting the photoelectric conversion signal, and the plurality of photodetection photodiode sections constitute a split photodiode. A plurality of circuit elements constituting a signal processing circuit for processing the photoelectric conversion signal are provided in a region of the first conductivity type semiconductor layer which is electrically separated from a region where the divided photodiode is formed. Is formed. Thereby, the above object is achieved.

According to the present invention (claim 8), in the photodetector with built-in circuit according to claim 7, a high specific resistance substrate having a specific resistance of 20 Ωcm or more is used as the first conductive type semiconductor substrate.

Hereinafter, the operation of the present invention will be described.

According to the present invention (claim 1), the first conductivity type semiconductor layer formed on the first conductivity type semiconductor substrate;
A plurality of second conductivity type semiconductor layers selectively formed in a surface region of the first conductivity type semiconductor layer, wherein the first conductivity type semiconductor layer and each of the second conductivity type semiconductor layers form a divided photo. Since a plurality of photodetection photodiode portions constituting the diode are formed, adjacent photodetection photodiode portions are separated by the first conductivity type semiconductor layer.
That is, in the surface region of the first conductivity type semiconductor substrate corresponding to the separation portion of the divided photodiode, the second conductivity type semiconductor layer formed on the first conductivity type semiconductor substrate is separated into a plurality of regions. There is no high concentration first conductivity type separation / diffusion region.

Therefore, when a light beam is applied to the divided portion of the divided photodiode, the phenomenon that the optical carrier bypasses the separation / diffusion region does not occur, and as a result, the optical carrier moves to the PN junction by diffusion. Distance can be shortened. As a result, the response speed can be improved, and the cutoff frequency can be improved.

Further, since there is no separation / diffusion layer having a high concentration in the separation portion of the divided photodiode, even if the wavelength of the signal light becomes short, many photocarriers are generated in a shallow portion of the substrate. Also, there is no reduction in the sensitivity due to the shortened lifetime of the optical carrier.

According to the present invention (claim 2), in the photodetector with a built-in circuit according to claim 1, each of the second conductivity type semiconductor layers of the divided photodiode is connected to an adjacent second conductive type semiconductor layer.
Since the depletion layers extending from the conductive semiconductor layer are arranged so as to be in contact with each other, when the signal light is applied to the separation part of the adjacent light detection photodiode unit, the signal light is applied to the central part of the light detection photodiode unit. It is possible to suppress a decrease in the response speed as compared with the case where it is performed.

According to the present invention (claim 3), in the photodetector with built-in circuit according to claim 2, the depletion layer extending from each of the second conductivity type semiconductor layers constituting the divided photodiode is formed as the depletion layer. Since the structure reaches the inside of the semiconductor substrate of the first conductivity type, when forming the semiconductor layer of the first conductivity type, impurities in the semiconductor region constituting the circuit element of the signal processing circuit are subjected to auto-doping to the substrate or over the substrate. Even if the light enters the semiconductor layer, in the photodetection photodiode portion, a region where a potential trough or a peak occurs due to the autodoping is also depleted. For this reason, it is possible to suppress the deterioration of the response speed due to the above-mentioned autodoping.

In the structure of the split photodiode, the depth of the junction between the first conductivity type semiconductor layer and the second conductivity type semiconductor layer is set to be equal to or more than half of the light penetration length.
By forming the conductive semiconductor layer, the effect of suppressing the deterioration of the response speed can be increased.

According to the present invention (claim 4), in the photodetector with a built-in circuit according to claim 2 or 3, the first conductive type semiconductor substrate and the epitaxial layer formed thereon as the first conductive type semiconductor layer. And the N-type diffusion layer serving as the second conductivity type semiconductor layer constituting the photodetection photodiode portion, which is located in the surface region of the P-type epitaxial layer, is connected to the NPN of the signal processing circuit.
N-well diffusion layer for forming transistor and vertical PNP
Since the transistor is formed in the same process as the N-type base diffusion layer of the transistor, the manufacturing process can be simplified and the manufacturing cost can be reduced.

According to the present invention (claim 5), in the photodetector with a built-in circuit according to any one of claims 1 to 4, the first conductive semiconductor layer has a specific resistance of 3Ω.
cm high-resistivity semiconductor layer is used.
The semiconductor layer on which the light detection photodiode portion is formed has a higher specific resistance than the semiconductor layer used in a normal light receiving element with a built-in circuit. As a result, the junction capacitance of the divided photodiode is reduced, and the cutoff frequency can be improved by increasing the response speed of the divided photodiode.

According to the present invention (claim 6), in the photodetector with a built-in circuit according to any one of claims 1 to 4, the first conductive semiconductor substrate has a specific resistance of 2%.
Since a high resistivity substrate having a resistivity of 0 Ωcm or more was used and a high resistivity semiconductor layer having a resistivity of 3 Ωcm or more was used as the first conductivity type semiconductor layer, the substrate and a photodetection photodiode portion thereon were formed. Each of the semiconductor layers has a higher specific resistance than the substrate used in the ordinary light receiving element with a built-in circuit and the semiconductor layer thereon. As a result, the junction capacitance of the divided photodiode can be further reduced, and the cutoff frequency can be further improved by further increasing the response speed of the divided photodiode.

According to the present invention (claim 7), the first conductivity type semiconductor layer formed on the first conductivity type semiconductor substrate;
A plurality of second conductivity type semiconductor layers selectively formed in a surface region of the first conductivity type semiconductor layer and extending from the surface of the first conductivity type semiconductor layer to the inside of the first conductivity type semiconductor substrate. Since the plurality of photodetection photodiode portions forming the divided photodiodes are formed by the first conductive type semiconductor layer, the first conductive type semiconductor substrate, and each of the second conductive type semiconductor layers, the divided photodiodes are divided. When the light beam is applied to the portion, not only the phenomenon that the optical carrier bypasses the separation / diffusion region can be avoided, but also the problem that the response speed is deteriorated due to the auto doping can be solved.

In other words, according to the present invention, even if an impurity penetrates into the interface between the substrate and the semiconductor layer thereabove due to autodoping, the photodetection photodiode section does not allow the impurity to enter the second conductivity type semiconductor layer constituting the same. Since the intrusion region of the impurity is included, the peaks and valleys of the potential caused by the auto doping are canceled by the potential of the second conductivity type semiconductor layer in the intrusion portion. As a result, it is possible to avoid deterioration of the responsiveness of the divided photodiode due to autodoping.

In the present invention (claim 8), in the photodetector with a built-in circuit according to claim 7, the first conductivity type semiconductor substrate is made to have a high specific resistance so as to have a specific resistance of 20 Ωcm or more. By reducing the junction capacitance of the photodiode, the response speed can be further improved.

[0067]

Embodiments of the present invention will be described below.

(Embodiment 1) FIG. 1 shows Embodiment 1 of the present invention.
FIG. 4 is a diagram for explaining a light-receiving element with a built-in circuit according to the present invention, and shows a cross-sectional structure of a divided photodiode mounted on the light-receiving element with a built-in circuit. 2 (a) to 2 (c).
FIG. 3 is a cross-sectional view showing a process of forming a divided photodiode in the method of manufacturing a light-receiving element with a built-in circuit in the order of steps. Note that, in these drawings, a signal processing circuit portion and a structure formed by a process after a metal forming process, such as a multilayer wiring and a protective film, are omitted.

In the drawing, reference numeral 101 denotes a light receiving element with a built-in circuit according to the first embodiment, which has an impurity concentration of 1.5 × 10 ¹⁴ atoms /
cm ³ of a P-type silicon substrate 1, a P-type epitaxial layer 2 having an impurity concentration of 5 × 10 ¹⁵ atoms / cm ³ formed on the substrate 1, and selectively formed on a surface region of the P-type epitaxial layer 2. Peak impurity concentration of 4 × 10 ¹⁷ atoms / cm
³ and a plurality of N-type diffusion layers 3.

In the light receiving element 101, the P-type epitaxial layer 2 and each of the N-type diffusion layers 3 detect the signal light and output the photoelectric conversion signal from the light detection photodiodes D1, D2, D3. , D5, and a plurality of photodetector photodiodes constitute a split photodiode PD. Although not shown in FIG. 1, the light detection photodiode unit D4 shown in FIG.
Are also formed on the substrate.

An oxide film 4 is formed on the surface of the P-type epitaxial layer 2, and the surface of the N-type diffusion layer 3 constituting the photodiodes D1, D2, D3, and D5 has the oxide film 4 formed thereon. The film 4 is open. And
On the N-type diffusion layer 3 and the oxide film 4, a silicon nitride film 5 whose thickness is set according to the wavelength of the laser diode is formed so as to be an anti-reflection film. 3s is a depletion layer extending from each of the N-type diffusion layers 3 into the P-type epitaxial layer 2, and 6 is an anode electrode formed so as to contact the P-type epitaxial layers 2 at both ends of the divided photodiode PD. The electrode wirings 6a constituting 202 (see FIG. 10) are metal films formed on portions of the surface of the nitride film 5 where signal light is not applied.

Further, in the light-receiving element 101 with a built-in circuit,
As shown in FIG. 3, a signal processing circuit SC for processing the photoelectric conversion signal is provided in a region of the P-type epitaxial layer 2 which is electrically separated from a region where the divided photodiode PD is formed. As a circuit element to configure, for example, a vertical NPN transistor Ta or a vertical PNP transistor T
b is formed.

Here, the connection of the divided photodiodes is described.
The large response capacitance of the photodiode
To avoid being delayed by the component of the CR time constant,
-Type silicon substrate 1 and P-type epitaxial layer 2 with high specific resistance
To reduce the junction capacitance of the split photodiode.
You. For example, the specific resistance of the normal P-type silicon substrate 1 is 15Ω.
cm and the specific resistance of the P-type epitaxial layer 2 is 1 Ωcm.
However, here, the specific resistance of the P-type silicon substrate is 100Ω.
cm, the specific resistance of the P-type epitaxial layer 2 is 3 Ωcm.
ing. This allows the junction capacitance of the split photodiode
Is 2.21 × 10 ^FourpF / cm^TwoFrom 1.2 × 10^FourpF
/ Cm^TwoIs reduced.

Next, a method of manufacturing the above light receiving element will be described.

First, as shown in FIG. 2A, a P-type epitaxial layer having an impurity concentration of 5 × 10 ¹⁵ atoms / cm ³ is formed on a P-type silicon substrate 1 having an impurity concentration of 1.5 × 10 ¹⁴ atoms / cm ^3. Grow 2. Subsequently, a peak impurity concentration of 4 × 10 ¹⁷ atoms / cm is selectively applied to the surface region of the P-type epitaxial layer 2.
^A plurality of N-type diffusion layers 3 are formed. At this time, a silicon oxide film 4 is formed on the surface of P-type epitaxial layer 2 and N-type diffusion layer 3. The N-type diffusion layer 3 and the P-type epitaxial layer 2 adjacent to the N-type diffusion layer 3 form the photodiode portions D1 to D3 and D5.

Next, as shown in FIG. 2B, a portion of the silicon oxide film 4 corresponding to the light receiving region on the surface of the N-type diffusion layer 3 is removed, and a silicon nitride film 5 is formed on the entire surface. I do. The thickness of the nitride film 5 is set according to the wavelength of the laser diode so as to be an anti-reflection film.

Thereafter, as shown in FIG. 2C, an electrode window is opened in the nitride film 5 and the oxide film 4 and an electrode wiring 6 is formed.
At the same time, a metal film 6a is formed via a nitride film 5 in a region of the divided portion of the photodetection photodiode portion PD which is not irradiated with signal light. Thus, the divided photodiode PD having the structure shown in FIG. 1 is obtained.

The signal processing circuit SC of the light receiving element 101
Are formed on the P-type silicon substrate 1 by a normal bipolar IC process.

Hereinafter, the manufacturing process of the circuit element will be briefly described with reference to FIG. Here, an NPN transistor Ta and a vertical PNP transistor Tb are mentioned as the circuit elements.

[0080] First, P-type silicon high resistivity substrate (impurity concentration ^{1.5 × 10 14 atoms / cm 3} ) 1 P -well for isolation on (peak impurity concentration ^{1 × 10 16 atoms / cm 3} )
51 are formed. Then, on the surface of the P well 51,
A high-concentration N ⁺ -type buried diffusion layer (peak impurity concentration 1 × 1) for reducing the collector resistance of the NPN transistor Ta
0 ¹⁹ atoms / cm ³ ) 52a and the vertical PN
A high concentration N ⁺ type buried diffusion layer (peak impurity concentration 2 × 10 ¹⁷ atoms / cm ³ ) 52b of the P transistor Tb is formed. Further, a high-concentration P ⁺ type buried diffusion layer (peak impurity concentration of 4 × 10 ¹⁷ atoms / cm ³ ) 53 for element isolation is formed on the substrate surface, and at the same time, the collector resistance of the PNP transistor Tb is reduced. A high concentration P ⁺ type buried diffusion layer (peak impurity concentration 4 × 10 ¹⁷ atoms / cm ³ ) 53b is formed.

Thereafter, a P-type epitaxial layer (impurity concentration 5 × 10 ¹⁵ atoms / cm ³ ) 2 having a high specific resistance is formed,
N for reducing the collector resistance of N transistor Ta
Well (peak impurity concentration 1.5 × 10 ¹⁶ atoms / cm ³ )
55a and an N-type base diffusion layer (peak impurity concentration 4 × 10 ¹⁷ atoms / cm ³ ) 55b of the PNP transistor Tb are formed, and a high-concentration P ⁺ -type isolation diffusion layer (peak impurity concentration 4 × 10 ¹⁸ atoms / cm ³ ) 54 are formed. Here, in the step of forming the N well 55a or the N type base diffusion layer 55b, the N type diffusion layer 3 constituting the split photodiode PD may also be formed.

Further, a P-type base diffusion layer (peak impurity concentration 2 ×) of the NPN transistor Ta is formed on the N well 55a.
10 ¹⁸ atoms / cm ³ ) 56a and the above P
An N-type base diffusion layer 55b of the NP transistor Tb has a P-type emitter diffusion layer (peak impurity concentration 2 × 10
¹⁸ atoms / cm ³ ) 56b are formed.

Finally, the NPN transistor T
The emitter diffusion layer (peak impurity concentration of 1 × 10 ¹⁹ atoms / cm ³ ) 57 is formed on the surface region of the P-type base diffusion layer 56a of FIG.
a is formed. As a result, circuit elements constituting the signal processing circuit SC are obtained.

The divided photodiode P having such a structure
In D, since the substrate 1 and the epitaxial layer 2 are of the same conductivity type, no high-concentration separation / diffusion layer is provided in the region corresponding to the division of each photodiode on the substrate surface. For this reason, photocarriers (electrons) generated in the split part
Does not cause the phenomenon of bypassing the isolation / diffusion layer due to the potential formed by the impurity profile of the isolation / diffusion layer as seen in the conventional example. This makes it possible to shorten the distance over which the optical carrier moves by diffusion, and to avoid a reduction in the response speed due to the detour of the optical carrier at the separation unit.

Further, since there is no high-concentration separation / diffusion layer in the separation portion of the divided photodiode, the frequency of the signal light is shortened, so that many photocarriers are generated in a shallow portion of the substrate. Also, there is no reduction in the sensitivity due to the shortened lifetime of the optical carrier.

Further, in the first embodiment, since the P-type silicon substrate 1 and the P-type epitaxial layer 2 have a high specific resistance to reduce the junction capacitance of the divided photodiode, the response speed of the divided photodiode is increased. , The cutoff frequency is improved.

In the first embodiment, a high-resistivity P-type silicon substrate and a P-type epitaxial layer are used as the substrate and the semiconductor layer grown thereon, but these are N-type. You may.

Hereinafter, as a modification of the first embodiment, a light-receiving element with a built-in circuit using a high-resistivity N-type silicon substrate and a high-resistivity N-type epitaxial layer as a substrate and a semiconductor layer grown thereon. Will be described.

FIG. 4 shows a cross-sectional structure of a light-receiving element with a built-in circuit according to a modification of the first embodiment. This corresponds to FIG. 3 showing a cross-sectional structure of the light-receiving element with a built-in circuit of the first embodiment. I have.

In the drawing, reference numeral 101a denotes a light receiving element with a built-in circuit as a modification of the first embodiment, and the same reference numerals as those in FIG.

In this light receiving element with built-in circuit 101a, an N-type silicon substrate (impurity concentration 5 × 10 ¹³ atoms /
The surface region of the high resistivity N-type epitaxial layer (impurity concentration 5 × 10 ¹³ atoms / cm ³ ) 2a grown on the cm ³ ) 1a is selectively provided with a P-type diffusion layer (peak impurity concentration 1 × 10 ³ ).
^A plurality of ¹⁷ atoms / cm ³ ) 3a are formed. The N-type epitaxial layer 2a and each of the P-type diffusion layers 3a constitute a plurality of photodetection photodiode sections D1, D2, D3, and D5 for detecting signal light and outputting the photoelectric conversion signal. The divided photodiode PD is constituted by the plurality of light detection photodiode units.

Further, in the photodetector element 101a with built-in circuit, as shown in FIG.
a in a region that is electrically separated from the region where the divided photodiode PD is formed, as a circuit element configuring a signal processing circuit SC that processes the photoelectric conversion signal,
For example, a vertical NPN transistor Ta and a vertical PNP transistor Tb are formed.

Next, a brief description will be given of a method of manufacturing the light receiving element with a built-in circuit shown in FIG. First, a P well 51 for element isolation is formed on an N-type silicon high resistivity substrate 1a. Then, the NP is added to the surface area of the P well 51.
A high-concentration N ⁺ -type buried diffusion layer 52a for reducing the collector resistance of the N-transistor Ta is formed, and a high-concentration N ⁺ -type buried diffusion layer 52b for the PNP transistor Tb is formed. Furthermore, high concentrations of simultaneously forming a P ⁺ -type buried diffusion layer 53, a high concentration of PNP transistor Tb to the N ⁺ -type diffusion layer 52b for element isolation P ⁺
A mold buried diffusion layer 53b is formed.

Next, the N-type epitaxial layer 2a is
a in the surface region of the epitaxial layer 2a where a photodiode portion is to be formed.
Is formed, and the high-concentration P ⁺ -type isolation diffusion layer 54 is formed so as to reach the high-concentration P ⁺ -type buried diffusion layer 53.
Further, an N well 55a for reducing the collector resistance of the NPN transistor Ta is formed on the high-concentration N ⁺ type buried diffusion layer 52a, and an N type base diffusion layer 55b of the PNP transistor Tb is formed.

Then, NP is added to the surface region of N well 55a.
Forming a P-type base diffusion layer 56a of the N-transistor, and forming the P-type emitter diffusion layer 56b in the N-type base diffusion layer 55b of the PNP transistor Tb;
Further, an N-type emitter diffusion layer 57a is formed in the P-type base diffusion layer 56a. Thus, the light receiving element with built-in circuit 101a shown in FIG. 4 is obtained.

In the light-receiving element with built-in circuit 101a having the divided photodiode using the N-type semiconductor substrate 1a and the epitaxial layer 2a, the P-type semiconductor substrate 1 and the epitaxial layer 2 of the first embodiment are used. There are the following problems as compared with the ones.

First, the N-type epitaxial layer 2a is
a, the boron is removed from the high-concentration P ⁺ -type buried diffusion layer 53b constituting the vertical PNP transistor Tb and the high-concentration P ⁺ -type buried diffusion layer 53 for element isolation. There is a problem of autodoping in the epitaxial layer 2a and the N-type semiconductor substrate 1a. That is, during the growth of the epitaxial layer, boron from the diffusion layer is transferred to the N-type silicon high resistivity substrate 1a and the N-type epitaxial layer 2a.
Is taken into the interface portion, and the interface portion is inverted to P-type.

On the other hand, in the first embodiment, a substrate having a P-type conductivity is used as the substrate and the epitaxial layer constituting the light receiving element with a built-in circuit. The problem of conductivity inversion at the interface due to the autodoping of boron does not occur.

In the semiconductor region (diffusion layer) constituting the photodiode portion, when the impurity concentration is high, the lifetime of carriers generated in the diffusion layer is shortened.
Since the sensitivity is reduced, it is necessary to lower the impurity concentration of the diffusion layers (the cathode diffusion layer 3 in FIG. 3 and the anode diffusion layer 3a in FIG. 4).

Incidentally, in the light receiving element 101 with a built-in circuit using the P-type silicon substrate 1 as in the first embodiment, for example, the N-type base diffusion layer 55b of the vertical PNP transistor Tb and the N-well of the NPN transistor are used. Since the region 55a has a low impurity concentration, the step of forming these N-type low-concentration regions can be used for the step of forming the N-type diffusion layer (cathode diffusion layer) 3 of the photodiode section.
For example, when the cathode diffusion layer 3 is formed in the step of forming the N-type base diffusion layer 55b, the impurity concentration of the cathode diffusion layer 3 becomes 4 × 10 ¹⁷ atoms / cm ³ as in the first embodiment.

On the other hand, in the light-receiving element 101a with a built-in circuit using the N-type silicon substrate 1a as in the modification of the first embodiment, the process of forming the circuit element constituting the signal processing circuit requires a low impurity concentration. There is no step of forming a P-type diffusion layer, and therefore, in order to form a P-type diffusion layer (anode diffusion layer) 3a having a low impurity concentration which constitutes a photodiode portion, an additional step must be added. However, this is disadvantageous in comparison with the first embodiment in terms of manufacturing cost.

Further, in the light receiving element 101a using the N-type silicon substrate, the well region for performing element isolation is N
Since it is a P-well diffusion layer formed in a silicon substrate, the ground resistance for each element is large.
N-type substrate 1a, for h _FE of the parasitic NPN transistor formed by the N-type collector region 55a of the P well diffusion layer 51 and the NPN transistor, is large, resulting in latch-up is likely to occur the device structure.

On the other hand, in the light receiving element using the P-type silicon substrate as in the first embodiment, since the P-well diffusion layer is formed in the P-type silicon substrate 1, a modification using the N-type silicon substrate is used. This has an element structure in which the ground resistance is smaller than that of the light receiving element 101a and the latch-up hardly occurs.

Further, comparing the mobility of holes as photocarriers on the N-type silicon substrate with the mobility of electrons as photocarriers on the P-type silicon substrate, the electrons are about three times as large, so that the response speed is N The light receiving element 101 using a P-type silicon substrate is more advantageous than the light receiving element 101a using a P-type silicon substrate.

From the above, it can be said that the light receiving element 101 using the P-type silicon substrate is more preferable.

However, in the structure of the light receiving element of the first embodiment, the depletion layers formed in the surface region of the P-type epitaxial layer 2 and adjacent to the N-type diffusion layer 3 are separated from each other. When the light beam is applied to the photodiode, the response is slightly slower than when the light beam is applied to the central portion of the photodiode unit.

Therefore, an embodiment in which the reduction of the response speed when the light beam is irradiated to such a divided portion is improved will be described below as a second embodiment of the present invention.

(Embodiment 2) FIG. 5 shows Embodiment 2 of the present invention.
FIG. 5A is a diagram for explaining a light-receiving element with a built-in circuit, and FIG. 5A shows a sectional structure of a divided photodiode mounted on the light-receiving element. In addition, also in this figure,
As in FIG. 1, members formed by processing after the metal forming process, such as multilayer wiring and a protective film, are omitted.

In the figure, reference numeral 102 denotes a light receiving element with a built-in circuit according to the second embodiment, and the same reference numerals as those in FIG. 1 denote the same elements as those with the light receiving element with a built-in circuit 101 according to the first embodiment.

In this light receiving element with a built-in circuit 102, a plurality of N-type diffusion layers 3 formed in the surface region of the P-type epitaxial layer 2 are arranged such that depletion layers 3s extending from adjacent diffusion layers 3 are in contact with each other. It is. Other configurations are the same as those of the light receiving element 101 of the first embodiment shown in FIG.

The manufacturing process of the light receiving element of the second embodiment is almost the same as that of the light receiving element of the first embodiment. In the surface region of the P-type epitaxial layer 2, N When the diffusion layers 3 are formed, only the position of each diffusion layer 3 is adjusted so that the depletion layers extending from the adjacent N-type diffusion layers 3 are in contact with each other. Is different.

Here, the width of the depletion layer extending from the N-type diffusion layer 3 varies depending on the specific resistance of the P-type epitaxial layer 2 and the reverse bias applied to the photodiode portion. The specific resistance of 2 is 1
When the reverse bias applied to the photodiode is 2.5 V, the depletion layer from the N-type diffusion layer 3 is about 2 μm.
m. Therefore, under such conditions, the interval between adjacent N-type diffusion layers 3 may be set to 4 μm or less.

Also, in the light receiving element with a built-in circuit according to the second embodiment, since the junction capacitance of the divided photodiode portion is large as in the first embodiment, the response speed of the photodiode is reduced by the CR time constant component. To avoid this, the junction capacitance of the divided photodiode section is reduced.
That is, the P-type silicon substrate 1 and the P-type epitaxial layer 2
, The junction capacitance is reduced.

For example, the P-type silicon substrate 1 usually has a specific resistance of 15 Ωcm, and the P-type epitaxial layer 2 has a specific resistance of 1 Ωcm.
Ωcm, the junction capacitance is 2 × 10 ⁴ pF / cm ²
However, the specific resistance of the P-type silicon substrate 1 is 100 Ωc.
By setting the specific resistance of the m, P type epitaxial layer 2 to 3 Ωcm, the junction capacitance can be reduced to 1.2 × 10 ⁴ pF / cm ² . Thereby, the response speed of the divided photodiode is further increased, and the cutoff frequency is improved.

In the second embodiment, a plurality of N-type diffusion layers 3
Are arranged so that a depletion layer 3s extending from an adjacent diffusion layer 3 is in contact with each other. By increasing the specific resistance of the P-type silicon substrate 1 and the P-type epitaxial layer 2, even under the same reverse bias condition, the N-type diffusion Since the expansion of the depletion layer from the layer 3 is increased, there is also an effect that the degree of freedom in designing the arrangement interval of the N-type diffusion layers 3 constituting the photodiode section is increased.

The increase in the degree of freedom of the design will be described in detail. In the second embodiment, as shown in FIG. 5A, the adjacent N-type diffusion layer 3 has a depletion layer 3 extending therefrom.
s are arranged so as to contact each other. Here, if the specific resistance of the P-type epitaxial layer 2 changes, the width (depletion layer width) of the depletion layer 3s extending from the N-type diffusion layer 3 will be different. For example, the specific resistance of the P-type epitaxial layer 2 is 1Ωc
If it is m, the width of the depletion layer when the reverse bias V _R is 2.5v is about 2 [mu] m, P-type epitaxial layer 2
If the specific resistance of a 3Omucm, the reverse bias V _R is 2.
The width of the depletion layer at 5 V is about 3.5 μm. As described above, the higher the specific resistance of the N-type diffusion layer 3, that is, the lower the impurity concentration, the larger the width of the depletion layer. Therefore, it is necessary to consider the arrangement of the N-type diffusion layers 3 so that the depletion layers are in contact with each other as in the second embodiment.
That is, it is necessary to arrange the N-type diffusion layer 3 so that the distance between adjacent ones is 4 μm or less.

When the specific resistance of the P-type epitaxial layer 2 is changed from 1 Ωcm to 3 Ωcm as described above, the width of the depletion layer which expands even under the same reverse bias condition becomes large.
When the specific resistance of the epitaxial layer 2 is 3 Ωcm,
When considering the arrangement of the N-type diffusion layers 3 so as to have the element structure of the second embodiment, that is, so that the depletion layers 3s extending from the adjacent N-type diffusion layers 3 are in contact with each other,
May be set to 7 μm or less.

In other words, when the specific resistance of the P-type epitaxial layer 2 is 1 Ωcm, as shown in FIG. 5B, the arrangement of the N-type diffusion layer 3 is required to realize the device structure of the second embodiment. The interval must be 4 μm or less, and if the arrangement interval is 5 to 6 μm or less, the element structure of the second embodiment cannot be realized. On the other hand, the specific resistance of the P-type epitaxial layer 2 is 3
In the case of Ωcm, as shown in FIG. 5C, in order to realize the element structure of the second embodiment, the arrangement interval of the N-type diffusion layers 3 may be 7 μm or less. 6μ
m, the element structure of the second embodiment can be realized. 5B and 5C, the silicon oxide film 4, the silicon nitride film 5, the metal film 6a and the like are omitted.

As a result, the increase in the degree of freedom of the arrangement interval of the N-type diffusion layer 3 means that the specific resistance of the substrate or the epitaxial layer is a normal value (substrate is 15Ω) even in the same element structure of the second embodiment.
cm and the epitaxial layer is 1 Ωcm), the depletion layer extending from the N-type diffusion layer becomes larger in the case where the substrate or the epitaxial layer has a higher specific resistance as described above. When the layers are arranged such that the depletion layers extending therefrom are in contact with each other, the arrangement interval between adjacent N-type diffusion layers may be wide.

By the way, in the structure of the light receiving element of the second embodiment described above, the P ⁺ -type buried diffusion layer 53 shown in FIG. 3 is provided near the interface between the P-type silicon substrate 1 and the P-type epitaxial layer 2.
And the P-well diffusion layer 51 and the NPN transistor T
There is a problem that the impurity concentration changes due to the auto-doping of the impurity from the N ⁺ type buried diffusion layer 52a or the like.

For example, when an N-type impurity is auto-doped into the P-type semiconductor region of the substrate or the epitaxial layer from the N ⁺ -type buried diffusion layer 52a, the P-type semiconductor region in FIG.
A valley of the potential is generated as shown in FIG. In such a valley of potential, photocarriers cross the potential barrier, which causes a reduction in response speed.

Further, P-type impurities from P ⁺ -type buried diffusion layer 53 and P-well diffusion layer 51
When auto-doping is performed in the p-type semiconductor region, a peak portion of the potential is generated in the p-type semiconductor region as shown in FIG. Even in such a peak portion of the potential, as in the case of the above-described valley portion of the potential, the photocarriers cross over the potential barrier, which causes a reduction in response speed.

Therefore, an embodiment in which such auto-doping of impurities causes a reduction in response speed will be described below as Embodiment 3 of the present invention.

(Embodiment 3) FIG. 7 shows Embodiment 3 of the present invention.
FIG. 2 is a diagram for explaining a light-receiving element with a built-in circuit according to the present invention, and shows a cross-sectional structure of a divided photodiode mounted on the light-receiving element. In this figure, as in FIG.
A member formed by processing after the metal forming process,
For example, a multilayer wiring, a protective film, and the like are omitted.

In the figure, reference numeral 103 denotes a light receiving element with a built-in circuit according to the third embodiment, and the same reference numerals as those in FIG. 5 denote the same elements as the light receiving element with a built-in circuit 102 according to the second embodiment. In this light receiving element 103 with a built-in circuit, a plurality of N-type diffusion layers 3 formed in the surface region of the P-type epitaxial layer 2 are formed.
b has a structure in which a depletion layer 3s extending from each diffusion layer 3b reaches the inside of the P-type silicon substrate 1. Other configurations are the same as those of the light receiving element 102 of the second embodiment shown in FIG.

This structure can be realized by setting the depth of the N-type diffusion layer 3 as follows, for example.

That is, the P-type epitaxial layer 2 has a thickness of 4 μm, the specific resistance of the P-type silicon substrate 1 is 15 Ωcm,
When the specific resistance of the epitaxial layer 2 is 3 Ωcm,
When a reverse bias of 2.5 V is applied to the photodiode, the depletion layer from N-type diffusion layer 3b expands by about 2.5 μm. Therefore, under this condition, the N-type diffusion layer 3b has a thickness of 1.5 μm.
m, the light receiving element 103 with a built-in circuit mounted with the divided photodiode having the structure of the third embodiment.
Is obtained.

In the light receiving element 103 having such a structure, a region where a potential peak or a valley in the substrate or the epitaxial layer is formed is also depleted by the above-described autodoping, and the potential peak is reduced. Parts and valleys disappear. As a result, the optical carrier is not affected by the partial fluctuation of the potential caused by the auto doping,
It is possible to avoid that the above-mentioned auto-doping causes deterioration of the response speed.

In the third embodiment, as in the second embodiment, the interval between adjacent N-type diffusion layers 3b is set to, for example, four.
Since the thickness is set to μm and the depletion layers from the N-type diffusion layer 3b are in contact with each other, the responsiveness when light enters the separation part DB of the divided photodiode is also improved.

Also, in the light receiving element with a built-in circuit according to the third embodiment, since the junction capacitance of the divided photodiode portion is large as in the first and second embodiments, the response speed of the photodiode is slower due to the CR time constant component. In order to avoid this, the junction capacitance of the divided photodiode portion is reduced. That is, the junction capacitance is reduced by increasing the specific resistance of the P-type silicon substrate 1 and the P-type epitaxial layer 2.

For example, the resistivity of the P-type silicon substrate 1 is usually 15 Ωcm, and the resistivity of the P-type epitaxial layer 2 is 1
Ωcm, the junction capacitance is 2 × 10 ⁴ pF / cm ²
However, the specific resistance of the P-type silicon substrate 1 is 100 Ωc.
By setting the specific resistance of the m, P type epitaxial layer 2 to 3 Ωcm, the junction capacitance can be reduced to 1.2 × 10 ⁴ pF / cm ² . Thereby, the response speed of the divided photodiode is further increased, and the cutoff frequency is improved. In this case, the spread of the depletion layer can be increased at a low voltage.

In the third embodiment, a plurality of N-type diffusion layers 3b are formed by forming a depletion layer 3s extending from an adjacent diffusion layer 3b.
Are arranged so as to be in contact with each other, and by increasing the specific resistance of the P-type silicon substrate 1 and the P-type epitaxial layer 2, similarly to the second embodiment, the arrangement interval of the N-type diffusion layers constituting the photodiode portion This also has the effect of increasing the degree of freedom in design.

(Embodiment 4) Next, Embodiment 4 of the present invention.
Will be described.

FIG. 8 is a diagram for explaining a light-receiving element with a built-in circuit according to Embodiment 3 of the present invention, and shows a cross-sectional structure of a divided photodiode mounted on the light-receiving element.
In this figure, as in FIG. 1, members formed by the processes after the metal forming process, such as a multilayer wiring and a protective film, are omitted.

In the figure, reference numeral 104 denotes a light receiving element with a built-in circuit according to the fourth embodiment, and the same reference numerals as those in FIG. 5 denote the same elements as those with the light receiving element with a built-in circuit 102 according to the second embodiment. In this light receiving element with a built-in circuit 104, a plurality of N-type diffusion layers 3 formed in the surface region of the P-type epitaxial layer 2 are formed.
c is a structure in which each diffusion layer 3c reaches the inside of the P-type silicon substrate 1. Other configurations are the same as those of the light receiving element 102 of the second embodiment shown in FIG.

In the split photodiode having this structure, as in the case of the third embodiment, the peaks and valleys of the potential may be generated at the interface between the substrate and the epitaxial layer due to the above-described autodoping. In the portion, the peaks and valleys of the potential due to the autodoping are canceled by the N-type diffusion layer 3c. For this reason, there is no problem that the response speed is delayed due to the auto doping.

In the first to third embodiments, the P-type silicon substrate 1 and the P-type epitaxial layer 2 are made to have a high specific resistance to reduce the junction capacitance of the divided photodiodes. Although the deterioration of the response speed of the photodiode is reduced, in the fourth embodiment, it is not always necessary to increase the resistivity of the P-type epitaxial layer 2.

That is, in the fourth embodiment, the N-type diffusion layer 3
Since c has reached the surface of the P-type silicon substrate 1, the junction capacitance is occupied mostly by the junction between the P-type silicon substrate 1 and the N-type diffusion layer 3 c, and only the P-type silicon substrate 1 has a high resistivity However, the deterioration of the response speed of the photodiode due to the junction capacitance of the divided photodiode can be sufficiently improved.

In other words, the fourth embodiment has the following advantages in addition to the advantages of the first to third embodiments.

More specifically, when the response speed is further improved by increasing the resistivity of the epitaxial layer, the device structure of each of the first to third embodiments mainly includes the P-type epitaxial layer 2.
And the capacitance of the junction between the N-type diffusion layer 3b and the N-type diffusion layer 3b determine the response speed.
Since it is necessary to reduce the junction capacitance, the P-type epitaxial layer 2 must have a high specific resistance. However, since the P-type epitaxial layer 2 can have a high specific resistance only up to 100Ωcm at most, the junction capacitance is 3 × 10
It can only be reduced to ³ pF / cm.

On the other hand, in the fourth embodiment, since the capacitance of the junction between the P-type silicon substrate 1 and the N-type diffusion layer 3c mainly determines the response speed, the high specific resistance of the P-type silicon substrate 1 reduces the response speed. Higher speed can be achieved. Further, the P-type silicon substrate can increase the specific resistance to 1000 Ωcm or more. For example, the specific resistance of a P-type silicon substrate is 1000Ωc
In the case of m, the junction capacitance can be reduced to 1 × 10 ³ pF / cm, and the effect of improving the response speed is correspondingly large.

In the fourth embodiment, a plurality of N-type diffusion layers 3 formed in the surface region of P-type epitaxial layer 2 are formed.
c is a structure in which each diffusion layer 3c reaches the inside of the P-type silicon substrate 1. However, each diffusion layer 3c may have a structure in which it contacts the surface of the P-type silicon substrate 1. In this case as well, The same effect as that of No. 4 can be obtained.

As described above, the light-receiving element with a built-in circuit according to the present embodiment can sufficiently achieve the object of improving the response speed at the divided portion of the divided photodiode.

[0144]

As described above, according to the present invention, the first conductivity type semiconductor substrate, the first conductivity type semiconductor layer formed thereon, and the semiconductor layer selectively formed on the surface region of the semiconductor layer are provided. Second
Since the divided photodiode is constituted by the second conductive semiconductor layer and the first conductive semiconductor layer, the portion of the substrate surface corresponding to the separation portion of the divided photodiode has a high concentration. There is no diffusion layer, and even when the light beam is applied to the divisional portion, the distance that the optical carrier travels by diffusion by bypassing the separation / diffusion layer does not increase. Therefore, it is possible to improve the deterioration of the response speed, and thereby it is possible to improve the cutoff frequency.

In the present invention, since the specific resistance of the first conductive type substrate and the first conductive type semiconductor layer thereon is increased to reduce the junction capacitance in the divided photodiode, the divided photodiode portion Also, there is an effect that the reduction of the cutoff frequency due to the junction capacitance in the above is improved.

[Brief description of the drawings]

FIG. 1 is a diagram for explaining a light-receiving element with a built-in circuit according to a first embodiment of the present invention, and shows a cross-sectional structure of a divided photodiode mounted on the light-receiving element.

FIGS. 2A to 2C are cross-sectional views illustrating a process for obtaining a structure of a divided photodiode mounted on the light receiving element according to the first embodiment in the order of steps.

FIG. 3 is a cross-sectional view showing a circuit element constituting a signal processing circuit in the circuit built-in light receiving element of Embodiment 1 together with a divided photodiode.

FIG. 4 is a diagram for explaining a light-receiving element with a built-in circuit according to a modification of the first embodiment, in which circuit elements constituting a signal processing circuit in the light-receiving element with a built-in circuit are shown together with divided photodiodes.

5A and 5B are diagrams for explaining a light-receiving element with a built-in circuit according to a second embodiment of the present invention. FIG. 5A shows a cross-sectional structure of a divided photodiode mounted on the light-receiving element.
5B shows the distance between adjacent N-type diffusion layers when the specific resistance of the P-type epitaxial layer is 1 Ωcm, and FIG. 5C shows the distance between adjacent N-type diffusion layers when the specific resistance of the P-type epitaxial layer is 3 Ωcm. The distance between the diffusion layers is shown.

FIG. 6 is a diagram showing a change in energy potential due to auto-doping of impurities generated when a P-type epitaxial layer is grown in the manufacturing process of the light-receiving element according to the second embodiment, and FIG. FIG. 6B shows a case where a semiconductor region is auto-doped with an N-type impurity, and FIG. 6B shows a case where a P-type impurity is auto-doped in a P-type semiconductor region.

FIG. 7 is a diagram for explaining a light-receiving element with a built-in circuit according to Embodiment 3 of the present invention, and shows a cross-sectional structure of a divided photodiode mounted on the light-receiving element.

FIG. 8 is a diagram for explaining a light-receiving element with a built-in circuit according to a fourth embodiment of the present invention, and shows a cross-sectional structure of a divided photodiode mounted on the light-receiving element.

FIG. 9 is a diagram showing a configuration of an optical pickup using a conventional hologram element.

FIG. 10 is a plan view showing a light-receiving element with a built-in circuit, which is used in the optical pickup shown in FIG. 9 and on which a conventional divided photodiode in which a light detection unit is divided into a plurality of regions is mounted.

11 is a diagram showing a cross-sectional structure taken along line aa ′ of the conventional divided photodiode shown in FIG.

12 (a) to FIG. 12 (d) show FIG.
FIG. 7 is a cross-sectional view showing a process for obtaining the structure of the divided photodiode shown in FIG.

FIG. 13 is a diagram showing a cross-sectional structure of a conventional photodetector with a built-in circuit on which an improved split photodiode is mounted.

[Explanation of symbols]

REFERENCE SIGNS LIST 1 P-type silicon substrate 2 P-type epitaxial layer 3, 3 b, 3 c N-type diffusion layer 3 a P-type diffusion layer 3 s depletion layer 4 silicon oxide film 5 silicon nitride film 6 electrode wiring 6 a metal film 101, 101 a, 102, 103, 104 Light receiving element with built-in circuit D1, D2, D3, D4, D5 Photodetection photodiode section DB division section PD division photodiode SC Signal processing circuit Ta NPN transistor Tb Vertical PNP transistor

 ────────────────────────────────────────────────── ─── Continuing from the front page (72) Inventor Naoki Fukunaga 22-22, Nagaike-cho, Abeno-ku, Osaka City, Osaka F-term (reference) 4M118 AA10 AB05 AB10 BA02 CA04 CA34 CB13 EA01 FC09 FC18 GB11 5F049 MA02 NA03 NA18 NB08 PA09 QA03 RA08 SS03 UA07 5F082 AA06 AA08 BA02 BA12 BA19 BA21 BA41 BA47 BC03 BC11

Claims (8)

[Claims] A first conductive type semiconductor substrate; a first conductive type semiconductor layer formed on the first conductive type semiconductor substrate; and a first conductive type semiconductor layer selectively formed on a surface region of the first conductive type semiconductor layer. A plurality of second conductivity type semiconductor layers, wherein the first conductivity type semiconductor layer and each of the second conductivity type semiconductor layers detect a signal light and output a photoelectric conversion signal of the signal light. And a plurality of light-detecting photodiode portions constitute a divided photodiode, and are electrically separated from a region of the first conductivity type semiconductor layer where the divided photodiode is formed. A circuit built-in light receiving element in which a circuit element constituting a signal processing circuit for processing the photoelectric conversion signal is formed in the region. 2. The light receiving element with a built-in circuit according to claim 1, wherein the divided photodiodes are arranged such that each of the second conductive type semiconductor layers is in contact with a depletion layer extending from an adjacent second conductive type semiconductor layer. Light receiving element with a built-in circuit. 3. The light receiving element with a built-in circuit according to claim 2, wherein the divided photodiode has a depletion layer extending from each of the second conductivity type semiconductor layers constituting the divided photodiode, extending into the first conductivity type semiconductor substrate. A light receiving element with a built-in circuit that has a structure that can be reached. 4. The light-receiving element with a built-in circuit according to claim 2, wherein the first conductive type semiconductor layer is a P-type epitaxial layer grown on a P-type semiconductor substrate as the first conductive type semiconductor substrate. The P-type epitaxial layer includes an N-type diffusion layer as a second conductivity type semiconductor layer constituting the photodetection photodiode section, and an N-well as a formation region of an NPN transistor as a circuit element of the signal processing circuit. A diffusion layer, and an N-type base diffusion layer forming a vertical PNP transistor as the circuit element, wherein the N-type diffusion layer forming the photodetection photodiode section includes:
A light receiving element with a built-in circuit formed in the same process as the N-well diffusion layer for forming the NPN transistor and the N-type base diffusion layer of the vertical PNP transistor. 5. The light-receiving element with a built-in circuit according to claim 1, wherein the first conductive semiconductor layer is a high-resistance semiconductor layer having a specific resistance of 3 Ωcm or more. 6. The light-receiving element with a built-in circuit according to claim 1, wherein the first conductive type semiconductor substrate is a high specific resistance substrate having a specific resistance of 20 Ωcm or more, and the first conductive type semiconductor. The layer is a high-resistance semiconductor layer having a specific resistance of 3 Ωcm or more. 7. A first conductivity type semiconductor substrate, a first conductivity type semiconductor layer formed on the first conductivity type semiconductor substrate, and the first conductivity type semiconductor layer selectively formed on the first conductivity type semiconductor substrate. A plurality of second conductivity type semiconductor layers extending from the surface of the first conductivity type semiconductor layer to the inside of the first conductivity type semiconductor substrate; the first conductivity type semiconductor layer and the first conductivity type semiconductor substrate; The second conductivity type semiconductor layer forms a plurality of photodetection photodiode sections that detect signal light and output the photoelectric conversion signal, and the plurality of photodetection photodiode sections form a split photodiode. A plurality of circuit elements constituting a signal processing circuit for processing the photoelectric conversion signal are formed in a region of the first conductivity type semiconductor layer that is electrically separated from a region where the divided photodiode is formed. Circuit built-in receiver Element. 8. The light-receiving element with a built-in circuit according to claim 7, wherein the first conductive type semiconductor substrate is a high specific resistance substrate having a specific resistance of 20 Ωcm or more.