JP2002328394A - Liquid crystal display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To display the frame of a liquid crystal display region clearly. SOLUTION: The device has substrates as a outer casing opposed to each other through a liquid crystal and has a display region which consists of an assembly of a large number of pixels in the spread direction of the liquid crystal. Each of these pixels is constituted by arranging groups of pixel regions sharing a gate signal line in multistages. The liquid crystal display region consists of a video display region and an outer frame display region made of multiple stages of the groups of pixel regions in the outer area of the video display region. At least a part of these groups of pixel regions constituting the outer frame display region share the gate signal line.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device, for example, to an active matrix type liquid crystal display device.

[0002]

2. Description of the Related Art An active matrix type liquid crystal display panel is provided on a liquid crystal side surface of one of the transparent substrates which are opposed to each other with a liquid crystal interposed therebetween, and extends in the x direction and y.
Each region in a matrix surrounded by the gate signal lines arranged in the direction and the drain signal lines extending in the y direction and arranged in the x direction is defined as a pixel region.

In each of these pixel regions, a thin film transistor activated by a scanning signal from a gate signal line and a pixel electrode to which a video signal from a drain signal line is supplied via the thin film transistor are formed. .

The pixel electrode generates an electric field between the pixel electrode and a counter electrode formed on one of the transparent substrates on the liquid crystal side, and the electric field controls the light transmittance of the liquid crystal. I have.

[0005] The aggregate of the respective pixel regions thus formed constitutes a liquid crystal display region, and is exposed from an opening (display window) of a front frame combined when, for example, the liquid crystal display panel is covered and modularized. It has become.

[0006]

However, the liquid crystal display device configured as described above is configured such that an image is displayed in a range where the liquid crystal display region extends to the outer contour.

However, when the liquid crystal display device is used, for example, with a so-called touch panel disposed on its display surface, the fact that the frame of the liquid crystal display area is clearly displayed makes it easy to operate the touch panel. Was pointed out. In particular, when the above operation is performed in a dim place or the like, the necessity thereof has become remarkable.

The liquid crystal display device is used not only in such applications but also in various modes. As a result, it is often convenient that the frame of the liquid crystal display area is clearly displayed as described above. .

The present invention has been made in view of such circumstances, and an object of the present invention is to provide a liquid crystal display device in which a frame of a liquid crystal display area is clearly displayed.

It is another object of the present invention to provide a liquid crystal display device having a simple structure and capable of clearly displaying the frame of the liquid crystal display area.

[0011]

SUMMARY OF THE INVENTION Among the inventions disclosed in the present application, the outline of a representative one will be briefly described.
It is as follows.

Means 1. The liquid crystal display device according to the present invention includes, for example, a liquid crystal display region formed of an aggregate of a large number of pixels in a direction in which the liquid crystal spreads, with substrates arranged to face each other via the liquid crystal as an envelope. A plurality of pixel regions sharing a gate signal line are arranged in multiple stages, and the liquid crystal display region includes a video display region,
An outer frame display area that is outside the video display area and is composed of a plurality of pixel area groups. At least a part of the plurality of pixel area groups that constitute the outer frame display area is The gate signal lines are commonly connected.

Means 2. A liquid crystal display device according to the present invention includes, for example, a liquid crystal display region formed of an aggregate of a large number of pixels in a direction in which the liquid crystal spreads, with substrates arranged to face each other via liquid crystal as an envelope, and each of the pixels is In a region surrounded by a pair of gate signal lines and a pair of drain signal lines,
A thin film transistor that is activated by a scanning signal from a gate signal line, a pixel electrode to which a signal from a drain signal line is supplied via the thin film transistor, and another gate different from the gate signal line that activates the pixel electrode and the thin film transistor A liquid crystal display area, and a plurality of pixel area groups outside the video display area and having a common gate signal line are arranged in the liquid crystal display area. And at least a part of a plurality of stages of pixel region groups constituting the outer frame display region, the gate signal lines thereof are commonly connected, and these are commonly connected. The capacitor is not formed in a pixel region sandwiched between gate signal lines.

Means 3. A liquid crystal display device according to the present invention includes, for example, a liquid crystal display region formed of an aggregate of a large number of pixels in a direction in which the liquid crystal spreads, with substrates arranged to face each other via liquid crystal as an envelope, and each of the pixels is In a region surrounded by a pair of gate signal lines and a pair of drain signal lines,
A thin film transistor that is activated by a scanning signal from a gate signal line, a pixel electrode to which a signal from a drain signal line is supplied via the thin film transistor, and a counter electrode that generates an electric field between the pixel electrode and The liquid crystal display area includes an image display area and an outer frame display area including a pixel area group outside the image display area and having a common drain signal line. A signal having substantially the same potential as a signal supplied to the counter electrode is supplied to the drain signal lines of the region group.

Means 4. A liquid crystal display device according to the present invention includes, for example, a liquid crystal display region formed of an aggregate of a large number of pixels in a direction in which the liquid crystal spreads, with substrates arranged to face each other via liquid crystal as an envelope, and each of the pixels is In a region surrounded by a pair of gate signal lines and a pair of drain signal lines,
A thin film transistor that is activated by a scanning signal from a gate signal line, a pixel electrode to which a signal from a drain signal line is supplied via the thin film transistor, and another gate different from the gate signal line that activates the pixel electrode and the thin film transistor A first capacitive element formed between the first capacitive element and a signal line, wherein the liquid crystal display area includes a video display area, and a plurality of pixel area groups outside the video display area and sharing a gate signal line. And at least a part of a plurality of stages of pixel regions forming the outer frame display region are connected to the gate signal lines in common, and are connected in common. A pixel region sandwiched between the gate signal lines provided in place of the first capacitor, provided between a pixel signal and a capacitor signal line formed separately from the gate signal line; The second capacitive element is characterized in that is formed.

Means 5 A liquid crystal display device according to the present invention includes, for example, a liquid crystal display region formed of an aggregate of a large number of pixels in a direction in which the liquid crystal spreads, with substrates arranged to face each other via liquid crystal as an envelope, and each of the pixels is In a region surrounded by a pair of gate signal lines and a pair of drain signal lines,
A thin film transistor activated by a scanning signal from a gate signal line, a pixel electrode to which a signal from a drain signal line is supplied via the thin film transistor, and a capacitance signal formed separately from the pixel electrode and the gate signal line A liquid crystal display region, wherein the liquid crystal display region includes a video display region and a plurality of pixel region groups outside the video display region and having a common gate signal line. And at least a part of a plurality of stages of pixel region groups constituting the outer frame display region are characterized in that their gate signal lines are commonly connected. .

Means 6. A liquid crystal display device according to the present invention includes, for example, a liquid crystal display region formed of an aggregate of a large number of pixels in a direction in which the liquid crystal spreads, with substrates arranged to face each other via liquid crystal as an envelope, and each of the pixels is When a potential difference between the pixel electrode and the counter electrode is small, white display is performed. The liquid crystal display area forms a video display area driven by a signal from outside the device and a frame of the video display area. And an outer frame display area that is displayed when the video display area is displayed, and a voltage substantially equal to the voltage applied to the counter electrode is supplied to the pixel electrode in the outer frame display area. It is characterized by being performed.

[0018]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the liquid crystal display device according to the present invention will be described below with reference to the drawings.

Embodiment 1 FIG. FIG. 1 is an equivalent circuit diagram showing one embodiment of a liquid crystal display device according to the present invention, and is a circuit diagram formed on a liquid crystal side surface of one transparent substrate SUB1 of the transparent substrates opposed to each other via a liquid crystal. It has become.

The one transparent substrate SUB1 is arranged so as to face the other transparent substrate via the liquid crystal, and a sealing material SL which also serves to enclose the liquid crystal (indicated by a dashed line in the figure). ) Is fixed to the other transparent substrate.

In the liquid crystal display device according to this embodiment, a so-called normally white mode in which white is displayed when there is no potential difference between a pixel electrode generating an electric field in the liquid crystal and a counter electrode. Has been adopted.

FIG. 1 is an equivalent circuit diagram corresponding to the geometrical arrangement of an actual liquid crystal display device.

First, a gate signal line GL extending in the x direction and arranged in the y direction and a drain signal extending in the y direction and arranged in the x direction are formed on the main surface of the transparent substrate SUB1 on the liquid crystal side. A line DL is formed.

Each of the rectangular areas surrounded by these signal lines constitutes a liquid crystal display area. The liquid crystal display area is a video display area driven by a signal from outside the liquid crystal display device (in FIG. Area)),
It comprises a frame display area formed around the video display area.

That is, in the image display area, each of the gate signal line GL and the drain signal line DL formed in each pixel area in the area is provided with an image from the outside of the liquid crystal display device, such as a microcomputer system. It is driven based on the information. on the other hand,
The frame display area is driven so as to be always displayed in white, for example, at the time of the image in the image display area, and a signal corresponding to each of the gate signal line GL and the drain signal line DL is supplied. ing.

FIG. 13 shows the relationship between the image display area and the frame display area in more detail. In the same figure, transparent substrates SUB1, S which are arranged to face each other via a liquid crystal
UB2, and each of these transparent substrates is fixed by a sealing material SL which also serves to enclose the liquid crystal. Sealing material S
Most of the area surrounded by L is the liquid crystal display area AR. This liquid crystal display area AR is composed of an image display area RAR and a frame display area FAR formed so as to surround the periphery of the image display area RAR. It is configured.

In FIG. 1, the frame display area FAR is composed of two steps in the vertical direction outside the image display area RAR and two rows of pixel areas in the horizontal direction outside. Here, since the video display area RAR is composed of N × M pixel areas, the entire display area including the frame display area FAR is composed of (N + 4) × (M + 4) pixel areas. Will be done.

For the sake of simplicity, the pixel area shown in the figure shows that for color display, for example, and one pixel area shown in the figure actually has three pixel areas in the x direction or y direction. It should be understood that they are arranged side by side in the direction, and are responsible for the colors of red (R), green (G), and blue (B), respectively (with built-in filters corresponding to the respective colors).

Each pixel area of the video display area RAR and the frame display area FAR configured as described above includes:
One of the gate signal lines GL (the lower gate signal line GL in the figure) among the gate signal lines GL surrounding the pixel region
Thin film transistor TF operated by a scanning signal from
T and a pixel electrode to which a video signal is supplied from one of the drain signal lines DL (the left drain signal line DL in the case of FIG. 1) among the drain signal lines DL surrounding the pixel region via the thin film transistor TFT. PX are formed.

The pixel electrode PX generates an electric field between the pixel electrode PX and a counter electrode disposed to face the liquid crystal, for example, and controls the light transmittance of the liquid crystal by the electric field.

In each pixel region, the pixel electrode PX and the other gate signal line GL of the gate signal lines GL are provided.
And a capacitive element Cadd is formed between them, so that the video signal supplied to the pixel electrode PX is accumulated for a long time by the capacitive element Cadd.

Further, one end of a gate signal line GL for driving the thin film transistor TFT in each pixel region in the video display region RAR extends beyond the sealing material SL, and a gate terminal to which a gate signal is supplied is provided at the extending end. Are formed, and scanning signals G (1),...,.
G (M) are sequentially supplied.

Similarly, the thin film transistor of each pixel region in the image display region RAR is connected to the pixel electrode P via the TFT.
One end of a drain signal line DL for supplying a video signal to X extends beyond the sealing material SL, and a drain terminal portion is formed at the extending end.
(1),..., D (N) are supplied.

The upper three gate signal lines GL and the lower two gate signal lines GL in the drawing are used to scan each pixel area of the frame display area FAR.
It is formed as.

The lower two gate signal lines GL are connected to the upper three gate signal lines G outside the display area (right side in the figure).
The gate signal lines GL other than the uppermost gate signal line L are electrically connected in common.

That is, a scanning signal of each gate signal line GL for scanning each pixel area of the frame display area FAR is supplied simultaneously by one signal.

Here, the uppermost gate signal line GL among the three upper gate signal lines GL is a so-called dummy signal line, and the uppermost pixel region is connected to another pixel region and a capacitive element Cadd. This is because the same electrical conditions are included. For example, a low level gate signal is always supplied from the gate driver to the dummy signal line.

Further, two drain signal lines DL on the left side and three drain signal lines DL on the right side of the drawing are drain signal lines DL for supplying signals to the pixel electrodes PX of each pixel area of the frame display area FAR. It is formed as.

Each of these drain signal lines DL is connected to, for example, the drain signal lines DL on the left side in common, and has the same voltage (Vc) as the signal voltage supplied to the counter electrode CT.
om) is commonly connected between the drain signal lines DL on the right side, and the same voltage (Vcom) as the signal voltage supplied to the counter electrode CT is supplied.

As described above, the liquid crystal display device according to this embodiment is of a so-called normally white mode in which white display is performed when there is no potential difference between the pixel electrode PX and the counter electrode CT. , Frame display area FAR
Are displayed in white, and the pixels are displayed in the image display area RA.
It will be clearly displayed as a white frame surrounding R.

In this case, another signal (an external signal) for displaying each pixel of the frame display region FAR in white may be supplied to each drain signal line DL. This makes it possible to avoid the trouble of inserting and inserting a signal for displaying the frame in the video signal.

The liquid crystal surface of one of the transparent substrates or the other transparent substrate is usually provided with a black matrix in which openings are formed so as to frame each pixel region. The image display area RAR is formed not only in the frame display area FAR but also in the frame display area FAR.

The black matrix may be formed outside the frame display area FAR, but in this case, the opening is an area where no opening is formed.

FIG. 2 is a timing chart of the scanning signals in the liquid crystal display device having the above-described configuration, and the scanning signals G (1), G (2),.
(M) are sequentially supplied, so that the video display area RA
After each pixel group arranged in the x direction in R is selected, the frame display area FAR is generated by the scanning signal G (M + 1).
Are simultaneously selected. Therefore, even if the interval from G (M) to G (1) of the next frame is short, frame display can be performed.

In this case, the frame display area FAR
, A signal having the same potential as that of the counter electrode CT is supplied to the pixel electrode PX of each pixel group via the thin film transistor TFT, and these pixels are displayed in white. The video signals D (1),..., D (N) for displaying the color of the frame (in this case, white) are supplied from the drain driver.

Embodiment 2 FIG. FIG. 3 is a circuit diagram showing another embodiment of the liquid crystal display device according to the present invention, and corresponds to FIG.

In FIG. 3, the configuration different from FIG. 1 is that the upper gate signal lines GL and the lower gate signal lines GL in the frame display area FAR are electrically separated from each other.
The scanning signals G (M + 1) and G (M + MD + 1) are supplied, respectively.

FIG. 4 is a timing chart of the scanning signals in the liquid crystal display device having the above-described configuration, and the scanning signals G (1), G (2),.
(M) are sequentially supplied, so that the video display area RA
After each pixel group arranged in the x direction in R is selected, each pixel group on the lower side of the frame display area FAR is simultaneously selected by G (M + 1), and further, G (M + M
D + 1), each pixel group on the upper side of the frame display area FAR is simultaneously selected.

In this way, the load applied to the gate signal line GL is shared.

Embodiment 3 FIG. FIG. 5 is a circuit diagram showing another embodiment of the liquid crystal display device according to the present invention, and corresponds to FIG.

In FIG. 5, the configuration different from FIG. 1 is that each gate signal line in the frame display area FAR is divided into three,
A scanning signal is sequentially supplied to each of them.

For example, the scanning signal G (M +) is applied to the two gate signal lines GL in the lower frame display area FAR.
1), G (M + MD) are sequentially supplied, and thereafter, a scanning signal G (M + MD + 1) is simultaneously supplied to each of the two gate signal lines GL in the upper frame display area FAR.

For this reason, the two gate signal lines GL in the upper frame display area FAR are commonly connected on the right side in the figure, and pass outside the lower frame display area FAR, and the terminals thereof are connected to other gates. It is provided in parallel with the gate terminal of the signal line GL.

FIG. 6 shows a timing chart of a scanning signal in the liquid crystal display device having such a configuration.

Embodiment 4 FIG. FIG. 7 is a circuit diagram showing another embodiment of the liquid crystal display device according to the present invention, and corresponds to FIG.

In FIG. 7, when compared with FIG. 1, each gate signal line GL in the frame display area FAR is electrically connected to supply one scanning signal, but each gate signal line GL is similar. Wiring for supplying a scanning signal to the signal line GL is not shared with one of the gate signal lines GL but is formed independently of each other.

In the case of such a configuration, the wiring can be made larger in line width than the respective gate signal lines GL, for example, to reduce the electric resistance, whereby the wiring is supplied to the respective gate signal lines GL. Generation of waveform distortion of the scanning signal can be suppressed.

FIG. 8 is a timing chart of a scanning signal in the liquid crystal display device having such a configuration.

Embodiment 5 FIG. FIG. 9 is a circuit diagram showing another embodiment of the liquid crystal display device according to the present invention, and corresponds to FIG.

FIG. 9 is different from FIG. 1 in that a capacitive element Cadd is not formed in a part of each pixel area in the frame display area FAR.

In the configuration shown in FIG. 1, as described above, the gate signal lines GL in the frame display area FAR are commonly connected, and are supplied with a scanning signal at the same time. This means that in a pixel region sandwiched between the gate signal lines GL, a disadvantage caused by a DC component voltage applied to the liquid crystal due to a so-called jump voltage from the gate signal line GL becomes remarkable, so that the capacitor Cadd was removed. It has a configuration.

That is, the voltage applied to the liquid crystal is expressed by the following equation (1) when the capacitance element Cadd is formed, and when the capacitance element Cadd is not formed,
The following equation (2) is obtained, and it can be seen that the latter is more difficult to apply a DC voltage. For this reason, the frame display areas FAR on the upper and lower sides of the screen are always kept bright, and the reliability is improved.

[0063]

(Equation 1)

[0064]

(Equation 2) In the above equations, Cgs is the thin film transistor T
In the FT, the gate and source capacitances, Cpx is the liquid crystal capacitance, Vgh is the high level voltage of the scanning signal, Vgl is the low level voltage of the scanning signal, and Vcom is the signal voltage applied to the counter electrode CT.

Accordingly, the pixel areas where the capacitive element Cadd is not formed are the upper and lower parts of the frame display area FAR, and the left and right parts excluding those parts are as described above. Since such inconvenience does not occur, the configuration is such that the capacitance element Cadd is formed.

Further, as described above, in order to avoid the problem of the so-called jump voltage, in each pixel of the frame display area FAR, the capacitive element is formed between the pixel electrode PX and the capacitive signal line CL. It may be formed instead of Cstg.

As shown in FIG. 14, the capacitance element Cstg is connected to a capacitance signal line CL which is separate from the gate signal line GL and to which a potential similar to the potential (Vcom) supplied to the counter electrode CT is applied. The capacitance signal line C
This is a capacitance formed between L and the pixel electrode PX.

In this case, the thin film transistor T
A gate signal line GL for driving the FT and another gate signal line G adjacent to the gate signal line GL and surrounding the pixel region;
Even if a scanning signal is supplied to L at the same time, it is possible to avoid the above-mentioned generation of the jump voltage.

In each of the embodiments described below,
Although there is a case where no capacitive element is formed in a part of the pixel region of the frame display area FAR, the capacitive element Cst
It goes without saying that g may be formed.

In the same figure, the frame display area FAR
A pixel region is also formed outside the pixel region, and this pixel region is formed as a dummy pixel, which is also different from that of FIG. In this figure, the dummy pixels are formed, for example, in one stage on the upper side and the lower side, and in one column on the left side and the right side.

The dummy pixel is for electrically setting the same condition as the pixel adjacent in the y direction, and does not function as a liquid crystal display area for the observer to observe.
For this reason, the pixel region of this portion is covered with, for example, the black matrix BM and is shielded from light.

A signal is also supplied to the gate signal line GL of each pixel area in the dummy pixel. In this embodiment, the gate signal line of each pixel area in the frame display area FAR is supplied. And the signal to the gate signal line of each pixel region in the dummy pixel are supplied at different timings.

Embodiment 6 FIG. FIG. 10 is a circuit diagram showing another embodiment of the liquid crystal display device according to the present invention, and corresponds to FIG.

FIG. 10 differs from FIG. 9 in that a gate signal line of each pixel region in the frame display region FAR and a gate signal line GL of each pixel region in the dummy pixel are connected in common, and one scanning A signal is provided.

In this case as well, the frame display area FAR
And the gate signal line surrounding the pixel region is connected in common, the capacitance element C in the pixel region
The add is not formed.

As described above, instead of not forming the capacitance element Cadd, the capacitance element Cstg having the capacitance signal line CL as one electrode may be provided as described above.

Embodiment 7 FIG. FIG. 11 is a circuit diagram showing another embodiment of the liquid crystal display device according to the present invention, and corresponds to FIG.

In FIG. 11, the configuration different from FIG.
In the dummy pixel, the capacitance element Cadd is not formed in each pixel region in the lower part.

In consideration of avoiding the dive,
This is because it is preferable that there is no capacitance element Cadd.

Embodiment 8 FIG. FIG. 12 is a circuit diagram showing another embodiment of the liquid crystal display device according to the present invention, and corresponds to FIG.

FIG. 12 is different from FIG.
In the dummy pixel, the capacitive element Cadd is not formed not only in the lower pixel area but also in the upper pixel area.

In each of the above embodiments, the image display area RA
The frame display area FAR surrounding R is configured such that the upper and lower sides are arranged in two steps, respectively, and the left and right sides are arranged in two columns. However, this number is arbitrary and is determined by the width of the frame display area FAR, and is not limited.

In each of the above embodiments, the image display area RA
The capacitance element formed in each pixel region in R is provided between the pixel electrode PX and the gate signal line GL (capacitance element Cadd), but is separate from the pixel electrode PX and the gate signal line GL. It is needless to say that the capacitor Cstg provided between the capacitor signal line and the capacitor signal line formed as described above may be used.

In this case, the capacitance element Cst is similarly applied to the frame display area FAR or each pixel area of the dummy pixels.
By providing g, there is an effect that it is not particularly necessary to take measures against the application of the DC voltage to the liquid crystal by the dive voltage.

In each of the above embodiments, the pixel electrode P
This is a description of a configuration in which X is formed on one substrate side, while a counter electrode is formed on the other substrate side. However, it goes without saying that the present invention is also applicable to a configuration in which the counter electrode is formed on one of the substrates.

Each pixel structure can be either a transmission type in which the transmittance of liquid crystal is controlled by an electric field, a reflection type in which a reflection plate or a reflection electrode is built in the pixel, or a semi-transmission type or a partial transmission type in which these are combined. It can also be applied to

Further, in each of the above-described embodiments, although not particularly specified, the semiconductor layer of the thin film transistor is not particularly limited, and amorphous Si (a-S
Needless to say, i) or polysilicon (p-Si) may be used.

Further, in each of the above-described embodiments, the frame body display area FAR is displayed in white, but this color is not limited, and it is needless to say that various colors can be set as needed. Nor. In such a case, the display is not limited to the normally white mode as in the above-described embodiment, but is performed in the normally black mode (black display is performed when the potential difference between the pixel electrode and the counter electrode of each pixel is small). ) Can be set to a desired color.

Further, in each of the embodiments described above, the frame display area FAR formed outside the video display area RAR is formed so as to surround the video display area RAR. For example, as shown in FIG. The image display area RA
It is needless to say that the present invention can be applied to a case in which the image display area RAR is formed on the left and right sides of the image display area RAR, as shown in FIG.

[0090]

As is apparent from the above description,
According to the liquid crystal display device of the present invention, the frame of the liquid crystal display area is displayed clearly.

Further, with a simple configuration, the frame of the liquid crystal display area can be clearly displayed.

[Brief description of the drawings]

FIG. 1 is a main part equivalent circuit diagram showing one embodiment of a liquid crystal display device according to the present invention.

FIG. 2 is a timing chart of a scanning signal of the liquid crystal display device shown in FIG.

FIG. 3 is a main part equivalent circuit diagram showing another embodiment of the liquid crystal display device according to the present invention.

FIG. 4 is a timing chart of a scanning signal of the liquid crystal display device shown in FIG.

FIG. 5 is a main part equivalent circuit diagram showing another embodiment of the liquid crystal display device according to the present invention.

6 is a timing chart of a scanning signal of the liquid crystal display device shown in FIG.

FIG. 7 is a main part equivalent circuit diagram showing another embodiment of the liquid crystal display device according to the present invention.

8 is a timing chart of a scanning signal of the liquid crystal display device shown in FIG.

FIG. 9 is a main part equivalent circuit diagram showing another embodiment of the liquid crystal display device according to the present invention.

FIG. 10 is a main part equivalent circuit diagram showing another embodiment of the liquid crystal display device according to the present invention.

FIG. 11 is a main part equivalent circuit diagram showing another embodiment of the liquid crystal display device according to the present invention.

FIG. 12 is a main part equivalent circuit diagram showing another embodiment of the liquid crystal display device according to the present invention.

FIG. 13 is an explanatory diagram showing a relationship between a video display area and a frame display area of the liquid crystal display device according to the present invention.

FIG. 14 is a circuit diagram showing another embodiment of the pixel of the liquid crystal display device according to the present invention.

FIG. 15 is a plan view showing another embodiment of the liquid crystal display device according to the present invention.

FIG. 16 is a plan view showing another embodiment of the liquid crystal display device according to the present invention.

[Explanation of symbols]

SUB: transparent substrate, GL: gate signal line, DL: drain signal line, TFT: thin film transistor, PX: pixel electrode, Cadd, Cstg: capacitive element, AR: liquid crystal display area, RAR: video display area, FAR: frame display region.

 ────────────────────────────────────────────────── ─── Continuing on the front page (72) Inventor Kazuhiro Ogawa 3300 Hayano Mobara-shi, Chiba F-term in Display Group, Hitachi, Ltd. (Reference) 2H092 JA24 JB23 JB79 NA01 NA14 5C094 AA01 AA10 BA03 BA43 CA19 EA04 EA07

Claims (6)

[Claims] 1. A liquid crystal display area comprising a group of a large number of pixels arranged in a direction in which the liquid crystal spreads, wherein the substrates are arranged opposite to each other with a liquid crystal interposed therebetween. And the liquid crystal display area is a video display area and an outer frame display comprising the pixel area group of a plurality of steps outside the video display area. A liquid crystal display device comprising: a plurality of pixel region groups constituting the outer frame display region; and at least a part of the plurality of pixel region groups constituting the outer frame display region, the gate signal lines thereof are commonly connected. 2. A liquid crystal display area comprising a group of a large number of pixels in a direction in which the liquid crystal spreads, wherein the substrates are arranged opposite to each other with a liquid crystal interposed therebetween, and each pixel has a pair of gate signal lines. And a region surrounded by a pair of drain signal lines, a thin film transistor activated by a scanning signal from the gate signal line, a pixel electrode to which a signal from the drain signal line is supplied via the thin film transistor, A capacitive element formed between a gate signal line for operating the thin film transistor and another gate signal line different from the gate signal line, wherein the liquid crystal display region is a video display region and a gate outside the video display region. An outer frame display area in which a plurality of pixel area groups sharing a signal line are arranged, and a small number of the plurality of pixel area groups forming the outer frame display area. A liquid crystal display device characterized in that at least part of the gate signal lines are connected in common, and the capacitor is not formed in a pixel region sandwiched between the commonly connected gate signal lines. 3. A liquid crystal display area comprising a group of a large number of pixels arranged in a direction in which the liquid crystal spreads, wherein the substrates are arranged opposite to each other with a liquid crystal interposed therebetween, and each pixel has a pair of gate signal lines. And a region surrounded by a pair of drain signal lines, a thin film transistor activated by a scanning signal from the gate signal line, a pixel electrode to which a signal from the drain signal line is supplied via the thin film transistor, A liquid crystal display area, and an outer frame display area comprising a video display area and a pixel area group outside the video display area and having a common drain signal line. A signal having substantially the same potential as a signal supplied to the counter electrode is supplied to a drain signal line of each pixel region group of the outer frame display region. Crystal display device. 4. A liquid crystal display region comprising a group of a large number of pixels in a direction in which the liquid crystal spreads, wherein the substrates disposed opposite to each other with a liquid crystal interposed therebetween have a liquid crystal display area, and each pixel has a pair of gate signal lines. And a region surrounded by a pair of drain signal lines, a thin film transistor activated by a scanning signal from the gate signal line, a pixel electrode to which a signal from the drain signal line is supplied via the thin film transistor, A first capacitive element formed between a gate signal line for operating the thin film transistor and another gate signal line different from the gate signal line, wherein the liquid crystal display region is a video display region and an outside of the video display region. And an outer frame display area in which a plurality of pixel areas sharing a gate signal line are arranged in a plurality of rows. The gate signal lines are connected at least in part, and are formed separately from the gate signal lines in place of the first capacitor in a pixel region sandwiched between the commonly connected gate signal lines. A liquid crystal display device, wherein a second capacitance element provided between the capacitance signal line and the pixel electrode is formed. 5. A liquid crystal display region comprising a group of a large number of pixels in a direction in which the liquid crystal spreads, wherein the substrates disposed opposite to each other via a liquid crystal are used as an envelope, and each pixel has a pair of gate signal lines. And a region surrounded by a pair of drain signal lines, a thin film transistor activated by a scanning signal from the gate signal line, a pixel electrode to which a signal from the drain signal line is supplied via the thin film transistor, A capacitance element formed between the gate signal line and a capacitance signal line formed separately, wherein the liquid crystal display region is a video display region and a gate signal outside the video display region. And an outer frame display area in which a plurality of pixel area groups sharing a line are arranged. At least a part of the plurality of pixel area groups forming the outer frame display area is a A liquid crystal display device, wherein the common signal lines are connected in common. 6. A liquid crystal display region comprising a group of a large number of pixels in a direction in which the liquid crystal spreads, wherein the substrates are disposed opposite to each other with a liquid crystal interposed therebetween, and each pixel has a pixel electrode and a counter electrode. When the potential difference between them is small, white display is performed, and the liquid crystal display area forms a frame of the video display area and a video display area driven by a signal from the outside of the device, and And an outer frame display area that is displayed when the video display area is displayed, and a pixel electrode in the outer frame display area is supplied with substantially the same voltage as the voltage applied to the counter electrode. Liquid crystal display device.