JP2002323513A - Semiconductor device and manufacturing method for it - Google Patents

Abstract

PROBLEM TO BE SOLVED: To prevent sticking such as adhering of a structure to a lower substrate in a process of etching a sacrifice layer at the lower of the structure and drying the same. SOLUTION: A high concentration impurity region is formed all over or partially in the Si 101 surface of a third layer, an oxide film SiO2 102 of a second layer is formed on the whole surface of the third layer, which is joined to Si substrate of a first layer, and Si of the third layer is mirror-polished to obtain an SOI wafer. Subsequently, the resist 104 is patterned to form a groove and a penetrating hole determining the outline of a structure in Si of the third layer, and a projecting and recessed part 112 about 0.01 to 0.5 μm is formed on the surface where a high concentration impurity region of the third layer is formed simultaneously with removing the oxide film SiO2 of the second layer opposite to the formed detected structure 103. A contact area between the third layer and the first layer is decreased by the projecting and recessed part, so that suction force in the first layer direction of the third layer generated by the surface tension 300 of a liquid is reduced so as to surely prevent sticking.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device formed of a semiconductor material and a method of manufacturing the same, and more particularly, to a structure used for a semiconductor dynamic quantity sensor or the like using micromachining on the surface. The present invention relates to a technique for preventing sticking in which a structure adheres to a lower substrate in a process of etching a lower portion of a lower portion by a sacrificial layer and drying the lower portion.

[0002]

2. Description of the Related Art FIG. 7 shows an example of a conventional semiconductor device manufacturing process. 4A to 4E are cross-sectional views showing a semiconductor device manufacturing process, and FIG. 4G shows a top view and an enlarged view of the semiconductor device. The items (a) to (e) in the following description correspond to (a) to (e) in the drawings (this correspondence is the same in other drawings as well).

(A) On a top surface of a Si (silicon) substrate 10, BPSG (boron-phosphosilicate glass) or PS
An insulating layer 11 of G (phosphosilicate glass) or the like is formed, and polysilicon 12 serving as a movable electrode and a fixed electrode is formed on the insulating layer 11. In some cases, Si
An SOI (silicon on insulator: silicon on an insulating layer) wafer formed by bonding a substrate 10, an insulating layer 11 of an oxide film, and a Si active layer 12 is used.

(B) After patterning and etching a resist to form a detection structure 13 with polysilicon or an active layer Si, (c) an insulating layer 11 such as BPSG, PSG or an oxide film
Is etched with an etchant 20 such as an aqueous solution containing BHF. (D) After that, a step of replacing and washing with a liquid such as pure water or IPA (isopropyl alcohol) and then drying is performed.

(E) At this time, the polysilicon structure 1
The surface tension 21 of the liquid at the time of cleaning is generated in the gap between the silicon substrate 3 and the Si substrate 10, whereby the low-rigidity polysilicon structure 13 is sucked and fixed to the Si substrate 10 (hereinafter referred to as sticking phenomenon). Will occur). On the other hand, in the invention described in Japanese Patent Publication No. 7-505743, a solution as shown in FIG.

(A) An insulating layer 11 such as BPSG or PSG is formed on the upper surface of a Si substrate 10.
Polysilicon 12 serving as a movable electrode and a fixed electrode
Generate In some cases, an SOI wafer formed by bonding the Si substrate 10, the insulating layer 11 of an oxide film, and the Si active layer 12 is used. (B) patterning and etching the resist,
Detection structure 1 using polysilicon or active layer Si
3 is formed, (c) first sacrificial layer etching is performed so that the detection structure 13 is not completely free, and (d) patterning is performed so that the detection structure 13 is supported by the photosensitive polymer 30. (E) detecting structure 13 by etching the second sacrificial layer
Is completely free and then dried. At this time, since the detection structure 13 is supported by the rigidity of the photosensitive polymer 30, the sticking phenomenon does not occur.

(F) The photosensitive polymer 30 is removed by a dry process such as ashing, and (g) the detection structure 13 in a free state is manufactured. However, in the step of the prior application shown in FIG. 8, the photosensitive polymer 3 was etched after the first sacrificial layer etching so that the unevenness became several μm.
Patterning 0 is difficult in patterning accuracy, and it is difficult to evenly penetrate the photosensitive polymer 30 in the wafer to the lower surface where the sacrificial layer is etched.

Furthermore, it is difficult to completely remove the photosensitive polymer 30 which has penetrated the etched lower surface of the sacrificial layer by a dry process such as ashing, which not only causes a reduction in manufacturing yield, but also reduces the detection structure. There is a possibility that the movable range of the body 13 may not be reliably formed, and there is a problem in that the sensor becomes low in reliability. In addition, the number of steps of dividing the sacrificial layer etching into two steps and further patterning the photosensitive polymer 30 is increased, thereby increasing the manufacturing cost.

In the invention described in JP-A-7-209105 and the invention described in JP-A-7-245414, a solution as shown in FIG. 9 is used. (A) An insulating layer such as BPSG or PSG is formed on the upper surface of a Si substrate 10 to generate polysilicon 12 to be a movable electrode and a fixed electrode. Further, in some cases, as shown in FIG. 10, a wafer having an insulating layer 32 formed of an oxide film on the entire surface of the Si active layer 31 is bonded to the Si substrate 10 to grind unnecessary portions and polishing. The SOI wafer formed by the above is used.

(B) After patterning and etching a resist to form a detection structure 13 with polysilicon or active layer Si, (c) an insulating layer 11 such as BPSG, PSG or an oxide film
Is etched with an etching solution 20 such as BHF. (D) The washing liquid is replaced with the sublimation substance 40 such as paradichlorobenzene or naphthalene in a liquid state, and the detection structure 13 is formed.
The gap between the substrate and the Si substrate 10 is solidified by the sublimation substance 40.

(E) Thereafter, the detection structure 13 is manufactured by sublimating the sublimation substance 40. However, even in such a method of the prior application, the sublimation substance 40 is not completely removed, and therefore, there is a case where foreign matter remains on a clean sensor surface after being thoroughly washed,
There is a disadvantage that the reliability of the sensor is reduced.

[0012]

SUMMARY OF THE INVENTION An object of the present invention is to provide a special process for preventing a sticking phenomenon in which a structure composed of a third layer is stuck to the first layer during drying after etching of a sacrificial layer. Therefore, it is possible to reliably prevent the foreign matter from increasing without increasing the amount of foreign matter and leaving no foreign matter on the removed space or the sensor surface.

[0013]

In order to achieve the above object, a first aspect of the present invention is directed to a first layer Si substrate and a third layer Si substrate.
And a semiconductor device having a three-layer SOI in which the second layer is bonded with an oxide film of a second layer, the second layer in contact with the detection structure formed in the third layer is removed as a sacrificial layer,
An unevenness is formed on at least one of the opposing surfaces of the third layer and the first layer.

Here, a high-concentration impurity region is formed on the entire surface or a part of the surface on which the irregularities are formed. Further, the unevenness may have a height difference of 0.01 to 0.5 μm. Further, the unevenness is formed by being exposed to one of a gas containing HF and an aqueous solution containing HF when the second layer is removed as a sacrificial layer. it can.

The high concentration impurity region is 1 × 10 ¹⁴
It can be characterized by being formed by implanting ions of atm / cm ² or more. Further, the signal processing circuit may be integrally formed. Further, the semiconductor device is any one of a semiconductor strain gauge type sensor using a portion of the third layer from which the second layer is removed as a detection structure, and a capacitance type sensor. Can be.

In order to achieve the above object, the invention of a semiconductor device manufacturing method according to claim 8 is directed to at least one of the first layer Si substrate and the third layer Si surface. Forming a high-concentration impurity region in any one of the above, and bonding the first layer and the third layer with a second-layer oxide film so as to sandwich the high-concentration impurity region. I do.

Here, the step of forming a detection structure in the third layer and the step of removing the second layer in contact with the third layer by using either a gas containing HF or an aqueous solution containing HF At the same time, a step of forming irregularities on the surface having the high concentration impurity region. For example, when the second layer is removed by etching, the etching proceeds smoothly on the surface of the portion where the high-concentration impurity region is not provided, whereas the surface is roughened by providing the high-concentration impurity region. Etching proceeds in the state of being bent, and irregularities are formed.

After forming the signal processing circuit in the third layer, a step of forming a passivation film, a step of removing the passivation film on a region where the detection structure is formed, and a step of removing the passivation film are performed. Patterning a resist for forming a detection structure on the third layer, forming the resist as a resist for protecting the passivation film, and dry-etching and wet-etching the detection structure on the third layer And a step of forming by any one of the above.

In the present invention, by forming irregularities on at least one of the opposing surfaces of the first layer and the third layer, the contact area between the third layer and the first layer is reduced by the irregularities. Accordingly, the suction force of the third layer in the first layer direction generated by the surface tension of the liquid can be reduced, and the sticking phenomenon can be reliably prevented.

[0020]

Embodiments of the present invention will be described below in detail with reference to the drawings. (Example of Semiconductor Device) FIG. 1 shows an acceleration sensor as an example of a semiconductor device manufactured by using the present invention.
1A is a top view showing the entire semiconductor device, FIG. 1B is an enlarged view of the sensor portion, and FIG. 1C is a cross-sectional view taken along the line YY in the enlarged view. It is.

As shown in FIG. 1, between a first layer, for example, an N-type Si substrate 100 and a third layer, for example, N-type Si 101, a second layer of SiO _{2 serving} as an electrical isolation and sacrificial layer is formed.
There is a chip on which a silicon substrate 102 is formed.
A detection structure 103 and an input / output terminal 106 that are integrated with a signal processing circuit (not shown) are formed on 01. First layer Si substrate 100 and third layer Si10
1 may be P-type.

On the lower surface of the detection structure 103 disposed at the center of the chip, SiO ₂ 102 has been removed.
The structure of the detection structure 103 is configured to move freely in the thickness direction. The detection structure 103 includes 1
Semiconductor strain gauges 108a, 108b, 10
Four beam portions 111a, 1 on which 8c, 108d are formed
11b, 111c, and 111d, beam portions 111e, 111f, 111g, and 111h on which wires are formed, and a weight portion on which a sacrificial layer etching through hole 109 is formed. These semiconductor strain gauges 108a, 108b, 108c and 108d constitute a Wheatstone bridge circuit 1001 shown in FIG.
That is, the four semiconductor strain gauges 108a, 108
The output voltage of the Wheatstone bridge circuit constituted by b, 108c, and 108d is amplified by a signal processing circuit (not shown).

When acceleration acts on the acceleration sensor thus constructed in the direction of the arrow shown in FIG. 1C, the four semiconductor strain gauges 108a, 108b, 108c, 1
08d, two semiconductor strain gauges 108b,
A compressive stress is generated in 108d, and the resistance value decreases.
Tensile stress is generated in the two semiconductor strain gauges 108a and 108c, and the resistance value increases. Therefore, V + and V− of the Wheatstone bridge circuit 1001
, A sensor output corresponding to the acceleration is obtained.

(First Embodiment) As a first embodiment of the present invention, a manufacturing process of an SOI wafer which is a first half of a manufacturing process for manufacturing the acceleration sensor of FIG. 1 will be described with reference to FIG. . The items (a) to (e) in the following description correspond to (a) to (e) in the drawings (this correspondence is the same in other drawings as well).

(A) First layer Si101 of third layer Si101
A high-concentration impurity region 133 is formed on the entire surface 133 facing the substrate 100. This high concentration impurity region 133 is 1
× 10 ¹⁴ atm / cm ² or more ions (for example, BF2,
B11, P, etc.). If the ion implantation is at least 10 ¹⁵ atm / cm ² , etching is more likely to occur, and the unevenness is more likely to be formed.

(B) Next, the third layer of Si101 is thermally oxidized to cover the entire surface of the third layer of Si101 with the second layer of Si101.
An entire surface SiO ₂ 104 to be O ₂ 102 is formed. (C) Next, the first layer Si substrate 100 wafer and the third layer Si101 wafer are heated at a high temperature (for example, 800 ° C. to 1 ° C.).
Under high pressure (for example, 80 × 10 ^{4 to} 20 ×).
Bonding is performed by applying 10 ⁴ Pa (Pascal).

(D) Next, the third layer Si101 is ground to a predetermined thickness (for example, 50 to 200 μm). (E) Next, the third layer of Si 101 is polished (mirror-polished) to a predetermined thickness (for example, 5 to 100 μm) to, for example, reduce the surface roughness to 0.001 μm or less.

Using the SOI wafer manufactured as described above, the acceleration sensor shown in FIG. 1 is manufactured by the steps of the procedure shown in FIG. 4A to 4F show the manufacturing process, but FIG. 4G is the same as FIGS. 1A and 1B and is inserted for easy understanding. Things. Hereinafter, a manufacturing procedure of the acceleration sensor will be described. (A) In the region where the signal processing circuit of Si101 of the third layer is formed, an IC device, a diffusion wiring, an Al wiring, an Al pad, etc., which constitute the signal processing circuit (all not shown)
To form Further, it is preferable that the semiconductor strain gauge 108 is formed simultaneously with the step of forming the signal processing circuit.
Thereafter, a passivation film (not shown) is formed.
The passivation film on the region where the third-layer Si 101 detection structure 103 is to be formed (including the beam portion 111 in this case) is removed. Detection structure 1 on third layer Si101
The resist 104 for forming 03 is patterned. At this time, the resist 104 on the region where the detection structure 103 is formed is brought into close contact with the third layer Si101, and in the signal processing circuit region, the resist 104 is brought into close contact with the exposed passivation film to protect it.

(B) A groove (110 in FIG. 1) and a through hole (109 in FIG. 1) for determining the outer shape of the detection structure 103 are processed by dry etching or wet etching of the third layer of Si 101. A beam portion (111 in FIG. 1) is also formed. (C) Detection structure 10 formed on third layer Si101
A second oxide film SiO ₂ (= sacrificial layer) 10 facing 3
2 is a gas containing HF or an aqueous solution containing HF 20
0 (e.g., etching the sacrificial layer)
Since the high-concentration impurity region 133 is formed in the third layer Si101 as described in FIG. 3, the surface impurity concentration is high, and the surface is etched and roughened in a gas containing HF or the aqueous solution 200. (Stain etching) occurs. Due to this phenomenon, unevenness 112 having a height difference of about 0.01 to 0.5 μm is formed in the third layer Si 101.

This unevenness mainly depends on the depth of the high concentration impurity region 133. Depending on the degree of etching, the high-concentration impurity region 133 remaining without being etched and the third layer of Si 101 may be mixed on the surface of the unevenness. (D) (e) When the gas containing HF or the aqueous solution 200 containing HF is replaced with pure water or IPA (isopropyl alcohol) or the like and dried, the surface tension 300 of these replacement liquids causes A pulling force depending on the contact area of the detection structure 103 formed on the three layers of Si 101 on the side of the first layer Si substrate 100 is generated.
101, the first layer Si substrate 10
The contact area between 0 and the third layer of Si 101 is reduced, and drying can be performed without sticking.

(F) After the drying is completed, the resist 104
Is removed by ashing or the like, and the detection structure 103 is completed. Here, Si101 of the third layer was formed of SiO ₂ 132, may be formed of SiO ₂ on Si substrate Si100 of the first layer. (Second Embodiment) As a second embodiment of the present invention, another example of a manufacturing process of an SOI wafer according to the present invention will be described with reference to FIG.

(A) S of the third layer on which the detection structure is formed
A high-concentration impurity region 134 is formed on the surface of the first layer i101 facing the Si substrate 100 by ion implantation. This high-concentration impurity region 134 is formed, for example, after a resist is applied to the third layer of Si 101, at a pitch of 30 to 50 μm,
After patterning with a circular shape of 10 μm to 10 μm and removing the circular portion, ion implantation of 1 × 10 ¹⁴ atm / cm ² or more is performed.

(B) Next, the third layer of Si101 is thermally oxidized so that the second layer of Si101 is placed in front of the surface of the third layer of Si101.
An entire surface SiO ₂ 132 to be O ₂ 102 is formed. (C) Next, the wafer of the first layer Si substrate 100 and the wafer of the third layer Si101 are heated at a high temperature (for example, 800 ° C. to 1 ° C.).
Under high pressure (for example, 80 × 10 ^{4 to} 20 ×).
Bonding is performed by applying 10 ⁴ Pa).

(D) The third layer of Si 101 is ground to a predetermined thickness (for example, 50 to 200 μm). (E) The third layer Si101 is formed to a predetermined thickness (for example,
(100 μm). At this time, the surface roughness is set to, for example, 0.001 μm or less. Using the SOI wafer manufactured as described above, FIG.
The acceleration sensor shown in FIG. 1 is manufactured by the manufacturing process shown in FIG. 6 (a) to 6 (f) show the manufacturing steps, but FIG. 6 (g) is the same as FIGS. 1 (A) and 1 (B), and is inserted for easy understanding. Things. Hereinafter, a manufacturing procedure of the acceleration sensor will be described.

(A) An IC device, a diffusion wiring, an Al wiring, an Al pad, etc. (all not shown) constituting the signal processing circuit are formed in a region where the signal processing circuit of Si101 of the third layer is formed. A passivation film (not shown) is formed thereon. The passivation film on the region (in this case, including the beam portion 111) on which the detection structure 103 of Si101 of the third layer is formed is removed. Third layer Si
A resist 104 for forming a detection structure 103 on the substrate 101 is patterned. At this time, the resist 104 on the formation region of the detection structure is brought into close contact with the third layer Si101, and the resist 104 is formed on the signal processing circuit region.
Protects the exposed passivation film by contacting it.

(B) A groove or a through hole that determines the outer shape of the detection structure 103 is processed by dry etching or wet etching of the third layer of Si 101. At this time, a beam portion is also formed. (C) The high-concentration impurity region 134 is etched at the same time as the second layer of SiO ₂ (= sacrificial layer) is removed with a gas containing HF or an aqueous solution 200 containing HF (sacrifice layer etching). The formation of the high-concentration impurity region 134 has been described in the description of FIG.

The high-concentration impurity region 134 into which the ions have been implanted has a high surface impurity concentration, and therefore has a third surface in a gas containing HF or an aqueous solution 200 containing HF.
It is etched from the layer Si101. Therefore, a phenomenon (stain etching) that is roughened by etching occurs on the surface of the high-concentration impurity region 134. Due to this phenomenon, a difference in height between a region where ions are not implanted into Si 101 of the third layer and a region where ions are implanted is approximately 0.01 to 0.
The unevenness 113 of 5 μm is formed.

In this example, as shown in FIG. 6C, the portion where the high-concentration impurity region 134 has been formed is etched and dented. Here, in the ion implantation step of FIG. 5A, the resist is removed from the remaining portion except for the circular patterning portion, and the high concentration impurity region 134 is formed by ion implantation. The positional relationship formed is reversed, and the region where the high-concentration impurity region 134 is not formed by etching remains in a convex shape.

The patterning of the resist is not limited to a circle, but may be another shape such as a square depending on the shape of the beam portion. As described above, the shape of the unevenness is not limited to the above-described embodiment, but can be formed into various shapes using an etching technique. This unevenness mainly depends on the depth of the high-concentration impurity region 134. Depending on the degree of etching, the high-concentration impurity region 134 that has not been removed by etching and the third layer of Si 101 may be mixed on the uneven surface.

(D) (e) Gas or aqueous solution containing HF 2
00 is replaced with pure water or IPA (isopropyl alcohol) and the like.
00 causes a pulling force depending on the contact area of the detection structure 103 formed on the third-layer Si 101 on the side of the first-layer Si substrate 100. The contact area between the Si substrate 100 of the layer and the Si 101 of the first layer is reduced, and drying can be performed without sticking.

(F) After the drying is completed, the resist is removed by ashing or the like, and the detection structure 103 is completed. (Other Embodiments) In the first and second embodiments described above,
Although it has been described that the high-concentration impurity region is formed entirely or partially on the surface of the third layer of Si opposite to the first layer of the Si substrate, the present invention is not limited to this. The same effect can be obtained by forming a high-concentration impurity region entirely or partially on the surface of the first-layer Si substrate.

Further, a high-concentration impurity region may be formed on each surface of the third layer of Si facing the first layer of the Si substrate. Further, the present invention is not limited to the semiconductor strain gauge type sensors described in the first and second embodiments, but may be applied to, for example, a capacitance type sensor using an SOI wafer.

[0043]

As described above, according to the present invention,
Since irregularities are formed on at least one of the opposing surfaces of the first layer and the third layer, the contact area between the third layer and the first layer is reduced by the irregularities, and the surface tension of the liquid causes The generated attraction force of the third layer in the first layer direction can be reduced, and sticking, which is the biggest problem at the time of etching the sacrificial layer, can be surely prevented, whereby a semiconductor device with high yield and high reliability can be obtained. Can be manufactured.

According to the present invention, since a complicated process for preventing sticking is not required, a semiconductor device such as a semiconductor sensor can be manufactured at low cost.

[Brief description of the drawings]

FIGS. 1A and 1B show an acceleration sensor as an example of a semiconductor device manufactured by using the present invention, wherein FIG. 1A is a top view showing the entire semiconductor device, FIG. 1B is an enlarged view of the sensor part, and FIG. Is a sectional view taken along the line YY of the enlarged view.

FIG. 2 is a circuit diagram showing a Wheatstone bridge circuit constructed by a semiconductor strain gauge of the acceleration sensor of FIG. 1;

FIG. 3 is a process chart showing a manufacturing process of an SOI wafer used for manufacturing the semiconductor device of the first embodiment of the present invention.

4A to 4F are cross-sectional views showing a manufacturing process of the semiconductor device of the first embodiment of the present invention using the SOI wafer of FIG. 3, and FIG. 4G is a top view of the semiconductor device. It is an enlarged view.

FIG. 5 is a process chart showing a manufacturing process of an SOI wafer used for manufacturing a semiconductor device according to a second embodiment of the present invention.

6 (a) to 6 (f) are cross-sectional views showing a manufacturing process of the semiconductor device of the first embodiment of the present invention using the SOI wafer of FIG. 5, and FIG. 6 (g) is a top view of the semiconductor device. It is an enlarged view.

7A to 7E are cross-sectional views illustrating an example of a conventional manufacturing process of a semiconductor device, and FIG. 7G is a top view and an enlarged view of the semiconductor device.

8A and 8B are a cross-sectional view and a perspective view showing a conventional improved example of a semiconductor device manufacturing process.

FIG. 9 is a cross-sectional view showing another conventional improved example of the semiconductor device manufacturing process.

FIG. 10 is a process chart showing a conventional manufacturing process of an SOI wafer used for manufacturing a semiconductor device.

[Explanation of symbols]

10 first layer Si substrate 11 and the second layer SiO ₂ layer of (sacrificial layer) 13 third Si layer of the layer 20 etchant 21 surface tension 30 photosensitive polymer 40 sublimation substance 31 wafer 32 entirely SiO ₂ comprised in the third layer REFERENCE SIGNS LIST 100 first layer Si substrate 101 third layer Si layer 102 second layer SiO ₂ layer (sacrifice layer) 103 detecting structure 104 resist 106 input / output terminal 107 digital adjustment terminal 108 semiconductor strain gauge 109 sacrificial layer etching Through hole 110 Groove 111 Beam part 112, 113 Irregularities on the surface of third layer Si 101 132 Full surface SiO ₂ 133, 134 High concentration impurity region 200 Gas or aqueous solution containing HF 300 Surface tension 1001 Wheatstone bridge

Continuation of the front page (72) Inventor Toshiaki Sakai 1-1, Tanabe-shinda, Kawasaki-ku, Kawasaki-shi, Kanagawa F-term in Fuji Electric Co., Ltd. (Reference) 4M112 AA02 BA01 CA21 CA28 DA03 DA04 DA05 DA10 DA12 DA18 EA01 EA03 EA06 EA10 EA11 FA20

Claims (10)

[Claims] 1. A semiconductor device having an SOI having a three-layer structure in which a first-layer Si substrate and a third-layer Si are joined by a second-layer oxide film, wherein a detection structure formed in the third layer is provided. A semiconductor layer, wherein the second layer in contact with the first layer is removed as a sacrificial layer, and irregularities are formed on at least one of the opposing surfaces of the third layer and the first layer. 2. The semiconductor device according to claim 1, wherein a high-concentration impurity region is formed on the entire surface or a part of the surface on which the unevenness is formed. 3. A height difference of 0.01 to 0.5 μm.
The semiconductor device according to claim 1, wherein 4. The method according to claim 1, wherein the unevenness is formed by exposing to a gas containing HF or an aqueous solution containing HF when removing the second layer as a sacrificial layer. The semiconductor device according to claim 1, wherein: 5. The high-concentration impurity region is 1 × 10 ¹⁴ at.
The semiconductor device according to claim 2, wherein the semiconductor device is formed by implanting ions of m / cm ² or more. 6. The semiconductor device according to claim 1, wherein the signal processing circuit is formed integrally. 7. The semiconductor device is any one of a semiconductor strain gauge type sensor using a portion of the third layer from which the second layer is removed as a detection structure, and a capacitance type sensor. The semiconductor device according to any one of claims 1 to 6, wherein 8. A step of forming a high-concentration impurity region on at least one of the first surface of the Si substrate and the third surface of the Si surface, and the surface of the first layer. And bonding the third layer and the third layer with an oxide film of a second layer so as to sandwich the high concentration impurity region. 9. A step of forming a detection structure in the third layer, and simultaneously removing the second layer in contact with the third layer with one of a gas containing HF and an aqueous solution containing HF. 9. A method of manufacturing a semiconductor device according to claim 8, further comprising: forming irregularities on a surface having the high concentration impurity region. 10. After forming a signal processing circuit on the third layer,
Forming a passivation film; removing the passivation film on a region where the detection structure is to be formed; and patterning a resist for forming a detection structure on the third layer from which the passivation film has been removed. And a step of forming the resist as a resist for protecting the passivation film, and a step of forming a detection structure on the third layer by either dry etching or wet etching. 10. The method for manufacturing a semiconductor device according to item 9.