JP2002314117A - Lateral semiconductor photodetector of pin structure - Google Patents

Lateral semiconductor photodetector of pin structure

Info

Publication number
JP2002314117A
JP2002314117A JP2001110169A JP2001110169A JP2002314117A JP 2002314117 A JP2002314117 A JP 2002314117A JP 2001110169 A JP2001110169 A JP 2001110169A JP 2001110169 A JP2001110169 A JP 2001110169A JP 2002314117 A JP2002314117 A JP 2002314117A
Authority
JP
Japan
Prior art keywords
layer
light receiving
pin structure
dye
photodiode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2001110169A
Other languages
Japanese (ja)
Other versions
JP3912024B2 (en
JP2002314117A5 (en
Inventor
Atsushi Harada
篤 原田
Tsugio Ide
次男 井出
Shojiro Kitamura
昇二郎 北村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
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Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP2001110169A priority Critical patent/JP3912024B2/en
Publication of JP2002314117A publication Critical patent/JP2002314117A/en
Publication of JP2002314117A5 publication Critical patent/JP2002314117A5/ja
Application granted granted Critical
Publication of JP3912024B2 publication Critical patent/JP3912024B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Abstract

PROBLEM TO BE SOLVED: To provide a lateral semiconductor photodetector of PIN structure which is improved in sensitivity for detecting light without deteriorating its response speed. SOLUTION: A coloring matter layer 4 having a photoelectric conversion function is formed on the top surface of an I layer 15 in a light receiving region 2.

Description

【発明の詳細な説明】DETAILED DESCRIPTION OF THE INVENTION

【0001】[0001]

【発明の属する技術分野】本発明は、PIN構造のラテ
ラル型半導体受光素子に関する。
The present invention relates to a lateral semiconductor light receiving device having a PIN structure.

【0002】[0002]

【従来の技術】pn接合面が半導体基板面に対して平行
に形成されている縦型フォトダイオードでは、p層また
はn層を通して空乏層に光が入射されるのに対して、p
n接合面が半導体基板面に対して垂直に形成されている
ラテラル型フォトダイオードでは、空乏層に直接(p層
やn層を介さずに)光が入射される。そのため、ラテラ
ル型フォトダイオードは縦型フォトダイオードよりも、
受光効率の点で有利である。
2. Description of the Related Art In a vertical photodiode in which a pn junction surface is formed parallel to a semiconductor substrate surface, light is incident on a depletion layer through a p-layer or an n-layer.
In a lateral photodiode in which the n-junction surface is formed perpendicular to the semiconductor substrate surface, light is directly incident on the depletion layer (not through the p-layer or the n-layer). For this reason, lateral photodiodes are better than vertical photodiodes.
This is advantageous in light receiving efficiency.

【0003】従来より、フォトダイオードにおいては、
p層とn層との間にi層(真性層)を設けて、空乏層を
厚くすることが行われている。このようなPIN構造を
有する縦型フォトダイオードでは、受光感度を高くする
ために、i層を吸収長以上の厚さに形成することが行わ
れている。これにより、波長700nm〜870nm前
後において、70%以上の量子効率が得られるようにな
る。
Conventionally, in a photodiode,
An i layer (intrinsic layer) is provided between a p layer and an n layer to increase the thickness of a depletion layer. In a vertical photodiode having such a PIN structure, the i-layer is formed to have a thickness equal to or more than the absorption length in order to increase the light receiving sensitivity. As a result, a quantum efficiency of 70% or more can be obtained at a wavelength of about 700 nm to 870 nm.

【0004】PIN構造のラテラル型フォトダイオード
(PIN構造のi層とp層およびn層との界面が半導体
基板面に対して垂直に形成されたフォトダイオード)
は、例えば、i層をなす不純物濃度の極めて薄い領域を
半導体基板の表層部に設けた後、この領域の所定間隔を
開けた各位置に、上面からp型不純物及びn型不純物を
それぞれ添加して拡散させることによりp層及びn層を
形成し、両層の間をi層として残すことによって作製さ
れる。
Lateral photodiode having a PIN structure (a photodiode in which an interface between an i-layer, a p-layer, and an n-layer having a PIN structure is formed perpendicular to a semiconductor substrate surface)
For example, after a region having an extremely low impurity concentration forming an i-layer is provided in a surface layer portion of a semiconductor substrate, a p-type impurity and an n-type impurity are added to respective positions of this region at predetermined intervals from an upper surface. To form a p-layer and an n-layer, and leave an i-layer between both layers.

【0005】そのため、PIN構造のラテラル型フォト
ダイオードの場合にi層の厚さ(光入射面からの深さ)
を大きくしようとすると、p層及びn層を深く形成する
必要がある。基板の厚さ方向でi層の幅(p層とn層と
の距離)を均一に保持しながら、p層及びn層を深く形
成するためには、基板表面でのp層とn層との距離を大
きくとる必要がある。基板表面でのp層とn層との距離
を大きくとるとi層の幅が大きくなる。i層の幅が大き
いと、i層のp層側で生じた電子がn層の電極に達する
までの移動距離が長くなって、応答速度が遅くなる。
Therefore, in the case of a lateral photodiode having a PIN structure, the thickness of the i-layer (depth from the light incident surface)
In order to increase p, it is necessary to form the p-layer and the n-layer deeply. In order to form the p-layer and the n-layer deep while keeping the width of the i-layer (the distance between the p-layer and the n-layer) uniform in the thickness direction of the substrate, the p-layer and the n-layer on the substrate surface must be It is necessary to increase the distance. When the distance between the p-layer and the n-layer on the substrate surface is increased, the width of the i-layer increases. If the width of the i-layer is large, the movement distance of electrons generated on the p-layer side of the i-layer to reach the electrode of the n-layer increases, and the response speed decreases.

【0006】したがって、PIN構造のラテラル型フォ
トダイオードでは、受光感度をより高くする方法とし
て、i層の厚さ(光入射面からの深さ)を大きくするこ
とを単純に採用することができない。そのため、PIN
構造のラテラル型フォトダイオードの受光感度をより高
くする方法としては、i層の上面に反射防止膜を設けて
i層への入射効率を高くすることが有効である。
Therefore, in the lateral type photodiode having the PIN structure, as a method for increasing the light receiving sensitivity, simply increasing the thickness of the i-layer (the depth from the light incident surface) cannot be simply employed. Therefore, PIN
As a method for increasing the light receiving sensitivity of the lateral type photodiode having the structure, it is effective to provide an antireflection film on the upper surface of the i-layer to increase the efficiency of incidence on the i-layer.

【0007】[0007]

【発明が解決しようとする課題】しかしながら、i層の
上面に反射防止膜を有するPIN構造のラテラル型フォ
トダイオードには、高速の信号を受光する素子とした場
合に応答速度が低くなるという問題点がある。本発明
は、このような従来技術の問題点に着目してなされたも
のであり、PIN構造のラテラル型半導体受光素子にお
いて、応答速度を低下させることなく受光感度を向上さ
せることを課題とする。
However, a lateral type photodiode having a PIN structure having an antireflection film on the upper surface of the i-layer has a problem that the response speed is low when an element for receiving a high-speed signal is used. There is. SUMMARY OF THE INVENTION The present invention has been made in view of such a problem of the related art, and it is an object of the present invention to improve the light receiving sensitivity without lowering the response speed in a lateral semiconductor light receiving element having a PIN structure.

【0008】[0008]

【課題を解決するための手段】上記課題を解決するため
に、本発明は、PIN構造のi層とp層およびn層との
界面が半導体基板面に対して垂直に形成され、i層に入
射された光を電流に変換して検出するラテラル型半導体
受光素子において、光電変換機能を有する色素層を、受
光領域をなすi層の上面および/または内部に設けたこ
とを特徴とするPIN構造のラテラル型半導体受光素子
を提供する。
In order to solve the above-mentioned problems, the present invention provides a semiconductor device comprising: an interface between an i-layer having a PIN structure, a p-layer and an n-layer formed perpendicular to a semiconductor substrate surface; In a lateral type semiconductor light receiving element for detecting incident light by converting the light into a current, a dye layer having a photoelectric conversion function is provided on an upper surface and / or inside an i layer forming a light receiving region. And a lateral type semiconductor light receiving element.

【0009】[0009]

【発明の実施の形態】以下、本発明の実施形態について
説明する。図1は本発明の一実施形態に相当するフォト
ダイオードを示す断面図である。図2は、この実施形態
のフォトダイオードがアレイ状に形成されている場合の
平面形状の一例を示す図である。図1は図2のA−A線
断面図に相当する。
Embodiments of the present invention will be described below. FIG. 1 is a sectional view showing a photodiode corresponding to one embodiment of the present invention. FIG. 2 is a diagram showing an example of a planar shape when the photodiodes of this embodiment are formed in an array. FIG. 1 corresponds to a sectional view taken along line AA of FIG.

【0010】このフォトダイオードは、PIN構造がシ
リコン基板(半導体基板)1の基板面に対して垂直に形
成されたラテラル型フォトダイオード(半導体受光素
子)であり、i層15の受光領域2をなす部分(p層5
とn層7とで挟まれた部分)の上面に、光電変換機能を
有する色素層4が設けてある。p層5およびn層7の上
面には、p電極6およびn電極8がそれぞれ形成されて
いる。両電極6,8の間の面が受光面3となっており、
色素層4は両電極6,8の間に、絶縁層91を介して形
成されている。なお、絶縁層91は、色素層4の光電変
換で生じた電子によって両電極6,8間を導通させない
ために必要である。
This photodiode is a lateral photodiode (semiconductor light receiving element) having a PIN structure formed perpendicular to the substrate surface of a silicon substrate (semiconductor substrate) 1, and forms a light receiving region 2 of an i layer 15. Part (p layer 5
And a n-layer 7), a dye layer 4 having a photoelectric conversion function is provided. A p-electrode 6 and an n-electrode 8 are formed on the upper surfaces of the p-layer 5 and the n-layer 7, respectively. The surface between the two electrodes 6, 8 is the light receiving surface 3,
The dye layer 4 is formed between the electrodes 6 and 8 via an insulating layer 91. Note that the insulating layer 91 is necessary to prevent conduction between the electrodes 6 and 8 due to electrons generated by photoelectric conversion of the dye layer 4.

【0011】シリコン基板1の上面の両電極6,8、色
素層4、および絶縁層91の位置を除いた部分に、シリ
コン酸化膜等からなる素子保護層9が所定の厚さで形成
されている。また、シリコン基板1の下面にはp電極1
1が形成されている。このフォトダイオードは、例えば
以下の方法で作製できる。先ず、p型のシリコン基板1
の表層部にnウエル(不純物濃度の極めて薄い領域)1
0を設ける。次に、nウエル10の所定間隔を開けた2
つの領域の一方にp型不純物を、他方にn型不純物をそ
れぞれ添加して拡散させる。これにより、nウエル10
にp層5及びn層7が形成され、nウエル10のp層5
とn層7との間の部分がi層15として残る。次に、p
層5及びn層7の上に電極6,8を形成した後、素子保
護層9を形成する。
An element protection layer 9 made of a silicon oxide film or the like is formed at a predetermined thickness on the upper surface of the silicon substrate 1 except for the positions of the electrodes 6, 8, the dye layer 4, and the insulating layer 91. I have. A p electrode 1 is provided on the lower surface of the silicon substrate 1.
1 is formed. This photodiode can be manufactured, for example, by the following method. First, a p-type silicon substrate 1
N-well (region with extremely low impurity concentration) 1
0 is provided. Next, the n-well 10 with a predetermined interval
The p-type impurity is added to one of the two regions, and the n-type impurity is added to the other, and diffused. Thereby, n well 10
A p-layer 5 and an n-layer 7 are formed on the n-well 10.
And the portion between n layer 7 remains as i layer 15. Then, p
After the electrodes 6 and 8 are formed on the layer 5 and the n-layer 7, an element protection layer 9 is formed.

【0012】次に、電極6,8間の素子保護層9を除去
した後、電極6,8に接触する幅の狭い絶縁層91を形
成する。或いは素子保護層9を除去する際に、電極6,
8側の素子保護層9を絶縁層91として少し残す。次
に、i層15の上面の絶縁層91で囲われた部分に、光
電変換機能を有する色素層4を形成する。光電変換機能
を有する色素としては、例えば、ポルフィリン類(ヘム
等)、フタロシアニン類、ロドプシン類(バクテリオロ
ドプシン等)が挙げられ、応答速度と感度が高いものを
使用することが好ましい。色素層4の形成方法として
は、ラングミュア・ブロジェット法(LB法)、スピン
コート法、或いはインクジェット法が挙げられる。
Next, after removing the element protection layer 9 between the electrodes 6 and 8, an insulating layer 91 having a small width and contacting the electrodes 6 and 8 is formed. Alternatively, when removing the element protection layer 9,
The element protection layer 9 on the 8-side is slightly left as an insulating layer 91. Next, the dye layer 4 having a photoelectric conversion function is formed in a portion surrounded by the insulating layer 91 on the upper surface of the i-layer 15. Examples of the dye having a photoelectric conversion function include porphyrins (such as heme), phthalocyanines, and rhodopsins (such as bacteriorhodopsin). It is preferable to use a dye having high response speed and sensitivity. Examples of a method for forming the dye layer 4 include a Langmuir-Blodgett method (LB method), a spin coating method, and an ink jet method.

【0013】このフォトダイオードは、n層7の上面に
接触するn電極8と基板1の下面のp電極11との間
に、n層7側を正として電源を接続して逆バイアス電圧
を付与し、p層5の上面に接触するp電極6を出力回路
に接続することにより、受光面3からi層15に入射さ
れた光を電流に変換して検出することができる。受光面
3に入射された光のうち色素層4で吸収された光は、色
素層4の光電変換機能により光電変換されて、生じた電
子がi層15およびn層7を通ってn電極8に至る。色
素層4を透過した光はi層15に入射され、i層15で
光電変換されて、生じた電子がn層7を通ってn電極8
に至る。
This photodiode applies a reverse bias voltage between the n-electrode 8 in contact with the upper surface of the n-layer 7 and the p-electrode 11 on the lower surface of the substrate 1 by connecting the power supply with the n-layer 7 side being positive. Then, by connecting the p-electrode 6 in contact with the upper surface of the p-layer 5 to the output circuit, the light incident on the i-layer 15 from the light receiving surface 3 can be converted into a current and detected. Among the light incident on the light receiving surface 3, the light absorbed by the dye layer 4 is photoelectrically converted by the photoelectric conversion function of the dye layer 4, and the generated electrons pass through the i layer 15 and the n layer 7 and the n electrode 8. Leads to. The light transmitted through the dye layer 4 enters the i-layer 15 and is photoelectrically converted by the i-layer 15 so that the generated electrons pass through the n-layer 7 and the n-electrode 8.
Leads to.

【0014】したがって、このフォトダイオードによれ
ば、i層15の上に色素層4が形成されていないものと
比較して、受光効率を高くすることができる。また、i
層15の上に色素層4の代わりに反射防止膜が形成され
ているものと比較して、応答速度が速くなる。また、こ
のフォトダイオードによれば、色素層4をインクジェッ
ト法等で形成することにより、反射防止膜を形成する場
合と比較して、容易に製造できるようになるという効果
も得られる。さらに、色素層4をなす材料の波長選択性
を利用して、所定波長の光のみを検出できるようにする
ことも可能になる。また、使用する色素の吸収係数や色
素層4の膜厚の設定によって、受光感度を容易に向上さ
せることができる。
Therefore, according to this photodiode, the light receiving efficiency can be increased as compared with the photodiode in which the dye layer 4 is not formed on the i-layer 15. Also, i
The response speed is faster than that in which an antireflection film is formed on the layer 15 instead of the dye layer 4. Further, according to this photodiode, by forming the dye layer 4 by an ink-jet method or the like, it is possible to obtain an effect that it can be easily manufactured as compared with the case where an antireflection film is formed. Further, it becomes possible to detect only light of a predetermined wavelength by utilizing the wavelength selectivity of the material forming the dye layer 4. Further, the light receiving sensitivity can be easily improved by setting the absorption coefficient of the dye to be used and the thickness of the dye layer 4.

【0015】なお、色素層4は、受光領域2をなすi層
15の上面および/または内部に設けてあればよい。例
えば、図3に示すように、p層5およびn層7を形成し
た後に、i層15の表層部に凹部41を形成し、この凹
部41内と絶縁層91で囲われた領域内に、或いはこの
凹部41内にのみ色素層4を設けてもよい。また、図3
に2点鎖線で示すように、i層15の内部に色素層40
を設けて、色素層40の上面にもi層15を有する構造
であってもよい。ただし、色素層4をi層15内に設け
る場合には、色素層4とp層5およびn層7との間にi
層15を存在させて、p層5とn層7との間に逆バイア
ス電圧が付与されるようにする必要がある。
It is sufficient that the dye layer 4 is provided on the upper surface and / or inside the i-layer 15 forming the light receiving region 2. For example, as shown in FIG. 3, after the p-layer 5 and the n-layer 7 are formed, a concave portion 41 is formed in a surface portion of the i-layer 15, and in the concave portion 41 and a region surrounded by the insulating layer 91, Alternatively, the dye layer 4 may be provided only in the concave portion 41. FIG.
As shown by a two-dot chain line in FIG.
May be provided, and the i-layer 15 may also be provided on the upper surface of the dye layer 40. However, when the dye layer 4 is provided in the i-layer 15, the i-layer 15 is located between the dye layer 4 and the p layer 5 and the n layer 7.
The layer 15 must be present so that a reverse bias voltage is applied between the p layer 5 and the n layer 7.

【0016】また、この実施形態では、PIN構造のラ
テラル型フォトダイオードについて説明しているが、本
発明のPIN構造のラテラル型半導体受光素子はこれに
限定されず、ベースとコレクタの部分がPIN構造にな
っているラテラル型フォトトランジスタ等にも適用され
る。
In this embodiment, the lateral type photodiode having the PIN structure is described. However, the lateral type semiconductor light receiving element having the PIN structure of the present invention is not limited to this. It is also applied to the lateral type phototransistor and the like.

【0017】[0017]

【発明の効果】以上説明したように、本発明のPIN構
造のラテラル型半導体受光素子によれば、応答速度を低
下させることなく受光感度を向上させることができる。
As described above, according to the lateral semiconductor light receiving device having the PIN structure of the present invention, the light receiving sensitivity can be improved without lowering the response speed.

【図面の簡単な説明】[Brief description of the drawings]

【図1】本発明の一実施形態に相当するフォトダイオー
ドを示す断面図であって、図2のA−A線断面図に相当
する図である。
FIG. 1 is a cross-sectional view showing a photodiode corresponding to an embodiment of the present invention, and is a view corresponding to a cross-sectional view taken along line AA of FIG.

【図2】図1のフォトダイオードがアレイ状に形成され
ている場合の平面形状の一例を示す図である。
FIG. 2 is a diagram showing an example of a planar shape when the photodiodes of FIG. 1 are formed in an array.

【図3】本発明の別の実施形態に相当するフォトダイオ
ードを示す断面図である。
FIG. 3 is a cross-sectional view showing a photodiode corresponding to another embodiment of the present invention.

【符号の説明】[Explanation of symbols]

1 シリコン基板(半導体基板) 10 nウエル 11 p電極 15 i層 2 受光領域 3 受光面 4 光電変換機能を有する色素層 40 光電変換機能を有する色素層 5 p層 6 p電極 7 n層 8 n電極 9 素子保護層 91 絶縁層 Reference Signs List 1 silicon substrate (semiconductor substrate) 10 n-well 11 p-electrode 15 i-layer 2 light-receiving region 3 light-receiving surface 4 dye layer having photoelectric conversion function 40 dye layer having photoelectric conversion function 5 p-layer 6 p-electrode 7 n-layer 8 n-electrode 9 Element protection layer 91 Insulation layer

───────────────────────────────────────────────────── フロントページの続き (72)発明者 北村 昇二郎 長野県諏訪市大和3丁目3番5号 セイコ ーエプソン株式会社内 Fターム(参考) 5F049 MA04 MB03 MB08 NA01 NA03 PA20 QA01 WA01  ────────────────────────────────────────────────── ─── Continued on the front page (72) Inventor Shojiro Kitamura 3-3-5 Yamato, Suwa-shi, Nagano F-term in Seiko Epson Corporation 5F049 MA04 MB03 MB08 NA01 NA03 PA20 QA01 WA01

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 PIN構造のi層とp層およびn層との
界面が半導体基板面に対して垂直に形成され、i層に入
射された光を電流に変換して検出するラテラル型半導体
受光素子において、 光電変換機能を有する色素層を、受光領域をなすi層の
上面および/または内部に設けたことを特徴とするPI
N構造のラテラル型半導体受光素子。
1. A lateral semiconductor light receiving device in which an interface between an i-layer having a PIN structure, a p-layer, and an n-layer is formed perpendicular to a semiconductor substrate surface, and converts light incident on the i-layer into current and detects the current. A PI, wherein a dye layer having a photoelectric conversion function is provided on the upper surface and / or inside the i-layer forming a light receiving region.
Lateral type semiconductor light receiving element of N structure.
JP2001110169A 2001-04-09 2001-04-09 PIN type lateral type semiconductor photo detector Expired - Fee Related JP3912024B2 (en)

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