JP2002312333A - Multiprocessor initializing/parallel diagnosing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To realize early system operation by setting up a system while using only processors responding within a given time as normal processors, and confirming reserved processes in parallel. SOLUTION: This multiprocessor initializing/parallel diagnosing method has a step S102 for determining the normal processors by giving a command of the initialization of the system, and confirming the response after a predetermined time, a step S302 for starting the system operation by the normal processors which send back the response, and a step S301 for regarding the processor not sending back the response within the predetermined time as the reserved processors and confirming the reserved processors in parallel with the system operation with respect to a multiprocessor system executing information processing.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an initialization process for an information processing system composed of multiprocessors, and more particularly, to reducing the system startup time even if some of the processors constituting the system are abnormal. At the same time, it is intended to deal with the abnormality and improve the reliability of the system.

[0002]

2. Description of the Related Art As a conventional recovery processing method when a failure occurs at the time of initialization of a multiprocessor system, for example, there is a method disclosed in Japanese Patent Application Laid-Open No. H11-161616. FIG. 23 is a diagram showing a part of the operation of the initialization processing method of the multiprocessor system disclosed in this publication.

The operation of this system will be described. When a plurality of processors constituting the multiprocessor system become abnormal in the initialization processing, initialization of failure recovery (IP
L) By transmitting a processing program type ID by broadcast communication and simultaneously recovering a plurality of failed processors, the startup processing time is reduced even when a failure occurs. The initialization process of the system is completed by retrying the start instruction by broadcast communication with respect to the processor that seems to have failed and by disconnecting the processor that does not respond to the start instruction of the retry. In this way, since a plurality of failed processors can be retried in the boot process at the same time, the system can be faster than in the case of individually retrying the boot process for each failed processor. Can be started. However, since the initialization process is retried, the startup time of the system is also delayed as compared with the normal time.

[0004]

The conventional initialization processing method of a multiprocessor system is configured as described above, and the determination processing of a processor that does not return a response takes a time when the startup processing is delayed most as a timeout time. Setting requires a long re-initialization time. Because it relies on broadcast communication using a less reliable communication path,
Such an initialization processing operation is retried a plurality of times. In this way, during the normal / abnormal determination in the retry initialization process, there is a possibility that the operation start of the system is greatly delayed. Normally, in a multi-processor system with a redundant configuration, even if some processors are abnormal, the system is operable, but as a result, there is a problem in that the status check of the abnormal processor is given priority and the startup time is delayed. Was.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems. In starting the system operation, the required processors are narrowed down and started, and the required processors are sequentially turned on in a later phase after the system operation is started. In order to improve reliability, the initialization of the processor, the confirmation of the abnormality, and the operation of the system are performed in parallel.

[0006]

SUMMARY OF THE INVENTION A multiprocessor initialization / parallel diagnostic method according to the present invention is directed to a multiprocessor system for performing information processing, in which a system initialization command is issued, a response is confirmed after a predetermined time, and a normal processor is checked. Determining, and starting a system operation by a normal processor that has responded, and a step of performing a confirmation process in parallel with the system operation, the processor that does not respond within a predetermined time as a reservation processor, With.

Further, the confirmation processing of the reservation processor is
One of the normal processors did so.

Further, when communication cannot be confirmed within a set time during system operation, the system is disconnected from the system and replaced with a normal processor, and a processor that cannot be confirmed within the time is transferred to a reserved processor.

Furthermore, as a confirmation process of the reservation processor, an initialization command is issued, and if there is no response again within a predetermined time, the processor is separated as an abnormal processor.

Further, as a confirmation process of the reservation processor, an initialization command is issued, and if there is a response within a predetermined time, the processor is returned to a normal processor.

Further, when the reserved processor cannot be confirmed during the operation of the system and communication cannot be confirmed within the time period, a predetermined processing request is executed as confirmation processing of the reserved processor.
If there is no response within a predetermined time, it is separated as an abnormal processor.

[0012] Further, when the reserved processor cannot be confirmed during the time of system operation and communication cannot be confirmed within the time, a predetermined processing request is executed as confirmation processing of the reserved processor.
If a response is received within a predetermined time, the processor is returned as a normal processor.

Further, a step of providing a mechanism for monitoring the number of normal processors is provided, and the number of processors is compared with the number of processors required by the system. Added output.

[0014]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiment 1 In the initialization processing of the multiprocessor system, the "normal" processor pool that could be determined to be normal, the "pending" processor pool that could not be determined to be normal or abnormal, and the "abnormal" processor pool that was determined to be abnormal in the initialization process of the multiprocessor system A method of changing the subsequent processing of each pool by dividing the processing into the following will be described. FIG. 1 is a configuration diagram showing a concept of an initialization processing method of a multiprocessor system according to Embodiment 1 of the present invention. In the figure, reference numeral 101 denotes a processor constituting the system. In the present embodiment, it is assumed that a system is configured with a large number of processors and the processors are redundantly configured. Each processor is connected by a network 103 for data exchange between the processors. This network may be of various types, such as a bus, a LAN, a fiber channel, and the like. Further, in order to realize a large-scale configuration, the network 103 may have a hierarchical structure by a network switch indicated by 102. Reference numeral 100 denotes a system master processor selected to perform system management among the processors. The system master processor 100 is connected to all other processors 101 via the network 103 and the network switch 102.
Can communicate with.

In the multiprocessor system having such a configuration, at the time of system startup, the system master processor 100 uses the technique shown in the conventional example to issue an initialization instruction or download of an initial program.
4 for all processors simultaneously to start up the system. Each processor 101 follows the instruction,
Performs initialization of the processor. FIG. 2 is a diagram showing a completed state of the initialization processing. Upon completion of the initialization processing, the individual processors 101 notify the system master processor 100 of the completion notification 1 for the purpose of system synchronization.
Returns 05. Various methods such as a method by writing to a specific register of the system master processor 100 and a method by message transmission can be used for the completion notification. Upon receiving the completion notification, the system master processor 100 confirms that the initialization processing of each processor has been completed normally.

In the initialization processing method of the multiprocessor system according to the first embodiment of the present invention, in addition to the normal initialization operation shown in FIGS. They are classified into logical groups called processor pools. Reference numeral 200 in FIG. 3 denotes a “normal” processor pool to which a processor whose normal operation has been confirmed belongs. Reference numeral 201 denotes a “reserved” processor pool to which a processor whose normal / abnormal determination has not been completed yet belongs. Reference numeral 202 denotes an “abnormal” processor pool to which a processor determined to be abnormal and cannot be used for system operation belongs. These processor pools are a logical classification in system management and do not physically make any changes to the processors.

To realize the grouping shown in FIG. 3, the components shown in FIG. 4 are prepared. Reference numeral 300 denotes a “normal” processor pool management table for managing processors belonging to the “normal” processor pool, in which the identifiers of the processors belonging to the “normal” processor pool are registered. Reference numeral 301 denotes a “reserved” processor pool management table for managing processors belonging to the “reserved” processor pool, and the identifiers of the processors belonging to the “reserved” processor pool are registered. Reference numeral 302 denotes an “abnormal” processor pool management table for managing processors belonging to the “abnormal” processor pool, in which the identifiers of the processors belonging to the “abnormal” processor pool are registered. In the present embodiment, 300 to 302
Is managed by the system master processor 100. Since the system is provided with the processor 101 having sufficient redundancy, the "normal" processor completes the system startup.

Conventionally, the waiting time for receiving the completion notification in FIG. 2 needs to be set to a long time in anticipation of the worst condition so that the completion notification can be received in any state. Further, in order to avoid a transient abnormality, it is necessary to retry the initialization instruction when there is no response. However, in the initialization processing method of the multiprocessor system according to the first embodiment, the processors constituting the system are classified into the processor pools shown in FIG. 3, and the subsequent operation of the system is changed for each processor pool. In this way, the waiting time for receiving the completion notification is set short, and even if there is a processor that could not return the completion notification within that time even though the processor was normal, the processor that could not return the completion notification was narrowed down and the normal / abnormal confirmation was performed. Can be retried. That is, the efficiency of the system initialization process can be increased, and the startup time can be reduced.

Hereinafter, a specific identification and registration method of the “normal” processor will be described. Once the "normal" processor is separated from other "reserved" processors, etc., fast initialization using these "normal" processors is possible. FIG. 4 is a diagram showing the concept of the high-speed initialization processing 410. This high-speed initialization processing 410 performs the processing operations shown in FIGS. 1 and 2, but of course, sets the initialization processing timeout time 304 shorter than before, and ends the initialization within the set time. .

FIG. 5 shows a specific operation flow of the high-speed initialization processing 410. First, in step (hereinafter step description is omitted) S101, the system master processor 100 issues a start instruction to all processors 101 constituting the system. As a method of the start instruction, a system reset, a start instruction by broadcast communication,
There are various methods such as downloading an initial program by broadcast communication. Thereafter, in S102, the system master processor waits for an initialization processing completion notification from each processor 101. Upon receiving the initialization processing completion notification from any of the processors in S102, the processor returning the response in S103 is put into the "normal" processor pool 200, the processor identifier of the processor is set to "normal", and the "normal" processor is set. Pool management table 30
Register to 0.

If the initialization processing time-out time 304 is reached during the repetition of the processing of S102 and S103, the processing proceeds to S105 through the condition judgment of S104. Conventionally, the normal / abnormal judgment of the processor had to be performed in the processing up to this point. Therefore, it is necessary to make the initialization processing time-out time 304 sufficiently long. It was necessary to retry the start instruction and confirm the processor error. But,
In the present embodiment, the processor for which the completion notification has not been obtained in S105 is put into the “reserved” processor pool 201. The method uses the “reserve” processor pool management table 30
1 by registering. Processors belonging to the “reserved” processor pool 201 are processors for which normal / abnormality has not been determined, and normality / abnormality determination will be performed again. On the other hand, the “normal” processor pool 20
Processors belonging to 0 are processors for which normality determination has already been made, and are processors that can be used from an early stage for system operation. In this way, the processor that could not be determined to be normal in the specified time is divided into another processor pool,
Since another process can be performed later, it became clear that the response wait time can be set shorter than before, the retry of the initialization process can be stopped, and the system initialization time can be shortened. .

Embodiment 2 FIG. In the present embodiment,
After launching the system with "normal" processors,
The selection process in parallel with the operation of the system will be described. Less than,
The initialization processing method of the multiprocessor system according to the second embodiment of the present invention will be described with reference to the drawings. First, as shown in FIG. 6, one of the processors belonging to the "normal" processor pool is selected, and is set as a "reserved" processor pool master 400 for managing the "reserved" processor pool. In other words, the processors belonging to the “normal” processor pool are processors for which normal operation has already been confirmed, and thus it is considered that an operation for managing the processor pool can be performed. In order to determine the “reserved” processor pool master 400, in the present embodiment, “reserved” processor pool / master selection processing 510 is newly provided in the system initialization processing shown in FIG. As shown in FIG. 7, a “reserved” processor pool master entry 500 having the identifier of the “reserved” processor pool master 400 is provided in the system master processor 100.

The operation of the "reserve" processor pool / master selection process 510 will be described with reference to FIG. In the example of FIG. 8, this selection processing is described as an operation performed subsequently to the operation of FIG. In S201, the system master processor 100 refers to the "normal" processor pool management table 300 and selects one processor by an algorithm. The identifier of this processor is removed from the entry of the “normal” processor pool management table 300, and the selected processor is set as the selected processor. There are various methods for this selection, such as a method of selecting the first processor that is not the system master processor in the management table and a method of selecting a processor having a specific processor identifier according to the required specifications of the system. Next, in S202,
The identifier of the selected processor is registered in the “reserved” processor pool master entry 500. The system recognizes the processor registered in the “reserved” processor pool master entry 500 as a processor that manages the “reserved” processor pool.

As described above, one processor among the processor pools that have already been determined to be normal is set as the master processor of the "reserved" processor pool, and the "reserved" processor pool is managed. Is ready to detach from the system master processor and operate independently of the processors in the "normal" processor pool.

First, the activation of the parallel processing will be described. In order to start the parallel processing, a parallel start processing 610 shown in FIG. 4 is newly provided in the system initialization processing. The parallel activation processing 610 simultaneously performs the normal system operation by the processors belonging to the “normal” processor pool 200 and the normal / abnormal judgment processing of the processors belonging to the “reserved” processor pool 201 by the “reserved” processor pool / master processor 400. Make it work.

The operation of the parallel activation process 610 will be described with reference to FIG. In the example of FIG. 9, the parallel activation process 610 is described as an operation that is performed subsequently to the operation of FIG. S3
At 01, the system master processor 100 instructs the “reserved” processor pool / master processor 400 to start the reconfirmation process for determining the normality / abnormality of the processors belonging to the “reserved” processor pool by inter-processor communication. This allows the "reserved" processor pool master processor to operate independently of the processors in the "normal" processor pool. Next, in S302, the system master processor refers to the “normal” processor pool management table 300, and starts operating the system only with the processors in the “normal” processor pool registered therein.
At this point, the processors registered in the “normal” processor pool are part of the processors that make up the system, but the computational load is often small in the early stages of system operation, and all processors are required. Since there are few system states, such activation is possible.

In this way, the system operation is started by using the processors in the "normal" processor pool in parallel with the processing such as the abnormality judgment performed on the processors in the "reserved" processor pool. Initialization time can be reduced.

Next, a description will be given of the normal / abnormal re-recognition processing for the "pending" processor in parallel with the start-up of the system. For this re-recognition process, as shown in FIG.
0 has a reconfirmation process 420. Further, in this reconfirmation process, the processor pool management table of the system master processor 100 is operated. FIG. 11 shows an operation on the processor pool management table in the reconfirmation process 420. Selected "reserved" processor pool master 40
0 refers to the “reserved” processor pool management table 301, issues an initialization retry request 500 to the registered processor by multicast communication similar to the conventional example, and confirms whether the processor is normal / abnormal. Retry the initialization process. The processor that has finally been confirmed to be normal by the retry removes the processor identifier from the “reserved” processor pool management table 301 and registers the processor identifier in the “normal” processor pool management table 300, thereby setting the processor to the “normal” processor. Pool 200
Move to [Normal] The processor that has been migrated to the processor pool causes the system master processor to refer to the "normal" processor pool management table 300 and enter the system operation.

A processor that cannot be confirmed as normal by retrying removes its processor identifier from the "reserved" processor pool management table 301 and registers it in the "abnormal" processor management table 302, and registers the processor with the "abnormal" processor. Put into pool 202. The processor in the “abnormal” processor pool 202 determines that the failure is a permanent failure such as an H / W abnormality, and disconnects it from the system operation. When the reconfirmation process 420 is completed, the processors in the “reserved” processor pool are changed to the “normal” processor pool or the “abnormal”
Transition to the processor pool, the "reserved" processor pool is empty.

The detailed operation of the reconfirmation process 420 outlined above will be described with reference to FIG. In the example of FIG. 12, the reconfirmation process 420 is described as a process activated by the instruction in S301 of FIG. The reconfirmation process 420 performs a reliable processor normal / abnormal judgment by a method similar to the conventional method. First, in S401, it is confirmed whether or not the initialization request has been retried the number of times specified by the system. If the retry has not been performed the specified number of times, the “reserved” processor pool management table 301 is referred to in S402, and the registered processor is re-executed by means such as unit reset or multicast communication with respect to the registered processor. Request an attempt. Next, in step S403, the process waits for a response indicating that the initialization process has been completed. If there is a response, the processor identifier of the processor that returned the completion notification in S404 is registered in the “normal” processor pool management table 300. The operations of S403 and S404 are repeated until the initialization processing timeout time is reached in S405. The initialization processing timeout time in S405 is different from the initialization processing timeout time 304 in the high-speed initialization processing 410 of the second embodiment, and is different from the conventional long initialization processing time set when the initialization processing is delayed most. This is the timeout period.

Next, in step S406, it is checked whether there is a processor that has not returned the initialization processing completion notification and has not responded. A processor that has not responded can be determined by a processor identifier remaining in the “reserved” processor pool management table.
If there is a processor that has not responded, the process returns to S401,
The initialization process is retried from S402. If there is no unacknowledged processor in S406, all processors are determined to be normal, and the processor is shifted to the “normal” processor group, so that the reconfirmation process 420 is completed. S401
If the trial of the initialization process is repeated the number of times specified by the system in step S407, the process proceeds to step S407. In S 407, the processor that has not finally returned the initialization processing completion notification, that is, the processor of all the processor identifiers still remaining in the “reserved” processor pool management table 301 is moved to the “abnormal” processor pool management table 302. Processors in the "abnormal" processor pool are determined to be permanent.

In this way, the normal / abnormal judgment is performed again by the initialization method similar to the conventional one, using the "reserved" processor pool that operates in parallel with the system operation. This makes it possible to determine whether the processor is normal or abnormal without interrupting the system operation, thereby avoiding a delay in system startup.
Processors that are determined to be normal enter the system operation by adding them to the normal processor pool, and processors that cannot be determined to be normal are separated from system operation as permanent abnormalities by being added to the "abnormal" processor pool. .

Embodiment 3 In the present embodiment, a description will be given of an error handling process when an error occurs in an execution processor during operation of the system of the first embodiment. That is, the operation of the system is not hindered. In addition, a description will be given of a method in which the initialization of the abnormal processor can be effectively retried. FIG. 13 is a diagram illustrating a processing concept according to the present embodiment. A multiprocessor system can be modeled in a form in which a request processor issues a processing request to an execution processor by inter-processor communication, so that various processes of the system can proceed in parallel. In FIG. 13, 600
Is a request processor that issues a processing request, and 601 is an execution processor that executes processing based on the request. In the related art, when a response is not returned from the execution processor 601 to the issued request, the worst execution time of the process is set as a time-out period, the process waits, and further, the request processor 600 Needed to retry requesting. This determination process requires a long time, and therefore, in a system that requires real-time processing, there is a risk of causing a problem. In this embodiment, if no response is returned from the execution processor 601 within a certain time, the request is not retried, and the execution processor 601 is put into the “reserved” processor pool 201. Then, the request processor selects the alternative execution processor 602 as an alternative to the execution processor, issues a request to it again, and continues the processing. Thus, the processing is performed with the next processor as an alternative, without retrying many times. If the execution processor 601 has not returned a response within a predetermined time,
The abnormality check is executed as a process in the “reserved” processor pool in parallel with the operation of the system by using the mechanism described in the second embodiment.

To provide the above functions, the request processor 600 performs the inter-processor communication processing 710 shown in FIG.
have. The operation of the inter-processor communication process 710 will be described with reference to FIG. First, in S501, the request processor 60
0 transmits a required processing request to the execution processor 601. Thereafter, as in the conventional case, a reception confirmation from the execution processor is waited until the timeout time designated in S502. If the reception confirmation has been received from the execution processor before the timeout period in S503, it is normal, and the operation is continued as in the related art. If the reception confirmation has not been received in S503, in the inter-processor communication process of the present embodiment, the identifier of the execution processor 601 that has issued the processing request in S504 is newly notified to the system master processor 100 as a non-response. Notice. As a result, the system master processor 100 performs a corresponding process for the non-responding execution processor 601. Request processor 6
00 notifies the system master processor of the non-responding processor in S504, immediately selects another processor in the “normal” processor pool as the alternative execution processor 602 in S505, and performs the same processing again for this. Submit the request and continue processing.

Thus, the processing time when the execution processor does not return a response in the communication between the processors can be reduced. In the present embodiment, when the execution processor does not return a response, it takes time to issue the same processing request to the alternative execution processor. Since a plurality of retries for judging an abnormality and a judgment of normality / abnormality of the execution processor are not performed, even if there is an abnormality in the processor, the processing is continued within a predictable time.

A description will now be given of a process for responding to a "non-responding" processor which is not responded during system operation. The system master processor 100 executes the “reserve” shown in FIG.
It has a processor pool addition process 810. This "reserve"
As shown in the concept of FIG. 16, the processor pool addition process 810 changes the identifier of an execution processor that does not return a response to a processing request within a predetermined time from the “normal” processor pool management table 300 to the “reserved” processor pool management table. 3
By moving to 01, the processor can be temporarily removed from the operation of the system, and the process of confirming the normality / abnormality of the processor can be performed.

"Reserve" Processor Pool Addition Processing 810
Will be described with reference to FIG. In the example of FIG. 17, the operation is described as the process activated in S504 of FIG. First, in step S601, the processor identifier of the execution processor 601 that has been determined to have not returned a response to the processing request within a predetermined time is retrieved from the "normal" processor pool management table 300 and removed. Next, S6
In step 02, the processor identifier of the execution processor 601 is added to the “reserved” processor pool management table 301. S60
By 1 and S602, the execution processor 601 has shifted from the "normal" processor pool to the "reserved" processor pool. The system master processor 100 refers to the "normal" processor pool management table 300 and uses only the processors registered therein for the operation of the system.
1 will be out of system operation. Next, S60
3 "Reserve" processor pool master entry 500
Refer to the “Reserved” processor pool
Notify master processor 400 that a processor has been added to the "reserved" processor pool.

In this way, the processor having a possibility of abnormality is transferred from the "normal" processor pool to the "reserved" processor pool, and is separated from the system operation. Therefore,
Processing different from those of the normal system operation can be performed on the processor having a possibility of abnormality.

Next, the re-recognition operation of the "reserve" processor after disconnection will be described. "Reserve" processor pool
The master processor 400 has an operation reconfirmation process 910 as shown in FIG. Operation reconfirmation process 910
Is a re-confirmation process in operation corresponding to the re-confirmation process 420 for the "reserved" processor at the time of system initialization. In the operation reconfirmation process 910, a recovery process and a normal / abnormal judgment process for the processors in the “reserved” processor pool are performed.

The operation of the operation reconfirmation process 910 will be described with reference to FIG. In the example of FIG. 18, this operation is performed in S of FIG.
603 is described as the processing started. In this process, first, the “reserved” processor pool / master processor re-attempts to issue a dummy processing request to a processor in the “reserved” processor pool, and the processor determines whether it is normal or abnormal. First, in S701, it is confirmed whether the retry of issuing the dummy processing request has been performed a specified number of times. If the number of retries has not reached the specified number, S702
Then, referring to the "reserved" processor pool management table 301, a dummy processing request is transmitted to the registered processors. By confirming that the requested operation can be performed,
This is to determine whether the processor is normal or abnormal. S7
In 02, a time specified by the system is set as a timeout time, and a response to a request reception confirmation is waited. If a request acknowledgment from the processor is received in S703, it is determined that the processor is normal, and in S704, the processor identifier of the processor is removed from the "reserved" processor pool management table 301 again, and the "normal" processor pool management is performed. Table 3
00 to register for system operation. S703
If no response is returned in step S701, the process returns to step S701 to retry issuing the processing request. If the retry has been repeated a specified number of times in S701, it is determined that the processor has some abnormality, and the processor is reset alone in S705 to return the processor to the initial state. Thereafter, in S706, the processing of FIG. 12 is executed, and the initialization processing is retried to determine whether the processor is permanently abnormal. If normality is confirmed by retrying the initialization processing, the processor re-enters the "normal" processor pool. If normality cannot be finally confirmed, place it in the "abnormal" processor pool and disconnect from system operation.

In this manner, the processor which has a possibility of abnormality detected during the operation of the system is disconnected from the system, and the processing request is retried or reset alone, so that it can be determined whether the processor has a permanent abnormality. . Therefore, it is possible to avoid a real-time delay of the system.

Embodiment 4 In the present embodiment, a countermeasure in a case where the number of “normal” processors is insufficient will be described. Hereinafter, in the initialization processing method for the multiprocessor system according to the present embodiment, as shown in FIG. 19, the system master processor 100 includes the “normal” processor pool minimum processor number 700 and the “normal” processor pool
A processor number confirmation process 1010 is provided. That is, it is possible to detect a state in which the number of processors required for system operation is insufficient in the “normal” processor pool.

Next, the operation of the "normal" processor pool / processor number confirmation processing 1010 will be described with reference to FIG. The “normal” processor pool / processor number confirmation processing 1010 is processing to be started after the processing in FIG. 9 or the processing in FIG. First, in S801, the number of processors registered in the “normal” processor pool management table 300 is counted. This number is compared with the "normal" processor pool minimum processor number 700 in S802. If the processor having the minimum number of “normal” processor pools of 700 or more is registered in the “normal” processor pool management table 300, the system operation is continued in S803, and the “normal” processor pool / processor number confirmation processing 1010 is completed. I do. If the number of processors registered in the “normal” processor pool management table 300 is smaller than the “normal” processor pool minimum processor number 700,
In S804, the system is determined to be in an abnormal state, and the defined system abnormal processing is executed. As the system abnormality processing, output of a message, system stop, and the like are assumed.

In this way, the number of processors registered in the "normal" processor pool is counted, and if the minimum number of processors required for system operation is insufficient, a degraded operation or the like is instructed to deal with abnormalities. .

Next, a method for avoiding the degenerate operation during the system operation will be described. For this purpose, as shown in FIG.
The system master processor 100 has a “reserved” processor pool / master processor exchange process 1110.

The operation of the "reserve" processor pool / master processor exchange processing 1110 will be described with reference to FIG. The “reserved” processor pool / master processor exchange process 1110 is a process in which the system master processor 100 starts up at a fixed time period during system operation.
First, in S901, the “normal” processor pool management table 30
One processor is selected from 0 by some algorithm. This selection method is based on the system master processor in the management table, "Reserve"
There can be various methods, such as a method of selecting the first processor that is neither the processor pool master processor nor a method of selecting a processor having a specific processor identifier. Next, in step S902, the processor registered in the "reserved" processor pool master entry 500 is registered in the "normal" processor pool management table 300, and the processor is removed from the role of the "reserved" processor pool master processor. Let's get into normal processing. Next, in S903, the processor selected in S901 is registered in the “reserved” processor pool master entry 500, and is set as a new “reserved” processor pool master processor. Thus, the management process of the “reserved” processor pool in the future is performed by the processor newly registered here. By periodically executing the “reserved” processor pool / master processor exchange processing 1110, the “reserved” processor pool / master processor 4
Even if there is an abnormality in 00, it is restored in the next cycle by periodic replacement of the master processor, and the processing described in the present invention can be performed. Therefore, the system does not fall into a permanent abnormal state. In addition, even if the “reserved” processor pool / master processor 400 enters the “normal” processor pool in S902 without noticing the abnormality, the operation described in the third embodiment may be regarded as a processor having a possibility of abnormality. It is moved to the "reserved" processor pool and can be restored.

[0047]

As described above, according to the present invention, a step of issuing a system initialization command, confirming a response after a predetermined time, and determining that the processor is a normal processor, and starting the system operation by the normal processor that has responded. Since there is a step and a step in which a processor that does not respond within a predetermined time is set as a reservation processor and the reservation processor performs a confirmation process in parallel with the system operation, there is an effect that the efficiency of system startup can be improved.

Further, the confirmation processing of the reservation processor is
Since one of the normal processors performs the operation, there is an effect that the start-up of the system and the operation of the system can be performed without any trouble.

Further, since the re-initialization command is issued as the confirmation processing of the reservation processor, there is an effect that the abnormal processor is determined and the replacement target can be easily specified.

[Brief description of the drawings]

FIG. 1 is a diagram showing a system configuration for describing an initialization method in a multiprocessor system according to a first embodiment of the present invention.

FIG. 2 is a system diagram illustrating a normal completion operation according to the first embodiment.

FIG. 3 is a group diagram for describing an operation in the first embodiment.

FIG. 4 is a diagram showing configuration functions of a master processor according to the first embodiment.

FIG. 5 is a flowchart showing an initialization operation in the first embodiment.

FIG. 6 is a diagram illustrating a division of a processor group according to a second embodiment of the present invention.

FIG. 7 is a diagram showing a configuration function of a master processor according to a second embodiment.

FIG. 8 is a flowchart showing an operation of a processor pool / master selection process according to the second embodiment.

FIG. 9 is a flowchart showing an operation of a parallel activation process according to the second embodiment.

FIG. 10 is a diagram showing another configuration function of the master processor according to the second embodiment.

FIG. 11 is a conceptual diagram showing an operation performed by a master processor according to the second embodiment.

FIG. 12 is a flowchart showing an operation of a reconfirmation process according to the second embodiment.

FIG. 13 is a diagram showing a concept of processing for an abnormality that occurs during system operation according to Embodiment 3 of the present invention.

FIG. 14 is a diagram showing other various processing functions in the present invention.

FIG. 15 is a flowchart showing an operation of processing between processors in the third embodiment.

FIG. 16 is a conceptual diagram showing another configuration function of the master processor according to the third embodiment.

FIG. 17 is a flowchart showing an operation of a processor pool addition process according to the third embodiment.

FIG. 18 is a diagram showing a concept of processing for an abnormality that occurs during system operation according to Embodiment 3 of the present invention.

FIG. 19 is a diagram showing a configuration function of a system master processor for adding a processor during system operation according to a fourth embodiment of the present invention.

FIG. 20 is an operation flowchart of a processor number confirmation process according to the fourth embodiment;

FIG. 21 is a diagram illustrating the concept of reserved exchange or replenishment in the fourth embodiment.

FIG. 22 is an operation flowchart of a processor replacement process in the fourth embodiment.

FIG. 23 is a diagram for explaining a conventional multiprocessor system initialization method.

[Explanation of symbols]

S101 activation instruction step, S102 initialization completion notification confirmation step, S104 timeout confirmation step, S105 reserved processor registration step, S201
Processor selection step, S301 reconfirmation processing instruction step, S302 system operation start step, S4
01 reconfirmation processing start step, S402 reinitialization instruction step, S403 reinitialization completion notification confirmation step,
S404 Step of returning to normal processor, S405 Timeout check step, S407 Abnormal processor registration step, S501 Processing request transmission step, S50
2 a confirmation step until timeout, S503 reception confirmation step, S504 alternative processor selection step,
S602 reserved processor registration step, S701 re-recognition processing start step, S702 confirmation step until dummy request communication timeout, S703 reception confirmation step, S704 step of returning to normal processor, S80
1 normal processor number counting step, S802 comparison step with required number, S803 abnormality notification step,
S902 Selection step from reservation processor.

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) G06F 11/22 360 G06F 11/30 310H 11/30 310 1/00 350A F-term (Reference) 5B034 BB11 CC01 DD03 DD05 5B042 GA11 GC10 JJ23 JJ36 KK02 KK04 KK05 LA20 LA21 5B045 HH06 JJ05 5B048 AA17 CC13 5B054 AA20 CC06

Claims (8)

[Claims] In a multiprocessor system for performing information processing, a step of performing a system initialization command, confirming a response after a predetermined time and determining that the processor is a normal processor, and starting a system operation by the normal processor having received the response Performing a confirmation process in parallel with the operation of the system using the processor that has not responded within the predetermined time as a reserved processor. Diagnostic method. 2. The multiprocessor initialization / parallel diagnosis method according to claim 1, wherein one of the normal processors performs the check processing of the reservation processor. 3. When a communication cannot be confirmed within a set time during system operation, the system is disconnected from the system to replace a normal processor, and a processor that cannot be confirmed within the above time is transferred to a reserved processor. 2. The multiprocessor initialization / parallel diagnosis method according to claim 1, wherein: 4. The processor according to claim 1, wherein an initialization command is issued as confirmation processing of the reservation processor, and if there is no response within a predetermined time, the processor is separated as an abnormal processor. Multiprocessor initialization / parallel diagnostic method. 5. The multiprocessor according to claim 1, wherein an initialization command is issued as confirmation processing of the reservation processor, and if there is a response within a predetermined time, the processor is returned as a normal processor. Initialization / parallel diagnostic method. 6. When a reserved processor is detected without confirming in-time communication during system operation, a predetermined processing request is executed as confirmation processing of the reserved processor, and if there is no response within a predetermined time, an abnormal processor is executed. 4. The multiprocessor initialization / parallel diagnosis method according to claim 3, wherein the method is separated. 7. When a reserved processor is determined without confirming in-time communication during system operation, a predetermined processing request is executed as confirmation processing of the reserved processor, and if there is a response within a predetermined time, a normal processor is executed. 4. The multi-processor initialization / parallel diagnosis method according to claim 3, wherein the method is returned as: 8. A step of providing a mechanism for monitoring the number of normal processors, and comparing the number with the number of processors required by the system. If the result of the comparison indicates that there is a problem in system operation, the result of the determination is determined. 2. The multiprocessor initialization / parallel diagnosis method according to claim 1, wherein the multiprocessor initialization / output is performed.