JP2002305418A - Amplifying circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To solve the problem of the size of a balance/unbalance converter being normally large and of the difficulty in realizing miniaturization of a differential amplifier. SOLUTION: In N-stage (N is an integer of at least 2) amplifying circuits for transmission, at least the final stage is constituted of a differential amplifier 8, and the remainder are constituted of single phase amplifiers 2, 4. Thereby high gain characteristics is realized and stable differential amplifying operation is enabled with a small-sized device.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a transmitting high-frequency amplifier circuit using a differential amplifier circuit used for terrestrial microwave communication, mobile communication, and the like.

[0002]

2. Description of the Related Art When designing a transmission high-frequency amplifier circuit used for wireless communication or the like, an amplifier circuit, for example, HB
T (Hetero-junction Bipolar)
A differential amplifier circuit having two input terminals and two output terminals in order to suppress a decrease in gain caused by, for example, a wire (inductance) connecting an emitter terminal and a ground terminal of a semiconductor amplifying element such as a transistor. May be used.

In a high-output amplifier, a voltage and a current between one output terminal and a ground point are often output.
In the case of a high-output amplifier using a differential amplifier circuit, it is necessary to convert two output terminals into one output terminal, that is, to achieve a single output.

A conventional amplifier circuit will be described with reference to the drawings. FIG. 5 shows, for example, “IEEE Journa
l of Solid State Circuits
1999 pp. FIG. 1881 shows the configuration of the conventional amplifier circuit shown in FIG. FIG. 5 is an example of a high-output amplifier that realizes a single output using a balun converter.

In FIG. 5, reference numerals 151 and 152 denote NPN bipolar transistors constituting a differential amplifier circuit.
3 and 154 are input terminals, 155 and 156 are bias application resistors, 157 is a collector power supply, 158 and 159 are base power supplies, 160 is an emitter terminal, 161 is a wire (inductor), 162 is a ground terminal, 163 and 165
Is a matching circuit, 164 is a ground terminal, 166 is a balanced-unbalanced converter, and 167 is an output terminal. The base power supply 15
The bias application resistors on the base sides of the transistors 151 and 152 are connected to the plus sides of the transistors 8 and 159.

Next, the operation of the conventional amplifier circuit will be described with reference to the drawings.

The collectors of the bipolar transistors 151 and 152 constituting the differential amplifier circuit are connected to a predetermined collector power supply 157 via bias applying resistors 155 and 156.
Connected in common. A bias is applied to the base from predetermined base power supplies 158 and 159 via a bias application resistor. Further, the emitter is connected from the emitter terminal 160 to the ground terminal 162 via a wire (inductor) 161.

[0008] The differential signals input from the input terminals 153 and 154 are input to the bases of the bipolar transistors 151 and 152 constituting the differential amplifying circuit, respectively, amplified, and then output from the collector.
Input to the balun converter 166 via 65 and 163. The two signals input to the balun converter 166 are output as a single signal and output from the output terminal 167 as an output signal.

As shown in FIG. 5, by using a differential amplifier circuit, an emitter terminal 160 and a ground terminal 162 are provided.
This has the effect of suppressing a decrease in gain due to the wire (inductance) 161 that connects. Further, when the balun converter 166 formed on a semiconductor substrate having a low dielectric constant is used, a single output of a low-loss and high-precision differential amplifier can be realized.

Next, another conventional amplifier circuit will be described with reference to the drawings. FIG.
FIG. 11 is a diagram showing a configuration of another conventional amplifier circuit disclosed in Japanese Patent Application Publication No. 00-244420. FIG. 6 shows an example of a transmission high-frequency amplifier circuit composed of a single-stage differential amplifier that realizes a single output using an auxiliary amplifier and a terminating resistor.

In FIG. 6, reference numerals 181 and 182 denote field effect transistors which constitute a differential amplifier circuit;
84 is an input terminal, 185 and 186 are bias application resistors, 187 is a drain power supply, 188 and 189 are gate power supplies, 190 is a source terminal, 191 is a wire (inductor), 192 is a ground terminal, 193 is a termination resistor, and 194 is ground. Terminals 195 are output terminals. The plus side of the gate power supplies 188 and 189 is connected to the transistor 181.
And 182, the gate-side bias application resistors are connected.

Next, the operation of another conventional amplifier circuit will be described with reference to the drawings.

The drains of the field effect transistors 181 and 182 constituting the differential amplifier circuit are commonly connected to a predetermined drain power supply 187 via bias applying resistors 185 and 186. Further, a bias is applied to the gate from predetermined gate power supplies 188 and 189 via a bias application resistor. Further, the source is connected from the source terminal 190 to the ground terminal 192 via a wire (inductor) 191.

The differential signals inputted from the input terminals 183 and 184 are respectively inputted to the gate sides of the field effect transistors 181 and 182 constituting the differential amplifier circuit. The signal input to the transistor is amplified and then output from the drain side. One output signal is connected to the ground terminal 194 via the terminating resistor 193, and the other output signal is output from the output terminal 195 as an output signal.

As shown in FIG. 6, by using a differential amplifier circuit, an effect of suppressing a decrease in gain due to a wire (inductance) 191 connecting the source terminal 190 and the ground terminal 192 is obtained. Further, by grounding one of the output sides via the terminating resistor 193, the circuit can be downsized, and the single output of the differential amplifier can be easily realized.

[0016]

When a single output of a differential amplifier is realized by using a balun converter 166 as in the conventional amplifier circuit described above, high cost performance and high integration can be achieved. Balance-unbalance converter 16 made on a possible Si substrate
No. 6 had a problem that it was not suitable because the loss was very large.

Further, the size of the balun converter 166 is large, and it is difficult to reduce the size of the differential amplifier. Therefore, in the transmission high-frequency multi-stage amplifier circuit, the differential amplifier circuit is not applied to the final stage amplifier.

Next, when one of the two output terminals is terminated and then grounded to realize a single output of the differential amplifier as in the other conventional amplifier circuit described above, the differential amplifier However, there is a problem in that the loads are different from each other when viewed from the output side of the pair of transistors, and the operations are not symmetrical, and a displacement current is generated, and the amplification is reduced.

SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned problems, and has as its object to provide an amplifier circuit having high gain characteristics, capable of performing a small and stable differential amplification operation. I do.

[0020]

According to a first aspect of the present invention, there is provided an amplifying circuit for transmitting N (N is an integer of 2 or more) stage amplifying circuits, wherein at least the last stage is constituted by a differential amplifier;
The rest consists of a single-phase amplifier.

In the amplifier circuit according to a second aspect of the present invention, in the differential amplifier, one of the two output signals is grounded via a terminating resistor and the other output signal is connected to an output matching circuit. Output via

An amplifier circuit according to a third aspect of the present invention comprises:
In the two-stage differential amplifier circuit, one differential amplifier is provided, one of two output signals of the differential amplifier is grounded via a first output matching circuit and a terminating resistor, and the other output signal is Is output via the second output matching circuit.

According to a fourth aspect of the present invention, in the amplifier circuit, N
In the stage differential amplifier circuit, one of the two output signals is grounded via the first output matching circuit and the terminating resistor, and the other output signal is connected via the second output matching circuit to the final stage. And a differential amplifier for outputting the output.

[0024]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiment 1 An amplifier circuit according to Embodiment 1 of the present invention will be described with reference to the drawings. FIG. 1 is a diagram showing a configuration of an amplifier circuit according to Embodiment 1 of the present invention. FIG. 1 shows an example of a transmission N-stage amplifier circuit.

In FIG. 1, 1 is an input terminal, 2 is a first-stage single-phase amplifier, 3 is an interstage matching circuit, 4 is a second-stage single-phase amplifier, 5 is an N-1st-stage differential amplifier, 6 and 7 is an inter-stage matching circuit, 8 is an N-th stage differential amplifier, 9 and 10 are output matching circuits, and 11 and 12 are output terminals.

Next, the operation of the amplifier circuit according to the first embodiment will be described with reference to the drawings.

The signal input from the input terminal 1 to the first-stage single-phase amplifier 2 is amplified by the first-stage single-phase amplifier 2 and then input to the second-stage single-phase amplifier 4 via the inter-stage matching circuit 3. I do.

Next, the signal input to the (N-1) -th stage differential amplifier 5 is amplified by the (N-1) -th stage differential amplifier 5 and then passed through the inter-stage matching circuits 6 and 7, respectively. Input to the differential amplifier 8. After being amplified by the N-th stage differential amplifier 8, it is output as output signals from output terminals 11 and 12 via output matching circuits 9 and 10, respectively.

By configuring at least the final stage as a differential amplifier circuit, a decrease in gain due to a wire (inductor) can be suppressed, and an amplifier circuit having high gain characteristics and excellent high-frequency characteristics can be realized.

The configuration of the amplifier circuit is not limited to FIG.
It is sufficient that at least the final stage amplifier has a differential amplifier circuit configuration.

That is, in the amplifier circuit according to the first embodiment, at least the final stage of the transmitting N (N is an integer of 2 or more) stage amplifier circuit is constituted by a differential amplifier circuit, and the rest is constituted by a single phase. It is characterized by doing.

Embodiment 2 Embodiment 2 An amplifier circuit according to Embodiment 2 of the present invention will be described with reference to the drawings. FIG. 2 is a diagram showing a configuration of an amplifier circuit according to Embodiment 2 of the present invention. FIG. 2 shows an example of a transmission N-stage amplifier circuit.

In FIG. 2, 21 is an input terminal, 22 is 1
Stage single-phase amplifier, 23 is an interstage matching circuit, 24 is a second-stage single-phase amplifier, 25 is an N-1st-stage differential amplifier, 26 and 27
Is an interstage matching circuit, 28 is an N-th stage differential amplifier, 29 is a terminating resistor, 30 is a ground terminal, 31 is an output matching circuit, and 32 is an output terminal.

Next, the operation of the amplifier circuit according to the second embodiment will be described with reference to the drawings.

The signal input from the input terminal 21 to the first-stage single-phase amplifier 22 is amplified by the first-stage single-phase amplifier 22 and then passed through the inter-stage matching circuit 23 to the second-stage single-phase amplifier 2.
Enter 4

Next, the signal input to the (N-1) -th stage differential amplifier 25 is amplified by the (N-1) -th stage differential amplifier 25, and then passed through the inter-stage matching circuits 26 and 27, respectively. Input to the differential amplifier 28. This N-th stage differential amplifier 2
After being amplified at 8, one output signal is connected to the ground terminal 30 via the terminating resistor 29, and the other output signal is output as an output signal from the output terminal 32 via the output matching circuit 31.

By configuring the multi-stage amplifier including the final stage as a differential amplifier circuit, it is possible to suppress a decrease in gain due to a wire (inductor) and realize an amplifier circuit having high gain characteristics and excellent high-frequency characteristics. it can.

Also, since one of the output signals is coupled to the ground potential via the terminating resistor 29, it is difficult to produce a low-loss balun converter having a high dielectric constant such as Si. Even when a circuit is formed on a substrate, a single output can be easily achieved while realizing miniaturization.

The configuration of the amplifier circuit is not limited to FIG.
It is sufficient that the final stage amplifier has a differential amplifier circuit configuration.

That is, the amplifier circuit according to the second embodiment has the characteristics of the first embodiment in a transmission N-stage (N is an integer of 2 or more) stage amplifier circuit. One of the two output terminals is grounded via a terminating resistor 29, and the other is connected to an output matching circuit 31.

Embodiment 3 Embodiment 3 An amplifier circuit according to Embodiment 3 of the present invention will be described with reference to the drawings. FIG. 3 is a diagram showing a configuration of an amplifier circuit according to Embodiment 3 of the present invention. FIGS. 3A and 3B show examples of a one-stage differential amplifier circuit and a differential amplifier.

In FIG. 3A, 41 and 42 are input terminals, 43 is a differential amplifier, 44 and 47 are output matching circuits, 45 is a terminating resistor, 46 is a ground terminal, and 48 is an output terminal.

In FIG. 3B, reference numerals 49 and 50 denote NPN bipolar transistors constituting a differential amplifier;
And 52 are input terminals, 53 and 54 are bias applied resistors, 55 is a collector power supply, 56 and 57 are base power supplies,
58 is an emitter terminal, 59 is a wire (inductor), 6
0 is a ground terminal, 61 and 64 are output matching circuits, 62 is a terminating resistor, 63 is a ground terminal, and 65 is an output terminal. The plus side of the base power supplies 56 and 57 is connected to the bias application resistors on the base sides of the transistors 49 and 50.

Next, the operation of the amplifier circuit according to the third embodiment will be described with reference to the drawings.

In the one-stage differential amplifier circuit shown in FIG. 3A, the differential signal input to the differential amplifier 43 from the input terminals 41 and 42 is amplified by the differential amplifier 43,
Output.

One of the output signals is connected to an output matching circuit 44 and then connected to a ground terminal 46 via an arbitrary terminating resistor 45 (usually 50 [Ω]).
Is output from the output terminal 48 as an output signal.

In the one-stage differential amplifier shown in FIG. 3B, the differential amplifier comprises a pair of NPN bipolar transistors 49 and 50. The collectors of the NPN bipolar transistors are commonly connected to a predetermined collector power supply 55 via bias applying resistors 53 and 54. In addition, a bias is applied to the base from predetermined base power supplies 56 and 57 via bias applying resistors. Further, the emitter is connected from the emitter terminal 58 to a ground terminal 60 via a wire (inductor) 59.

The signal input to the base of the differential amplifier is amplified and then output from the collector. One output signal is connected to an output matching circuit 61 composed of a capacitor and an inductor, and is connected to a ground terminal 63 via a terminating resistor 62. The other output signal is a matching circuit composed of a similar capacitor and an inductor. An output signal is output from the output terminal 55 via the output terminal 64.

Since the pair of NPN bipolar transistors constituting the differential amplifier operate symmetrically with respect to the differential signal, the emitter terminal 58 is equivalently a ground point. Therefore, the effect of the wire connecting the emitter and the ground terminal 60 can be ignored, and a decrease in gain can be suppressed.

One of the output terminals is connected to an output matching circuit 61.
After that, the circuit is coupled to the ground potential via the terminating resistor 62, so that the circuit is mounted on a semiconductor substrate, such as Si, which has a high dielectric constant and is difficult to produce a low-loss balun. Also in the case of a configuration, a single output can be easily achieved while realizing miniaturization.

Further, the ground terminal 6 is connected via the terminating resistor 62.
Since the output signal connected to 3 also passes through the output matching circuit 61, the load seen from the output side of the pair of NPN bipolar transistors constituting the differential amplifier is equal. Therefore, the pair of NPN bipolar transistors perform a symmetric operation, so that a stable differential amplification operation can be performed without generating a displacement current between the transistors.

The circuit configuration of the differential amplifier circuit is shown in FIG.
It is not limited to (b). Further, the transistor used for the differential amplifier circuit is not limited to a bipolar transistor, but may be a field effect transistor. The method of grounding the transistor is not limited to the grounded emitter, but may be the grounded collector.

That is, in the amplifier circuit according to the third embodiment, in a one-stage differential amplifier circuit, one of two output terminals of the differential amplifier circuit is connected to an output matching circuit, and then grounded via a terminating resistor. The other is connected to an output matching circuit and then used as an output terminal.

Embodiment 4 Embodiment 4 An amplifier circuit according to Embodiment 4 of the present invention will be described with reference to the drawings. FIG. 4 is a diagram showing a configuration of an amplifier circuit according to Embodiment 4 of the present invention. FIGS. 4A and 4B show examples of an N-stage differential amplifier circuit and an N-th stage differential amplifier.

In FIG. 4A, 71 and 72 are input terminals, 73 is a first-stage differential amplifier, 74 and 75 are interstage matching circuits, 76 is a second-stage differential amplifier, and 77 is an N-1 stage. A reference differential amplifier, 78 and 79 are interstage matching circuits, 80 is an N-th stage differential amplifier, 81 and 84 are output matching circuits, 82 is a terminating resistor, 83 is a ground terminal, and 85 is an output terminal.

In FIG. 4B, reference numerals 86 and 87 denote NPN bipolar transistors constituting a differential amplifier;
And 89 are input terminals, 90 and 91 are bias applied resistors, 92 is a collector power supply, 93 and 94 are base power supplies,
95 is an emitter terminal, 96 is a wire (inductor), 9
7 is a ground terminal, 98 and 101 are output matching circuits, 99 is a terminating resistor, 100 is a ground terminal, and 102 is an output terminal. The plus side of the base power supplies 93 and 94 is connected to the bias application resistors on the base sides of the transistors 86 and 87.

Next, the operation of the amplifier circuit according to the fourth embodiment will be described with reference to the drawings.

In the N-stage differential amplifier circuit shown in FIG. 4A, the differential signal input from the input terminals 71 and 72 to the first-stage differential amplifier 73 is amplified by the first-stage differential amplifier 73. Are input to a second-stage differential amplifier 76 via inter-stage matching circuits 74 and 75, respectively.

Next, similarly, the differential signal input to the (N-1) -th stage differential amplifier 77 is amplified by the (N-1) -th stage differential amplifier 77, and then the inter-stage matching circuits 78 and 79, respectively.
, And is input to the N-th stage differential amplifier 80. After being amplified by the N-th stage differential amplifier 80, one of the output signals is connected to an output matching circuit 81 and then to a ground terminal 83 via an arbitrary termination resistor 82 (normally 50 [Ω]). The other is output as an output signal from an output terminal 85 via a matching circuit 84.

In the differential amplifier shown in FIG. 4B, this differential amplifier comprises a pair of NPN bipolar transistors 86 and 87. The collectors of the NPN bipolar transistors are commonly connected to a predetermined collector power supply 92 via bias applying resistors 90 and 91. A bias is applied to the base from predetermined base power supplies 93 and 94 via bias applying resistors. Further, the emitter is connected from the emitter terminal 95 to a ground terminal 97 via a wire (inductor) 96.

The signal input to the base of the differential amplifier is amplified and then output from the collector. One output signal is connected to an output matching circuit 98 composed of a capacitor and an inductor, and is connected to the ground terminal 100 via a terminating resistor 99. The other output signal is a matching circuit composed of a similar capacitor and an inductor. The signal is output from the output terminal 102 via the terminal 101.

Since the pair of NPN bipolar transistors constituting the differential amplifier operate symmetrically with respect to the differential signal, the emitter terminal 95 is equivalent to the ground point. Therefore, the effect of the wire connecting the emitter and the ground terminal can be neglected, and a decrease in gain can be suppressed.

One of the output terminals is connected to an output matching circuit 98.
After that, the circuit is coupled to the ground potential via the terminating resistor 99, so that the circuit is mounted on a semiconductor substrate, such as Si, which has a high dielectric constant and is difficult to produce a low-loss balun. Also in the case of a configuration, a single output can be easily achieved while realizing miniaturization.

In addition, a high-frequency high-output amplifier having a high gain characteristic can be formed by forming the amplifier circuit in a multi-stage configuration and achieving a single output on the output side of the final-stage differential amplifier.

Further, the ground terminal 1 is connected via the terminating resistor 99.
Since the output signal connected to 00 also passes through the output matching circuit 98, the load seen from the output side of the pair of NPN bipolar transistors constituting the differential amplifier is equal. Therefore, the pair of NPN bipolar transistors perform a symmetric operation, so that a stable differential amplification operation can be performed without generating a displacement current between the transistors.

The circuit configuration of the differential amplifier circuit is shown in FIG.
It is not limited to (b). Further, the transistor used for the differential amplifier circuit is not limited to a bipolar transistor, but may be a field effect transistor. The method of grounding the transistor is not limited to the grounded emitter, but may be the grounded collector.

That is, the amplifier circuit according to the fourth embodiment uses the differential amplifier circuit according to the third embodiment as a final-stage differential amplifier in an N-stage differential amplifier circuit.

[0068]

According to the first aspect of the present invention, there is provided an amplifier circuit comprising:
As described above, in the N-stage transmission circuit (N is an integer of 2 or more), at least the last stage is constituted by the differential amplifier, and the rest is constituted by the single-phase amplifier. And a stable differential amplification operation can be performed.

As described above, in the amplifier circuit according to the second aspect of the present invention, the differential amplifier grounds one of the two output signals via the terminating resistor and the other output signal. Is output via the output matching circuit, so that it is possible to perform a small and stable differential amplification operation having high gain characteristics.

As described above, the amplifier circuit according to the third aspect of the present invention includes one differential amplifier in the one-stage differential amplifier circuit, and outputs one of the two output signals of the differential amplifier. Since the signal is grounded via the first output matching circuit and the terminating resistor and the other output signal is output via the second output matching circuit, the differential amplifier has high gain characteristics, and is small and stable. There is an effect that the operation can be performed.

As described above, in the amplifier circuit according to the fourth aspect of the present invention, in the N-stage differential amplifier circuit, one of the two output signals is supplied to the last stage in the first output matching circuit and the first output matching circuit. Since a differential amplifier is provided which is grounded via a terminating resistor and outputs the other output signal via a second output matching circuit, a small and stable differential amplification operation having high gain characteristics is performed. It has the effect of being able to do so.

[Brief description of the drawings]

FIG. 1 is a diagram showing a configuration of an amplifier circuit according to a first embodiment of the present invention.

FIG. 2 is a diagram illustrating a configuration of an amplifier circuit according to Embodiment 2 of the present invention;

FIG. 3 is a diagram showing a configuration of an amplifier circuit according to Embodiment 3 of the present invention.

FIG. 4 is a diagram showing a configuration of an amplifier circuit according to Embodiment 4 of the present invention.

FIG. 5 is a diagram illustrating a configuration of a conventional amplifier circuit.

FIG. 6 is a diagram showing a configuration of another conventional amplifier circuit.

[Explanation of symbols]

1 input terminal, 2nd stage single-phase amplifier, 3rd stage matching circuit, 4th 2nd stage single-phase amplifier, 5N-1st stage differential amplifier, 6th, 7th stage matching circuit, 8Nth stage differential amplifier,
9, 10 output matching circuit, 11, 12 output terminals.

Continuing from the front page (72) Inventor Kenji Suematsu 2-3-2 Marunouchi, Chiyoda-ku, Tokyo Mitsubishi Electric Corporation F-term (reference) 5J066 AA01 AA12 AA41 CA35 CA92 FA15 HA02 HA09 HA25 HA29 HA33 KA00 KA12 KA29 MA08 MA21 ND01 ND11 ND22 PD02 SA14 TA01 5J069 AA01 AA12 AA41 CA35 CA92 FA15 HA02 HA09 HA25 HA29 HA33 KA00 KA12 KA29 MA08 MA21 SA14 TA01 5J091 AA01 AA12 AA41 CA35 CA65 FA15 HA02 HA09 HA25 HA29 HA33 KA00 MA12 KA00 MA12 SA14

Claims (4)

[Claims] 1. An amplifying circuit for transmitting N (N is an integer of 2 or more) stage amplifier circuits, wherein at least the last stage is constituted by a differential amplifier, and the rest is constituted by a single-phase amplifier. 2. The differential amplifier according to claim 1, wherein one of the two output signals is grounded via a terminating resistor, and the other output signal is output via an output matching circuit. Item 2. The amplifier circuit according to Item 1. 3. A one-stage differential amplifier circuit, comprising one differential amplifier, and grounding one of two output signals of the differential amplifier via a first output matching circuit and a terminating resistor. And outputting the other output signal via a second output matching circuit. 4. In the N-stage differential amplifier circuit, one of the two output signals is grounded via a first output matching circuit and a terminating resistor, and the other output signal is connected to a second output signal. An amplifier circuit, comprising: a differential amplifier that outputs the signal through the output matching circuit.