JP2002305280A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JP2002305280A JP2002305280A JP2001108176A JP2001108176A JP2002305280A JP 2002305280 A JP2002305280 A JP 2002305280A JP 2001108176 A JP2001108176 A JP 2001108176A JP 2001108176 A JP2001108176 A JP 2001108176A JP 2002305280 A JP2002305280 A JP 2002305280A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor device
- metal plate
- lead frame
- screw hole
- semiconductor element
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、ネジ止め穴を有す
る放熱板を備えた半導体装置であり、特に、放熱板の表
面積を増大して放熱性を向上させた半導体装置に関する
ものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device provided with a heat radiating plate having screw holes, and more particularly to a semiconductor device having an increased surface area of a heat radiating plate to improve heat radiation.
【０００２】[0002]
【従来の技術】従来の半導体装置について以下、図面に
基づいて説明する。2. Description of the Related Art A conventional semiconductor device will be described below with reference to the drawings.
【０００３】図１２および図１３は、従来の半導体装置
を示す図である。図１２は、その正面図である。また、
図１３はＦ−Ｆ'における断面図である。FIGS. 12 and 13 show a conventional semiconductor device. FIG. 12 is a front view thereof. Also,
FIG. 13 is a sectional view taken along line FF ′.
【０００４】従来の半導体装置は、リードフレームがダ
イパッド１と放熱板２を有する厚板金属板と、インナー
リード３とアウターリード４を有する薄板金属板から構
成されるものである。また、前記した厚板金属板の放熱
板２は、半導体装置をシャーシもしくは放熱フィンなど
に固定する際に用いるネジ止め穴５を備えた平板形状で
ある。In a conventional semiconductor device, the lead frame is composed of a thick metal plate having a die pad 1 and a heat sink 2 and a thin metal plate having an inner lead 3 and an outer lead 4. The heat radiating plate 2 made of a thick metal plate has a flat plate shape with a screw hole 5 used for fixing the semiconductor device to a chassis or a heat radiating fin.
【０００５】前記のリードフレームを用いて、このよう
な半導体装置を実現するためには、まず前記厚板金属板
に備えられたダイパッド１の裏面に、Ｃｒ、Ｎｉ、Ａｕ
などの積層金属皮膜の多層蒸着もしくはスパッターで形
成し、所定の大きさに個片化した半導体素子６を、半田
などを材料とした熱良導体の接合部材７を介して接合す
る。このような接合は、還元ガス雰囲気中で、３５０
[℃]で溶着させる。[0005] In order to realize such a semiconductor device using the above-mentioned lead frame, first, Cr, Ni, Au is formed on the back surface of the die pad 1 provided on the thick metal plate.
The semiconductor elements 6 formed by multi-layer deposition or sputtering of a laminated metal film such as the above and singulated into a predetermined size are joined via a joining member 7 made of a good conductor made of solder or the like. Such bonding is performed in a reducing gas atmosphere at 350
Weld at [° C].
【０００６】次に、半導体素子６上の電極８とリードフ
レームを構成する薄い金属板のインナーリード３の先端
近傍をワイヤーボンダーにより金や銅などを材料とした
金属細線９で接続し、電気的導通を図る。Next, the electrode 8 on the semiconductor element 6 and the vicinity of the tip of the inner lead 3 of a thin metal plate forming a lead frame are connected by a wire bonder with a thin metal wire 9 made of gold or copper. Conduct continuity.
【０００７】更に、ダイパッド１、放熱板２、インナー
リード３、半導体素子６、接合部材７、および金属細線
９をトランスファーモールドにより封止樹脂１０にて一
体的に封止する。最後に、前記アウターリード４のめっ
きとフレームの切り離し加工を行うことで、従来の半導
体装置が実現できる。Further, the die pad 1, the heat radiating plate 2, the inner leads 3, the semiconductor element 6, the bonding member 7, and the thin metal wire 9 are integrally sealed with a sealing resin 10 by transfer molding. Finally, the conventional semiconductor device can be realized by plating the outer leads 4 and separating the frame.
【０００８】[0008]
【発明が解決しようとする課題】しかしながら、上記従
来例の構成では、放熱板が平板であることから、対流に
よる空冷効を得にくく、放熱性の更なる向上が望めない
という問題があった。However, in the structure of the above-mentioned prior art, since the heat radiating plate is a flat plate, there is a problem that it is difficult to obtain an air cooling effect by convection and further improvement in heat radiating property cannot be expected.
【０００９】また、従来例の半導体装置を、平坦性が損
なわれたシャーシにネジ止めする際に受ける機械応力に
より、放熱板にひずみが発生し、放熱板と樹脂部間の剥
離や樹脂部のクラックが発生する。さらに、著しい場合
には、半導体素子上の電極とインナーリードを接続させ
ている金属細線のはずれなどの問題があった。In addition, a mechanical stress applied when the conventional semiconductor device is screwed to a chassis having impaired flatness causes distortion in the heat radiating plate, thereby causing peeling between the heat radiating plate and the resin portion and the resin portion. Cracks occur. Further, in a remarkable case, there is a problem such as a detachment of a thin metal wire connecting the electrode on the semiconductor element and the inner lead.
【００１０】[0010]
【課題を解決するための手段】本発明は従来の課題を解
決するもので、リードフレームを構成する厚板金属板の
先端領域を折り曲げ加工を施すことにより、放熱板の面
積を増加させ空冷による放熱性の向上を図る。また、前
記リードフレームを構成する前記厚板金属板に備えられ
たネジ止め穴の両側もしくは周辺にスリットを配置し、
その前記スリットに囲まれた範囲を押し出す加工を施す
ことにより、ネジ止め時に加わる機械応力の緩和を図
る。SUMMARY OF THE INVENTION The present invention has been made to solve the above-mentioned conventional problems. By bending a leading end region of a thick metal plate constituting a lead frame, the area of a heat radiating plate is increased and air cooling is performed. Improve heat dissipation. Further, a slit is arranged on both sides or around the screw holes provided in the thick metal plate constituting the lead frame,
By extruding the area surrounded by the slit, mechanical stress applied at the time of screwing is reduced.
【００１１】[0011]
【発明の実施の形態】以下に本発明に係る半導体装置の
実施の形態を、図面に基づいて説明する。Embodiments of a semiconductor device according to the present invention will be described below with reference to the drawings.
【００１２】図１及び図２は、本発明の第１の実施の形
態における半導体装置を示す図である。図１は正面図で
ある。また、図２はＡ−Ａ'における断面図である。FIGS. 1 and 2 show a semiconductor device according to a first embodiment of the present invention. FIG. 1 is a front view. FIG. 2 is a sectional view taken along line AA ′.
【００１３】まず、本発明の第１の実施の形態は、リー
ドフレームはダイパッド１と放熱板２を有する厚板金属
板と、インナーリード３とアウターリード４を有する薄
板金属板から構成されるものであり、放熱効果を増強す
る目的で厚板金属板の放熱板２の先端部分の領域を、正
面側へ突き出す形で折り曲げて放熱板の表面積を拡大せ
しめる空冷板１１を形成する。前記空冷板１１の高さ
は、実装空間を重視する場合は封止樹脂１０の高さ以下
とするが、許容される場合は高さに制限はない。また、
前記放熱板２は、本発明の半導体装置をシャーシもしく
は放熱フィンなどに固定する際に用いるネジ止め穴５を
備えており、前記ネジ止め穴５を挟むようにスリット１
２を配置する。この時、形成される前記スリット１２は
前記ネジ止め穴５の両側だけでなく、前記ネジ止め穴５
を囲む縦横の４辺に設けるものであっても何ら問題はな
い。次に、前記スリット１２に挟まれた前記ネジ止め穴
５を含むその周辺部を、正面側へ周囲より高く押し出し
て応力緩衝部１３を形成する。そして、このような加工
を施した前記放熱板２に備えられている前記ダイパッド
１に、裏面にＣｒ、Ｎｉ、Ａｕなどの積層金属皮膜を多
層蒸着もしくはスパッターで形成し個片化した半導体素
子６を半田などを材料とした熱良導体の接合部材７を介
して接合する。このような接合は、還元ガス雰囲気中で
３５０[℃]で溶着させる。さらに、前記半導体素子６上
の電極８と、リードフレームを構成する薄い金属板の前
記インナーリード３の先端近傍を、ワイヤーボンダーに
より金や銅などを材料とした金属細線９で接続し、電気
的導通を図る。これらの前記ダイパッド１、前記放熱板
２、前記インナーリード３、前記半導体素子６、前記接
合部材７、および前記金属細線９をトランスファーモー
ルドにより封止樹脂１０で一体的に封止する。最後に、
前記アウターリード４のめっきとフレームからの切り離
し加工を行うことで、本発明の第１の実施の形態に係る
半導体装置が実現できる。First, in the first embodiment of the present invention, the lead frame is composed of a thick metal plate having a die pad 1 and a heat sink 2, and a thin metal plate having an inner lead 3 and an outer lead 4. In order to enhance the heat radiation effect, the air cooling plate 11 is formed by bending the region of the distal end portion of the heat radiation plate 2 made of a thick metal plate so as to protrude toward the front side to increase the surface area of the heat radiation plate. The height of the air cooling plate 11 is equal to or less than the height of the sealing resin 10 when emphasizing the mounting space. However, the height is not limited when allowed. Also,
The heat radiating plate 2 is provided with a screw hole 5 used for fixing the semiconductor device of the present invention to a chassis or a heat radiating fin or the like.
2 is arranged. At this time, the slit 12 formed is formed not only on both sides of the screw hole 5 but also on the screw hole 5.
There is no problem even if it is provided on the four sides in the vertical and horizontal directions surrounding the. Next, the peripheral portion including the screw hole 5 sandwiched between the slits 12 is extruded toward the front side higher than the surroundings to form the stress buffer portion 13. Then, on the die pad 1 provided on the radiator plate 2 which has been subjected to such processing, a laminated metal film of Cr, Ni, Au or the like is formed on the back surface by multi-layer deposition or spattering to obtain individual semiconductor elements 6. Are joined via a joint member 7 made of a good conductor made of solder or the like. Such bonding is performed by welding at 350 ° C. in a reducing gas atmosphere. Further, the electrode 8 on the semiconductor element 6 and the vicinity of the tip of the inner lead 3 of the thin metal plate forming the lead frame are connected by a thin metal wire 9 made of a material such as gold or copper by a wire bonder. Conduct continuity. The die pad 1, the heat sink 2, the inner leads 3, the semiconductor element 6, the bonding member 7, and the thin metal wires 9 are integrally sealed with a sealing resin 10 by transfer molding. Finally,
The semiconductor device according to the first embodiment of the present invention can be realized by performing plating of the outer leads 4 and separation from the frame.
【００１４】図３及び図４は、本発明の第２の実施の形
態に係る半導体装置を示す図である。図３はその正面図
である。また、図４はＢ−Ｂ'における断面図である。FIGS. 3 and 4 show a semiconductor device according to a second embodiment of the present invention. FIG. 3 is a front view thereof. FIG. 4 is a sectional view taken along line BB '.
【００１５】本発明の第２の実施の形態に係る半導体装
置は、前述の本発明の第１の実施の形態におけるネジ止
め緩衝部を形成しない構造の放熱板２を用いることで実
現できる。The semiconductor device according to the second embodiment of the present invention can be realized by using the heat radiating plate 2 of the first embodiment of the present invention, which has no screw buffer portion.
【００１６】図５及び図６は、本発明の第３の実施の形
態に係る半導体装置を示す図である。図５はその正面図
である。また、図６はＣ−Ｃ'における断面図である。FIGS. 5 and 6 show a semiconductor device according to a third embodiment of the present invention. FIG. 5 is a front view thereof. FIG. 6 is a cross-sectional view taken along the line CC ′.
【００１７】本発明の第３の実施の形態に係る半導体装
置は、前述の本発明の第１の実施の形態における空冷板
１１にプレス加工などにより、凹凸部１４を設けること
により実現ができる。The semiconductor device according to the third embodiment of the present invention can be realized by providing the air cooling plate 11 of the above-described first embodiment of the present invention with the concave and convex portions 14 by pressing or the like.
【００１８】上記本発明の第１〜３の実施の形態は、対
流による空冷効果で高放熱性を実現できる半導体装置を
提供するものである。The first to third embodiments of the present invention provide a semiconductor device capable of realizing high heat radiation by an air cooling effect by convection.
【００１９】図７および図８は、本発明の第４の実施の
形態に係る半導体装置を示す図である。図７はその正面
図である。また、図８はＤ−Ｄ'における断面図であ
る。FIGS. 7 and 8 show a semiconductor device according to a fourth embodiment of the present invention. FIG. 7 is a front view thereof. FIG. 8 is a sectional view taken along line DD ′.
【００２０】本発明の第４の実施の形態は、リードフレ
ームはダイパッド１と放熱板２を有する厚板金属板と、
インナーリード３とアウターリード４を有する薄板金属
板から構成されるものである。また、前記放熱板２は、
本発明の半導体装置をシャーシもしくは放熱フィンなど
に固定する際に用いるネジ止め穴５を備えている。ま
ず、前記ネジ止め穴５を挟むようにスリット１２を配置
する。この時、形成される前記スリット１２は前記ネジ
止め穴５の両側だけでなく、前記ネジ止め穴５を囲む縦
横の４辺に設けるものであっても何ら問題はない。次
に、前記スリット１２に挟まれた前記ネジ止め穴５を含
むその周辺部を、正面側へ周囲より高く押し出して応力
緩衝部１３を形成する。そして、このような加工を施し
た前記放熱板２に備えられている前記ダイパッド１に、
裏面にＣｒ、Ｎｉ、Ａｕなどの積層金属皮膜を多層蒸着
もしくはスパッターで形成し個片化した半導体素子６を
半田などを材料とした熱良導体の接合部材７を介して接
合する。接合条件は、前述の第１の実施の形態と同様で
ある。さらに、前記半導体素子６上の電極８と、リード
フレームを構成する薄い金属板の前記インナーリード３
の先端近傍を、ワイヤーボンダーにより金や銅などを材
料とした金属細線９で接続し、電気的導通を図る。これ
らの前記ダイパッド１、前記放熱板２、前記インナーリ
ード３、前記半導体素子６、前記接合部材７、および前
記金属細線９をトランスファーモールドにより封止樹脂
１０で一体的に封止する。最後に、前記アウターリード
４のめっきとフレームからの切り離し加工を行うこと
で、本発明の第４の実施の形態に係る半導体装置が実現
できる。According to a fourth embodiment of the present invention, the lead frame includes a thick metal plate having a die pad 1 and a heat sink 2,
It is composed of a thin metal plate having inner leads 3 and outer leads 4. In addition, the heat sink 2
The semiconductor device of the present invention is provided with a screw hole 5 used for fixing the semiconductor device to a chassis or a radiation fin. First, the slit 12 is arranged so as to sandwich the screw hole 5. At this time, there is no problem even if the slits 12 formed are provided not only on both sides of the screw hole 5 but also on four vertical and horizontal sides surrounding the screw hole 5. Next, the stress buffer portion 13 is formed by extruding the peripheral portion including the screw hole 5 sandwiched between the slits 12 higher than the periphery toward the front side. Then, the die pad 1 provided on the radiator plate 2 which has been subjected to such processing is provided with:
On the back surface, a laminated metal film of Cr, Ni, Au or the like is formed by multi-layer deposition or sputtering, and individualized semiconductor elements 6 are joined via a joining member 7 made of a good conductor such as solder. The joining conditions are the same as in the first embodiment. Further, the electrode 8 on the semiconductor element 6 and the inner lead 3 made of a thin metal plate forming a lead frame.
Are connected by a metal bonder 9 made of a material such as gold or copper using a wire bonder to achieve electrical continuity. The die pad 1, the heat sink 2, the inner leads 3, the semiconductor element 6, the bonding member 7, and the thin metal wires 9 are integrally sealed with a sealing resin 10 by transfer molding. Finally, the semiconductor device according to the fourth embodiment of the present invention can be realized by plating the outer leads 4 and separating them from the frame.
【００２１】図９は本発明の第５の実施の形態に係る半
導体装置の正面図である。FIG. 9 is a front view of a semiconductor device according to a fifth embodiment of the present invention.
【００２２】本発明の第５の実施の形態は、リードフレ
ームがダイパッド１と放熱板２を有する厚板金属板と、
インナーリード３とアウターリード４を有する薄板金属
板から構成されるものである。また、前記放熱板２は、
本発明の半導体装置をシャーシもしくは放熱フィンなど
に固定する際に用いるネジ止め穴５を備えている。ま
ず、前記ネジ止め穴５を囲むように複数のスリット２２
を配置し、周囲に比べて強度を落とすことにより、応力
緩衝の働きをさせる。この時、形成される前記スリット
２２の形状および個数は、同様の効果を得られれば、特
に指定するものではない。次に、このような加工を施し
た前記放熱板２に備えられている前記ダイパッド１に、
裏面にＣｒ、Ｎｉ、Ａｕなどの積層金属皮膜を多層蒸着
やスパッターで形成し個片化した半導体素子を、半田な
どを材料とした熱良導体の接合部材７を介して接合す
る。接合条件は、前述の第１の実施の形態と同様であ
る。次に、前記半導体素子６上の電極８とリードフレー
ムを構成する薄板金属板の前記インナーリード３の先端
近傍をワイヤーボンダーにより金や銅などを材料とした
金属細線９で接続し、電気的導通を図る。これらの前記
ダイパッド１、前記放熱板２、前記インナーリード３、
前記半導体素子６、前記接合部材７、および前記金属細
線９をトランスファーモールドにより封止樹脂１０にて
一体的に封止する。最後に、前記アウターリード４のめ
っきとフレームからの切り離し加工を行うことで、本発
明の第５の実施の形態に係る半導体装置が実現できる。In a fifth embodiment of the present invention, the lead frame has a thick metal plate having a die pad 1 and a heat radiating plate 2,
It is composed of a thin metal plate having inner leads 3 and outer leads 4. In addition, the heat sink 2
The semiconductor device of the present invention is provided with a screw hole 5 used for fixing the semiconductor device to a chassis or a radiation fin. First, a plurality of slits 22 are formed so as to surround the screw holes 5.
Are arranged to reduce the strength compared to the surroundings, thereby acting as a stress buffer. At this time, the shape and number of the slits 22 to be formed are not particularly specified as long as similar effects can be obtained. Next, the die pad 1 provided on the radiator plate 2 which has been subjected to such processing,
A semiconductor element singulated by forming a laminated metal film of Cr, Ni, Au or the like on the back surface by multi-layer deposition or sputtering is joined via a joining member 7 made of a good conductor such as solder. The joining conditions are the same as in the first embodiment. Next, the electrode 8 on the semiconductor element 6 and the vicinity of the tip of the inner lead 3 of the thin metal plate constituting the lead frame are connected by a wire bonder with a thin metal wire 9 made of a material such as gold or copper, thereby providing electrical conduction. Plan. The die pad 1, the heat sink 2, the inner leads 3,
The semiconductor element 6, the joining member 7, and the thin metal wire 9 are integrally sealed with a sealing resin 10 by transfer molding. Finally, the semiconductor device according to the fifth embodiment of the present invention can be realized by plating the outer leads 4 and separating them from the frame.
【００２３】図１０及び図１１は、本発明の第６の実施
の形態に係る半導体装置を示す図である。図１０は、そ
の正面図である。また、図１１はＥ−Ｅ'における断面
図である。FIGS. 10 and 11 show a semiconductor device according to a sixth embodiment of the present invention. FIG. 10 is a front view thereof. FIG. 11 is a sectional view taken along line EE ′.
【００２４】本発明の第６の実施の形態は、リードフレ
ームはダイパッド１と放熱板２を有する厚板金属板と、
インナーリード３とアウターリード４を有する薄板金属
板から構成されるものである。次に、前記放熱板２は、
本発明の半導体装置をシャーシもしくは放熱フィンなど
に固定する際に用いるネジ止め穴５を備えている。ま
ず、前記ネジ止め穴５を中心とした前記ネジ止め穴５の
より直径の大きい円形の範囲で、裏面から正面側へ押し
出し応力緩衝部２３を形成する。その際、前記応力緩衝
部２３の外周付近は、押し出しによる伸びで厚みが薄く
なる。これにより、周囲に比べて強度が落ちることか
ら、ネジ止め固定時の応力緩衝の働きをさせる。次に、
このような加工を施した前記放熱板２に備えられている
ダイパッド１に、裏面にＣｒ、Ｎｉ、Ａｕなどの積層金
属皮膜の多層蒸着やスパッタで形成し個片化した半導体
素子６を、半田などを材料とした熱良導体の接合部材７
を介して接合する。接合条件は前述の第１の実施の形態
と同様である。前記半導体素子６上の電極とリードフレ
ームを構成する薄板金属板の前記インナーリード３の先
端付近をワイヤーボンダーにより、金や銅などを材料と
した金属細線９で接続し、電気的導通を図る。さらに、
前記ダイパッド１、前記放熱板２、前記インナーリード
３、前記半導体素子６、前記接合部７、および前記金属
細線８をトランスファーモールドにより封止樹脂１０に
て一体的に封止する。最後に、前記アウターリード４の
めっきとフレームからの切り離し加工を行うことで、本
発明の第６の実施の形態に係る半導体装置が実現でき
る。According to a sixth embodiment of the present invention, the lead frame comprises a thick metal plate having a die pad 1 and a heat sink 2,
It is composed of a thin metal plate having inner leads 3 and outer leads 4. Next, the heat sink 2
The semiconductor device of the present invention is provided with a screw hole 5 used for fixing the semiconductor device to a chassis or a radiation fin. First, a stress buffer 23 is formed by pushing the screw hole 5 from the rear surface to the front side in a circular area having a larger diameter than the screw hole 5. At this time, the thickness near the outer periphery of the stress buffer portion 23 becomes thin due to the extension due to the extrusion. As a result, the strength is lower than that of the surroundings, so that it functions as a stress buffer at the time of screwing and fixing. next,
On the die pad 1 provided on the radiator plate 2 which has been subjected to such processing, a semiconductor element 6 which has been formed into individual pieces by multi-layer deposition or sputtering of a laminated metal film of Cr, Ni, Au or the like on the back surface is soldered. Of good thermal conductor 7 made of such material
To join. The joining conditions are the same as in the first embodiment. The electrode on the semiconductor element 6 and the vicinity of the tip of the inner lead 3 of the thin metal plate forming the lead frame are connected by a wire bonder with a thin metal wire 9 made of a material such as gold or copper to achieve electrical conduction. further,
The die pad 1, the heat radiating plate 2, the inner leads 3, the semiconductor element 6, the bonding portion 7, and the thin metal wires 8 are integrally sealed with a sealing resin 10 by transfer molding. Finally, the semiconductor device according to the sixth embodiment of the present invention can be realized by performing plating of the outer leads 4 and separation from the frame.
【００２５】上記第４〜６の実施の形態は、半導体装置
をシャーシへネジ止め固定をする際に発生する機械応力
を、ネジ止め穴周辺で緩和できる半導体装置を提供する
ものである。The fourth to sixth embodiments provide a semiconductor device capable of relieving mechanical stress generated when a semiconductor device is screwed and fixed to a chassis around a screw hole.
【００２６】[0026]
【発明の効果】以上のように、本発明は、放熱板をＬ字
型に折り曲げ、且つネジ止め穴周辺を持ち上げる加工を
施すことにより、放熱板の表面積を増加させ、対流によ
る空冷効果で放熱性を向上させるとともに、ネジ止め時
に加わる機械応力をネジ止め穴周辺で緩和できる優れた
半導体装置を実現させるものである。As described above, the present invention increases the surface area of the heat radiating plate by bending the heat radiating plate into an L shape and lifting the area around the screw hole, thereby radiating heat by the air cooling effect by convection. It is an object of the present invention to realize an excellent semiconductor device capable of improving the performance and reducing the mechanical stress applied at the time of screwing around the screwing hole.
【図１】本発明の第１の実施の形態に係る半導体装置を
示す正面図FIG. 1 is a front view showing a semiconductor device according to a first embodiment of the present invention;
【図２】本発明の第１の実施の形態に係る半導体装置の
Ａ−Ａ'での断面図FIG. 2 is a sectional view taken along line AA ′ of the semiconductor device according to the first embodiment of the present invention;
【図３】本発明の第２の実施の形態に係る半導体装置を
示す正面図FIG. 3 is a front view showing a semiconductor device according to a second embodiment of the present invention;
【図４】本発明の第２の実施の形態に係る半導体装置の
Ｂ−Ｂ'での断面図FIG. 4 is a cross-sectional view taken along line BB ′ of a semiconductor device according to a second embodiment of the present invention.
【図５】本発明の第３の実施の形態に係る半導体装置を
示す正面図FIG. 5 is a front view showing a semiconductor device according to a third embodiment of the present invention.
【図６】本発明の第３の実施の形態に係る半導体装置の
Ｃ−Ｃ'での断面図FIG. 6 is a cross-sectional view of the semiconductor device according to the third embodiment of the present invention, taken along line CC ′.
【図７】本発明の第４の実施の形態に係る半導体装置を
示す正面図FIG. 7 is a front view showing a semiconductor device according to a fourth embodiment of the present invention.
【図８】本発明の第４の実施の形態に係る半導体装置の
Ｄ−Ｄ'での断面図FIG. 8 is a sectional view taken along line DD ′ of a semiconductor device according to a fourth embodiment of the present invention.
【図９】本発明の第５の実施の形態に係る半導体装置を
示す正面図FIG. 9 is a front view showing a semiconductor device according to a fifth embodiment of the present invention.
【図１０】本発明の第６の実施の形態に係る半導体装置
を示す正面図FIG. 10 is a front view showing a semiconductor device according to a sixth embodiment of the present invention.
【図１１】本発明の第６の実施の形態に係る半導体装置
のＥ−Ｅ'での断面図FIG. 11 is a sectional view taken along line EE ′ of a semiconductor device according to a sixth embodiment of the present invention;
【図１２】従来の半導体装置を示す正面図FIG. 12 is a front view showing a conventional semiconductor device.
【図１３】従来の半導体装置のＦ−Ｆ'での断面図FIG. 13 is a sectional view taken along line FF ′ of a conventional semiconductor device.
１ ダイパッド ２ 放熱板 ３ インナーリード ４ アウターリード ５ ネジ止め穴 ６ 半導体素子 ７ 接合部材 ８ 電極 ９ 金属細線 １０ 封止樹脂 １１ 空冷板 １２、２２ スリット １３、２３ 応力緩衝部 １４ 凹凸部 DESCRIPTION OF SYMBOLS 1 Die pad 2 Heat sink 3 Inner lead 4 Outer lead 5 Screw hole 6 Semiconductor element 7 Joining member 8 Electrode 9 Fine metal wire 10 Sealing resin 11 Air cooling plate 12, 22 Slit 13, 23 Stress buffering part 14 Irregular part
Claims (9)
め穴を有する厚い金属板と、電気的接続を図るためのリ
ードが形成された薄い金属板の厚さの異なる金属板で構
成されたリードフレームと、リードフレームに搭載する
半導体素子と、半導体素子をリードフレームのダイパッ
ドに接合するための接合部材と、半導体素子上の電極部
とリードフレームのリード先端を接続する金属細線と、
前記構成部材を一体的に封止する封止樹脂を備えた半導
体装置。An end region is formed of a thick metal plate bent into an L shape and having a screw hole, and a thin metal plate having leads formed for electrical connection and having different thicknesses. A lead frame, a semiconductor element mounted on the lead frame, a bonding member for bonding the semiconductor element to a die pad of the lead frame, a thin metal wire connecting an electrode portion on the semiconductor element and a lead end of the lead frame,
A semiconductor device comprising a sealing resin for integrally sealing the constituent members.
の両側もしくは周辺にスリットを有することを特徴とす
る請求項１の半導体装置。2. The semiconductor device according to claim 1, wherein the screw holes formed in the thick metal plate have slits on both sides or around the screw holes.
は、上面側へ周辺より高い位置に押し上げられて形成す
ることを特徴とする請求項１の半導体装置。3. The semiconductor device according to claim 1, wherein the screw hole forming portion surrounded by the slit is formed by being pushed up to a position higher than the periphery to the upper surface side.
穴を中心として穴より直径の大きい円形突起を有するこ
とを特徴とする請求項１の半導体装置。4. A screw hole formed in a thick metal plate,
2. The semiconductor device according to claim 1, wherein the semiconductor device has a circular projection centered on the hole and having a diameter larger than that of the hole.
金属の折り曲げ部は、表面に凹凸加工を施すことを特徴
とする請求項１の半導体装置。5. The semiconductor device according to claim 1, wherein the bent portion of the thick metal, whose front end region is bent in an L-shape, is subjected to unevenness on the surface.
的接続を図るためのリードが形成された薄い金属板の厚
さの異なる金属板で構成されたリードフレームと、リー
ドフレームに搭載する半導体素子と、半導体素子をリー
ドフレームのダイパッドに接合するための接合部材と、
半導体素子上の電極部とリードフレームのリード先端を
接続する金属細線と、前記構成部材を一体的に封止する
封止樹脂を備えた半導体装置。6. A lead frame comprising a thick metal plate having screw holes, a thin metal plate having leads formed for electrical connection, and a metal plate having different thicknesses, and mounted on the lead frame. A semiconductor element, a joining member for joining the semiconductor element to a die pad of a lead frame,
A semiconductor device comprising: a thin metal wire for connecting an electrode portion on a semiconductor element to a lead end of a lead frame; and a sealing resin for integrally sealing the constituent members.
の両側もしくは周辺にスリットを有することを特徴とす
る請求項６の半導体装置。7. The semiconductor device according to claim 6, wherein the screw holes formed in the thick metal plate have slits on both sides or around the screw holes.
は、正面側へ周辺より高い位置に押し上げられて形成す
ることを特徴とする請求項６の半導体装置。8. The semiconductor device according to claim 6, wherein the screw hole forming portion surrounded by the slit is formed by being pushed up to a position higher than the periphery toward the front side.
穴を中心として穴より直径の大きい円形突起を有するこ
とを特徴とする請求項６の半導体装置。9. A screw hole formed in a thick metal plate,
7. The semiconductor device according to claim 6, further comprising a circular projection having a diameter larger than the hole with the hole as a center.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001108176A JP2002305280A (en) | 2001-04-06 | 2001-04-06 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2001108176A JP2002305280A (en) | 2001-04-06 | 2001-04-06 | Semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JP2002305280A true JP2002305280A (en) | 2002-10-18 |
Family
ID=18960368
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2001108176A Pending JP2002305280A (en) | 2001-04-06 | 2001-04-06 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2002305280A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007157801A (en) * | 2005-12-01 | 2007-06-21 | Matsushita Electric Ind Co Ltd | Semiconductor module and its manufacturing method |
| US10553523B2 (en) | 2015-11-20 | 2020-02-04 | Shindengen Electric Manufacturing Co., Ltd. | Semiconductor device |
-
2001
- 2001-04-06 JP JP2001108176A patent/JP2002305280A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2007157801A (en) * | 2005-12-01 | 2007-06-21 | Matsushita Electric Ind Co Ltd | Semiconductor module and its manufacturing method |
| US10553523B2 (en) | 2015-11-20 | 2020-02-04 | Shindengen Electric Manufacturing Co., Ltd. | Semiconductor device |
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