JP2002290448A - Address search machine, its method and storage medium for recording its procedure - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an address search machine with an IPv4 address search function which has a function capable of realizing an IPv6 address search as well. SOLUTION: The machine comprises a packet engine 12 for requesting an address search, a CAM(content addressable memory) 15 for registering object addresses for search, an SSRAM 16 for storing routing information and an SMC(search machine controller) 14 for controlling actions of the CAM 15 and the SSRAM 16. The machine is also provided with the IPv6 address search function which performs search by dividing addresses into high and low ranks in addition to the IPv4 address search function. By this, the conventional IPv4 address search machine can realize the IPv6 address search with no need to add special hardware.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an address search apparatus, a method and a recording medium on which the same procedure is recorded. For example, the present invention relates to an address search apparatus, a method and a procedure applied to an Ethernet (registered trademark) LAN. It relates to a recorded recording medium.

[0002]

2. Description of the Related Art Conventionally, an IPv6 (Internet Protocol Version 6) address search method using an IPv4 address search machine is one standard generally applied to a network communication protocol. These relationships and contents are described in literatures and the like. The part is posted below.

IP: "Network layer protocol used in the Internet. This is a core protocol of the TCP / IP protocol suite, and performs connectionless packet exchange. The current standard IP is version 4.
(IPv4). In IPv4, a packet handled by IP is called an IP datagram.
In Pv6), it is called an IP packet. (Digital Glossary / Nikkei BP; p. 131).

[0004] IPv6: "Next generation protocol replacing" IPv4 "which is the current standard Internet protocol. It has been designed to solve various problems in the current Internet address space (class B exhaustion, saturation of economic control information, 32-bit address exhaustion, etc.). The main changes from IPv4 are the dramatic expansion of the address space from 32 bits to 128 bits. Simplification of the header format. Scalability of high-speed functions such as path processing. Flexibility of flow label function and security function. ... etc. Since 1996, a worldwide network called "6Bone (IPv6 backbone)" for demonstration experiments has been constructed and all tests for migration have been performed. "
(Digital Glossary / Nikkei BP; page 134).

Ethernet LAN: "Bus LAN system developed by Xerox in the United States in 1973.
In 2010, Xerox, Intel, and Digital Equipment Corporation (currently Compaq Computer, Inc.)
Commercialized by the company. IEEE of IEEE 802 Committee
It is standardized as the E802.3 standard, and is the most widely used LAN system for personal computers and workstations at present. The wiring method includes a bus type, a star type, a daisy chain type, and the like, and a cable changes according to each transmission performance. ] (Digital Glossary /
Nikkei BP; page 310).

As described above, IPv4 is the mainstream of the current IP, but a transition to IPv6 is being studied due to the problem of address depletion in the future. However, at present, there is almost no problem even with IPv4 alone, and the reality is that the transition to IPv6 has not progressed much.

[0007] Example 1 of the prior application similar to the present invention in the technical field
Japanese Patent Laid-Open No. 10-257066 discloses a "network address search method". In the present invention application example 1,
An object of the present invention is to provide an address control table search method capable of simultaneously performing an address search and a search with a mask applied to an address, and speeding up the address search.

Japanese Patent Application Laid-Open No. 10-190744 of Invention Example 2 of the prior application
In the “information storage device” of Japanese Patent Application Laid-Open Publication No. H11-216, a plurality of CAM chips are used to efficiently store data having a data width equal to or greater than the data width supported by one CAM chip in the plurality of CAM chips.
The purpose is to make searches fast. For this purpose, a CAM that registers data in an associative storage memory in an entry area having a predetermined width set for each entry No. and specifies the data at the time of retrieval, thereby outputting an entry No. in which data matching the data exists. A plurality of chips are provided.

[0009]

However, as described above, in the prior art, the transition to IPv6 has not progressed so much. At present, there is no problem with only IPv4, but it is necessary to incorporate an IPv6 address search function in consideration of the future. is there.

An object of the present invention is to provide an address search device, a method and a recording medium on which the same method is recorded, having an IPv4 address search function and a function capable of realizing an IPv6 address search. I do.

[0011]

In order to achieve the above object, an address search apparatus according to the first aspect of the present invention provides a packet engine (Packet Eng) for issuing an address search request.
ine) and CAM (Cont.
ent Addressable Memory), an SSRAM for storing routing information, and an SMC (Search Machine Controller) for controlling the operation of the CAM and the SSRAM, and an IPv4 address search function and a search by dividing an address into upper and lower addresses. And an IPv6 address search function for executing

The CAM has an upper address CAM and a lower address CAM. When an IPv6 address search is requested, the CAM divides the address into upper 64 bits and lower 64 bits to obtain an IPv6 address. An address search may be performed.

Further, the SMC has a command register (Command) for receiving an IPv6 address search request.
Register) and a result register (Result Register) for storing search results.
And the upper address CAM, lower address CAM, and SSRAM may be connected by an address bus, a 64-bit data bus, and a dedicated control signal line.

According to a fifth aspect of the present invention, there is provided an address search method which receives an address search request from a packet engine, and sets an address to be searched as a C address.
Register to an AM (Content Addressable Memory), store routing information in SSRAM, CAM and SSRA
The operation of M is controlled by an SMC (Search Machine Controller), and an IPv4 address search function and an IPv6 address search function of dividing an address into upper and lower addresses and executing a search are characterized.

Further, the CAM is separated into an upper address CAM and a lower address CAM, and when an IPv6 address search is requested, this address is divided into upper 64 bits and lower 64 bits to perform an IPv6 address search. Then, the SMC may accept the IPv6 address search request and store the search result.

The recording medium on which the address search procedure according to the present invention is recorded is a packet engine (Packet E).
ngine) to receive an address search request, and CAM (Content Addressab)
le Memory) and routing information to SS
A step of storing in RAM and a step of controlling the operation of CAM and SSRAM by SMC (Search Machine Controller) constitute an IPv4 address search function, and divide an address into upper and lower order to execute an IPv6 address. It is characterized by having a search function.

Further, the CAM is separated into an upper address CAM and a lower address CAM, and when an IPv6 address search is requested, this address is divided into upper 64 bits and lower 64 bits to provide an IPv6 address search function. Should be configured.

[0018]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, an embodiment of an address search apparatus, a method and a recording medium according to the present invention will be described in detail with reference to the accompanying drawings. Referring to FIGS. 1 to 9, there is shown an embodiment of an address search apparatus, a method, and a recording medium on which the same procedure is recorded according to the present invention.

FIG. 1 shows a configuration example of an IP switch / router. As shown in FIG. 1, an IP switch / router (Switch / Rou
ter) 1 is a MAC / PHY (Media Access Control) that handles the physical layer.
rol / Physical Layer Entity) 13, a packet engine (Packet Engine) 12 for handling IP packets,
Address search for P-packet address search
A machine (Address Search Machine) 2 and a switching engine 1 for switching
And 1.

FIG. 2 is a block diagram showing a more detailed configuration example of the address search machine shown in FIG. FIG. 2 shows an address search machine 2 of FIG.
As shown in the figure, the search machine controller (Search
The machine controller 14 includes a command register (Command Register) for receiving a search request and a result register (Result Registe) for storing a search result.
r) and the upper address CAM (CAM forUpper Add
ress) 22, lower address CAM (CAM for Lower A)
ddress) 23, SSRAM (Synchronous SRAM) 24
Control.

Note that the search machine controller (Se
arch Machine Controller) 14 and upper address CAM
(CAM for Upper Address) 22 and lower address CA
M (CAM for Lower Address) 23 and SSRAM16
Are connected by an address bus (Address Bus), a 64-bit data bus (64 bits Data Bus), and a control signal (Control Signal) line.

FIG. 3 shows an example of an IPv6 address structure. The IPv6 address shown in FIG. 3 is 128 bits, and is configured by the following bit configuration unit. FP (Format Prefix); 3 bits, TLA ID (Top-Level Aggregation Identifier); 13 bits, RES (Reserved for future use); 8 bits, NLA ID (Next-Level Aggregation); 24 bits, SLA ID (Site-Level Aggregation); 16 bits, INTERFACE ID (Interface Identifier); 64 bits.

(Example of Operation of First Embodiment) An example of the operation of registering and searching for a 128-bit IPv6 address in the circuit of FIG. 2 will be described with reference to FIGS. 4 is a configuration example of the entries 1 to 3, FIG. 5 is a configuration example of the upper address CAM and the lower address CAM, and FIG.
2 shows an example of the configuration of an SRAM.

First, ASM (Address Search Machine)
e) It is assumed that no registration has yet been made in 2 and the CAM in ASM (Address Search Machine) 2
(Registered addresses in (Contents Addressable Memory)) are managed by a packet engine.

Next, registration of entry 1 (Entry-1), registration of entry 2 (Entry-2), and registration of entry 3 (Entry-3) will be described. AS for Entry 1 (Entry-1)
When registering in the M (Address Search Machine) 2, first, for the upper 64 bits, the upper address CAM (C
After performing a search within AM for Upper Address and confirming that it has not been registered, the lower address CAM (CAM for Upper Address) specified by the Packet Engine
The upper address “1111: 2222” is registered at the address 0x00 in the above.

For the lower 64 bits of entry 1 (Entry-1), a lower address CAM (CAM for Lower Add
ress), and after confirming the non-registration, the lower address C specified by the Packet Engine
The lower address "3333: 4444" is registered at address 0x00 in the AM (CAM for Lower Address).

Here, the routing information for the entry 1 (Entry-1) includes the upper address CAM (CAM for CAM
The registered address "0x00" of the upper address is the upper address, and the registered address "0x0" of the lower address CAM (CAM for Lower Address)
"0" is registered as "0x0000" corresponding to the address in the SSRAM as a lower order.

When registering entry 2 (Entry-2),
For the upper 64 bits, the upper address CAM (CAM
Executing a search within the for upper address will result in the address being registered at address 0x00.

For the lower 64 bits of entry 2 (Entry-2), a lower address CAM (CAM for Lower Add
ress), and after confirming the non-registration, the lower address C specified by the Packet Engine
A lower address "aaaa: bbbb" is registered at address 0x01 in an AM (CAM for Lower Address).

Here, the routing information for the entry 2 (Entry-2) includes the upper address CAM (CAM for CAM for
Upper Address) and lower address CAM (CAM for CAM for
SS corresponding to the address registered in Lower Address)
Register at address “0x0001” in RAM.

When registering entry 3 (Entry-3),
For the upper 64 bits, the upper address CAM (CAM
A search is performed within the upper address (for Upper Address), and after confirming that the packet has not been registered, the upper address “1111: ffff” is registered at the address 0x01 in the upper address CAM (CAM for Upper Address) specified by the packet engine (Packet Engine).

For the lower 64 bits of Entry-3, the lower address CAM (CAM for Lower Add
Executing the search in (ress) will result in registration at address 0x00.

Here, the routing information for the entry 3 (Entry-3) includes the upper address CAM (CAM for CAM for Entry 3).
Upper Address) and lower address CAM (CAM f
or Lower Address) SS corresponding to the address registered in
Register at address "0x0100" in RAM.

Regarding the search operation, Entry 2 (Entry-
The operation for searching 2) will be described. Entry 2 (E
ntry-2) IP address "1111: 2222: aaaa: bbbb" to SM
When set in the command register (Command Register) of C (Search Machine Controller), SMC (Sear
ch Machine Controller) first, the upper 64 bits, the upper address CAM (CAM for Upper Address)
Search within. Next, the lower 64 bits are searched in a lower address CAM (CAM for Lower Address).

From the address obtained by the search of the upper 64 bits and the lower 64 bits, entry 2 (Entry-2) is obtained.
SSRAM storing routing information for
Address 0x0001 in the SMC (Search Machine C
ontroller) in the Result Register. From the value set in the result register (Result Register), the routing information for the entry 2 (Entry-2) is read from the address 0x0001 in the SSRAM.

In FIG. 1, an IP switch / router (Sw
itch / Router) 1 to IP from Ethernet
When a v6 packet is input or output, a packet engine (Packet Engine) 12 uses an address search machine (Address Sequencing) to obtain routing information.
arch machine) 2 to make an address search request.

An address search machine (Address Sear)
The ch Machine 2 is based on a conventional search for a 32-bit IPv4 address and a 48-bit MAC (Media Access Control) address. For this reason, although the data bus has only 64 bits, the search key is divided into upper 64 bits and lower 64 bits as shown in FIG.
tent Addressable Memory), the conventional I
An IPv6 address search can be realized from a Pv4 address search machine without changing hardware.

The following effects are obtained in the above embodiment. The first effect is that the conventional IPv4 address search machine can be used without adding special hardware.
That is, a v6 address search can be realized.

A second effect is that bits are not wasted even when IPv6 is not used because the data bus width is determined mainly on the basis of IPv4 which is currently mainstream.

(Structure of Embodiment 2) Next, another embodiment 2 of the present invention will be described with reference to FIGS. IPv
In the address structure of No. 6, as shown in FIG. 3, the upper 64 bits have a hierarchical structure. Therefore, at the same level,
Lower 64 bits interface ID (INTERFACE ID)
The only difference is. When used in the same layer, as shown in FIGS. 8 and 9, the total number of IPv6 addresses can be increased by decreasing the number of upper 64 bits and increasing the number of lower 64 bits. Becomes

When 4K entries are possible with one CAM, the total number of CAMs does not change, only by changing the number of upper 64 bits and lower 64 bits. Therefore, it is only necessary to change the control method for the CAM, and it is not necessary to add special hardware.

The above embodiment is an example of a preferred embodiment of the present invention. However, it is not limited to this.
Various modifications can be made without departing from the spirit of the present invention.

[0043]

As is apparent from the above description, the address search apparatus, the method and the recording medium on which the procedure is recorded according to the present invention provide an IPv4 address search function and a search by dividing an address into upper and lower addresses. And an IPv6 address search function for executing Thus, according to the present invention, a 32-bit IPv4 address and a 48-bit M
In a search machine composed of a 64-bit data bus based on an AC address, a 128-bit IPv4
Searching for six addresses becomes possible.

[Brief description of the drawings]

FIG. 1 is a diagram showing an IP address applied to an embodiment of an address search device, a method, and a recording medium on which the same procedure is recorded according to the present invention.
FIG. 3 is a block diagram illustrating a configuration example of a switch / router.

[Fig. 2] Address search machine (Address Search M)
FIG. 3 is a block diagram showing a more detailed configuration example of (achine).

FIG. 3 is a diagram illustrating an example of an IPv6 address structure;

FIG. 4 is a diagram illustrating a configuration example of an entry applied to the first embodiment;

FIG. 5 is a diagram illustrating a configuration example of a CAM applied to the first embodiment;

FIG. 6 is a diagram illustrating a configuration example of an SSRAM applied to the first embodiment;

FIG. 7 is a diagram illustrating a configuration example of an entry applied to a second embodiment;

FIG. 8 is a diagram illustrating a configuration example of a CAM applied to a second embodiment;

FIG. 9 is a diagram illustrating a configuration example of an SSRAM applied to a second embodiment;

[Explanation of symbols]

1 IP switch / router (Switch / Router) 2 Address search machine (Address Search Machi)
ne) 11 Switching Engine 12 Packet Engine 13 MAC / PHY (Media Access Control / Physical Laye)
r Entity) 14 Search Machine Controller (Search Machine)
Controller) 16 SSRAM (Synchronous SRAM) 22 Upper address CAM (CAM for Upper Addres)
s) 23 Lower address CAM (CAM for Lower Addres
s)

Claims (9)

[Claims] 1. A packet engine for issuing an address search request, and a CAM (Content Adder) for registering an address to be searched.
ssable memory), SSRAM for storing routing information, and SMC for controlling the operation of the CAM and SSRAM
(Search Machine Controller), comprising: an IPv4 address search function; and an IPv6 address search function of dividing an address into upper and lower addresses and executing a search. . 2. The CAM comprises an upper address CAM and a lower address CAM. When an IPv6 address search is requested, the CAM divides the address into upper 64 bits and lower 64 bits. 2. The address search device according to claim 1, wherein an IPv6 address search is performed. 3. The SMC according to claim 1, wherein the command register receives a request for the IPv6 address search.
3. The address search device according to claim 1, further comprising a result register (Result Register) that stores a search result. 4. The SMC and the upper address CA
4. The device according to claim 2, wherein M, the lower address CAM, and the SSRAM are connected by an address bus, a 64-bit data bus, and a dedicated control signal line. Address search device. 5. A packet engine.
Address search request from CAM (Content Addressable M
emory), store the routing information in the SSRAM, and use the SMC (Search M
an IPv4 address search function controlled by an apparatus controller, and an IPv6 address search function of dividing an address into upper and lower addresses and executing a search. 6. The IPv6 address search is divided into an upper address CAM and a lower address CAM, and when an IPv6 address search is requested, the address is divided into upper 64 bits and lower 64 bits. 6. The address search method according to claim 5, further comprising: 7. The address search method according to claim 5, wherein the SMC accepts the IPv6 address search request and stores a result of the search. 8. A packet engine.
Receiving an address search request from a CAM (Content Addressable M
emory), a step of storing routing information in SSRAM, and an operation of the CAM and SSRAM by SMC (Search M
controlled by the machine controller).
An address search function is configured, and an address is divided into upper and lower addresses to execute a search.
A recording medium recording an address search procedure, wherein the recording medium has a Pv6 address search function. 9. The method according to claim 9, wherein the CAM is classified into an upper address CAM and a lower address CAM, and when an IPv6 address search is requested, the address is divided into upper 64 bits and lower 64 bits, and the IPv6 address search is performed. 9. The recording medium according to claim 8, wherein said recording medium has a function.