WO2022135274A1

WO2022135274A1 - Chip implementation method for routing extension, and chip processing method and apparatus for data packet

Info

Publication number: WO2022135274A1
Application number: PCT/CN2021/138907
Authority: WO
Inventors: 成伟; 王俊杰
Original assignee: 苏州盛科通信股份有限公司
Priority date: 2020-12-22
Filing date: 2021-12-16
Publication date: 2022-06-30
Also published as: CN112714067A; CN112714067B

Abstract

Disclosed are a chip implementation method for routing extension, and a chip processing method and apparatus for a data packet. The chip implementation method comprises: adding a bridging forwarding enable field in a routing lookup result, wherein the bridging forwarding enable field is used for controlling whether a data packet enables the lookup of an FDB forwarding table entry. In the embodiments of the present invention, bridging FDB forwarding table entry lookup is enabled by means of routing expansion technology, such that the problem of a VXLAN domain breakout gateway providing a virtual machine access to both an external network and a private network server is solved, and the consumption of a Default PBR table entry is also avoided.

Description

A chip implementation method for routing expansion, and a chip processing method and device for data packets

The present invention requires the priority of the Chinese patent application filed with the Chinese Patent Office on December 22, 2020, the application number is 2020115258666, and the invention title is "a chip implementation method for routing expansion, a chip processing method and device for data packets", Its entire contents are incorporated herein by reference.

technical field

The invention relates to a routing expansion technology, in particular to a chip implementation method for routing expansion, a chip processing method and device for data packets.

Background technique

The traditional routing technology is based on the destination IP address (ie IPDA) to forward, but if it is through the destination IPDA address, for the different network segment IP (Internet Protocol, the network between the VXLAN (Virtuale Xtensible Local Area Network, virtual extended local area network) network). (interconnecting protocol) servers expect to access the same public address (such as 8.8.8.8 or www.163.com). Therefore, in a VXLAN domain, edge devices need to be able to access the external network, but there are a large number of routing entries on the public network, and ordinary switch devices cannot carry hundreds of thousands of routing entries. The key function of the VXLAN border network device is to map the data streams sent by virtual machines on different network segments in the VXLAN domain, corresponding to different VNIs (VXLAN Instances, virtual extended LAN instances) to different VLANs (Virtual Local Area Network, virtual LAN) up. Based on the destination IP of the data packet, the border network device cannot distinguish between the two data streams and perform different forwarding behaviors (for example, adding different VLANs to the data streams sent by servers in different network segments, and forwarding from different egress ports, etc.) .

To solve this problem, the traditional solution for accessing the public network in a VXLAN domain is to deliver a default policy route on the border network device to match the data traffic accessing the public network. Since the priority of Default PBR (Default Policy Based Routing) policy matching is higher than the default route, but lower than the non-default route (that is, the detailed route), the data flow accessing the public network will first match the default route. It will also match the Default PBR and generate different forwarding behaviors based on the source IP address of the data stream (ie IPSA).

As shown in Figure 1, the internal server IP-A of the data center accesses the public network IP-B and the private network server IP-C, and sends the Default PBR entry matching the source IP-A on the gateway device, and the PBR (Policy Based on Routing, the policy-based routing) table entry matching result is to perform the operation of accessing the public network IP-B. A routing table entry matching the destination IP-C is issued on the gateway device, and the matching result of the routing table entry is to perform an operation of accessing the private network IP-C. When the IP-A server sends out two data streams: one is the source IP of the data packet from IP-A to IP-B is IP-A, the destination IP is IP-B, and the other is the data from IP-A to IP-C The source IP of the packet is IP-A, and the destination IP is IP-C. The Key (keyword) sent on the gateway device is the Default PBR entry of IP-A (compared to the PBR policy route, the data flow matching the Default PBR has a lower priority, but higher than the traditional default route, the priority is from high to The lowest order is: PBR>Detailed Routing>Default PBR>Default Routing), therefore, the default PBR entry delivered in the traditional scheme will only match the data packets from server IP-A to public network IP-B, and will not match IP- The data packets from A to IP-C can meet the different requirements of the egress gateway device to provide internal access to the private network server and external access to the public network server.

However, the default PBR default policy routing has a small size of entries in the switch forwarding chip, and even occupies the specifications of the ACL (Access Control List, access control list) TCAM (Ternary Content Addressable Memory, tri-state content addressable memory). Moreover, some switches with weaker functions do not even support the Default PBR function, resulting in a limited scope of application of the Default PBR solution in deployment.

SUMMARY OF THE INVENTION

The purpose of the embodiments of the present invention is to overcome the defects of the prior art, and to provide a chip implementation method for routing expansion, and a chip processing method and device for data packets.

In order to achieve the above object, the embodiment of the present invention proposes the following technical solution: a chip implementation method for route expansion, comprising: adding a bridge forwarding enable field in a route search result, where the bridge forwarding enable field is used to control data packets Whether to enable FDB (Forwarding Data Base, forwarding database) forwarding table entry lookup.

The present invention also proposes another technical solution: a chip processing method for data packets based on a chip implementation method for routing expansion, comprising:

S200, the chip performs a route search on the received data packet, performs corresponding processing on the packet according to the search result, and obtains a bridge forwarding enable field from the search result;

S300, the chip judges whether to search the FDB forwarding table entry for the matched data packet according to the bridge forwarding enable field, if found, the information in the data packet is formed into a search key and the FDB forwarding table entry is searched, if If there is a match, the FDB forwarding next hop processing is performed.

Preferably, before step S200, the method further includes:

S100, the chip parses the received data packet, and obtains packet matching information by parsing, where the packet matching information at least includes a source IP address, a destination IP address, a destination MAC (Media Access Control, media access control layer) address, VLAN information or VNI information.

Preferably, the S200 includes:

S201: Use the destination IP address of the data packet as a route search key, and perform a route search. If the search result matches the detailed route, execute the forwarding next hop processing of the detailed route, and if the search result matches the default route, enter S202;

S202, perform the forwarding next hop processing of the default route on the data packet, and carry the bridge forwarding enable field in the route search result to step S300 for processing.

Preferably, in step S300, if the value of the bridge forwarding enable field is 1, it means that the data packet needs to perform the search of the FDB forwarding entry; if the value of the bridge forwarding enable field is 0, it means that the data packet does not execute the search. Lookup of FDB forwarding table entries.

Preferably, in step S300, if it is determined according to the bridging forwarding enable field that it is necessary to search the FDB forwarding entry for the data message, then a search keyword is formed according to the destination MAC address and VLAN information or VNI information of the message, and Find FDB forwarding entries.

Preferably, the method further includes:

S400, the chip performs a default policy routing lookup on the data packet, and if there is a match, performs forwarding next hop processing on the packet according to the policy routing lookup result.

Preferably, if there is no match between the FDB forwarding entry lookup and the default policy route lookup, the packet is forwarded to the next hop according to the default route lookup result; if the FDB forwarding entry lookup matches or does not match, and the default policy route lookup If there is a match, the packet is forwarded to the next hop based on the default policy routing result.

The present invention also proposes another technical solution: a chip processing device for data packets, comprising:

The route lookup module is used to perform route lookup on the received data message, perform corresponding processing on the message according to the lookup result, and obtain the bridge forwarding enable field from the lookup result;

The FDB table entry search module is configured to judge whether to search the FDB forwarding table entry for the matched data packet according to the bridge forwarding enable field, and if so, form the information in the data packet into a search keyword and search for the FDB Forwarding entry, if it matches, execute FDB forwarding next hop processing.

Preferably, the device further comprises:

The default policy route lookup module is used to perform a default policy route lookup on the data packet after the FDB entry lookup module finds no match. If it matches, the packet is forwarded to the next hop based on the policy route lookup result.

Preferably, the device further comprises:

The packet parsing module is used for parsing the received data packet, and parsing to obtain packet matching information, where the packet matching information at least includes source IP address, destination IP address, destination MAC address, VLAN information or VNI information.

The beneficial effects of the embodiments of the present invention are:

1. In this embodiment of the present invention, by multiplexing the traditional routing technology, a control field for searching the Layer 2 bridging and forwarding entry is added to the search result of the routing and forwarding entry, so as to control whether the message of the routing entry in the matching is enabled or not. Layer bridging FDB forwarding entry search can greatly simplify the chip design and switch software implementation of this routing expansion technology, reduce the impact of software and hardware upgrades on existing network equipment, and reduce the difficulty of deployment.

2. The embodiment of the present invention not only solves the problem that the VXLAN domain egress gateway simultaneously provides the virtual machine to access the external network and the private network server, but also avoids the consumption of the Default PBR entry by the traditional solution, and reduces the pressure on the device entry and capability, The difficulty of system and chip design is improved, which is beneficial to actual deployment.

Description of drawings

Fig. 1 is a schematic diagram of the principle of access between an existing public network server and a private network server;

2 is a schematic diagram of the principle of access between a public network server and a private network server according to an embodiment of the present invention;

FIG. 3 and FIG. 4 are schematic flowcharts of a chip processing method for a data packet according to an embodiment of the present invention;

FIG. 5 is a structural block diagram of a chip processing apparatus for a data packet according to an embodiment of the present invention.

Detailed ways

The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention.

A chip implementation method for routing expansion, and a chip processing method and device for data packets disclosed in the embodiments of the present invention enable bridging FDB forwarding table entry lookup through routing expansion technology, instead of using traditional default policy routing (Default Policy Routing). PBR) technology to meet the needs of egress gateways, one is to solve the problem that the VXLAN domain egress gateway provides virtual machines to access the external network and private network servers at the same time, and the other is to avoid the consumption of Default PBR entries by traditional solutions and reduce the device list. It increases the difficulty of system and chip design, reduces the difficulty of actual deployment and reduces the difficulty of operation and maintenance.

With reference to FIGS. 2 to 4 , a chip implementation method for route expansion disclosed in an embodiment of the present invention is expanded based on a route forwarding technology, focusing on extending support for unicast routing and default routing respectively. The applications of the solutions in the embodiments of the present invention are mainly oriented to scenarios such as data centers and enterprise networks. In these scenarios, there are few applications of multicast routing. Therefore, it focuses on extending support for unicast routing and multicast routing.

Specifically, a control switch for searching the Layer 2 bridging and forwarding entry is added to the search result of the unicast routing and forwarding entry. In this embodiment, the bridge-forwarding enable field (such as Represented as forcebridge field), which is used to control whether the data packet of the routing table entry in the match is enabled to find the Layer 2 (L2) bridging FDB forwarding table entry. Forwarding processing is performed at the forwarding next hop; if the search result of the FDB forwarding table entry is a miss, forwarding processing is performed according to the forwarding next hop searched by the routing table entry.

Considering that in the actual deployed VXLAN network, the network segments corresponding to server IP-A and IP-B will be assigned to different VNI domains, and each network segment will be assigned a virtual gateway for routing and forwarding processing, and each network segment will be assigned a corresponding virtual gateway for routing and forwarding processing. The MAC address of each virtual gateway is unique. In this embodiment, if the bridge forwarding enable field is 1, according to the destination MAC address (MACDA) and FID (a Layer 2 bridge forwarding instance, which can be mapped by VLAN, VXLAN VNI), in the VLAN forwarding scenario, the FID is used as the Mapping value, in the VXLAN forwarding scenario, the FID is used as the mapping value of the VNI; therefore, if it is a VLAN network, the key (Key) is searched according to the MACDA and VLAN group and the FDB table entry is searched; if it is a VXLAN network, it will be based on the VXLAN network. MACDA and virtual extended local area network instance (VNI) group key of layer packets and look up FDB forwarding entries, and forward according to the search results of FDB forwarding entries, perform a variety of forwarding behaviors, such as forwarding from the corresponding egress port, inserting different VLAN and other behaviors.

This solution does not need to redesign the chip function module separately, but only needs to add the forcebridge field to the original unicast routing search result, which can greatly simplify the chip design and switch software implementation of this routing expansion technology, reducing the need for existing network equipment. The impact of software and hardware upgrades will reduce the difficulty of deployment.

Deploying the above routing expansion technology on the data center egress gateway device can satisfy the normal access between the private network server and the public network server.

As shown in Figure 2, the internal server IP-A of the data center accesses the public network server IP-B and the private network server IP-C, and sends an FDB forwarding entry enabling the default route bridging forwarding lookup on the gateway device. The matching result of the FDB forwarding table entry is to perform the operation of accessing the public network IP-B. A routing table entry matching the destination IP-C is issued on the gateway device, and the matching result of the routing table entry is to perform an operation of accessing the private network IP-C. When the IP-A server sends out two data streams: one is the source IP of the data packet from IP-A to IP-B is IP-A, the destination IP is IP-B, and the other is the data from IP-A to IP-C The source IP of the packet is IP-A, and the destination IP is IP-C.

On the egress gateway device, data packets from server IP-A to server IP-B can only match FDB forwarding entries, and data packets from server IP-A to server IP-C can only match routing entries. Normal access between IP-A and private network server IP-C and between server IP-A and public network server IP-B.

In this embodiment of the present invention, the route expansion technology is used to enable the bridging FDB forwarding table entry search. First, the mature and perfect traditional Layer 2 forwarding technology is reused. Second, the size of the FDB table entry is larger than that of the Default PBR, which puts less pressure on equipment costs. . Therefore, the embodiment of the present invention not only solves the problem that the VXLAN domain egress gateway simultaneously provides the virtual machine to access the external network and the private network server, but also avoids the consumption of the Default PBR entry by the traditional solution, and reduces the pressure on the device entry and capability, The difficulty of system and chip design is improved, which is beneficial to actual deployment.

As shown in Figure 3 and Figure 4, the specific processing method of the data packet by the network chip designed based on the above routing expansion technology, the key is to add a judgment on whether the forcebridge field is enabled in the chip pipeline, that is, whether the forcebridge field is 1. It is judged that if the forcebridge field in the forwarding information carried by the packet is 1, it means that the FDB entry lookup process needs to be performed on the packet.

The specific processing process of the data packet by the network chip disclosed in the embodiment of the present invention includes the following steps:

S100, the chip parses the received data packet, and obtains packet matching information by parsing.

Specifically, when the chip receives a data packet, it first performs packet parsing processing on the data packet, and parses to obtain packet matching information. The packet matching information includes source MAC address (MACSA), destination MAC address (MACDA), and source IP address. , destination IP address, L4 source port number, L4 destination port number, VLAN or VNI (if it is a VXLAN network, the VNI is obtained by parsing, and if it is a VLAN network, the VLAN ID is obtained by parsing) and other information, and the packet matching information obtained by parsing is carried into the subsequent processing flow.

S200, the chip performs a route search on the received data packet, performs corresponding processing on the packet according to the search result, and obtains a bridge forwarding enable field from the search result.

Specifically, the chip uses the parsed destination IP address as a route search key to search for a route forwarding entry. If the result of the search matches the detailed route, the forwarding next hop processing of the detailed route is performed, and the subsequent default route, FDB forwarding entry, Default PBR entry, etc. are not matched; if the detailed route does not match, the default route is continued. When the route is matched, if the result of the search is to hit the default route, the forwarding next hop processing of the default route is performed, and the forcebridge field in the route search result is sent to step S300.

S300, the chip judges whether to search the FDB forwarding table entry for the matched data packet according to the bridge forwarding enable field. If the search is made, the information in the data packet is formed into a search keyword and searches for the FDB forwarding table entry. Then perform FDB forwarding next hop processing.

Specifically, in this embodiment, when the forcebridge field is 1, a search keyword is formed according to the destination MAC address and information such as VLAN (VLAN network) or VNI (VXLAN network), and the FDB forwarding entry is searched. If the result of the search is a hit, the FDB forwarding next hop processing is performed. In addition, if the chip supports the default policy routing search and matching function, after the FDB forwarding table entry is searched for matching, regardless of whether the matching result is a hit or a miss, the process continues to step S400; if the chip does not support the default policy routing search and matching function, the direct Executes FDB forwarding next-hop processing, that is, does not perform subsequent processes such as default policy routing search and matching.

S400 , the chip performs a policy routing lookup on the data packet, and if there is a match, performs forwarding next hop processing on the packet according to the policy routing lookup result.

Specifically, the chip performs a default policy routing lookup on the data packet. If it matches, because the default policy routing lookup has the highest matching priority, the packet is forwarded to the next hop according to the policy routing lookup result. If it does not match and the FDB forwarding table entry search in step S300 does not match, the packet is forwarded to the next hop according to the default route search result. If there is no match and the FDB forwarding table entry search in step S300 matches, the packet is forwarded to the next hop according to the FDB forwarding table entry search result.

That is, in the above search and matching, if the detailed route is matched, the next hop processing is directly forwarded according to the detailed route; if the detailed route does not match, the default route matches or does not match, and the FDB forwarding table entry matches or does not match and Default PBR table If there is no match between the detailed route and the Default PBR entry, the default route matches or does not match, and the FDB forwarding entry matches, and the FDB forwarding entry is preferred for forwarding. Next-hop processing; if the detailed route and the Default PBR entry do not match, the default route matches, and the FDB forwarding entry does not match, the next-hop processing is forwarded according to the default route. That is to say, the relationship between the detailed route, Default PBR, FDB forwarding entry and the matching priority of the default route is: the default route search priority of the route search < the search priority of the default policy route < the lookup of the FDB forwarding entry Priority＜Detailed route lookup priority of route lookup.

Corresponding to the above-mentioned chip processing method for data packets, as shown in FIG. 5 , a chip processing apparatus for data packets disclosed in an embodiment of the present invention includes:

The packet parsing module is used to parse the received data packet, and obtain packet matching information through parsing.

The route lookup module is used to perform route lookup on the received data message, perform corresponding processing on the message according to the lookup result, and obtain the bridge forwarding enable field from the lookup result.

If the chip supports the default policy routing function, the chip processing apparatus for a data packet disclosed in the embodiment of the present invention further includes:

The specific principles of the packet parsing module, the route search module, the default policy route matching module, and the policy route matching module can be referred to the descriptions of the above steps S100 to S400, which are not repeated here.

The technical content and technical features of the present invention have been disclosed as above. However, those skilled in the art may still make various replacements and modifications based on the teaching and disclosure of the present invention without departing from the spirit of the present invention. Therefore, the protection scope of the present invention should not be limited to The contents disclosed in the embodiments should include various substitutions and modifications without departing from the present invention, and are covered by the claims of this patent application.

Claims

A chip implementation method for route expansion, the chip implementation method comprising: adding a bridging forwarding enable field in a route search result, the bridging forwarding enable field is used to control whether a data message is enabled to search for an FDB forwarding entry .
A chip processing method for data packets based on the chip implementation method for routing expansion according to claim 1, wherein the chip processing method comprises:

S200, the chip performs a route search on the received data packet, performs corresponding processing on the packet according to the search result, and obtains a bridge forwarding enable field from the search result;

S300, the chip judges whether to search the FDB forwarding table entry for the matched data packet according to the bridge forwarding enable field, if found, the information in the data packet is formed into a search key and the FDB forwarding table entry is searched, if If there is a match, the FDB forwarding next hop processing is performed.
The chip processing method for data packets according to claim 2, wherein, before step S200, the method further comprises:

S100, the chip parses the received data packet, and obtains packet matching information by parsing, where the packet matching information at least includes source IP address, destination IP address, destination MAC address, VLAN information or VNI information.
The chip processing method for data packets according to claim 2 or 3, wherein the S200 comprises:

S201: Use the destination IP address of the data packet as a route search key, and perform a route search. If the search result matches the detailed route, execute the forwarding next hop processing of the detailed route, and if the search result matches the default route, enter S202;

S202, perform the forwarding next hop processing of the default route on the data packet, and carry the bridge forwarding enable field in the route search result to step S300 for processing.
The chip processing method for a data packet according to claim 2, wherein, in step S300, if the value of the bridge forwarding enable field is 1, it means that the data packet needs to be searched for an FDB forwarding entry. If the value of the Enable field is 0, it means that the data packet does not perform the lookup of the FDB forwarding table entry.
The chip processing method for a data packet according to claim 2 or 5, wherein, in step S300, if it is determined according to the bridge forwarding enable field that the data packet needs to be searched for an FDB forwarding entry, the The destination MAC address and VLAN information or VNI information form a search keyword, and search the FDB forwarding table entry.
The chip processing method for data packets according to claim 2, wherein the method further comprises:

S400, the chip performs a default policy routing lookup on the data packet, and if there is a match, performs forwarding next hop processing on the packet according to the policy routing lookup result.
The chip processing method for data packets according to claim 7, wherein, if the FDB forwarding table entry search and the default policy routing search do not match, the packet is forwarded to the next hop according to the default route search result; If the forwarding table entry matches or does not match, and the default policy route search matches, the packet is forwarded to the next hop based on the default policy route search result.
A chip processing device for a data message, the device comprising:

The route lookup module is configured to perform route lookup on the received data message, process the message accordingly according to the lookup result, and obtain the bridge forwarding enable field from the lookup result;

The FDB table entry search module is configured to judge whether to perform the search of the FDB forwarding table entry for the matched data packet according to the bridge forwarding enable field; If the FDB forwarding entry matches, the FDB forwarding next hop processing is performed.
The apparatus for processing data messages according to claim 9, wherein the apparatus further comprises:

The default policy routing lookup module is set to perform a default policy routing lookup on the data packet after the FDB entry lookup module finds no match. If it matches, the packet is forwarded to the next hop based on the policy routing lookup result.