JP2002287709A - Liquid crystal display device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a liquid crystal display device capable of processing or displaying picture data with the number of colors suitable for a liquid crystal driving circuit or a capability of a liquid crystal panel independently of the number of colors of the picture data transferred from a host. SOLUTION: In the liquid crystal driving circuit composing a liquid crystal display, high quality display is realized by arranging a dither processing circuit for performing optimal color subtraction processing of picture data having more gradation information than the colors displayable by a liquid crystal display at the preceding stage of display memory or an error diffusing circuit, and thereby distributing gradation components (brightness components) composed of lower order bits to adjacent pixels.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device capable of displaying a color number different from the color number of input image data, and more particularly to a liquid crystal display device suitable for a portable telephone or a portable information terminal. About.

[0002]

2. Description of the Related Art Japanese Patent Laid-Open No. 11-31980 discloses an example of a conventional liquid crystal display for a portable telephone. Here, a display system of a liquid crystal display for a mobile phone will be described below.

[0003] Image data transmitted from a host, which is a transmission source, is received by a receiving unit in a mobile phone. The received image data is red (hereinafter, referred to as R) and green (hereinafter, referred to as R) by an MPU (microprocessor unit) in the mobile phone.
Call it G. ), Blue (hereinafter, referred to as B). The MPU outputs to the liquid crystal display only the number of colors that can be displayed on the liquid crystal display, which is a display device, of the display data, and temporarily stores the data in a display memory provided in a liquid crystal driving circuit of the liquid crystal display. Here, as an example, when the number of display colors of the liquid crystal display is 4096 colors of 16 gradations of R, G, and B, MP
The display data output from the U to the liquid crystal display is R,
G and B become 4 bits each, that is, 12-bit data in total. Then, in the liquid crystal driving circuit, in order to display the display data temporarily stored in the display memory as an image on the liquid crystal panel, the display data is converted into a corresponding gray scale voltage and a corresponding gray scale voltage waveform. Output. This makes it possible to display the display data transferred from the MPU to the liquid crystal display as an image on the liquid crystal panel.

[0004]

As described above, the MPU transfers display data of the number of colors that can be displayed on the liquid crystal display to the liquid crystal display, and the liquid crystal drive circuit of the liquid crystal display transmits the display data to the liquid crystal display. The operation of writing to the display memory was performed.

Accordingly, when image data composed of more colors than the displayable color of the liquid crystal display is transmitted from the host, the MPU uses the lower bi of the image data.
The display data is converted into display data that has been subjected to a color reduction (simple color reduction) process in which t is truncated, the display data subjected to the color reduction processing is transferred to a liquid crystal display, and the data is written into a display memory in a liquid crystal drive circuit.

However, when display data subjected to this color reduction (simple color reduction) processing is displayed on a liquid crystal display, the displayed image loses the gradation component (luminance component) constituted by the lower bits. Therefore, the gradation difference clearly appears as a contour line, and the image quality is extremely deteriorated.

An object of the present invention is to provide a liquid crystal display capable of processing or representing image data with the number of colors suitable for the capability of a liquid crystal driving circuit or a liquid crystal panel without depending on the number of colors of image data transferred from a host. It is to provide a device.

[0008]

SUMMARY OF THE INVENTION The present invention provides a liquid crystal driving circuit for driving a liquid crystal display, which is provided with means for performing optimal color reduction processing suitable for the number of display colors of the liquid crystal display. While reducing the load and enabling high-speed processing, the image displayed on the liquid crystal display is pseudo-multicolored to realize high-quality display.

[0009] Further, even when image data subjected to optimal color reduction processing is transmitted from the host, whether the image has been subjected to color reduction processing by the MPU in the mobile phone or not.
By providing a means for determining whether or not this is the case, the above-described optimal color reduction processing function in the liquid crystal drive circuit is enabled,
Since it is possible to switch whether to invalidate, it becomes easy to deal with image data of various colors transferred from the host to the MPU.

[0010]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The construction of a liquid crystal display device for a portable telephone according to a first embodiment of the present invention will be described with reference to FIGS.
This will be described with reference to FIG.

FIG. 1 is a block diagram of a liquid crystal display device for a portable telephone according to the present invention. Reference numeral 101 denotes a host as a transmission source of various display data; 102, various image data transmitted from the host 101; Is a mobile phone.
Here, in the mobile phone 103, a receiving unit 104 receives various image data 102, and an MPU 105 performs various processes and controls for displaying the various image data received by the receiving unit 104 on the liquid crystal display. A liquid crystal panel serving as a display unit; and 107, a liquid crystal driving circuit. Here, the liquid crystal panel 106 and the liquid crystal driving circuit 107 are collectively referred to as a liquid crystal display. In the MPU 105, a color reduction processing ON / OFF determination unit 108 determines whether or not to perform the color reduction processing.

Next, in the liquid crystal drive circuit 107, 1
Reference numeral 09 denotes a system interface for exchanging display data and control data with the MPU 105.
0 is a control register for controlling the operation of each block in the liquid crystal drive circuit 107, 111 is a color reduction processing unit, and 1
Reference numeral 12 denotes a display memory for temporarily storing display data, 113 denotes a display memory address generation circuit for generating an address of the display memory 112, and 114 denotes a basic clock used in the liquid crystal drive circuit 107. A clock generation unit 115;
Is a timing generation circuit that generates various control timing signals from a clock (hereinafter, also referred to as CLK) generated by the control unit. A liquid crystal voltage 116 generates a power supply voltage for driving a liquid crystal display from a system power supply such as a battery. A generation circuit 117 is a scanning line driving circuit that scans a scanning line (not shown) of the liquid crystal panel 106, and 118 is a gradation voltage corresponding to display data on a signal line (not shown) of the liquid crystal panel 105. Is a signal line driving circuit that outputs the signal. In the present embodiment, the operation of the present invention proceeds on the assumption that the liquid crystal panel 106 uses an active matrix type liquid crystal panel having a switching element in a pixel portion.

Next, the operation of the mobile phone liquid crystal display shown in FIG. 1 will be described in detail.

Various image data 102 transmitted from the host 101 is received by the receiving unit 104 in the mobile phone 103. Here, the various image data 102 includes the number of colors per pixel of the image data.

Various image data 1 received by the receiving unit 104
02 is converted into digital display data by the MPU 106 in the mobile phone 103. At the same time, the above-described color number information per pixel is received, and the color reduction processing ON / OFF determination unit 108 determines whether the color number information of the display data is greater than the display color number of the liquid crystal display. Determine.

The display data digitized in the MPU 106 and the color-reduction processing ON / OFF discrimination information, and further, the voltage setting for driving the liquid crystal panel 106 by the liquid crystal driving circuit 107 of the liquid crystal display and the setting of the display area are performed. Various operation control data is transmitted to the system interface 109 in the liquid crystal drive circuit 107.

The data transmission between the MPU 106 and the system interface 109 will be described with reference to FIGS.
This will be described in detail with reference to FIG. FIG. 2 shows the system interface 10 in the MPU 106 and the liquid crystal drive circuit 107.
9, a control register 110, and a color reduction processing section 111. FIG. 3 is a timing chart of data transmission between the MPU 106 and the system interface 109.

Here, between the MPU 106 and the system interface 109, for example, a 68-system
A bit (CS) (chip select) signal indicating chip selection, an RS (Register Select) signal for selecting whether to specify an address or data of the control register 110, conforming to a bit bus interface.
t) signal, E (Enable) for instructing activation of processing operation
e) R / for selecting writing or reading of signals and data
W (Read / Write) signal, control register 110
16bi which is the actual set value of the address or data of
It is composed of t Data signals. With these control signals, the above-described display data, color reduction ON / OFF discrimination information, and various operation control data are allocated to each address of the control register 110, and each assigned address is written or written in the register of the control register 110. Perform a read operation.

In the data output from the control register 110, display data is transferred to the color reduction processing section 111, and other various operation control data is transferred to the liquid crystal driving circuit 107.
Is transferred to each block.

Next, the operation of each control signal between the MPU 106 and the interface 109 will be described with reference to FIG.

First, the CS signal is set to "low" to make the control register 110 accessible. When the RS signal is “low”, it means an address designation period, and when the RS signal is “high”, it means a data designation period. Here, when performing a write operation to the control register 110, the R / W signal is set to “low”, a predetermined address value is set to the Data signal in the previous addressing period, and the data is written to the register of the address in the data specifying period. Data (display data, color reduction ON / OFF discrimination information, various operation control data, and the like described above) are set. After the setting, the data is written to the control register 110 by setting the E signal to “high” for a certain period.

When reading the data set in the control register 110, the CS and RS signals are set as described above, the R / W signal is set to "high", and a predetermined address is set in the address period. Similarly to the above, by setting the E signal to “high” for a certain period after setting, data written in the register during the data designation period is read.

Next, display data output from the control register 110 will be described with reference to FIGS. FIG. 4 is an example of display data output from the MPU 105.
The data bus width of the MPU 105 is 16 bits, and R,
Each of G and B has a configuration of 5 bits, 6 bits, and 5 bits, and the number of display colors is about 65,000. This is set as display data for one pixel (one dot). Also, the number of colors that can be displayed on the liquid crystal display was assumed to be 4096 colors. FIG. 5 is a diagram for explaining the flow of display data from the control register 111 to the display memory 112.

The MPU 105 has one pixel data of more than 4096 colors which can be displayed on the liquid crystal display.
The bit display data is transferred to the liquid crystal drive circuit 107. At this time, the color reduction processing ON / OFF determination unit 108
In this case, the display data of 4096 or more colors that can be displayed on the liquid crystal display is transferred to the liquid crystal display, so that the color reduction processing ON information is transferred to the liquid crystal display. Based on the color reduction processing ON information, the control register 110
Output data of R, G, B are each 5 bits, 6 bi
t, 5 bits, but the R, G,
B The color is reduced to 4-bit display data, and the display memory 11
2 will be written. The number of bits after the color reduction is determined by the capacity (capacity) of the display memory. The number of bits after color reduction is preferably set in the color reduction processing unit 111 by a user or a manufacturer.

Therefore, by devising the color reduction processing unit 111, it is not necessary to receive the display data in which the lower bit information is reduced from the MPU 105. Therefore, extreme image quality deterioration is suppressed, and the optimal color reduction processing is performed by the color reduction processing unit 111. Can be performed, and a high-quality display can be realized by pseudo-multicoloring. Further, according to the present invention, by performing the color reduction processing of the display data before writing to the display memory 112, the capacity of the display memory 112 can be suppressed to a small scale, and the miniaturization and the cost reduction can be realized.

Next, a dither processing method having a small circuit scale will be described as an example of the color reduction processing means of the above-described color reduction processing section, and will be described with reference to FIGS.

FIG. 6 shows a dither pattern for performing dither processing. Here, as an example, a dither pattern composed of 2 × 2 dots is shown. The values in the figure are binary display, and 2 bits (00, 01, 1) are assigned to one pixel (one dot).
0, 11). This 2 × 2 dot (4
As shown in FIG. 7, a dither pattern of (pixel) is allocated to the entire liquid crystal panel 106. In this way, a dither pattern is allocated to each dot of the liquid crystal panel 106, and a 2-bit dither pattern value is added to the lower bits of the display data at each dot. Then, by reducing the display data to a desired number of bits, that is, by cutting off lower bits, a pseudo multi-color effect can be obtained.

Here, the effect will be described in detail with reference to FIGS.

Each of the images A to E in FIG.
5 shows an example of a display image composed of t data. Here, in order to convert the 6-bit data of FIG. 8 into 4-bit data, the lower 2 bits of the 6-bit data are truncated, and the display images from image A to image E when simple color reduction is performed are shown in FIG. When simple color reduction is performed as shown in FIG.
8 is discarded. In FIG. 8, the image A to the image E, which is displayed in five gradations, is changed from the image A to the image D.
Becomes the same data (same gradation), and only the two gradations with the image E can be displayed.

FIG. 10 shows display images A to E when the dither processing is performed on the 6-bit data shown in FIG. 8 and the color is reduced to 4 bits. As shown in FIG. 10, in image B, image C, and image D, the lower two bits
Then, after adding a 2-bit dither pattern assigned to each dot, the lower 2 bits are deleted. As a result, in image B, image C, and image D, two gradations can be mixed in four pixels, and the appearance frequency of the two gradations can be changed according to the original image data information. Therefore, when attention is paid to a plurality of pixels, the image B, the image C, and the image E can be represented as pseudo-different gradation data.

Next, a configuration diagram of the color reduction processing section 111 when the dither processing method described above is used as the color reduction processing means will be described with reference to FIG.

In FIG. 11, reference numeral 1101 denotes a color reduction processing unit 11;
1, a dither pattern generation unit 1102 indicates a lower bit truncation unit in the color reduction processing unit 111.
Here, the display data output from the control register 110 is assigned to an address corresponding to the display position of the liquid crystal panel 105 by the display memory address generation circuit 113 and written into the display memory 112. Here, as shown in FIG. 7, the dither pattern configuration also needs to be configured in the same manner as described above. That is, a dither pattern that matches the display address at which the display data is written is required. Therefore, the display memory address generation unit 113
Then, the dither pattern corresponding to the address is generated by the dither pattern generation circuit 1101 using the address generated in step (1). If the display data has only 4096 color information, the control register 110 receives the OFF information of the dither processing ON / OFF information. If the dither processing is not performed, the dither pattern is fixed to “0”. Do not perform dither processing. The dither pattern generated by the dither pattern generation circuit 1101 is added to the lower bits of the display data of 5 bits, 6 bits, and 5 bits each of R, G, and B shown in FIG. The display data after the addition of the dither pattern is reduced in the number of colors corresponding to the number of display colors of the liquid crystal display by the lower bit truncation unit 1102 (here, as an example, R, G, B, 4 bi each).
t), written to the display memory 112. FIG. 12 shows an address map of the display memory address generator 113 described above.

In FIG. 12, it is assumed that the number of pixels of the liquid crystal panel 105 is 128 × 160 dots as an example. The address value is expressed in hexadecimal, and as shown in FIG. 4, data of one pixel (dot) is set as one address, and an address is designated for each display position. In this case, the least significant bit of the address is used for selecting the dither pattern in the horizontal direction, and the information of bit 7 is used for selecting the dither pattern in the vertical direction.
Will be output to

The display data subjected to the reduction processing with the above configuration is written into the display memory 112 at the timings shown in FIGS. Here, the image A in FIG.
And the display data of the image C as an example.

FIG. 13 shows the control memory 110 described above.
5 shows the timing relationship when the color reduction processing ON / OFF information from the first step is ON information (color reduction processing is performed).

As shown in FIG. 13, a display memory address is generated by a line signal and a dot clock, and an address in each pixel is allocated. In accordance with this address, a 2-bit dither pattern is generated, added to the lower 2 bits of the display data (here, 6 bits as an example), and reduced in color (here, lower 2 bits of 6 bits as an example).
(it is reduced to 4 bits by reducing the color of it) and written to the display memory. At such a timing, image A in FIG.
As shown in image C, using dither processing, 4 dots and 2 bi
Correct the gradation that is cut off by t.

Next, FIG. 14 shows the timing when the color reduction processing ON / OFF information is OFF (color reduction processing is not performed). Here, as described above, when the color reduction processing is not performed, the dither pattern generation circuit 1 shown in FIG.
In 101, since the dither pattern is fixed to “0”, 2
The bit dither pattern is also “0” [HEX]. In this case, when the image A and the image C in FIG. 10 are used as the display data as in FIG. 13, the color is simply reduced like the image A and the image C in FIG. The display data subjected to the color reduction processing is written to the display memory 112 at the timing described with reference to FIGS.

Next, the configuration after the display data is read from the display memory 112 is shown in FIG. In this embodiment, an active matrix type liquid crystal panel 105 having a switching element in a pixel portion is applied.
Line-sequential driving in which lines are sequentially selected is used. Therefore, in FIG. 15, display data is read from the display memory 112 for each address allocated to the liquid crystal panel 105 and the display memory 112 described above. The number is, for example, 128 pixels in the configuration shown in FIG. 12, but they are simultaneously output in synchronization with the line signal. For these display data, a gradation voltage level corresponding to each display data is selected by the signal line driving circuit 118 and applied to the signal lines. FIG. 16 shows the relationship between the display data and the gradation voltage.

FIG. 16 shows the 4-bit display data "0 [HEX]" and "F" stored at the display memory addresses "0000 [HEX]" and "0080 [HEX]" in FIG.
[HEX] "is shown as being converted to a gray scale voltage, and is shown as being applied to the signal line" 0 "and being selected by the scanning lines" 0 "and" 1 ", as described above. Signal line "0"
Is a signal line drive circuit 118 shown in FIG.
In the case of [HEX] ”, the voltage of the“ 0 ”gradation level is selected, and in the case of the display data“ F [HEX] ”, the voltage of the“ 15 ”gradation level is selected.
From 0, a scanning voltage corresponding to each scanning line is output. That is, as shown in FIG. 16, the scanning voltage is applied to the scanning line "0" and the scanning line "1" for each line. As a result, a gray scale voltage corresponding to the display data is applied to the pixel portion arranged on the corresponding line of the liquid crystal panel 105, and image display can be realized.

Next, a liquid crystal display according to a second embodiment of the present invention will be described. The second embodiment employs an error diffusion method in a color reduction processing circuit. The error diffusion method will be described with reference to FIGS.

FIG. 17 shows a total of 8 pixels of 4 pixels in the horizontal direction and 2 lines in the vertical direction. G (i, j) to G (i + 3, j + 1) described in each pixel are as follows.
This is display data of each pixel. Also, here, the display data is described as 6 bits.

As shown in FIG. 18, in the error diffusion method,
For example, if G (i, j) is the pixel data, G
An error that occurs when the 6-bit data of (i, j) is rounded into 4-bit data (here, H (ij)): G (i, j) −H (i, j) * 4 ( Here, *
No. 4 is for adding '00' to the lower two bits of the 4-bit data to make the number of bits equivalent to G (i, j). )
Is calculated with adjacent pixels, for example, G
(I + 1, j), lower G (i, j + 1), lower right G (i
(+1, j + 1) is added and the weighting process is performed.

Here, it is assumed that the weighting constant of the right horizontal pixel is 3/8, the weighting constant of the lower pixel is 3/8, and the weighting constant of the lower right pixel is 1/4. It is necessary to set the sum of the weighting constants to be “1”.

Therefore, G (i + 1, j) on the right side is data including error data obtained from the following equation (1). G '(i + 1, j) = G (i + 1, j) + {G (i, j) -H (i, j) * 4} * 3/8 Expression (1) Similarly, G (i, j + 1) is given by: G ′ (i, j + 1) = G (i, j + 1) + {G (i, j) −H (i, j) * 4} * 3/8 (Equation (2)) G (i + 1, j + 1) is given by: G ′ (i + 1, j + 1) = G (i + 1, j + 1) + {G (i, j) −H (i, j) * 4} * 1/4 (2) Becomes

As a result, the display data of each pixel shown in FIG. 17 is converted into the display data shown in FIG.

Next, when G (i + 1, j) is the pixel concerned, as shown in FIG. 18, the error generated by rounding is reduced to G (i + 2, j) on the right side and G (i) on the lower side.
+1 and j + 1) and the lower right G (i + 2, j + 1) are weighted and added. This operation is the same as the operation described in FIG. 17, and the original display data is calculated based on the display data including the error value generated in G (i, j) described in FIG. .

By successively repeating these, good color reduction processing can be performed.

As an example, FIG. 19 shows an example in which this error diffusion processing is performed using the images A to E shown in FIG. 8 used in the first embodiment.

As can be seen from FIG. 19, similarly to FIG. 10 of the first embodiment, the gradation data is distributed for each pixel, and the appearance frequency of the two gradations is calculated based on the original image data information. Therefore, when attention is paid to a plurality of pixels, the image B, the image C, and the image E can be expressed as pseudo-different gradation data.

The difference between FIG. 10 of the first embodiment and FIG. 17 of the present embodiment is that the pixels in which the reproduced gradation data appears differ depending on the original gradation data. Paying attention to FIG. 10, for the image B to the image D, the pixel portion where the gradation data “0001” appears is fixed to the upper right pixel. On the other hand, in FIG. 17, the pixel portion where the gradation data '0001' appears changes depending on the original gradation data. This allows for dithering
It is possible to realize a better chairman display.

Next, a block diagram of a color reduction processing unit for realizing the error diffusion processing will be described with reference to FIG. In FIG. 20, 2001 is a register file for storing image data, and 2002 and 2003 are data buses for transferring each image data stored in the register file. 2
A data selector 004 selects the image data for realizing the rounding of the image data, and transfers the image data to the data bus 2005. Reference numeral 2006 denotes a data selector which has a function of selecting image data on the right side, below, and lower right of the image data selected by the data selector 2004, and transfers the image data on the right side via a data bus of 2007; The lower image data is transferred on the 2008 data bus, and the lower right image data is transferred on the 2008 data bus. Reference numeral 2010 denotes a lower bit reduction circuit which converts 6-bit image data into 4-bit image data. As a conversion means at this time, when the lower second bit is “1”,
Bit carry-up processing is performed, and when the second lower bit is “0”, bit reduction processing is performed. For example, if the image data is "000010", the lower 2nd bit is "1", so it is converted to "0001". If the image data is "0000011", the lower 2 bit is "0", so "0000". Convert to The converted image data is transferred as display data on the 2011 data bus to the outside of the color reduction processing block. A subtraction circuit 2012 calculates a difference between the original image data and the converted image data, and transfers the difference via a data bus 2013. 201
Reference numeral 4 denotes an arithmetic circuit.
Numeral 15 denotes an arithmetic unit for calculating error data to be added to the right side image data, 2016 denotes an arithmetic unit for calculating error data to be added to the lower image data, and 2017 denotes an error to be added to the lower right image data. This is an arithmetic unit that calculates data. The error distribution data calculated by each of the arithmetic units 2015, 2016, 2017 is transferred by 2018, 2019, 2020. Reference numerals 2021, 2022, and 2023 denote adder circuits for adding error distribution data to the right, left, and lower right image data, respectively, which are output to a data bus 2024.
Reference numeral 2025 denotes a data selector.
Is performed to rewrite the image data transferred in the register file 2001 through the data bus of 2026. Reference numeral 2026 denotes a data bus for transferring weighting constants used when calculating error data generated by the arithmetic circuit 2014.

Next, the operation of the color reduction processing section shown in FIG. 20 will be described in detail.

As described with reference to FIG. 17, the image data of the pixel and the image data on the right, right, and bottom of the pixel are read from the register file storing the image data. Is subjected to a bit conversion process in the lower bit reduction circuit 2010. Then, the image data subjected to the lower bit reduction is transferred to the data bus 2011.
Are transferred to the outside of the color reduction processing block as display data. The difference between the original image data and the converted image data is calculated by the subtraction circuit 2012 for the image data on which the lower bit reduction has been performed, and error data is generated. The error data is converted by the arithmetic circuit 2014 into error distribution data distributed to pixels on the right side, below, and lower right of the pixel. Then, the error distribution data is added to the original image data of the right horizontal, lower, lower right pixels for the pixel by the adder circuits 2021, 2022, and 2023, and is stored in the register file 2001 again.
By repeating this sequentially, the register file 200
1 can be subjected to an error diffusion process.

In this embodiment, the register file 2001 is composed of four pixels in the horizontal direction and two pixels in the vertical direction in FIGS.
Although the processing block size has been described as a line, the same effect can be obtained even if the processing block size is increased to 8 pixels in the horizontal direction, 8 lines in the vertical direction, and the like. Furthermore, although the error data is distributed to three adjacent pixels, there is a concern that the circuit scale will increase. However, the same effect can be obtained by allocating the error data to more pixels.

A block diagram of a liquid crystal display having a color reduction processing unit for realizing the above error diffusion processing will be described with reference to FIG. According to this block diagram, the configuration of the functional block is almost the same as that of the first embodiment.
The only difference is that the one color reduction processing unit is changed to the color reduction processing unit described in FIG. In the present embodiment, the display data transferred from the MPU is stored in the register file 200.
It is desirable that the image is transferred in units of the number of images having a capacity of 1 or less.

In the first and second embodiments, the liquid crystal panel 106 has been described as an active matrix type liquid crystal panel having a switching element in a pixel portion. Even a simple matrix type liquid crystal panel having no elements can be easily coped with by making the scan driving circuit 117 and the signal driving circuit 118 correspond to the simple matrix type liquid crystal panel.

In the above embodiment, the functions are realized by hardware, but equivalent functions may be realized by software.

The present invention can be applied not only to a mobile phone but also to a personal digital assistant, a notebook personal computer, a personal computer connected to a network, and a television.

Further, the present invention can be applied not only to a liquid crystal display but also to a plasma display and an EL display.

[0060]

According to the present invention, since the color reduction processing is performed by the liquid crystal driving circuit, the color number suitable for the liquid crystal driving circuit or the liquid crystal panel can be obtained without depending on the number of colors of the image data transferred from the host. There is an effect that image data can be processed or displayed.

Alternatively, by performing the color reduction processing before the display memory in the liquid crystal drive circuit, the display memory capacity can be reduced in size, and there is an effect that low power consumption and low cost can be realized.

Alternatively, according to the present invention, color reduction processing independent of the structure of the liquid crystal panel can be performed, so that a general-purpose circuit configuration can be constructed.

[Brief description of the drawings]

FIG. 1 is a block diagram of a liquid crystal display device for a mobile phone according to the present invention.

FIG. 2 is a block diagram of an MPU interface unit according to the present invention.

FIG. 3 is a timing chart of the MPU interface unit of the present invention.

FIG. 4 is an input data format diagram of the present invention.

FIG. 5 is a flowchart of a color reduction process according to the present invention.

FIG. 6 is a schematic diagram of a dither pattern according to the present invention.

FIG. 7 is a schematic diagram of a dither pattern according to the present invention.

FIG. 8 is an evaluation original image data diagram of the present invention.

FIG. 9 is a diagram showing image data after a calculation result (without processing) according to the present invention.

FIG. 10 is an image data diagram after the calculation result (with processing) of the present invention.

FIG. 11 is a block diagram of a color reduction processing unit according to the present invention.

FIG. 12 is a memory address map diagram of the present invention.

FIG. 13 is a timing chart of the color reduction processing unit of the present invention.

FIG. 14 is a timing chart of the color reduction processing unit of the present invention.

FIG. 15 is a schematic diagram of a gray scale voltage output according to the present invention.

FIG. 16 is a timing chart of a gradation voltage generation according to the present invention.

FIG. 17 is a schematic explanatory diagram of error diffusion according to the present invention.

FIG. 18 is a schematic explanatory diagram of error diffusion according to the present invention.

FIG. 19 is an image data diagram after calculation results (with error diffusion processing) according to the present invention.

FIG. 20 is a block diagram of an error diffusion color reduction processing unit according to the present invention.

FIG. 21 is a block diagram of a liquid crystal display device for a mobile phone according to the present invention.

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) G09G 3/20 650 G09G 3/20 650M (72) Inventor Atsushi Higa 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa Prefecture. Within Hitachi Image Information System Co., Ltd. (72) Inventor Yoshikazu Yokota 5-2-1, Josuihonmachi, Kodaira-shi, Tokyo Within Semiconductor Group, Hitachi, Ltd. No. 3300 F-term in the Hitachi, Ltd. Display Group (Reference) 2H088 EA22 HA06 MA20 2H093 NA16 NA46 NA54 NA62 NC14 NC28 NC50 ND06 ND17 ND39 ND54 NG20 5C006 AA12 AA22 AF69 AF85 BB11 EC13 FA44 FA47 FA51 FA56 5C080 AA10DD DD JJ01 JJ02 JJ04 KK07

Claims (8)

[Claims] 1. A liquid crystal display comprising: a liquid crystal panel; and a liquid crystal drive circuit that applies a gradation voltage corresponding to display data to the liquid crystal panel. The liquid crystal drive circuit includes: a display memory that temporarily stores display data; Input means for inputting more image data than the storage capacity per pixel of the display memory, and color reduction processing for converting the image data input from the input means into storage capacity per pixel of the display memory And a liquid crystal display device. 2. The liquid crystal display device according to claim 1, wherein the color reduction processing means comprises: arithmetic means for adding specific pattern information and image data input from the input means; and lower-order bits of the calculated image data. A liquid crystal display device comprising: 3. The liquid crystal display device according to claim 1, wherein the color reduction processing means includes: a storage means for temporarily storing image data of a specific area; and a storage capacity per pixel of the display memory for storing the image data of the specific pixel. Means for performing an approximate conversion to data; and calculating means for multiplying a difference between the original image data and the converted image data by a constant in image data of an adjacent pixel portion and sorting the result. Liquid crystal display. 4. The liquid crystal display device according to claim 1, wherein the liquid crystal panel is a liquid crystal panel having a switching element in a pixel portion. 5. The liquid crystal display device according to claim 1, wherein the liquid crystal panel is a liquid crystal panel having a switching element other than a pixel portion. 6. A liquid crystal panel, a liquid crystal drive circuit for applying a gradation voltage corresponding to display data to the liquid crystal panel, and a central processing unit for receiving image data from outside the device and transferring the image data to the liquid crystal drive circuit. An information terminal comprising: a display memory for temporarily storing display data; an input unit for inputting more image data than a storage capacity per pixel of the display memory; and the input unit. An information terminal, comprising: a color reduction processing unit that converts image data input from the display memory into a storage capacity per pixel of the display memory. 7. The information terminal according to claim 6, wherein the central processing means determines whether the image data captured from outside the device is more image data than the storage capacity per pixel of the display memory of the liquid crystal drive circuit. Means for determining whether or not the determination is made, and means for transmitting the information determined by the determination means to the liquid crystal drive circuit. The liquid crystal drive circuit performs color reduction processing based on the determination information of the determination means. An information terminal having means for switching whether or not the information terminal is an information terminal. 8. A liquid crystal display comprising: a liquid crystal panel; and a liquid crystal drive circuit that applies a gradation voltage corresponding to display data to the liquid crystal panel, wherein the liquid crystal drive circuit temporarily stores display data; Input means for inputting more image data than the storage capacity per pixel of the display memory, and color reduction processing for converting the image data input from the input means into storage capacity per pixel of the display memory And a means for converting image data read from the display memory into corresponding gradation data, wherein these are integrated in one semiconductor.