JP2002258803A - Display device, its drive circuit and method and electronic equipment - Google Patents

Abstract

PROBLEM TO BE SOLVED: To suppress the generation of cross talk and to reduce power consumption. SOLUTION: In a selection period, scanning lines are selected continuously, and one of the selection voltage ±VS is applied to the scanning lines. In a correction period, the scanning lines are not selected and the lines are held to one of the non-selection voltages ±VD/2. In the selection period, data signals Xj are given according to the polarity of the selection voltage applied to the selected scanning lines and the gradation of the pixels located to the selected scanning lines. while in the correction period, inverted waveforms of the signals Xj during the selection period are given.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to, for example,
The present invention relates to a display device, a driving circuit thereof, a driving method thereof, and an electronic device which achieve low power consumption while suppressing a decrease in display quality.

[0002]

2. Description of the Related Art In recent years, a display device which performs display by electro-optical change of an electro-optical material such as a liquid crystal or an organic EL (electro luminescence) has been used as a display device instead of a cathode ray tube (CRT). And is being widely used in television and the like.

[0003] The display devices can be roughly classified into an active matrix type in which pixels are driven by switching and a passive matrix type in which pixels are driven without using switching elements, when classified according to a driving method or the like. Among them, the active matrix type according to the former further includes a type using a three-terminal switching element such as a thin film transistor (TFT) and a thin film diode (TFD) depending on the type of the switching element. Can be broadly divided into a type using a two-terminal switching element,
The latter type using a two-terminal type switching element has the following points: short-circuit failure between wirings does not occur in principle because there is no intersection of wirings; film forming process and photolithography process can be shortened; It is advantageous in that it is suitable for power consumption.

On the other hand, in a display device in which pixels are switched by a two-terminal switching element, there are various modes for reducing display quality. However, finally, the ratio of the period during which two voltages that can be applied to the data line (segment electrode) can be applied is reduced by half even if any pattern is displayed.
/ 2H select, 1H inversion) is known to eliminate such a decrease in display quality.

[0005] By the way, especially PDA (Personal Digital)
In portable electronic devices, such as assistants and mobile phones, there is a strong demand for low power consumption because battery operation is a principle. For this reason, a display device applied to a portable electronic device is also strongly required to have low power consumption. Further, in recent years, various functions such as music playback have been added to this kind of portable electronic device.
There is even a demand for reducing the power consumption of the display device even by 1 mW in order to generate power allocated to such new functions. On the other hand, in recent years, a display device has been required to have not only a simple black-and-white display but also a high gray-scale display which performs display at a rich intermediate gradation.

[0006]

[0005] However, the above 4)
In the value driving method (1 / 2H select, 1H inversion), when performing half-tone display, the frequency of voltage switching of the data line increases, so that power is wasted due to the capacitance associated with the data line. was there. On the other hand, if the above four-value driving method is not adopted, a problem occurs that the display quality is lowered depending on the mode.

The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a display device capable of reducing power consumption while suppressing a decrease in display quality, and a driving method for the display device. An object of the present invention is to provide a circuit, a driving method thereof, and an electronic device.

[0008]

According to another aspect of the present invention, there is provided a driving circuit of a display device for driving a pixel provided at an intersection of a scanning line and a data line. Divided into a set of selection period and correction period,
In the selection period, a plurality of scanning lines are selected one by one and a selection voltage is applied, and in a non-selected period of the selection period and a non-selection voltage corresponding to the selection voltage in the correction period. A scanning line driving circuit for applying a scanning line to a scanning line, and for a certain data line, in the selection period, when one scanning line is selected and a selection voltage is applied, the scanning line and the data line While the lighting voltage or the non-lighting voltage is applied according to the display content of the pixel corresponding to the intersection with, the correction signal for canceling the voltage component applied (or applied) in the selection period is applied in the correction period. And a data line driving circuit. According to this configuration, in the selection period, the effective component of the voltage applied (or applied) to the data line is canceled by the correction signal applied in the correction period, so that the display quality is prevented from deteriorating. . further,
In the correction period, the voltage applied to the scanning line does not change, so that the voltage applied to the data line does not need to consider the voltage applied to the scanning line. For this reason, in the correction period, the switching frequency of the correction signal applied to the data line can be easily suppressed, and the power wasted and consumed by charging / discharging the capacitance associated with the data line and its drive circuit can be reduced. In addition, power consumption can be reduced accordingly. The reason why “applied (or applied) during the selection period” is that the correction period corresponding to the selection period may be temporally later or earlier. is there. In addition, the lighting voltage in the present case refers to a data signal voltage having a polarity opposite to a selection voltage applied in a period when a certain scanning line is selected in a period in which attention is paid. The voltage refers to a data signal voltage having the same polarity as a selection voltage applied during a period in which one certain scanning line is selected.

In this configuration, the data line drive circuit inverts a voltage waveform applied (or applied) during the selection period with reference to a center voltage of the lighting voltage and the non-lighting voltage, and performs the correction. A configuration using signals is preferable. According to this configuration, the effective component of the voltage applied to the data line in the selection period is canceled in the correction period by a correction signal inverted in the opposite direction, and the voltage applied to the data line is Switching frequency is also reduced.

In the data line driving circuit, the data line driving circuit outputs a pulse signal having a width that is continuous for a period substantially equal to the total period of the pulse width applied (or applied) during the selection period. A configuration may be adopted in which the correction signal is inverted with reference to the center voltage of the lighting voltage and the non-lighting voltage as a reference. According to this configuration, the effective component of the voltage applied to the data line in the selection period is canceled in the correction period by the correction signal having a continuous pulse width, so that the frequency of voltage switching is drastically reduced.

Further, the data line driving circuit counts a period during which one voltage of the pulse signal is applied during the selection period, and generates the correction signal according to a counting result by the counting circuit. A configuration including a generation circuit may be employed. According to this configuration, the period in which one voltage of the pulse signal applied to the data line is applied in the selection period is counted. For this reason, it becomes easy to invert the pulse signal having a continuous width substantially equal to the total period of the pulse width applied (or applied) during the selection period to obtain a correction signal.

Here, a plurality of pairs of the selection period and the correction period are provided for one vertical scanning period, and the scanning line drive circuit sequentially connects a plurality of scanning lines in each pair of selection periods. Is preferable. In the present invention, the influence of the signal applied to the data line in the selection period and the influence of the signal applied to the data line in the correction period are different depending on whether the row is odd or even or before or after the selection in the selection period. May occur, but when the set of the selection period and the correction period is divided into a plurality of groups as in such a configuration, the difference is reduced.

In such a configuration, it is preferable that the data line drive circuit has a memory for holding the gradation data indicating the gradation of the pixel at least for the scanning lines for continuously selecting the gradation data. According to such a configuration, in both the selection period and the correction period, the labor for supplying data that defines the display content of the pixel is omitted, so that the power consumed at the time of data transfer can be reduced. .

Here, the present invention can also be realized as a method of driving a display device. That is, a method for driving a display device that drives pixels provided corresponding to intersections of scanning lines and data lines, wherein one vertical scanning period is divided into a set of a selection period and a correction period. In the selection period, a plurality of scanning lines are selected one by one, and a selection voltage is applied.
In the non-selected period of the selection period, and in the correction period, a non-selection voltage corresponding to the selection voltage is applied to a scanning line, and for one data line, one scanning line in the selection period. Is selected and a selection voltage is applied, while applying a lighting voltage or a non-lighting voltage according to the display content of a pixel corresponding to the intersection of the scanning line and the data line, while in the correction period, The method is characterized by applying a correction signal for canceling a voltage component applied (or applied) during the selection period. According to this method, in the selection period, the effective component of the voltage applied (or applied) to the data line is canceled by the correction signal applied in the correction period, so that the deterioration of the display quality is prevented. On the other hand, since the switching frequency of the correction signal applied to the data line during the correction period can be easily suppressed, the power wasted by charging and discharging the data line and the capacitance associated with the drive circuit thereof can be suppressed, and the power consumption can be reduced. Accordingly, power consumption can be reduced.

In order to achieve the above object, a display device according to the present invention divides one vertical scanning period into a set of a selection period and a correction period, and in the selection period, a plurality of scanning lines are divided. A scanning line drive circuit for applying a selection voltage one by one and applying a selection voltage, while applying a non-selection voltage corresponding to the selection voltage to a scanning line during a non-selected period of the selection period and the correction period. For one data line, in the selection period, when one scanning line is selected and a selection voltage is applied, the display content of a pixel corresponding to the intersection of the scanning line and the data line is changed. And a data line driving circuit for applying a correction signal for canceling a voltage component applied (or applied) during the selection period in the correction period while applying a lighting voltage or a non-lighting voltage accordingly. It is characterized in. According to this method, the effective component of the voltage applied to (or applied to) the data line in the selection period is canceled by the correction signal applied in the correction period, as in the above-described drive circuit. While the deterioration of the quality is prevented, the switching frequency of the correction signal applied to the data line during the correction period can be easily suppressed, so that it is wastefully consumed by charging and discharging the data line and the capacitance associated with the drive circuit thereof. Power consumption can be suppressed, and power consumption can be reduced accordingly.

Here, in the display device according to the present invention,
The pixel, a two-terminal switching element having one end connected to one of the scanning line or the data line,
It is preferable that a configuration including an electro-optical capacitor in which an electro-optical material is sandwiched between one of the scanning line and the data line and a pixel electrode connected to the other end of the two-terminal switching element is preferable. The use of a two-terminal switching element in this way, compared to a configuration using a three-terminal switching element, in that short-circuit failure between wirings does not occur in principle and that the manufacturing process is simplified. It is advantageous.

Furthermore, such a two-terminal switching element desirably has a structure of a conductor / insulator / conductor. In this structure, any one of the conductors can be used as a scanning line or a data line as it is, and the insulator can be formed by oxidizing the conductor itself.

Further, since the electronic apparatus according to the present invention includes the above-described display device, it is possible to reduce the power consumption while suppressing the deterioration of the display quality. Note that such electronic devices include a personal computer, a mobile phone, a digital still camera, and the like.

[0019]

Embodiments of the present invention will be described below with reference to the drawings.

<Configuration> First, the electrical configuration of the display device according to the first embodiment of the present invention will be described. Figure 1
FIG. 2 is a block diagram showing an electrical configuration of the display device. As shown in this figure, in the display device 100, a plurality of data lines (segment electrodes) 212 are formed extending in the column (Y) direction, while a plurality of scanning lines (common electrodes) 312 are arranged in rows. The pixel 116 is formed so as to extend in the (X) direction, and corresponds to each intersection of the data line 212 and the scanning line 312. Further, each pixel 116
Denotes a liquid crystal capacitor 118 and a TFD (Thin Film Diode) which is an example of a two-terminal switching element.
220 in series. Among them, the liquid crystal capacitor 11
As described later, reference numeral 8 has a configuration in which a liquid crystal, which is an example of an electro-optical material, is sandwiched between a scanning line 312 functioning as a counter electrode and a pixel electrode. In the first embodiment, the total number of scanning lines 312 is set to 1 for convenience of explanation.
60, and the total number of data lines 212 is 120,
Although the present invention will be described as a 160-row × 120-column matrix display device, the present invention is not limited to this.

Next, the Y driver 350 is generally called a scanning line driving circuit, and scan signals Y1 and Y
2, Y3,..., Y160 are represented in the first and second rows, respectively.
The third line,..., Are supplied to the 160th scanning line 312. More specifically, the Y driver 350 selects 160 scanning lines 312 one by one in the order described below,
A selected voltage is applied to the selected scanning line 312 and the other scanning lines 31
2 is for supplying a non-selection voltage.

The X driver 250 is generally called a data line driving circuit, and the Y driver 350
, X120 are applied to the pixel 116 located on the scanning line 312 selected by
The data is supplied via the corresponding data line 212 according to the display content. The detailed configuration of the X driver 250 and the Y driver 350 will be described later.

On the other hand, the control circuit 400
It supplies gradation data, various control signals, clock signals, and the like to be described later to the 0 and Y drivers 350 to control both. Further, the driving voltage forming circuit 50
0 is for generating a voltage ± V _D / 2 voltage ± V _S respectively. In the present embodiment, the voltage ± V _S is used as a selection in the scanning signal, and the voltage ± V _D /
2 is configured to be used both for the non-selection voltage in the scanning signal and the data voltage in the data signal, but these voltages may be different. In this embodiment, the polarity of the voltage applied to the scanning line 312 and the data line 212 is the data voltage ± V applied to the data line 212.
_With reference to the intermediate voltage of _D / 2, the high potential side is defined as a positive electrode, and the low potential side is defined as a negative electrode.

<Mechanical Configuration> Next, the mechanical configuration of the display device according to the present embodiment will be described. FIG. 2 is a perspective view illustrating the entire configuration of the display device 100, and FIG. 3 is a partial cross-sectional view illustrating the configuration when the display device 100 is broken along the X direction. As shown in these drawings, the display device 100 includes a counter substrate 3 positioned on the viewer side.
00 and an element substrate 200 located on the back side thereof are bonded together with a certain gap kept therebetween by a sealing material 110 mixed with conductive particles (conductive material) 114 also serving as a spacer. (Twisted Ne
matic) type liquid crystal 160 is sealed. The sealing material 110 is, as shown in FIG.
It is formed in a frame shape along the inner peripheral edge of the counter substrate 300,
A part of the liquid crystal 160 is open for sealing. Therefore, after the liquid crystal is sealed, the opening is sealed with the sealing material 112.

On the opposing surface of the opposing substrate 300, in addition to the scanning lines 312 extending in the row (X) direction,
An alignment film 308 is formed, and rubbing is performed in a predetermined direction. Here, as shown in FIG. 3, the scanning line 312 formed on the counter substrate 300 is
0 through the conductive particles 114 dispersed in each scanning line 31.
A wiring 342 corresponding to the element substrate 2
00 is connected to one end of a wiring 342 formed.
That is, the scanning lines 312 formed on the opposite substrate 300
Are drawn to the element substrate 200 side via the conductive particles 114 and the wiring 342. on the other hand,
A polarizer 131 is attached to the outside (observation side) of the counter substrate 300 (omitted in FIG. 2), and its absorption axis is set corresponding to the direction of the rubbing process on the alignment film 308.

On the opposite surface of the element substrate 300, Y
A rectangular pixel electrode 234 is formed adjacent to the data line 212 extending in the (column) direction, an alignment film 208 is formed, and a rubbing process is performed in a predetermined direction. . On the other hand, a polarizer 121 is attached to the outside of the element substrate 200 (the side opposite to the observation side) (omitted in FIG. 2), and its absorption axis is set corresponding to the direction of the rubbing process on the alignment film 208. Have been. In addition, a backlight unit for uniformly irradiating light is provided outside the element substrate 200, but is not shown because it is not directly related to the present invention.

Next, the outside of the display area will be described. As shown in FIG. 2, an X driver 250 for driving the data lines 212 and , The Y driver 350 for driving the scanning lines 312
(Chip On Glass) technology. Thus, the X driver 250 directly supplies a data signal to the data line 212, while the Y driver 350 indirectly supplies a scan signal to the scan line 312 via the wiring 342 and the conductive particles 114. It has become.

In addition, near the outside of the area where the X driver 250 is mounted, an FPC (Flexible Printed Circuit) is provided.
The substrate 150 is bonded, and various signals and voltage signals from the control circuit 400 and the like (see FIG. 1) are transmitted to the Y driver 35.
0 and the X driver 250 are provided. The X driver 250 and the Y driver 350 in FIG. 1 are located on the left side and the upper side of the display device 100, respectively, differently from FIG. It is only a measure. Also, instead of mounting the X driver 250 and the Y driver 350 on the element substrate 200 by COG, for example, TAB (Tape Automated Bonding)
Using technology, TCP (Tape C
arrier Package) may be electrically and mechanically connected by an anisotropic conductive film.

<Structure of Pixel> Next, the detailed structure of the pixel 116 in the display device will be described. FIG. 4 is a partially broken perspective view showing the structure. In this figure, the orientation films 208 and 308 and the polarizers 121 and 131 in FIG. Now, FIG.
As shown in FIG.
Rectangular pixel electrodes 234 made of a transparent conductor such as O (Indium Tin Oxide) are arranged in a matrix, and the pixel electrodes 234 arranged in the same column are connected to one data line 212. Each is commonly connected via a TFD 220. Here, when viewed from the substrate side, the TFD 220 includes a first conductor 222 formed of a simple substance of tantalum or a tantalum alloy and branched from the data line 212 in a T-shape. It is composed of an anodized insulator 224 and a second conductor 226 such as chromium or the like, and has a conductor / insulator / conductor sandwich structure. Therefore, the TFD 220 has a diode switching characteristic in which the current-voltage characteristic is non-linear in both positive and negative directions.

The insulator 201 formed on the upper surface of the element substrate 200 has transparency and insulating properties. The reason why the insulator 201 is formed is to prevent the first conductor 222 from peeling off by heat treatment after the deposition of the second conductor 226, and to diffuse impurities into the first conductor 222. This is to prevent it. Therefore, when these do not cause a problem, the insulator 201 can be omitted.

On the other hand, the facing surface of the facing substrate 300 is
Scan lines 312 made of O or the like extend in a row direction orthogonal to the data lines 212 and are arranged at positions facing the pixel electrodes 234. Thereby, the scanning line 312 is
It will function as a counter electrode of the pixel electrode 234.
Therefore, at the intersection of the data line 212 and the scanning line 312, the liquid crystal capacitance 118 in FIG.
12, the pixel electrode 234, and the liquid crystal 160 sandwiched between them.

In such a configuration, the data line 212
Irrespective of the data voltage applied to the TFD 22
When a selection voltage for turning on 0 is applied to the scanning line 312, the TFD 220 corresponding to the intersection of the scanning line 312 and the data line 212 turns on, and the liquid crystal capacitor 118 connected to the turned on TFD 220 applies the selection voltage and Charges corresponding to the data voltage difference are accumulated. After the charge accumulation, a non-selection voltage is applied to the scanning line 312 to
Even if 220 is turned off, the accumulation of charges in the liquid crystal capacitor 118 is maintained. Here, the alignment state of the liquid crystal 160 changes according to the amount of charge stored in the liquid crystal capacitor 118.
For this reason, the amount of light passing through the polarizers 121 and 131 also changes according to the accumulated charge amount. Therefore, the liquid crystal capacitance 1 is determined by the data voltage when the selection voltage is applied.
By controlling the amount of charge accumulation at 18 for each pixel,
Predetermined gradation display becomes possible.

<Driving> Incidentally, one pixel 116 described above can be represented by an equivalent circuit as shown in FIG. That is, generally, i (i is 1 ≦
an integer that satisfies i ≦ 160) the scanning line 312 of the row and j
(J is 1 ≦ j ≦ 120 integer satisfying the) pixel 116 corresponding to the intersections of the th data line 212, as shown in the figure, indicated by a parallel circuit of R _T resistor and capacitor C _T It can be represented by a series circuit of a TFD 220 and a liquid crystal capacitor 118 represented by a parallel circuit of a resistor R _LC and a capacitor C _LC .

Here, a four-level driving method as a general driving method
(1H select, 1H inversion) will be described. FIG.
Is the quaternary drive method (1H select, 1H inversion)
The scanning signal Yi applied to the pixel 116 at the i-th row and the j-th column is
FIG. 7 is a diagram illustrating an example of a waveform with a data signal Xj. This driving method
Then, as the scanning signal Yi, in one horizontal scanning period (1H)
Selection voltage + V_SIs applied, the non-selection (hold) period
Selection voltage + V_D/ 2 and apply the previous selection
When one vertical scanning period (1F) elapses, the selection voltage
-V_STo apply the non-selection voltage −V during the non-selection period._D/ 2
The operation of applying the data signal Xj is repeated.
Voltage ± V_D/ 2 is applied.
It is. At this time, the scanning signal Yi to a certain scanning line 312
As the selection voltage + V_SIs applied, the next line
The selection voltage − as the scanning signal Yi + 1 to the scanning line 312
V _S, One horizontal scanning period (1H)
The operation of inverting the polarity of the selection voltage every time is also performed.

On the other hand, the voltage of the data signal Xj is the case of applying a selection voltage + V _S, the pixel 116, when a black display in the normally white mode -
V _D / 2, and the when the pixel 116 to a white display becomes + V _D / 2. Further, in the case of applying a selection voltage -V _S, when the pixel 116 to black display + V _D
/ 2, and −V when the pixel 116 is to be displayed in white.
_D / 2.

In the four-value driving method (1H select, 1H inversion), for example, as shown in FIG.
In a partial area A of the display screen 100a, a zebra display consisting of white and black for each row is performed, and in other areas, for example, a simple white display is used. There is a known problem that accompanying white display occurs in the Y direction with respect to the area A.

The cause of this occurrence will be briefly described for the following reason. That is, when the zebra display is performed in the region A, the switching period of the voltage ± V _D / 2 in the data signal to the data line in the region A matches the inversion period of the scanning signal. , The voltage ± V _D /
2 is fixed to one of them. This is called area A
When viewed from the pixels in the region adjacent to the Y direction, the voltage is fixed to one of the voltages ± V _D / 2 in the specific period in which the data signal corresponding to the region A is supplied in the holding period. Means On the other hand, the selection voltages of the adjacent scanning lines have opposite polarities as described above. Accordingly, the effective voltage value applied to the pixels in the region adjacent to the region A in the Y direction differs between the odd-numbered row and the even-numbered row. As a result, in a region adjacent to the region A in the Y direction, a density difference occurs between the pixels 116 in the odd-numbered rows and the pixels 116 in the even-numbered rows, and the above-described crosstalk occurs. Note that such crosstalk also occurs when a checkerboard pattern is displayed in addition to the zebra display.

Therefore, in order to eliminate the crosstalk, a driving method called a four-value driving method (1 / 2H select, 1H inversion) is used. In this driving method, as shown in FIG. 24, one horizontal scanning period (1H) in the quaternary driving method (1H select, 1H inversion) is divided into a first half period and a second half period. , For example, the selection voltage is applied to the scanning line in the latter half period ＨH, and the ratio of the period of applying the voltages −V _D / 2 and + V _D / 2 to the data signal over one horizontal scanning period 1H is respectively 50%. This four-value driving method (1 / 2H
Select, 1H inversion), no matter what pattern is displayed, the voltage -V
_{Since the} period during which _D / 2 is applied and the period during which the voltage + V _D / 2 is applied are halved from each other, the occurrence of the crosstalk described above is prevented. Note that a selection voltage having a polarity opposite to that of the selection voltage applied in the latter half period may be applied in the first half period, but the description is omitted because it is not directly involved in the present case.

However, this four-value driving method (1 / 2H
Select, 1H inversion), especially the gradation display
Is performed, the voltage switching frequency of the data signal Xj increases.
There is a problem. For example, the data line 212 in the j-th column
The voltage of the supplied data signal Xj is shown in FIG.
Pixels that should be half-tone (gray) are continuous in the column direction
Is performed, every time one scanning line 312 is selected (one horizontal scanning).
It switches at a rate of three times per inspection period). Where d
The problem that the voltage switching frequency of the data signal Xj increases
In order to explain, most of one vertical scanning period (1F)
Attention is paid to the non-selection period that occupies. During this non-selection period,
Since the TFD 220 is turned off, its resistance R_TIs enough
growing. The resistance R of the liquid crystal capacitor 118_LCIs TF
It is sufficiently large regardless of the on / off state of D220. others
Therefore, the equivalent circuit of the pixel 116 during the holding period is shown in FIG.
As shown in FIG._TAnd capacity C_LCDirectly
Capacitance C composed of column composite capacitance_pixCan be represented by What
Contact, capacity C_pixIs (C_T・ C_LC) / (C_T+ C _LC)
You.

Next, as shown in FIG. 25A, for example, the scanning line 312 in the i-th row is not selected, and the scanning signal Yi to the scanning line is set to, for example, the non-selection voltage + V _D / 2. When it is held, the state is such that the voltage of the data signal Xj to the data line 212 in the j-th column is + V _D / 2. From this state, when the voltage of the data signal Xj switches to −V _D / 2 as shown in FIG.
16 charge of C _pix · V _D is supplied to the. Therefore, when voltage switching occurs in the data signal Xj during the non-selection period, charging or discharging is performed over almost all the capacitances C _pix of the pixels 116 connected to the data line 212 in the j-th column (selective scanning). Pixels corresponding to intersections with lines are excluded). Here, although described capacitance C _{pi x} in the pixel 116, the data lines, various capacitance parasitic to the other. For example, in FIG.
Since the data line 212 and the scanning line 312 are opposed to each other via the liquid crystal 160, a parasitic capacitance is formed on the data line 212 using the other electrode as the scanning line 312 and the liquid crystal 160 as a dielectric. For this reason, if the voltage switching frequency of the data signal Xj is high, charging and discharging are performed more frequently in various parasitic capacitances together with the capacitance _Cpix , and power is consumed. This is a major factor that hinders low power consumption. Become.

In view of this, the display device according to the present embodiment suppresses the occurrence of crosstalk and reduces the frequency of voltage switching of the data signal Xj in order to reduce the frequency of switching the data signal Xj. A correction period in which none of the lines is selected is provided. In the selection period, a data signal corresponding to the display content of the pixel corresponding to the intersection of the selected scanning line and the data line is supplied, while the correction period is Has a configuration in which the data signal supplied during the selection period is inverted and supplied. Less than,
A circuit for supplying such a scanning signal and a data signal will be described.

<Control Circuit> For convenience, various signals such as a control signal and a clock signal generated by the control circuit 400 in FIG. 1 will be described. First, Y (vertical scanning)
The signals used on the side will be described. First, as shown in FIG. 6, the start pulse DY is a pulse output at the beginning of one vertical scanning period (1F). Second,
The clock signal YCK is a Y-side reference signal, and has a period of one horizontal scanning period (1H) as shown in FIG. Third, the period instruction signal S / C is a signal for instructing either the selection period or the correction period. More specifically, as shown in the figure, if it is at the H level, it is the selection period. If the signal is at the L level, the signal indicates that the current time is in the correction period. Here, in the present embodiment, if the number of continuously selected scanning lines 312 is set to “4” for convenience, the period instruction signal S / C becomes H for the first four horizontal scanning periods in one vertical scanning period. The level becomes L level over the next four horizontal scanning periods, and thereafter, the level is inverted every four horizontal scanning periods. Fourth, the polarity instructing signal POL is a signal for instructing the polarity of the selection voltage in the scanning signal, and as shown in the figure, in the selection period, the logic level is changed every horizontal scanning period (1H). In the correction period immediately after inversion, the logic level in the selection period is inverted. Further, in the polarity instruction signal POL, for AC drive,
Also in a certain vertical scanning period and immediately before and after the vertical scanning period, the logical levels are inverted.

Next, signals used on the X (horizontal scanning) side will be described. First, as shown in FIG. 11, the start pulse DX is a pulse that is output at the supply start timing of the gradation data Dpix for one row. Here, the gradation data Dpix is data indicating the gradation of the pixel, and in this embodiment, 3 bits are used for convenience. Therefore, the display device according to the present embodiment performs 8 (= 2 ³ ) gradation display for each pixel according to the 3-bit gradation data Dpix. Second, the clock signal XC
K is a reference signal on the X side, and its cycle corresponds to a period during which one pixel of the gradation data Dpix is supplied, as shown in FIG. Third, the latch pulse LP is 1
This pulse rises at the start of the horizontal scanning period (1H), and as shown in FIG.
This pulse is output at the timing after pix is supplied. Fourth, as shown in FIG. 12, the gradation code pulse GCP is a pulse arranged at a position of a period corresponding to an intermediate gradation in one horizontal scanning period (1H). In this embodiment, if the 3-bit gradation data Dpix is (000), it indicates white display, and if (111), it indicates black display, the gradation code pulse GCP Is one horizontal scanning period (1
H), gray (11) excluding white or black
0), (101), (100), (011), (01)
The pulses are arranged in correspondence with the six pulses (0) and (001). In FIG. 12, the gradation code pulse GCP is actually set in consideration of the applied voltage-density characteristic (VI characteristic) of the pixel.

<Y Driver> Next, details of the Y driver 350 will be described. FIG. 5 shows this Y driver 350.
FIG. 3 is a block diagram showing the configuration of FIG. In this figure, a shift register 352 has one scan line 312 corresponding to the total number.
It is a 60-bit shift register. More specifically, if the period instruction signal S / C is at the H level, the shift register 352 sequentially shifts the start pulse DY supplied at the beginning of one vertical scanning period according to the clock signal YCK, and transfers the transfer signals YS1 and YS2. , YS3, ..., YS160
When the period instruction signal S / C is at the L level, the transfer operation is temporarily stopped, and all the transfer signals YS1, YS2, YS3,. . Here, the transfer signal YS
, YS160 correspond to the scanning lines 312 on the first row, the second row, the third row,..., And the 160th row, respectively. When the signal goes high, the corresponding scanning line 31
Means that 2 should be selected.

Subsequently, the voltage selection signal forming circuit 354
A voltage selection signal YC for selecting a voltage to be applied to the scanning line 312 from the transfer signal and the polarity instruction signal POL.
, YC160 are output in a one-to-one correspondence with the first, second, third,..., And 160th scanning lines 312, respectively. Here, in the present embodiment, as described above, the voltage of the scanning signal applied to the scanning line 312 is + V _S (positive side selection voltage), + V _D / 2 (positive side non-selection voltage), and −V _S ( These are four values of negative non-selection voltage) and -V _D / 2 (negative selection voltage).
Among them, the non-selection voltage is + V _D / 2 after the selection voltage + V _S is applied, −V _D / 2 after the selection voltage −V _S is applied, and It is uniquely determined.

Therefore, voltage selection signal forming circuit 354
Generates voltage selection signals YC1, YC2, YC3,..., YC160 such that the voltages of the scanning signals have the following relationship. That is, the voltage selection signal forming circuit 3504
First, the transfer signal YSi generally corresponding to the i-th row
When but it became H level, if the polarity indicating signal POL is at H level, to select the positive selection voltage + V _S, then
When the transfer signal YSi transitions to the L level, a voltage selection signal YCi for selecting the positive non-selection voltage + V _D / 2 is output. If level, to select a negative-side selection voltage -V _S, then the transfer signal YSi is if a transition to the L level, and outputs the voltage selection signal YCi as to select a negative non-selection voltage -V _D / 2 .

Next, the level shifter 356 outputs the voltage selection signal YC output by the voltage selection signal forming circuit 354.
, YC2, YC3,..., YC160. Then, the selector 358 converts the voltage indicated by the voltage selection signal whose voltage amplitude has been expanded,
This is actually selected and applied to each of the corresponding scanning lines 312.

<Voltage Waveform of Scanning Signal> Next, the operation of the Y driver 350 will be examined to explain the voltage waveform of the scanning signal. First, as shown in FIG. 6, at the beginning of one vertical scanning period (1F), a start pulse DY is supplied, and the period instruction signal S / C becomes H level in four horizontal scanning periods, and in the selection period. It is indicated that there is. Therefore, the start pulse DY is transferred by the shift register 352 in accordance with the clock signal YCK. As a result, in the selection period, the transfer signals YS1 and Y
S2, YS3, and YS4 sequentially become H level.

Next, when the period instruction signal S / C becomes L level to indicate that it is the correction period, all the transfer signals are set to L level. In this correction period, the shift register 352 is set. Is only temporarily stopped. Therefore, the period instruction signal S / C becomes L level, four horizontal scanning periods have elapsed, and the period instruction signal S again
When / C becomes H level and the selection period is instructed, the transfer operation resumes and the transfer signals YS5, YS6, YS7, Y
S8 sequentially goes to the H level. Thereafter, the period instruction signal S
/ C becomes the L level, and the correction period is instructed again, and thereafter, the same operation is repeated.

As described above, in this embodiment, the scanning line 3
Since the number of twelve is set to "160" and the number of continuously selected scanning lines 312 is set to "4", the selection period and the correction period appear "40" times in one vertical scanning period. Become. For this reason, in the p-th (p is an integer satisfying 1 ≦ p ≦ 40) selection period, counting from the start of the vertical scanning period, the transfer signal YS (4 · p−
3), YS (4 · p-2), YS (4 · p-1), YS
While (4 · p) sequentially becomes H level, in the correction period after the selection period, all transfer signals become L level.

On the other hand, as described above, the voltage of the scanning signal is indicated by the logic level of the polarity indicating signal POL when the corresponding transfer signal is at the H level.
Therefore, when the transfer signal changes as described above, the voltage waveform of each scanning signal becomes as shown in FIG. That is, generally, the scanning signal Yi supplied to the i-th scanning line 312 is the positive-side selection voltage + V _S when the polarity indication signal POL is at the H level when the transfer signal YSi is at the H level. Then, the positive side non-selection voltage + V _D / 2
While held in, when the transfer signal YSi becomes H level, if the polarity indicating signal POL is at L level, and a negative-side selection voltage -V _S, then the negative side non-selection voltage -V _D
/ 2.

The polarity instructing signal POL is inverted every horizontal scanning period unless the logical level of the period instructing signal S / C changes (see FIG. 6). The polarity is inverted every time. Further, since the logic level of the polarity indication signal POL in the next one vertical scanning period is inverted with respect to the immediately preceding one vertical scanning period (see FIG. 6), when a certain scanning line is selected in a certain vertical scanning period Is the positive-side selection voltage +
If it is V _S , in the next vertical scanning period, the selection voltage when the scanning line is selected becomes the negative-side selection voltage −V _S.

<Supply of Gradation Data> Next, the control circuit 40
The configuration for supplying the gradation data Dpix out of 0 will be described with reference to FIG. In this figure, the memory 452 stores gradation data Dp supplied from a higher-level device (not shown) at the timing shown in FIG. 9 for four rows (4 rows × 120 columns × 3 bits). It is for. Specifically, the memory 452 stores the period instruction signal S / C
Is at the H level (selection period), the gradation data Dp is written in order, and the period instruction signal S / C is L level.
When the level is (correction period), the written gradation data Dp is read out and output in the order of writing. Therefore, the write / read address to the memory 452 is determined by the start pulse DX and the clock signal D
It is configured to be generated in synchronization with X. Subsequently, the selector 454 selects the input terminal a when the period instruction signal S / C is at the H level, and selects the input terminal b when the period instruction signal S / C is at the L level.
And outputs the grayscale data Dp supplied to the selected input terminal to the X driver 250 as Dpix.

Therefore, during the selection period, the gradation data Dp from the host device is output as Dpix, and
While the data is sequentially written to the memory 452, during the correction period, the grayscale data D sequentially read from the memory 452 are read.
p will be output as Dpix. Therefore, in the present embodiment, the grayscale data D supplied during the selection period
pix and the gradation data Dp supplied in the correction period immediately after this.
ix are the same as each other as shown in FIG. In FIG. 9, for example, in the gradation data Dp and Dpix, the notation “3-2” means that it corresponds to a pixel in three rows and two columns.

<X Driver> Next, the details of the X driver 250 will be described. FIG. 10 shows this X driver 25.
FIG. 3 is a block diagram showing a configuration of a 0. In this figure, a shift register 2510 sequentially shifts a start pulse DX output at a supply start timing of one row of grayscale data Dpix at every rising edge of a clock signal XCK, and performs sampling control signals Xs1, Xs2, Xs
.., Xs120.

Subsequently, the register (Reg) 2520 is
The gradation data Dpix provided in one-to-one correspondence with the data lines 212 and supplied as described above is sampled and held at the rising edge of the sampling control signal. Further, the latch circuit (L) 2530 is provided in one-to-one correspondence with the register 2520, and the gradation data Dpix held by the corresponding register 2520 is provided.
Is the latch pulse L supplied at the start of the horizontal scanning period.
It is latched and output at the rising edge of P.

On the other hand, at the rise of the latch pulse LP, the counter 2540 sets (111) corresponding to black display of the gradation data as an initial value, and sets the initial value every time the gradation code pulse GCP rises. It counts down and outputs the counting result C.
Next, a comparator (CMP) 2550 is provided in one-to-one correspondence with the latch circuit 2530, and the counter 254 is provided.
The counting result C based on 0 is compared with the gradation data Dpix latched by the corresponding latch circuit 2530, and when the latter becomes equal to or larger than the former, a signal which becomes H level is output.

When polarity indication signal POL is at the H level, switch 2560 takes the position shown by the solid line in the figure and applies data voltage + V _D / 2 to voltage supply line 25.
62, the data voltage −V _D / 2 is applied to the voltage supply line 2564.
When the polarity instruction signal POL is at the L level, the data voltage + V _D / 2 is applied to the voltage supply line 2564 and the data voltage -V _D / 2 is applied to the position indicated by the broken line in the figure. The voltage is supplied to each of the voltage supply lines 2562. The switch 2570 is provided in one-to-one correspondence with the comparator 2550, that is, in one-to-one correspondence with the data line 212. Specifically, the switch 2570 is connected to the comparator 25
If the signal indicating the comparison result by 50 is at L level, the voltage supply line 2562 is selected as shown by the solid line in the figure, while if the signal is at the H level, the voltage supply line 2562 is selected as shown by the broken line in the figure. The line 2564 is selected, and the data voltage supplied to the selected voltage supply line is applied to the corresponding data line 212 as a data signal.

<Voltage Waveform of Data Signal> Next, the operation of the X driver 350 will be discussed in order to explain the voltage waveform of the data signal. First, as shown in FIG.
When the start pulse DX rises to the H level, the gradation data Dpix corresponding to the pixels in the first column, the second column, the third column,...

The sampling control signal X output from the shift register 2510 at the timing when the grayscale data Dpix corresponding to the pixels in the first column is supplied.
When s1 rises to the H level, the gradation data becomes 1
It is sampled by the register 2520 corresponding to the column. Next, the gradation data Dpi corresponding to the pixels in the second column
When the sampling control signal Xs2 rises to the H level at the timing when x is supplied, the gradation data is sampled by the register 2520 corresponding to the second column. Similarly, the third and fourth columns,...
Each of the gradation data Dpix corresponding to the pixels in the 120th column is sampled by the register 2520 corresponding to the third column, the fourth column,..., The 120th column.

Subsequently, when the latch pulse LP is output (when the logical level rises to the H level), the gradation data Dpix sampled by the register 2520 of each column is supplied to the latch circuit corresponding to each column. 2530 latches all at once. Then, the gradation data Dpix thus latched and the counter 25
The count result C by 40 is compared by the comparator 2550, respectively. On the other hand, the counting result C
As shown in FIG. 12, (111) set by the rise of the latch pulse LP becomes a value obtained by down-counting by the counter 2550 every time the gradation code pulse GCP rises.

Here, generally, the latch circuit 25 of the j-th column
Assume that the gradation data Dpix latched by 30 is (000) corresponding to white. in this case,
After the latch pulse LP is output, the gradation code pulse G
Even if CP is output six times, the count result C does not become less than (000) latched, so that the output signal of the comparator 2550 in the j-th column becomes L for one horizontal scanning period defined by the latch pulse LP. Maintain level. Therefore, in the switch 2570 in the j-th column, the selection of the voltage supply line 2562 is maintained. When the polarity instruction signal POL is at the H level during the horizontal scanning period, the voltage + V _D / 2 is supplied to the voltage supply line 2562 by the switch 2560, so that the data signal Xj is
As shown in FIG. 12, the voltage remains at + V _D / 2 over the horizontal scanning period. Conversely, if the polarity instruction signal POL is at the L level during the horizontal scanning period, the switch 2560 causes the voltage −V _D / 2 to be changed to the voltage supply line 25.
62, the data signal Xj is applied to the voltage −V _D / 2 over the horizontal scanning period as shown in FIG.
Will remain.

Next, generally, the latch circuit 253 of the j-th column
Assume that the gradation data Dpix latched by 0 is (100) corresponding to gray. In this case, after the latch pulse LP is output, the grayscale code pulse GC
At the point in time when P is output three times, the count result C becomes equal to or less than the latched value (100). I do. Therefore, the switch 2 in the j-th column
The selection at 570 is that the voltage supply line 25
The selection is switched from 62 to the voltage supply line 2564. Then, during the horizontal scanning period, the polarity instruction signal POL becomes H
If it is the level, the switch 2560 causes the voltage + V
_{Since D} / 2 is supplied to the voltage supply line 2562 and the voltage −V _D / 2 is supplied to the voltage supply line 2564, the data signal Xj has the voltage + at this time, as shown in FIG.
It switched from the V _D / 2 to the voltage -V _D / 2. Conversely, if the polarity instruction signal POL is at the L level during the horizontal scanning period, the switch 2560 causes the voltage −V _D / 2 to be applied to the voltage supply line 2562 and the voltage + V _D / 2 to be applied to the voltage supply line 2.
564, the data signals Xj
Is, as shown in FIG.
It switched from _D / 2 to the voltage + V _D / 2. Note that, even when the latched gradation data Dpix corresponds to gray other than (100), the same applies except that the transition timing of the output signal by the comparator 2550 is different.

Further, generally, the latch circuit 25 of the j-th column
It is assumed that the gradation data Dpix latched by 30 is (111) corresponding to black. in this case,
As soon as the latch pulse LP is output, the count result C becomes equal to or less than the latched value (111). Therefore, the output signal of the j-th column comparator 2550 becomes one horizontal scan defined by the latch pulse LP. Maintain the H level for a period. Therefore, in the switch 2570 in the j-th column, the selection of the voltage supply line 2564 is maintained. Then, during the horizontal scanning period, the polarity instruction signal P
When OL is at the H level, the voltage −V _D / 2 is supplied to the voltage supply line 2564 by the switch 2560.
As shown in FIG. 12, the data signal Xj remains at the voltage −V _D / 2 over the horizontal scanning period. Conversely, during the horizontal scanning period, the polarity instruction signal POL is set at L level.
If it is a level, the voltage + V _D by the switch 2560
Since / 2 is supplied to the voltage supply line 2562, the data signal Xj remains at the voltage + V _D / 2 over the horizontal scanning period as shown in FIG.

Therefore, when gradation data Dpix latched by latch circuit 2530 are the same, data signal Xj when polarity designating signal POL is at H level and data signal Xj when polarity designating signal POL is at L level are provided. The data signal Xj has an inverse relationship to a virtual voltage centered on the data voltage ± V _D / 2.

<Relationship Between Selection Period and Correction Period> Next, the relationship between the selection period and the correction period in the display device according to the present embodiment will be mainly described. First, as shown in FIG. 9, the grayscale data Dpix supplied during the selection period,
The gradation data Dpix supplied in the correction period immediately after that, including the order in which they are supplied, are the same. on the other hand,
As shown in FIG. 6, the polarity indication signal POL supplied during the selection period and the polarity indication signal POL supplied during the immediately following correction period are in a level-reversed relationship. Here, as described above, when the gradation data Dpix is the same, the data signal Xj also has the data voltage ± when the polarity instruction signal POL is at the H level and when the polarity instruction signal POL is at the L level.
The relationship is inverted around V _D / 2.

Accordingly, in the first embodiment, the correction
The voltage waveform of the data signal Xj applied during the period is shown in FIG.
As shown in the figure, the voltage applied during the
Voltage waveform, data voltage ± V_DInverted around / 2
It will be. For this reason, from the selection period to the correction period
When the data signal is voltage + V _D/ 2 of the period
Ratio and voltage -V_DWhat is the ratio of the period of / 2
Even if a pattern is displayed, it becomes 50% each.
Therefore, the quaternary driving method (1/2 select,
1H inversion), the occurrence of crosstalk is prevented.
It will be.

On the other hand, in the first embodiment, during the selection period, four scanning lines 312 are selected and a data voltage corresponding to the display content of the pixel located on the selected scanning line is applied, while during the correction period, A voltage waveform obtained by inverting the voltage waveform applied during the selection period is applied. At this time, in the case where the pixels to be set to the intermediate gradation (gray) are continuous in the column direction, the number of times of voltage switching of the data signal Xj is, as shown in FIG. 10 times. In the present embodiment, the period from the selection period to the correction period is a period required to select four scanning lines and to equalize the application period of the data voltage ± V _D / 2. When converted to per book, 2.
5 times. Therefore, in the first embodiment, three signals per line in the four-value driving method (1/2 select, 1H inversion) are used.
Since the frequency of switching the voltage of the data signal Xj is reduced as compared with the number of times, power consumption can be reduced accordingly.

<Number of Continuously Selected Scanning Lines> In the above-described first embodiment, the number of continuously selected scanning lines is set to “4” for convenience, but the present invention is not limited to this. Here, assuming that the number of continuously selected scanning lines is “k”,
The number of times of switching the voltage of the data signal can be expressed as (2 · k + 2) / k when converted per scanning line. For this reason, as shown in FIG. 17, as the continuous selection scanning line k is set to be larger, the voltage switching frequency of the data signal is reduced more than three times in the four-value driving method (1/2 selection, 1H inversion). It is possible to do. For example, when the continuous selection scanning line k is set to about “20”, the voltage switching frequency of the data signal is changed to the quaternary driving method (1/2 select, 1
(H inversion) is reduced by about 30% compared to one time.

However, it is not preferable to set the number k of consecutively selected scanning lines unnecessarily large only in view of reducing power consumption by reducing the frequency of voltage switching of data signals. The reason is that the influence of the data signal in the selection period and the influence of the data signal in the correction period are different between the scanning line selected at the beginning of the selection period and the scanning line selected at the end of the selection period. Further, since the odd-numbered rows and the even-numbered rows are also different, if the number k of continuously selected scanning lines is increased, the difference becomes remarkable as shown in FIG. This is because the property becomes higher.

Therefore, if the continuous selection scanning line k is reduced to some extent and the selection period and the correction period in one vertical scanning period are divided into a plurality of groups, the influence of the data signal in the selection period and the data signal in the correction period are reduced. The difference from the influence can be reduced. For example, as shown in FIG. 16, when two sets of the selection period and the correction period are provided in one vertical scanning period, the influence of the data signal in the selection period and the correction of the The difference from the effect of the data signal in the period becomes smaller. On the other hand, when the number k of the continuous selection scanning lines is reduced and the selection period and the correction period in one vertical scanning period are divided into a large number, the difference in the influence is reduced, but as shown in FIG. Since the number of times of switching is increased, the effect of reducing power consumption is diminished. Therefore, it is necessary to set the number k of consecutively selected scanning lines by comprehensively considering the number of scanning lines as a display device, reduction in power consumption, difference in display, and the like.

FIGS. 15 and 16 show displays in which black pixels and white pixels are continuous in columns (Y direction) (FIG. 1).
3), the effective voltage values of the pixels in each row are simply indicated by shaded areas. 15 shows a case where one vertical scanning period is divided into two to divide into a selection period and a correction period. FIG. 16 shows a case where one vertical scanning period is divided into four and divided into a selection period and a correction period. Is shown.

<Alternative Configuration of X Driver> In the first embodiment, the X driver 250 may have the configuration shown in FIG. 18 in addition to the configuration shown in FIG. The configuration shown in this figure differs from the configuration shown in FIG. 10 in that a counter 2542 and a comparator 2552 are provided for each column. Among them, the counter 2542 sets the gradation data Dpix latched by the latch circuit 2530 as an initial value at the rise of the latch pulse LP, and counts up the initial value every time the gradation code pulse GCP rises. And outputs the counting result. Next, the comparator (CMP) 2552
By comparing the result of counting with 42 and (111) corresponding to black, if the former coincides with the latter, a signal which becomes H level is held and output. X shown in FIG.
The driver 250 also generates a data signal similar to the configuration shown in FIG.

<Second Embodiment> In the first embodiment described above, the voltage waveform applied during the selection period is set to the data voltage ± V _D
/ 2 is applied with respect to the center voltage as a reference during the correction period.
The number of times is the same in the selection period and the correction period. Here, the role of the data signal in the correction period is that, when viewed from the selection period to the correction period, the ratio of the period in which the voltage becomes + V _D / 2 and the ratio of the period in which the voltage becomes -V _D / 2, respectively. The purpose is to adjust to 50%. Therefore, if this function is achieved, the number of voltage switching of the data signal in the correction period does not need to be the same as the number in the selection period. It is desirable from the viewpoint of development.

Thus, a second embodiment will be described in which the number of times of voltage switching of the data signal during the correction period is reduced as compared with the first embodiment. FIG. 19 is a block diagram showing the main configuration of the X driver of the display device according to the second embodiment. In this figure, illustration of the shift register is omitted, and the data lines 2 in the j-th column and the (j + 1) -th column are generally
Only the configuration corresponding to 12 is shown. Also, this X
No gradation data is supplied to the driver during the correction period.
That is, in the second embodiment, the grayscale data Dp is supplied directly from the host device at the timing shown in FIG. 9 instead of via the configuration shown in FIG.

In FIG. 19, an accumulator (Acc) 2580 resets the accumulated value to zero at the rise of the period instruction signal S / C, and converts the gradation data Dp latched and output by the latch circuit 2530 into a polarity. According to the logic level of the instruction signal POL, the accumulated value is added to or subtracted from the accumulated value. More specifically, accumulator 2580 determines that latched gradation data Dp is present when polarity designating signal POL is at H level.
Is added to the accumulated value to obtain a new accumulated value. On the other hand, if the polarity instruction signal POL is at the L level, the grayscale data Dp output from the latch is subtracted from the accumulated value to obtain a new accumulated value. Value. Here, while the accumulated value of the accumulator 2580 can be a negative value, in the present embodiment, the gradation data D
p is supplied in 3-bit natural binary notation. Therefore, the accumulator 2580 is configured to convert the latched gradation data Dp into 5-bit two's complement notation and then perform addition / subtraction.

On the other hand, at the falling edge of the period instruction signal S / C, the counter 2545 expresses (1001) in two's complement notation.
1), that is, “−14” in decimal notation is set as an initial value, and the initial value is set to the latch pulse LP.
Alternatively, it counts up each time the tone code pulse GCP rises and outputs the counting result E.
Therefore, the latch pulse LP and the gradation code pulse GCP
Is ORed by OR gate 2592 and
The configuration serves as a counting reference for the counter 2545.
Subsequently, a comparator (CMP) 2555 is provided in one-to-one correspondence with the accumulator 2580, and the counting result E of the counter 2545 and the corresponding latch circuit 25 are provided.
Compared with the accumulated value by 30, when the former becomes greater than the latter, a signal which becomes H level is output.

The switch 2575 is interposed between the comparators 2550 and 2555 and the switch 2570, and performs the following selection. That is,
The switch 2575 takes a position indicated by a solid line in the drawing and selects a signal indicating the comparison result by the comparator 2550 during the selection period in which the period instruction signal S / C is at the H level, while the period instruction signal S / C is In the L level correction period, a signal indicating the result of comparison by the comparator 2555 is selected at the position indicated by the broken line in the figure, and is supplied as a control signal for the switch 2570.

In the second embodiment, the switch 2
The selection control of 560 is not the polarity instruction signal POL but O
This is performed according to the logical sum signal from the R gate 2594. Here, the OR gate 2594 outputs the polarity instruction signal PO
A logical sum of L and a signal obtained by inverting the period instruction signal S / C by the inverter 2596 is obtained. Therefore, in the selection period in which period instruction signal S / C is at H level, switch 2560 performs selection in accordance with the logic level of polarity instruction signal POL, as in the configuration shown in FIG. 10 or FIG. On the other hand, during the correction period in which the period instruction signal S / C is at the L level, the switch 2560 operates regardless of the polarity instruction signal POL.
Taking the position shown by the solid line in FIG.
V _D / 2 is applied to the voltage supply line 2562 and the data voltage −V _D / 2
Are supplied to the voltage supply lines 2564, respectively. The other configuration is completely the same as the configuration shown in FIG.

<Operation and Voltage Waveform of Data Signal>
Since the Y driver 250 of the display device according to the embodiment is the same as that of the first embodiment, the operation of the X driver 350 will be described here. First,
In the selection period in which the period instruction signal S / C is at the H level, the switch 2560 performs selection according to the logical level of the polarity instruction signal POL, and switches 257
5 selects a signal indicating the result of comparison by the comparator 2550, so that the configuration is the same as the configuration shown in FIG. Therefore, the operation is the same as the operation shown in FIGS.

For example, when the polarity instruction signal changes to the H, L, H, and L levels in the selection period corresponding to the four horizontal scanning periods, the four columns of latches latched by the j-th column latch circuit 2530 are used. Each of the tone data Dp is (11
0), (100), (010), and (101). In this case, for the reason described in the first embodiment, the data signal Xj changes as follows in the four horizontal scanning periods. That is, the data signal Xj indicates the count result C during the first horizontal scanning period.
At the timing when the voltage becomes (110), the voltage + V _D / 2
To the voltage −V _D / 2, and at the timing when the counting result C becomes (100) in the second horizontal scanning period, the voltage changes to the voltage + V _D / 2, and the voltage in the third horizontal scanning period Of these, at the timing when the counting result C becomes (010), the voltage changes to the voltage −V _D / 2, and during the fourth horizontal scanning period, when the counting result C becomes (101), the voltage changes to −101. + V _D / 2.

When the period instruction signal S / C rises at the start of the selection period, the accumulated value of accumulator 2558 is reset to all zeros, and gradation data Dp latched by latch circuit 2530 is stored in accumulator 2558. Is also supplied, and the polarity indication signal PO
The addition / subtraction is performed according to the logical level of L. For example, in the four horizontal scanning periods, each of the gradation data Dp is (11) as described above.
0), (100), (010), and (101), the accumulator 2558 sets the initial value to zero,
Since the operation of (110)-(100) + (100)-(101) is performed, the accumulated value at the end of the selection period finally becomes (11111) in two's complement notation and in decimal notation. It becomes "-1".

Next, in the correction period in which period instruction signal S / C is at L level, switch 2560 operates at data voltage + V
_D / 2 is supplied to the voltage supply line 2562, and the data voltage −V _D / 2 is supplied to the voltage supply line 2564, while the switch 2575 selects a signal indicating the comparison result by the comparator 2555. Therefore, the data signal Xj in this correction period is determined by the comparison result by the comparator 2555. Here, the counting result E, which is one of the comparison targets of the comparator 2555, is set by the counter 2545 in the initial period set at the timing when the period instruction signal S / C falls to the L level, as shown in FIG. The value (10011) is counted up every time the latch pulse LP or the gradation code pulse GCP rises. In this embodiment,
Since the gradation data Dp is not supplied during the correction period, the accumulated value of the accumulator 2580 at the end of the selection period is held as it is in the correction period and becomes the other comparison target of the comparator 2555.

Therefore, during the correction period, when the count result E becomes equal to or greater than the accumulated value, the data signal Xj is set to the voltage +
It will transition from V _D / 2 to a voltage -V _D / 2. For example, in the selection period, each of the grayscale data Dp is (110), (100), (010),
(101), when the accumulated value at the end of the selection period is (11111), in the correction period,
As shown in FIG. 20B, when the counting result E becomes equal to or greater than the accumulated value (11111), the data signal Xj
Will transition from the voltage + V _D / 2 to the voltage −V _D / 2.

As described above, in the second embodiment, the period during which the data signal Xj is continuously at the voltage + V _D / 2 during the correction period is equal to the sum of the period during which the voltage is −V _D / 2 during the selection period. Equal, and during the correction period, the data signal Xj
Continuous period of a voltage -V _D / 2 and is equal to the sum of the period in which the voltage + V _D / 2 in the selection period as. For this reason, in the second embodiment, when viewed from the selection period to the correction period, the ratio of the period of the voltage + V _D / 2 and the ratio of the period of the voltage −V _D / 2 are each 50%. In addition, the number of voltage switching of the data signal in the correction period is smaller than the number of times in the selection period and is only one (strictly speaking, two times since the voltage is inverted at the start of the selection period after the end of the correction period). Therefore, the second
In the embodiment, after suppressing the occurrence of crosstalk, the first
Power consumption can be reduced as compared with the embodiment. Further, in the second embodiment, since it is not necessary to supply the grayscale data during the correction period, the configuration shown in FIG. 8 is not required. For this reason, in the second embodiment, the power required for writing / reading to / from the memory 452 is reduced, so that it is possible to further reduce power consumption.

<Summary of Embodiment> In the above-described embodiment, a case has been described in which gradation data is represented by 3 bits and 8 gradations are displayed. However, the present invention is not limited to this, and 2-bit gradations it may be used as the four gradation display by data, and 4 bits, 5 bits, 6 bits, ..., 16, 32, 64 by the gradation data of n bits, ..., may be 2 ⁿ gradation display. Also, R (red), G (green), B
One pixel may be constituted by three pixels of (blue) to perform color display. Further, in the embodiment, the normally white mode in which white display is performed in a state where no voltage is applied to the liquid crystal capacitor has been described, but a normally black mode in which black display is performed in the same state may be adopted. In addition, in the embodiment, the transmission type is used, but the reflection type may be used, or a transflective type using both of them may be used.

In the embodiment, the selection period for applying the data signal according to the display content of the pixel located on the selected scanning line is longer than the correction period for applying the signal for canceling the data signal. Although the configuration precedes the selection period, the correction period may precede the selection period. Further, in the embodiment, when the selection voltage is applied in the selection period, the lighting voltage contributing to the black display is configured to be applied temporally rearward, but is applied temporally forward. Or a configuration in which they are dispersed over time. In addition, in the embodiment, in the selection period, the application period of the data voltage ± V _D / 2 is adjusted according to the display color of the pixel and the selection voltage of the scanning line to obtain a data signal. A data signal that defines the data voltage itself according to the display color and the selection voltage of the scanning line may be used as the data signal. As described above, when the voltage of the data signal is defined according to the display color of the pixel and the selection voltage of the scanning line, the reverse polarity voltage of the data signal applied in the selection period may be used as the data signal in the correction period. . Furthermore, in the embodiment, the writing polarity of the liquid crystal capacitor is inverted every vertical scanning period. However, the present invention is not limited to this.
For example, a configuration in which inversion driving is performed in a cycle of two vertical scanning periods or more may be employed.

Further, T in the display device 100 described above
The FD 220 is connected to the data line 212 and the liquid crystal capacitor 118 is connected to the scanning line 312. On the contrary, the TFD 220 is connected to the scanning line 312 and the liquid crystal layer 118 is connected to the data line 212. May be connected to the respective sides. Further, the TFD 220 is an example of a two-terminal switching element. In addition to the element using a ZnO (zinc oxide) varistor, an MSI (Metal Semi-Insulator), and the like, two of these elements are connected in series in the opposite direction. A connection or a parallel connection can be used as a two-terminal switching element. Further, the present invention can be applied to a passive matrix display device that drives pixels without using a switching element such as the TFD 220.

Further, in the embodiment, the case where the liquid crystal is of the TN type or the STN type has been described.
N-type (Bi-stable Twisted Nematic) type, ferroelectric type and other bistable types with memory properties, polymer dispersed type,
A dye (guest) having anisotropy in absorption of visible light in the major axis direction and the minor axis direction of a molecule is dissolved in a liquid crystal (host) having a fixed molecular arrangement, and the dye molecules are arranged in parallel with the liquid crystal molecule. Alternatively, a guest-host type liquid crystal may be used. In addition, the liquid crystal molecules are aligned vertically with respect to both substrates when no voltage is applied, while the liquid crystal molecules are aligned horizontally with respect to both substrates when voltage is applied. Also, when no voltage is applied, the liquid crystal molecules are arranged horizontally with respect to both substrates,
Parallel (horizontal) alignment (homogeneous alignment) in which liquid crystal molecules are aligned perpendicular to both substrates when voltage is applied
It is good also as composition of.

As described above, various liquid crystal and alignment methods can be used as long as they are compatible with the driving method of the present invention. Also, the present invention can be applied to a self-luminous display device such as a fluorescent display tube and a plasma display.

<Electronic Apparatus> Next, an example in which the display device according to the above-described embodiment is used in an electronic apparatus will be described.

<Part 1: Personal Computer> First, an example in which the above-described display device 100 is applied to a display unit of a personal computer compatible with multimedia will be described. FIG. 26 is a perspective view showing the configuration of this personal computer. As shown in the figure, the main body 1110 of the computer 1100 includes a display device 100 used as a display unit, a read / write drive 1112 for an optical disk, a read / write drive 1114 for a magnetic disk, and a stereo speaker 1116. And so on. The keyboard 1122 and the pointing device (mouse) 1124 are configured to transmit and receive input signals and control signals to and from the main body 1110 wirelessly via infrared rays or the like. Since this display device 100 is used as a color display device, one dot is constituted by three pixels of RGB. In the case where a liquid crystal device is used as the display device 100, a backlight (not shown) is provided in the case of a transmission type.

<Part 2: Mobile Phone> Further, an example in which the above-described display device 100 is applied to a display unit of a mobile phone will be described. FIG. 27 is a perspective view showing the configuration of the mobile phone. In the figure, a mobile phone 1200 includes a plurality of operation buttons 1202, an earpiece 1204, a mouthpiece 12
06 as well as the display device 100 described above. When a liquid crystal device is used as the display device 100, a backlight is used for a transmissive type or a transflective type and a front light (for a reflective type) in order to secure visibility in a dark place. (All are not shown).

<Part 3: Digital Still Camera> Next, a digital still camera using the above-described display device as a finder will be described. FIG. 28 is a perspective view showing the back of the digital still camera. While a normal silver halide camera sensitizes a film with an optical image of a subject, the digital still camera 1300 photoelectrically converts an optical image of the subject with an imaging device such as a CCD (Charge Coupled Device) to convert an imaging signal. To generate. Here, on the back of the case 1302 of the digital still camera 1300, the display device 100 described above is provided.
Is provided, and display is performed based on an image pickup signal by a CCD. For this reason, the display device 100
It will function as a viewfinder that displays the subject. A light receiving unit 1304 including an optical lens, a CCD, and the like is provided on the front side (the rear side in FIG. 28) of the case 1302.

Here, when the photographer checks the subject image displayed on the display device 100 and presses the shutter button 1306, the CCD image pickup signal at that time is transferred and stored in the memory of the circuit board 1308. . In this digital still camera 1300, case 1
A video signal output terminal 1312 and an input / output terminal 131 for data communication
4 are provided.

As the electronic equipment, in addition to the personal computer shown in FIG. 26, the portable telephone shown in FIG. 27, the digital still camera shown in FIG. 28, a liquid crystal television, a viewfinder type, a monitor direct-view type video tape recorder, Car navigation device, pager, electronic organizer, calculator, word processor, workstation, videophone, P
An OS terminal, a device including a touch panel, and the like can be given. Needless to say, the above-described display device can be applied as a display unit of these various electronic devices.

[0097]

As described above, according to the present invention, it is possible to reduce the power consumption while suppressing a decrease in display quality.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating an electrical configuration of a display device according to a first embodiment of the present invention.

FIG. 2 is a perspective view showing a configuration of the display device.

FIG. 3 is a partial cross-sectional view showing a configuration when the display device is broken in the X direction.

FIG. 4 is a partially broken perspective view showing a configuration of a main part of the display device.

FIG. 5 is a block diagram showing a configuration of a Y driver in the display device.

FIG. 6 is a timing chart for explaining the operation of the Y driver.

FIG. 7 is a timing chart for explaining the operation of the Y driver.

FIG. 8 is a block diagram showing a memory configuration for supplying gradation data to the display device.

FIG. 9 is a timing chart for explaining the operation of the memory configuration.

FIG. 10 is a block diagram showing a configuration of an X driver in the display device.

FIG. 11 is a timing chart for explaining the operation of the X driver.

FIG. 12 is a timing chart for explaining the operation of the X driver.

FIG. 13 is a diagram showing a display example on the display device.

FIG. 14 is a diagram showing a voltage waveform and the like applied to a pixel when performing the same display.

FIG. 15 is a diagram illustrating an influence when scanning lines are continuously selected.

FIG. 16 is a diagram illustrating an influence when a scanning line is blocked and selected.

FIG. 17 is a diagram illustrating a relationship between the number of scanning lines continuously selected and the number of times of voltage switching (power consumption).

FIG. 18 is a block diagram showing another configuration of the X driver.

FIG. 19 is a view illustrating a display device according to a second embodiment of the present invention;
FIG. 3 is a block diagram illustrating a main configuration of a driver.

FIGS. 20A and 20B are timing charts for explaining the operation of the X driver.

FIGS. 21A and 21B are diagrams each showing an equivalent circuit of a pixel in the display device according to the embodiment.

FIG. 22 is a diagram showing an example of waveforms of scanning signals Yi, Yi + 1 and a data signal Xj in a four-value driving method (1H select, 1H inversion).

FIG. 23 is a diagram for explaining a display defect.

FIG. 24 is a diagram illustrating an example of waveforms of scanning signals Yi, Yi + 1 and a data signal Xj in a four-value driving method (１ ／ H selection, 1H inversion).

FIGS. 25A and 25B are diagrams for explaining power consumption due to voltage switching of the data signal Xj in a non-selection period (holding period).

FIG. 26 is a perspective view illustrating a configuration of a personal computer as an example of an electronic apparatus to which the display device according to the embodiment is applied.

FIG. 27 is a perspective view illustrating a configuration of a mobile phone as an example of an electronic apparatus to which the display device is applied.

FIG. 28 is a perspective view showing a rear configuration of a digital still camera as an example of an electronic apparatus to which the display device is applied.

[Explanation of symbols]

 100 Display device 105 Liquid crystal 116 Pixel 118 Liquid crystal 200 Element substrate 212 Data line 220 TFD 234 Pixel electrode 250 X driver (data line drive circuit) 300 Counter substrate 312 Scanning line 350 Y driver (scanning line driving circuit) 452 Memory 1100 Personal computer 1200 Mobile phone 1300 Digital still camera 2540, 2545 Counter 2550, 2555 Comparator 2580 ... Accumulator

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Claims (11)

[Claims] 1. A driving circuit of a display device for driving a pixel provided corresponding to an intersection of a scanning line and a data line, wherein one vertical scanning period is divided into a set of a selection period and a correction period,
In the selection period, a plurality of scanning lines are selected one by one and a selection voltage is applied. In the non-selection period of the selection period and the correction period, a non-selection period corresponding to the selection voltage is applied. A scanning line driving circuit for applying a selection voltage to a scanning line; and for one data line, in the selection period, when one scanning line is selected and a selection voltage is applied, the scanning line and the While a lighting voltage or a non-lighting voltage is applied in accordance with the display content of the pixel corresponding to the intersection with the data line, in the correction period, a correction signal for canceling a voltage component applied (or applied) in the selection period. And a data line driving circuit for applying a voltage. 2. The data line driving circuit inverts a voltage waveform applied (or applied) during the selection period with reference to a center voltage of the lighting voltage and the non-lighting voltage, and The driving circuit for a display device according to claim 1, wherein: 3. The data line driving circuit according to claim 1, wherein the pulse signal having a width that is continuous for a period substantially equal to a total period of the pulse width applied (or applied) during the selection period is
The drive circuit for a display device according to claim 1, wherein the correction signal is obtained by inverting a center voltage of the lighting voltage and the non-lighting voltage as a reference. 4. The data line driving circuit, wherein in the selection period, a counting circuit that counts a period during which one voltage of the pulse signal is applied, and generates the correction signal according to a counting result by the counting circuit. And a generation circuit.
4. A driving circuit for a display device according to claim 1. 5. A combination of the selection period and the correction period is one.
2. The driving device according to claim 1, wherein a plurality of scanning lines are provided in a vertical scanning period, and the scanning line driving circuit sequentially selects a plurality of scanning lines in each set selection period. 3. circuit. 6. The data line driving circuit according to claim 5, wherein the data line driving circuit has a memory for holding gradation data indicating a gradation of a pixel at least for a scanning line for continuously selecting the gradation data. A driving circuit of a display device. 7. A method for driving a display device for driving pixels provided corresponding to intersections of scanning lines and data lines, wherein one vertical scanning period is divided into a set of a selection period and a correction period,
In the selection period, a plurality of scanning lines are selected one by one and a selection voltage is applied. In the non-selection period of the selection period and the correction period, a non-selection period corresponding to the selection voltage is applied. A selection voltage is applied to a scanning line, and for a certain data line, in the selection period, when one scanning line is selected and the selection voltage is applied, the intersection of the scanning line and the data line is performed. While applying the lighting voltage or the non-lighting voltage according to the display content of the pixel corresponding to the above, in the correction period, it is preferable to apply a correction signal for canceling the voltage component applied (or applied) in the selection period. Characteristic driving method of a display device. 8. A vertical scanning period is divided into a set of a selection period and a correction period. In the selection period, a plurality of scanning lines are selected one by one and a selection voltage is applied. In a non-selected period of the selection period, and in the correction period, a scanning line driving circuit that applies a non-selection voltage corresponding to the selection voltage to a scanning line; and for one data line, in the selection period, When one scanning line is selected and a selection voltage is applied, a lighting voltage or a non-lighting voltage is applied according to the display content of a pixel corresponding to the intersection of the scanning line and the data line, And a data line driving circuit for applying a correction signal for canceling a voltage component applied (or applied) during the selection period during the selection period. 9. The pixel, comprising: a two-terminal switching element having one end connected to one of the scanning line and the data line; the other one of the scanning line and the data line; 9. The display device according to claim 8, further comprising: an electro-optical capacitor in which an electro-optical material is sandwiched between the switching element and a pixel electrode connected to the other end of the switching element. 10. The display device according to claim 9, wherein the two-terminal switching element has a structure of conductor / insulator / conductor. 11. An electronic apparatus comprising the display device according to claim 8. Description: