JP2002246824A - Phased array antenna system - Google Patents

Abstract

PROBLEM TO BE SOLVED: To realize a compact and reliable phased array antenna system capable of switching a beam at a high speed. SOLUTION: This phased array antenna system is provided with a transmitter for transmitting an RF signal, a power distributor for receiving the RF signal from the transmitter, and for distributing it to a plurality of modules, a plurality of modules for amplifying and phase-converting and outputting the RF signals distributed by the power distributor, a plurality of element antennas for receiving the RF signals outputted from the modules, and a control circuit having an arithmetic function for calculating the amplification values and phase values of the RF signals, and for controlling the modules based on the calculated amplification values and phase values. In this case, the arithmetic function of the control circuit is divided into a plurality of the parts.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a phased array antenna device.

[0002]

2. Description of the Related Art In general, an antenna called a phased array antenna is amplified and phase-changed by a module connected to a plurality of element antennas.
The signals are maximally combined in any direction in space to produce a pencil beam (or called a main beam). FIG. 6 is a block diagram of a conventional example shown in Japanese Patent Application Laid-Open No. 2-104104, "Antenna Device".
, 1 is an element antenna, 2 is a module, 3 is a power distributor, 4 is a transmitter, 14 is a computer, and 15 is a control circuit.

Next, a conventional phased array antenna device will be described with reference to FIG. The RF signal output from the transmitter 4 is input to the power divider 3 and is divided into a plurality. Normally, the RF signals are distributed in a number corresponding to the number of the modules 2, input to the modules 2, and amplified. Also, the phase can be changed here. The RF signal amplified and phase-converted by the module 2 is input to the element antenna 1 and radiated from the element antenna 1 into space. Therefore, the calculator 14 calculates the amount of amplification and the amount of phase necessary to generate the pencil beam,
The result is read by the control circuit 15 and the setting of the module is performed. In particular, the amount of phase is important for determining the direction of the pencil beam. For example, as shown in FIG. 7, in the case of a phased array antenna in which element antennas are two-dimensionally arranged on an XY plane, , And the phase amount is obtained by the following equation.

[0004]

(Equation 1)

[0005] In the above conventional example, the operation for transmission has been described, but the same operation is performed for reception.

[0006]

As described above, in the conventional apparatus, the necessary phase amount and amplification amount are calculated by the computer, and the module 2 is controlled by the control circuit 15 which reads the calculation result. For this reason, the computer 14 is required, and there is a problem that the scale of the entire phased array antenna device is large, and the weight and the cost increase. Further, since the computer 14 and the control circuit 15 are provided separately, there is a problem that the setting to the module cannot be performed at high speed.

The function of the computer 14 is controlled by the control circuit 1
5, when the function of calculating the amount of phase and amplification required by the control circuit 15 is incorporated as a hardware device, the functions are concentrated in one control circuit. There is a problem that it is impossible to reduce the size and control the module at a high speed and a problem that a reliable phased array antenna device cannot be realized.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and has as its object to realize a small and reliable phased array antenna apparatus capable of switching beams at high speed. .

[0009]

A phased array antenna device according to the present invention includes a transmitter for transmitting an RF signal, a power divider for receiving the RF signal from the transmitter and distributing the RF signal to a plurality of modules. A plurality of modules for amplifying and phase-converting the RF signal distributed from the power divider and outputting the RF signal; a plurality of element antennas for radiating the RF signal output from the module to a space; an amplification amount and a phase of the RF signal A control circuit for controlling the module based on the calculated amplification amount and phase amount, the calculation function of the control circuit being divided into a plurality.

Further, the control circuit divided into a plurality is
It comprises a multiplying circuit, an adding circuit, and a memory for storing data.

The memory includes a wave number data memory that stores wave number data of an RF signal, an element position data memory that stores position data for specifying a position of an element antenna, and an amplification amount and a phase amount of the RF signal. And a correction data memory storing correction values in the calculation.

Further, the plurality of modules are divided into N module groups and the N adder circuits are divided into N adder circuits.
It is controlled by an adder circuit divided into pieces.

Further, the multiplication circuit is divided into M multiplication circuits, the N module groups are controlled by the N addition circuits, and the N addition circuits are controlled by the M multiplication circuits. It is characterized by controlling.

[0014]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiment 1 FIG. 1 is a diagram showing a configuration of a phased array antenna apparatus according to Embodiment 1 of the present invention. 1, the same reference numerals as those in FIG. 6 denote the same parts, and a description thereof will be omitted. As a new code,
Reference numeral 5 denotes a control circuit (a), reference numeral 6 denotes a control circuit (b), and reference numeral 7 denotes a phased array antenna including an element antenna 1, a module 2, a power distributor 3, a transmitter 4, and a control circuit (a) 5. The control circuit (a) 5 and the control circuit (b) 6
Is to perform the arithmetic processing of the above equation (1) which has been processed by a computer separate from the conventional control device by incorporating an LSI or the like inside. For example, a control circuit
(b) 6 computes the term k (UX _i + VY _i ) in equation (1) and transfers the resulting data to the control circuit (a) 5. Next, the control circuit (a) 5 adds a correction value C _i to the transferred data, that is, the phase amount P obtained by the equation (1).
i is transferred to each module 2. Thus, since each of the modules 2 sets the value of the transferred phase amount Pi, the phased array antenna 7 can direct the pencil beam in an arbitrary space direction.

Therefore, the phased array antenna apparatus according to the first embodiment can be implemented without using a computer.
An LSI provided in a control circuit divided into operations similar to a computer
The size can be reduced because the processing is performed by the above method.

In the first embodiment, an example in which the control circuit is divided into a control circuit (a) 5 and a control circuit (b) 6 has been described.
It may be divided into two or more.

Embodiment 2 FIG. FIG. 2 is a diagram showing a configuration of a phased array antenna device according to Embodiment 2 of the present invention. In FIG. 2, as a new code, 8 is a multiplication circuit, 9 is an addition circuit, and 10 is a memory. Multiplication circuit 8
Is the multiplication part of the above equation (1), that is, kUX _i and kV
Calculate Y _i . At this time, the element position (X _i , Y _i ) and the wave number k are stored in the memory 10 and are read out from the memory 10 when calculating the multiplications kUX _i and kVY _i .

Next, the multiplication result kUX_iAnd kVY_iIs
The signal is transferred to the addition circuit 9 and the addition portion of the above equation (1)
Wachi kUX_i+ KVY_i+ C_iIs calculated. Correction at this time
Value C_iIs stored in the memory 10 and the addition kUX_i
+ kVY_i+ C_iIs read from the memory 10 when calculating
You. Finally, the adding circuit 9 calculates the phase amount P obtained by the equation (1). _i
To each module 2. Each module 2 above
P transferred_iIs set, the phased array
-Antenna 7 is a pencil beam in any direction with space
Can be oriented.

Therefore, in the phased array antenna apparatus according to the second embodiment, the control circuit is divided into an addition circuit, a multiplication circuit and a memory, so that as shown in FIG. 10 can also be provided outside the device, and the size of the phased array antenna device can be reduced.

Further, when the above-described addition circuit, multiplication circuit and memory are realized by an LSI, a dedicated LSI can be assigned to each of them, so that the circuit can be reduced in size and the power consumption can be reduced.

Embodiment 3 FIG. 3 is a diagram showing a configuration of a phased array antenna device according to Embodiment 3 of the present invention. In FIG. 3, 11 is a wave number data memory, 12 is an element position data memory, and 13 is a correction data memory as new codes. The multiplication circuit 8 is calculated by the above equation (1).
, I.e., kUX _i and kVY _i are calculated. At this time, the element position (X _i , Y _i ) is stored in the element position data memory 1
2 and the wave number k are stored in the wave number data memory 11. When calculating the multiplications kUX _i and kVY _i , the respective element position data memory 12 and wave number data memory 11 are stored.
Is read from.

Next, the multiplication result kUX_iAnd kVY_iIs
The signal is transferred to the addition circuit 9 and the addition portion of the above equation (1)
Wachi kUX_i+ KVY_i+ Ci is calculated. Correction at this time
Value C _iAre stored in the correction data memory 13, and
Addition kUX_i+ KVY_i+ C_iWhen calculating
Data from the data memory 13. Finally, the addition circuit 9
Phase amount P obtained by equation (1)_iTo each module 2
I do. Each of the modules 2 is the transferred P_iThe value of
The phased array antenna 7 is
Can direct the pencil beam in any direction
You.

Therefore, in the phased array antenna apparatus according to the third embodiment, since the above-mentioned memory is divided into the wave number data memory, the element position data memory, and the correction data memory, a small memory can be used. In addition, the size and power consumption of the circuit can be reduced, and the cost can be reduced.

Embodiment 4 FIG. 4 is a diagram showing a configuration of a phased array antenna device according to Embodiment 4 of the present invention. In FIG. 4, N adders 9 from # 1 to #N are provided. The multiplication circuit 8 calculates a multiplication part of the above equation (1), that is, kUX _i and kVY _i . At this time, the element position (X _i , Y _i ) and the wave number k are stored in the memory 1
0 and are read from the memory 10 when calculating the multiplications kUX _i and kVY _i .

Next, the multiplication results kUX _i and kVY _i are transferred to the addition circuit 9 to calculate the addition part of the above equation (1), ie, kUX _i + kVY _i + C _i . The above-described addition operation is performed by dividing by # 1 of the adder circuit 9 to #N of the adder circuit 9 for performing arithmetic transfer of data to each of the arbitrary module groups. In this case the correction value C _i is the memory 10
And is read from the memory 10 when the above addition kUX _i + kVY _i + C _i is calculated. Finally #N of the adder 9 from # 1 of the adder 9 is transferred to the module 2 connected to the phase amount P _i obtained by the equation (1).
Since each of the modules 2 sets the value of the transferred P _i , the phased array antenna 7 can direct the pencil beam in an arbitrary space direction.

Therefore, in the phased array antenna apparatus according to the fourth embodiment, the addition circuit
Since the addition circuit #N is divided from 1 and provided, even if some of the addition circuits fail, the entirety as a phased array antenna does not become inoperable, so that the reliability can be increased.

Embodiment 5 FIG. FIG. 5 is a diagram showing a configuration of a phased array antenna apparatus according to Embodiment 5 of the present invention. In FIG. 5, M multiplication circuits 8 from # 1 to #M are provided. From # 1 of the multiplication circuit 8 to #M of the multiplication circuit 8, the multiplication part of the above equation (1), that is, kUX _i and kVY _i is calculated. Note that the result of the multiplication operation is transferred by dividing the data from # 1 of the adder circuit 9 to #N of the adder circuit 9 respectively. At this time, the element position (X _i , Y _i ) and the wave number k are stored in the memory 10, and when the multiplications kUX _i and kVY _i are calculated, the memory 1
It is read from 0.

Next, the multiplication results kUX _i and kVY _i are transferred to the addition circuit 9 to calculate the addition part of the above equation (1), that is, kUX _i + kVY _i + C _i . The above-described addition operation is performed by dividing by # 1 of the adder circuit 9 to #N of the adder circuit 9 for performing arithmetic transfer of data to each of the arbitrary module groups. In this case the correction value C _i is the memory 10
And is read from the memory 10 when the above addition kUX _i + kVY _i + C _i is calculated. Finally #N of the adder 9 from # 1 of the adder 9 is transferred to the module 2 connected to the phase amount P _i obtained by the equation (1).
Since each of the modules 2 sets the value of the transferred P _i , the phased array antenna 7 can direct the pencil beam in an arbitrary space direction.

Therefore, in the phased array antenna apparatus according to the fifth embodiment, the addition circuit
1 to the addition circuit #N and the multiplication circuit divided from the multiplication circuit # 1 to the multiplication circuit #M, the operation function is subdivided when the addition circuit, the multiplication circuit and the memory are realized by the LSI. This has the effect of speeding up computations and transfers.

[0030]

According to the present invention, since the control circuit is divided into a plurality for each operation, the size of the phased array antenna can be reduced.

Further, since the control circuit is divided into an adder circuit, a multiplying circuit, and a memory, a dedicated LSI is used when the adder circuit, the multiplier circuit, and the memory are realized by the LSI.
Can be assigned to each of them, and downsizing of the circuit and low power consumption can be achieved.

Further, since the memory is divided into a wave number data memory, an element position data memory, and a correction data memory, a small memory can be used. Cost reduction can be achieved.

Further, since the addition circuit is divided into the addition circuits # 1 to #N, even if some of the addition circuits fail, all of the functions as a phased array antenna are not disabled. , Reliability can be improved.

Further, the addition circuit is divided from the addition circuit # 1 to the addition circuit #N and the multiplication circuit is divided from the multiplication circuit # 1 to the multiplication circuit #M. In realizing the memory and the memory, the arithmetic function is subdivided, so that the speed of arithmetic processing and transfer can be increased.

[Brief description of the drawings]

FIG. 1 is a diagram showing a configuration of a phased array antenna device according to Embodiment 1 of the present invention.

FIG. 2 is a diagram showing a configuration of a phased array antenna device according to Embodiment 2 of the present invention.

FIG. 3 is a diagram showing a configuration of a phased array antenna device according to Embodiment 3 of the present invention.

FIG. 4 is a diagram showing a configuration of a phased array antenna device according to Embodiment 4 of the present invention.

FIG. 5 is a diagram showing a configuration of a phased array antenna device according to Embodiment 5 of the present invention.

FIG. 6 is a diagram showing a configuration of a phased array antenna device according to a conventional antenna device.

FIG. 7 is a diagram showing a coordinate system of an antenna.

[Explanation of symbols]

1 element antenna, 2 modules, 3 power divider,
4 transmitter, 5 control circuit (a), 6 control circuit (b), 7
Phased array antenna, 8 multiplication circuit, 9 addition circuit, 10 memory, 11 wave number data memory, 12
Element position data memory, 13 Correction data memory, 14
Computer, 15 control circuits.

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 5J021 AA05 AA06 CA06 DB02 DB03 EA04 FA14 FA15 FA16 FA17 FA20 FA26 FA29 FA30 FA32 GA02 HA05 HA10

Claims (5)

[Claims] A transmitter for transmitting an RF signal; a power divider for receiving the RF signal from the transmitter and distributing the RF signal to a plurality of modules; and amplifying and phase-amplifying the RF signal distributed from the power divider. A plurality of modules for converting and outputting; a plurality of element antennas for radiating an RF signal output from the module to a space; and an arithmetic function for calculating an amplification amount and a phase amount of the RF signal. A control circuit for controlling the module based on the amount of amplification and the amount of phase, wherein the arithmetic function of the control circuit is divided into a plurality of functions. 2. The phased array antenna according to claim 1, wherein the control circuit divided into a plurality includes a multiplication circuit, an addition circuit, and a memory for storing data. apparatus. 3. The phased array antenna device according to claim 2, wherein the memory is a wave number data memory for storing wave number data of an RF signal, and an element position for storing position data for specifying a position of the element antenna. A phased array antenna device, comprising: a data memory; and a correction data memory storing correction values for calculating the amount of amplification and the amount of phase of the RF signal. 4. The phased array antenna device according to claim 2, wherein the plurality of modules comprises a group of N modules,
A phased array antenna device wherein the adder circuit is divided into N adder circuits, and the N module groups are controlled by the N adder circuits. 5. The phased array antenna device according to claim 4, wherein the multiplication circuit is divided into M multiplication circuits, and the N module groups are controlled by the N addition circuits. A phased array antenna device, wherein the number of adding circuits is controlled by the M number of multiplying circuits.