JP2002246809A - Signal processing circuit - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a signal processing circuit which eliminates separation of signals by switching, and achieves miniaturization, power saving, and circuit simplification. SOLUTION: A first phase shifter and a second phase shifter are provided with functions for converting input signals into signals whose phases are opposite to each other, and the first pass band filter and the second pass band filter are provided with pass band characteristics whose center frequencies are proximate to each other.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a signal processing circuit for receiving signals in a plurality of different bands and an information terminal device provided with the same.

[0002]

2. Description of the Related Art Conventionally, a signal processing circuit for selectively transmitting a plurality of different frequency bands is performed by a method as shown in FIG. That is, to extract a frequency of a desired band from an input signal, a switching circuit (7
The switching of 4) is performed, and through the first pass band filter (2) or the second pass band filter (4) corresponding to each frequency,
The signal is transmitted to a subsequent demodulation circuit (not shown). filter
(2) and (4) the frequency characteristics after passing are shown in FIG. 9 and FIG.
It becomes as shown in. FIG. 6 shows a system (70) in which the above circuit is applied to a mobile phone terminal device. The mobile phone device shown in this example has three band signals, one used in Europe.
DCS (digital cellular system) using 800 MHz band
m), PCS using 1900MHz band used in North America
(personal communication services) and GSM (global system) using 900MHz band used in Europe etc.
m for mobile communications) and is a conventional example that supports triple band.

The system (70) comprises an antenna ANT, a diplexer (41), a first transmitting / receiving circuit (20) for inputting / outputting either a DCS or PCS signal on the high frequency side, and a GSM signal on the low frequency side. It comprises a second transmitting / receiving circuit (30) for inputting and outputting.

[0004] The diplexer (41) separates a signal input from the antenna ANT into either a DCS or PCS signal whose center frequency band is close on the high frequency side and a GSM signal on the low frequency side, Either DCS or PCS signal is output to the first transmitting / receiving circuit (20),
Is output to the second transmitting / receiving circuit (30). Further, either the DCS or PCS signal input from the first transmission / reception circuit (20) and the GS signal input from the second transmission / reception circuit (30)
The M signals are combined and transmitted from the antenna ANT.

A first transmission / reception circuit (20) is a first switching circuit (2) for performing transmission / reception distribution according to a control signal VC1.
1), a first receiving circuit (11) and a first transmitting circuit (23) connected to the first switching circuit (21). DCS input from the diplexer (41) to the first transmitting / receiving circuit (20)
Alternatively, one of the signals of the PCS passes through the first switching circuit (21) and is input to the first transmitting / receiving circuit (20) having the switching circuit (74). Switching circuit (74)
Operates according to a control signal VC as described later,
If the reception signal of the transmission / reception circuit (20) is a DCS signal, the reception unit R
xd side, the DCS signal is output from the receiver Rxd, and if the received signal is a PCS signal, the receiver Rxd
The signal is switched to the xp side, and the PCS signal is output from the receiving unit Rxp. Further, either the DCS signal or the PCS signal to be transmitted is transmitted from the transmitting unit Txdp to the first transmitting circuit.
(23), and transmitted from the antenna ANT through the first switching circuit (21) and the diplexer (41).

A second transmission / reception circuit (30) is also a second switching circuit (3) for performing transmission / reception distribution according to a control signal VC2.
1), a second receiving circuit (32) and a second transmitting circuit (33) connected to the second switching circuit. The GSM signal input from the diplexer (41) to the second transmitting / receiving circuit (30) passes through the second switching circuit (31), is input to the second receiving circuit (32), and is output from the receiving unit Rxg. . The transmitted GSM signal is transmitted from the transmitting unit Txg to the second
The signal is input to the transmission circuit (33), and transmitted from the antenna ANT through the second switching circuit (31) and the diplexer (41).

[0007]

The above-mentioned first receiving circuit (11)
Is composed of a switching circuit (74) and two passband filters (2) and (4) (hereinafter referred to as "SAW filters") as shown in FIG. One of the SAW filters (2) and (4) is a DCS band-pass type, and the other (4) is a PCS band-pass type. The switching circuit (74) controls the control signal V
C, the selection of the SAW filters (2) and (4) to be connected is switched. When a DCS signal is input, the DCS SAW filter for the DCS is controlled by the control signal VC.
The connection is switched to (2). Conversely, when a PCS signal is input, the connection is switched to the SAW filter (4) for PCS.

That is, the switching circuit (74) itself has a function of distributing signals by the control signal VC, and the SAW filters (2) and (4) have a function of passing only a predetermined band signal. Therefore, the signals are separated in two stages, and the functions are duplicated. Although there is a strong demand for miniaturization of the system (70), there is a problem that it is disadvantageous to miniaturization in circuit design due to the presence of such redundant functions. The switching circuit (74) is generally composed of a diode switch.However, the diode cannot be formed directly on the substrate and must be mounted on the substrate. there were. In addition, the system (70) having the above-described configuration requires a complicated circuit by the switching circuit (74), an increase in power consumption by controlling the switching circuit (74), and furthermore, the number of signals by using the control signal. There were also problems such as an increase.

SUMMARY OF THE INVENTION An object of the present invention is to provide a signal processing circuit which can be used for an information terminal or the like and which can achieve miniaturization, power saving and simplification of a circuit, without distributing signals by switching.

[0010]

In order to solve the above problems, a signal processing circuit according to the present invention comprises a first signal path in which a first phase shifter and a first pass band filter are connected in series, and a second signal path. A second signal path in which a phase shifter and a second pass band filter are connected in series, wherein the first signal path and the second phase shifter are input sides, and the first signal path and the second signal path are connected to each other. A signal processing circuit having a signal path connected in parallel with the first phase shifter and the second phase shifter;
The phase shifter has a function of converting an input signal into signals having phases opposite to each other, and includes a first pass band filter and a second phase shifter.
The pass band filter is characterized in that the center frequencies have pass band characteristics close to each other. Further, the signal processing circuit is connected to the first signal path at 1800 MHz.
DCS (digital cellular system) using the z band,
PCS using a 1900 MHz band in the second signal path
(personal communications services).

[0011]

According to the present invention, a signal input to the signal processing circuit (11) (for example, a signal in an area where DCS is used)
Is the passband frequency f defined by the first phase shifter (1) and the first passband filter (2) in the first signal path.
1 with low loss, and in the second signal path, the frequency band f1 is passed through the second phase shifter (3) and the second passband filter (4).
After passing through the signal processing circuit (11), a signal having a frequency characteristic in which the side close to f2 of the frequency band f1 is sharply attenuated after passing through the signal processing circuit (11) in order to pass through the frequency band f2 which is a frequency near the frequency band with low phase shift. can do. That is, the frequency characteristic is
As shown in FIG. 3, it is possible to obtain a frequency characteristic in which the output of the frequency f1 is maximized and the frequency f2 near f1 is minimized. Further, when the input signal has a band frequency f2 (for example, P
When the frequency f2 is mainly used (when used in the CS area), as shown in FIG. 4, it is possible to obtain a characteristic in which the output of the frequency f2 is maximized and the frequency f1 is attenuated. At this time, as compared with the conventional switching type receiver, adjacent f1 and f2
Since the selectivity with respect to each other's frequency is increased, a desired frequency can be easily selected, and a receiver resistant to noise and the like can be configured. Further, since the signal processing circuit (11) does not require the switching and the control signal VC for switching for signal distribution, the number of signals can be reduced by one system as a system, and the power consumption by switching is unnecessary. can do. Further, first and second phase shifters
Since (1) and (3) can be formed directly on the substrate, the number of elements mounted on the substrate can be reduced as compared with the conventional case, and downsizing and simplification of the system (10) can be achieved.

[0012]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The configuration of the present invention will be described.
In FIG. 1, a signal including a certain frequency band from the outside is input to an input terminal (7). The first signal path (5) is a path for extracting the frequency band f1, and the second signal path (6) is a path for extracting the frequency band f2 near the frequency passing through the first signal path. FIG. 2 shows an embodiment in which the present invention is used as an information terminal such as a mobile phone. Note that the same reference numerals are given to the configurations described in FIG. 6 described above, and description thereof will be omitted. As an example of the receiving circuit, a first phase shifter (1) and a first SAW filter
Desirable frequency characteristics and impedance distribution of (2), the second phase shifter (3) and the second SAW filter (4) are shown in FIGS. As shown in FIG. 7, the first phase shifter (1) and the first
The characteristics of the SAW filter (2) are such that, for a signal in the frequency band f1 (for example, a signal in the DCS band: 1805 to 1880 MHz), the impedance becomes 50Ω (indicated by a point α1 in the drawing), and the signal in the PCS band (1930 to 1990 MHz). It is designed to have a high impedance (indicated by a point α2 in the figure) with respect to the signal. As shown in FIG. 8, the characteristics of the second phase shifter (3) and the second SAW filter (4) depend on the PCS band (19
30-1990MHz), the impedance is 50Ω
(Indicated by a point β1 in the figure), and the DCS band (1805-1.
880 MHz) signal is high impedance (point α2 in the figure).
).

When the input signal is in the frequency band f1 (for example, when used in the DCS area), in the first signal path, the first phase shifter passes the frequency band f1 with low loss, A frequency band f1 is selectively extracted by a pass band filter (SAW filter). On the other hand, in the second signal path, a circuit is configured such that the second phase shifter is in phase shift with respect to the first phase shifter, and the second pass band filter (SAW filter) is close to the frequency band f1. The frequency band f2 is selectively passed, and the second signal path passes through the frequency band f2 which has been shifted in phase from the first signal path. Therefore,
After the input signal passes through the first signal path and the second signal path, the frequency f
An output difference between 1 and the frequency f2 becomes a steep signal. That is, the frequency characteristics of the input signal after passing through the receiving circuit are as shown in FIG. On the other hand, when the input frequency is f2 (for example, when the frequency is used in the PCS area), FIG.

In the conventional switching type receiver, only the frequency bands f1 and f2 are selectively passed. In the present invention, the selectivity of the adjacent frequencies f1 and f2 to each other is increased. Therefore, a receiver resistant to noise and the like can be configured.

The description of the above embodiments is for the purpose of illustrating the present invention and should not be construed as limiting the invention described in the appended claims or reducing the scope thereof. Further, the configuration of each part of the present invention is not limited to the above embodiment, and various modifications can be made within the technical scope described in the claims.

[Brief description of the drawings]

FIG. 1 is a circuit block diagram of the present invention.

FIG. 2 is a circuit diagram showing one embodiment of the information terminal of the present invention.

FIG. 3 is a frequency output characteristic diagram of the signal processing circuit of the present invention.

FIG. 4 is a frequency output characteristic diagram of the signal processing circuit of the present invention.

FIG. 5 is a conventional circuit block diagram.

FIG. 6 is a circuit diagram showing one embodiment of a conventional information terminal.

FIG. 7 is a diagram showing frequency characteristics and impedance distribution of the first signal processing circuit of the present invention.

FIG. 8 is a diagram showing a frequency output and an impedance distribution of the second signal processing circuit of the present invention.

FIG. 9 is a graph showing a waveform after passing through a conventional filter.

FIG. 10 is a graph showing a waveform after passing through a conventional filter.

[Explanation of symbols]

 (1) First phase shifter (2) First pass band filter (3) Second phase shifter (4) Second pass band filter (5) First signal path (6) Second signal path (10) System (11) Signal processing circuit (receiving circuit, first receiving circuit) (20) First transmitting / receiving circuit (21) First switching circuit (41) Diplexer

 ────────────────────────────────────────────────── ─── Continuing on the front page (72) Keizo Miyamoto, Ichiban-ichi, Sanyo-cho, Daito-shi, Osaka Sanyo Electronics Parts Products Co., Ltd. Inside Electronic Components Co., Ltd. (72) Inventor Hideaki Fujiura Ichiban-cho, Sanyo-cho, Daito-shi, Osaka Sanyo Electronic Components Co., Ltd. F-term (reference) 5J006 KA04 KA24 5J012 BA04 GA13 5K011 DA27 GA02 JA01 KA04

Claims (2)

[Claims] 1. A first signal path in which a first phase shifter and a first pass band filter are connected in series, and a second signal path in which a second phase shifter and a second pass band filter are connected in series. , The first phase shifter and the second phase shifter being input sides,
In a signal processing circuit in which a signal path and the second signal path are connected in parallel, the first phase shifter and the second phase shifter have a function of converting input signals into signals having phases opposite to each other, The signal processing circuit according to claim 1, wherein the first passband filter and the second passband filter have passband characteristics whose center frequencies are close to each other. 2. The signal processing circuit according to claim 1, wherein the first signal path uses a DCS (d
digital cellular system), 1900 on the second signal path.
PCS (personal communications) using MHz band
An information terminal device used as a receiving circuit for receiving services).