JP2002244843A - Method and device for calculating reciprocal - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method and a device for calculating the reciprocal of normalized decimal part in a floating-point input number D. SOLUTION: An expression for determining the minimum size of a look-up table according to necessary precision and an expression for calculating a look-up entry are provided. The look-up table stores an initial approximation and a correction factor. The initial approximation and the correction factor are designated in address by a number corresponding to the highest position bit of a decimal part and are used for calculating a reciprocal of the initial approximate by a linear interpolation requiring a subtraction and a multiplication. A result of the linear interpolation can be supplied to a Newton-Raphson reiteration device requiring two multiplications and a complement calculation of 2 for each iteration to be able to double the precision of the reciprocal.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

TECHNICAL FIELD The present invention relates to signal processing.
In particular, it relates to a method and apparatus for calculating a reciprocal.

[0002]

2. Description of the Related Art Calculating a reciprocal plays an important role especially in a division operation with a floating-point decimal number. By using the reciprocal, the result of dividing the two numbers can be obtained by multiplying the dividend by the reciprocal of the divisor. This division method can be used to increase the speed at which complex calculations are processed by digital processing devices such as computers and application-specific integrated circuits such as digital signal processing (DSP) processors.

[0003] IEEE Standard 0754P-198 for Binary Floating Point Computation, which is incorporated herein by reference.
According to 5, the floating-point standard number in the floating-point format is packed into 32 bits with a single-precision mantissa (decimal part) of 24 bits or 64 bits with a double-precision mantissa of 53 bits. Will be packed.

[0004] Direct approximation, linear interpolation, quadratic (square)
e) Several interpolation and iterative methods, including interpolation, cubic interpolation, etc., are widely used by developers to calculate reciprocals.

In the direct approximation method for obtaining the reciprocal, all possible fractions for the reciprocal are stored in a ROM table. Although the results can be obtained immediately using this method, this method requires a very large amount of memory. For example, to obtain the reciprocal in the IEEE standard 754 single precision floating point format, 2 ²³ × 23 =
Requires 184 Mbits of memory.

[0006] The linear interpolation method is based on the mean value theorem from the calculation and can be summarized as follows for the calculation of the reciprocal.

[0007]

(Equation 4)

In the above equation, ξ∈ [x ₀ , x] and x ≧ x ₀ .

It is also possible to use quadratic, cubic and other interpolation methods to obtain the reciprocal with the required precision. However, all of these methods require additional multiplication operations and additional memory to store correction factors. A major drawback of the interpolation method is that as the desired accuracy increases, so does the amount of memory required to store the required data.

In digital computers, the Newton-Raphson iteration method is widely used to calculate the reciprocal. In this way, a solution to the equation f (z) = 0 (2) is provided based on using the following recursive equation:

[0011]

(Equation 5)

The value z _i obtained after iteration i is quadratic
And consequently the corresponding error ε after iterations i and i + 1 is related by: ε (z _{i + 1} ) ≦ ε ² (z _i ) (4)

By using the Newton-Raphson method to calculate the reciprocal x = (1 / a), the following equation is generated. _{x i + 1 = x i *} (2-a * x i) (5)

As can be seen from equation (5), every iteration step of the method involves two multiplication operations performed in succession and one "two's complement" operation. Thus, the accuracy of the reciprocal is doubled after each iteration step.
A disadvantage of the Newton-Raphson iteration method itself is that it may require multiple iteration steps to obtain a reciprocal with the required accuracy.

To overcome the above drawbacks, methods have been developed that use some type of interpolation method to obtain an initial approximation of the reciprocal, and then use an iterative method based on this approximation. As an example, it has been proposed to use an inverted table to obtain initial values for successive iterations.

[0016]

SUMMARY OF THE INVENTION The present invention provides a method and apparatus for dividing values that can deliver reciprocals immediately and with high precision.

[0017]

According to the method of the present invention,
Linear interpolation is used to obtain an inverse approximation. This approximation can then be used as input for Newton-Raphson iterations to calculate the reciprocal with high accuracy.

Unlike the prior art methods, the method of the present invention provides an equation for calculating the minimum number of entries in the look-up table to obtain an approximation of the reciprocal with the required precision. The method of the present invention also provides an equation for calculating the initial approximation and a correction factor for constructing an entry in the look-up table. An apparatus for implementing the method of the present invention comprises a look-up table memory for storing these values, an integer multiplier, and a subtractor.

Accordingly, the present invention provides an output signal representing an output value, represented by an input signal, that approximates the reciprocal of an input value D having a normalized fractional part M, where 1 ≦ M <2. To provide a way. The method includes an input signal including a set of N ₀ most significant bits and an output signal approximating a reciprocal having a desired accuracy ε = 2 ^−N as N ≦ N ₀ , and includes the following steps: .

A. Generating a number n of entries in a plurality of lookup tables, where n = 2 ^P for a set of P most significant bits of the input signal,
i. i = 0,. . . , N-1 generating a set of input entries y _i in the first look-up table, including a set of N significant bits, as a first lookup table; ii. i =
0,. . . , N-1 to generate a set of input entries K _i in the second look-up table including a set of (N−P) significant bits; b. Finding entries y _i and K _i in a look-up table corresponding to the set of P most significant bits of the input signal; c. Multiplying K _i by a signal comprising a set of (N−P) significant bits following the set of P most significant bits of the input signal; d. Entry y _i
Subtracting the (N−P) most significant bits from the N significant bits.

In another aspect of the method of the present invention, the step of generating n entries in the look-up table includes the following sub-steps. iii. Calculating a minimum number l of look-up table entries required to obtain an accuracy higher than the desired accuracy,

[0022]

(Equation 6)

Iv. 2 ^P-1 <
substep of finding the required minimum number n of look-up table entries for n = 2 ^P , where l and 2 ^P ≧ l. Generating a set of input entries in the first look-up table includes the following sub-steps. A.

[0024]

(Equation 7)

Here, i = 0,. . . , N−1, x ₀ =
B.1, and calculating as x _{i + 1} = x _i + (1 / n); It contains a set of N valid bits, i = 0,. . . A sub-step of finding an entry y _i approximating the fractional portion of the y ^ _i for n-1. And / or generating a set of input entries in the second lookup table includes the following sub-steps.

[0026]

(Equation 8)

And a set of (N−
P) Entry K containing valid bits _iAnd find i =
0,. . . , N−1}_iApproximate the integer part of
Substep.

The present invention provides a normalized fraction M (where 1 ≦ M) containing a set of N ₀ most significant bits, where N ₀ ≧ N.
Reciprocal I with precision ε = 2- ^N of input value D having <2)
There is further provided an apparatus for calculating This device is
At least one processor and a first memory forming a look-up table addressed as a function of the P most significant bits of the fractional part M and having an output I ₀ comprising a set of N significant bits; A second memory forming a look-up table addressed as a function of the P most significant bits of the fraction M and having an output K comprising a set of (NP) significant bits; And two inputs of a set of (NP) valid bits following the set of P most significant bits of output K, and a set of (NP) * (N-
P) with the output MU containing the significant bits
−P) × (NP) multiplier and an output I.
An adder / subtractor having two inputs connected to receive ₀ and the (NP) most significant bit set of the output MU, respectively.

In another aspect of the apparatus of the present invention, the first memory and the second memory are combined with a storage device that stores both I ₀ and K, and as a function of the P most significant bits of the fractional part M. Addressed. The apparatus further comprises an apparatus for performing a programmed Newton-Raphson iteration based on I. The first memory comprises a read-only memory (ROM). The second memory comprises a read-only memory (ROM). The storage device includes at least one read-only memory (ROM). And / or a device is included in the digital signal processing device.

The drawings show by way of example only preferred embodiments of the invention.

[0031]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention is applicable to calculations using the fractional part M of a binary number D in floating point format. It is assumed that the decimal part M of the number of inputs is normalized in advance, that is, 1 or more and less than 2, and 1 ≦ M <2.

FIG. 1 shows a preferred embodiment of the linear interpolation method used in the method of the present invention to approximate reciprocals. Compared to the direct approximation method, linear interpolation significantly reduces the number of entries that need to be stored in the look-up table. In order to use the direct approximation method and to achieve N-bit precision ε = 2- ^N for the reciprocal fraction M, the look-up table is 2 ^N −1 equally spaced requires a entries, using the linear interpolation method, in order to obtain the accuracy epsilon = 2 ^-N of the same N bit for the decimal part of the reciprocal, as P ≦ N, while the look-up table It is sufficient to have 2 ^P entries. Since each entry differs from the previous entry by 2 ^{- P} , the P most significant bits (MSB) of the fractional part M are
Configure the lookup table address.

The values x _i and x _{i + 1 in} FIG. 1 represent two consecutive entries in the look-up table. Value y
_i is the value stored in the lookup table (1 /
x _i ). The value (x-x _i) is represented by the bit immediately after the first of the P MSB of the fractional part.

The required reciprocal approximation is represented by the following equation: y = In _{y i -k i (x-x} i) (6) the above equation, k _i is a correction factor, which is _{x i ≦ x <x i +} 1.

In order to obtain a reciprocal fraction M with N-bit precision, at least (NP) bits after the P MSBs of the fraction M are at least (NP) bits of the correction coefficient k _i shown in FIG. Must match (NP) valid bits. These coefficients are stored in a look-up table in the integer form K _i = 2 ^NP × k _i . Therefore, to obtain a reciprocal fraction M having N-bit precision, a coefficient is added to the (NP) bits of the fraction M in an integer multiplier of size (NP) × (NP). Multiplying the ( ^NP ) bits of K _i , dividing the result by 2 ^NP , and then subtracting the quotient from y _i .

The N bits of the decimal part M for y _i and the (N−P) bits for integer K _i are stored in a look-up table. The values y _i and K _i are calculated with N and (N−P) precision, respectively, according to the following equations:

[0037]

(Equation 9)

In the above equation, n is the number of entries in the look-up table.

The maximum error ε of the linear interpolation method for finding the reciprocal of the decimal part M is normalized to be between 1 and 2 depending on n, and is expressed by the following equation.

[0040]

(Equation 10)

If the required maximum error ε is known,
The required number n of entries in the lookup table can be determined from equation (9).

For example, for n = 64, the maximum error ε of the linear interpolation method for obtaining the reciprocal is ε ≒ 2.98 * 10
^-5 > ^2-16 , and for n = 128, the maximum error by the linear interpolation method is equal to ε ≒ 7.54 * 10 ^-6 <2 ^-16 .

FIG. 2 shows an apparatus 10 for calculating a reciprocal according to the invention, implementing a method as described above. The P MSBs of the fractional part M of the input number D form an address line of the ROM 12 having 2 ^P entries. ROM
12 performs P fractional M executions to perform linear interpolation.
Stores N bits for reciprocal y _i of SB (However, since the first bit of the inverse is always "0", (N-1) it is sufficient to store a bit), the correction coefficient K _i (N -P) It is preferable to store bits.

The (NP) bits of the correction coefficient K are supplied to one input of an integer multiplier 14 having a size (NP) × (NP). Another input of the multiplier 14 is provided with the (NP) bits immediately following the P MSBs of the input fraction M. (NP) MSB MUs of the product obtained by multiplying by (NP) x (NP) bit length
Is supplied to the input of an integer subtractor 16 having size N. The P MSBs of the input MU are all "0" and the (NP) least significant bits (LSB) of the product are discarded. Another input of the subtractor 16 is supplied with N bits (shown as I _{0 in} FIG. 2) of the reciprocal approximation y _i from the ROM 12. The result of the subtraction forms the N-bit output of device 10 (shown as I in FIG. 2).

If the P MSBs of the input fraction M are equal to "1" (ie, the most significant bit is "1" and the other (P-1) bits are "0"), the output I Is MU
(N−P) bits of one's complement,
Note that the calculations are simplified.

FIG. 3 shows an apparatus 20 for performing a Newton-Raphson iteration of the result of a linear interpolation to increase the precision of the result from N bits to 2N bits. The N bits of the output I from the interpolation device 10 are of size N × 2N
Is provided to the input of the integer multiplier 22. Multiplier 2
Another input of 2 is the output 2 of multiplexer 24.
N bits are provided. Multiplexer 24 provides 2N of input fraction M (filled with additional "0" if necessary).
The MSBs and the 2N bits of the output of the two's complement device 26 are alternately selected.

The multiplier 22 generates a result having a length of 3N bits. The N least significant sets of products of this multiplication are discarded.
The 2N most significant bits MU1 of the product are provided to a two's complement unit 26. The output of the 2N-bit two's complement device 26 is supplied to the multiplexer 24. On the second pass through the multiplier 22, the 2N MSBs of the product of the multiplication are
2N bit output (shown as I _{1 in} FIG. 3).

While the preferred embodiment of the invention has been illustrated and described by way of example only, it is to be understood that changes and modifications can be made without departing from the scope of the invention as set forth in the claims below. It will be clear to those skilled in the art.

[Brief description of the drawings]

FIG. 1 is a graph showing a linear interpolation method used in the present invention.

FIG. 2 is a block diagram showing a linear interpolation device according to the present invention for obtaining N-bit precision for a reciprocal fraction part.

FIG. 3 is a block diagram showing a Newton-Raphson iterator for obtaining 2N-bit precision for the reciprocal fraction part.

[Explanation of symbols]

 12 ROM 14 Integer Multiplier 16 Integer Subtractor 22 Multiplier 24 Multiplexer 26 Two's Complement Device

 ──────────────────────────────────────────────────続 き Continuation of the front page (71) Applicant 501488860 1550 16th Avenue, Bldg. F, 2nd Floor Richmond d Hill, Ontario Cana da L4B 3K9 (72) Inventor Alexei Crowgrab Canada M8 W 4 Sea 5 Ontario Etobicoke Crown Hill Place 9 No. 310 (72) Inventor Jie Zou Canada M2M 3A5 Ontario North York Rowbank Court 29 (72) Inventor Daniel Gadmanson Canada El 3X 1S6 Ontario Newmarket Jerry Avenue 200 F term (reference) 5B016 AA05 BA07 CD01 EA15 5B022 BA01 FA06

Claims (11)

[Claims] 1. A method for generating an output signal representing an output value approximating a reciprocal of an input value D having a normalized fractional part M (where 1 ≦ M <2) represented by the input signal. Thus, the input signal includes a set of N ₀ most significant bits, and the output signal has the desired precision ε = 2, where N ≦ N ₀
Approximate the reciprocal with ^-N , a. For a set of P most significant bits of the input signal,
generating the number n of entries in the plurality of look-up tables, where n = 2 ^P , i. i = 0,. . . , N-1 generating a set of input entries y _i in the first look-up table, including a set of N significant bits, as a first lookup table; ii. i = 0,. . . , N-1 to generate a set of input entries K _i in the second look-up table including a set of (N−P) valid bits, b. Finding entries y _i and K _i in a look-up table corresponding to the set of P most significant bits of the input signal; c. Multiplying K _i by a signal comprising a set of (N−P) significant bits following the set of P most significant bits of the input signal; d. From the set of N valid bits of entry y _i , (N
-P) drawing a set of the most significant bits. 2. Creating N entries in a look-up table, comprising: iii. A sub-step of calculating the minimum number l of look-up table entries required to obtain an accuracy higher than the desired accuracy, And iv. Assuming that 2 ^P−1 <l and 2 ^P ≧ l, n = 2 ^P
Sub-step of finding the required minimum number n of look-up table entries for. 3. The step of generating a set of input entries in said first look-up table comprises: (Equation 2) Here, i = 0,. . . B., n-1, x ₀ = 1, and x _{i + 1} = x _i + (1 / n); Find an entry y _i that contains a set of N significant bits, i = 0,. . . , N-1 for approximating the fractional part of y ＾ _i . 4. The step of generating a set of input entries in said second look-up table comprises: (Equation 3) Here, i = 0,. . . B., n-1, x ₀ = 1, and x _{i + 1} = x _i + (1 / n); Contains a set of (NP) valid bits, i =
0,. . . , N-1 to find an entry K _i approximating the integer part of K ＾ _i . 5. The precision ε = 2- ^N of an input value D having a normalized fraction M (1 ≦ M <2) including a set of N ₀ most significant bits, where N ₀ ≧ N. An apparatus for calculating a reciprocal I having at least one processor and a look-up table addressed as a function of the P most significant bits of a fraction M, comprising a set of N valid bits. a first memory having an output I ₀ including bit, to form a look-up table which is addressed as a function of the P most significant bits of the fractional part M, 1 set of (N-
A second memory having an output K containing P) significant bits, and two inputs of a set of (NP) valid bits following the fraction M and the set of P most significant bits of the output K. And a multiplier of size (NP) * (NP) having an output MU comprising a set of (NP) * (NP) significant bits; An apparatus, comprising: an adder / subtractor having two inputs connected to receive I ₀ and a set of (N−P) most significant bits of an output MU, respectively. 6. The memory of claim 1, wherein the first memory and the second memory are combined with a storage device that stores both I ₀ and K and are addressed as a function of the P most significant bits of the fractional part M. An apparatus according to claim 5, characterized in that: 7. The apparatus of claim 5, further comprising an apparatus for performing a programmed Newton-Raphson iteration based on I. 8. The apparatus according to claim 5, wherein said first memory comprises a read only memory (ROM). 9. The apparatus of claim 5, wherein said second memory comprises a read only memory (ROM). 10. The apparatus of claim 6, wherein said storage device comprises at least one read only memory (ROM). 11. A digital signal processing device comprising the device of claim 5.