JP2002237520A - Wiring correction device and method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To efficiently and highly accurately form the long connection wiring of low resistance without adversely affecting a semiconductor element at the time of correcting the internal wiring of the semiconductor element. SOLUTION: Open hole parts respectively reaching the internal wiring 17a and 17c provided in the semiconductor element 6 are formed by using a converged FIB(focusing ion beam) 1 and a first plug 65 and a second plug 66 are respectively formed at the respective open hole parts by irradiating them with the FIB 1 while blowing a metal compound gas from a gas nozzle 13. Then, by using a conductor supplier 53 sending out a wire-like metal conductor 56, a metal conductor 56 is installed from the first plug 65 to the second plug 66. Both end parts of the metal conductor 56 are bonded with the first plug 65 and the second plug 66 by a metal film formed by irradiating them with the FIB 1 while blowing the metal compound gas.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wiring repairing apparatus and a wiring repairing method for repairing a wiring provided on a semiconductor device by using a focused ion beam or a laser beam, and more particularly to a wiring repairing method such as Au or Al having a low resistance. The present invention relates to a wiring correction device and a wiring correction method capable of forming a long wiring with low resistance without adversely affecting a semiconductor element by using a wire-shaped metal conductor formed by the method described above.

[0002]

2. Description of the Related Art The following two methods are known as methods for correcting internal wiring provided in a semiconductor element. The first wiring correction method is a method using a focused ion beam apparatus for focusing and irradiating an ion beam, and the second wiring correction method is a method using a laser direct drawing apparatus for drawing by irradiating a laser beam. is there. Hereinafter, these methods will be described. In the following description, the focused ion beam is referred to as FIB.

The FIB apparatus can locally irradiate the surface of a semiconductor element with FIB and remove a protective film and an internal wiring on an internal wiring provided inside the semiconductor element by a sputtering phenomenon. In addition, ion excitation C
By VD, a film can be formed in an arbitrary region in a semiconductor element.

FIG. 8 is a schematic configuration diagram of a system for correcting internal wiring of a semiconductor element using an FIB device. The FIB apparatus A for irradiating a focused ion beam is provided on a sample chamber 4 in which a semiconductor element 6 whose internal wiring is to be corrected is arranged. The FIB apparatus A focuses the FIB 1 extracted by the high electric field from the ion source 2 to a diameter of at least about 0.01 μm by the electrostatic lens housed in the lens barrel 3 and irradiates the FIB 1 into the sample chamber 4. .

[0005] A sample stage 5 is arranged inside the sample chamber 4, and a semiconductor element 6 whose internal wiring is to be corrected is fixed on the sample stage 5. FIB device A
A predetermined portion of the semiconductor element 6 fixed on the sample stage 5 is irradiated with the FIB 1. The FIB device A includes a vacuum pump 11 inside the lens barrel 3 for stably focusing the FIB 1 and forming a stable processing environment.
a, a high vacuum of about 1 × 10 ⁻⁷ Torr is always maintained. Similarly, the inside of the sample chamber 4 is also constantly maintained in a high vacuum of about 1 × 10 ⁻⁷ Torr by the vacuum pump 11b. Is held in.

The sample stage 5 is usually driven in five axes (movements in directions perpendicular to each other in the X-axis, Y-axis, and Z-axis directions, inclination with respect to the horizontal, and rotation around the vertical axis). Has become possible. When only the internal wiring of the semiconductor element 6 is to be corrected, the sample stage 5 is driven in four axes (movement in directions along the X-axis, Y-axis, and Z-axis directions, and rotation around the vertical axis). Can be supported. The sample stage 5 is driven by five axes or four axes by a dedicated controller provided in the CPU 9.

When the semiconductor element 6 is irradiated with the FIB 1, secondary electrons and secondary ions 7 are emitted from the surface of the semiconductor element 6, and the secondary electrons and the secondary ions 7 are attached to a portion facing the sample stage 5. Is detected by the detected detector 8. The detection result by the detector 8 is subjected to image processing by the CPU 9, and the surface image of the semiconductor element 6 is displayed on the display screen of the monitor 10. Thereby, the operator can observe the surface shape of the semiconductor element 6 at a high magnification by the image displayed on the display screen of the monitor 10.

When correcting any internal wiring provided in the semiconductor element 6, the operator moves the sample stage 5 to the CPU 9 while observing the image of the semiconductor element 6 displayed on the display screen of the monitor 10. Driven by the connected dedicated controller 12, the corrected portion of the internal wiring in the semiconductor element 6 is aligned with the position irradiated with the FIB1, and the portion is processed.

Above the sample stage 5, a gas nozzle 13 used for forming connection wiring when correcting internal wiring in the semiconductor element 6 is disposed. 1
The semiconductor element 6 fixed on the sample stage 5 is irradiated from the tip end of the sample stage 3. This gas nozzle 13
Has an expansion / contraction function, and when used for forming a metal wiring or the like, its tip can be brought close to the surface of the semiconductor element 6 to a distance of 0.5 mm.

By switching the type of gas filled in the gas cylinder 14, an insulating film can be formed on an object to be processed on the sample stage 5.

FIG. 9 shows a general structure of a semiconductor element 6 whose wiring is corrected by such a device. The semiconductor element 6, which mainly forms a logic, is wired on the Si substrate 20 on which the transistor element 20a is provided, for example, in a state in which three layers of internal wirings 17a, 17b, and 17c are stacked on each other. The insulating layer 1 is provided between the lowermost internal wiring 17a and the upper internal wiring 17b and between the inner wiring 17b and the uppermost internal wiring 17c.
8 electrically insulated. The lowermost internal wiring 17 a is connected to the Si substrate 20 by the conductive plug 19.
Is ohmic-connected to the diffusion layer 20b of the transistor element 20a.

The internal wiring 17c provided on the uppermost layer of the semiconductor element 6 is covered with a protective film (passivation) 15 to prevent scratches and impurities from entering. As the protective film 15, a two-layer film in which Si ₃ N ₄ and SiO ₃ are laminated is usually used, and the total thickness of the two layers is about 1 μm. An organic film 16 having a thickness of about 3 μm is formed on the protective film 15. The organic film 16 may not be provided in some cases.

When the organic film 16 is provided, when the internal wirings 17a to 17c are corrected, the etching time for removing the protective film 15 on the uppermost internal wiring 17a becomes longer. For this reason, if the organic film 16 is removed in advance by a chemical solution, for example, fuming nitric acid, the internal wiring 1
Modification of 7a to 17c becomes easy. The chemical in this case is
Al without a protective film provided on a semiconductor element
A material that does not easily affect a pad or the like is preferable.

A procedure for correcting the internal wiring using the FIB device A will be described with reference to FIGS.

First, as shown in FIG. 10A, a case where arbitrary internal wirings are connected to each other will be described. For example, the lowermost internal wiring 17a and the uppermost internal wiring 17c
Are connected to the internal wirings 17a and 17c.
The FIB apparatus A irradiates the focused FIB 1 to the protective film 15 located above the portion where the wiring formed for connecting the wires is provided.

For example, first, FIB1 is irradiated to a portion of the protective film 15 corresponding to a predetermined portion of the lowermost internal wiring 17a. Thereby, the FIB1 is generated due to the sputtering phenomenon.
Etching proceeds only in the region 21 irradiated with. Then, when the etching progresses to the internal wiring 17a to be corrected, the irradiation of the FBI 1 is stopped. Thereby, the opening 22 reaching the lowermost internal wiring 17a is formed.
Is formed, and a part of the internal wiring 17a is
Exposed through.

Next, the focused FIB1 is irradiated to the portion of the protective film 15 located on a predetermined portion of the uppermost internal wiring 17c connected to the lowermost internal wiring 17a.
An opening 22 is formed in the protective layer 15.

The etching time by the irradiation of FIB1 is as follows.
It varies depending on the area of the irradiation region 21 of the FIB 1 and the beam current of the FIB 1 to be used, but it takes about one minute if an optimum etching condition is selected. The operation of forming the opening 22 on the surface of the semiconductor element 6 by irradiating the FIB 1 is referred to as FIB opening.

When the opening of the FIB is completed, as shown in FIG. 10B, the exposed lowermost internal wiring 17a and the uppermost internal wiring 17c are connected to each other by a new connection wiring. In this case, while irradiating the FIB 1 onto each of the openings 22 and the protective layer 15, a metal compound gas is blown from the gas nozzle 13 so that a predetermined metal is deposited on the inside of each of the openings 22 and the protective layer 15. They are deposited to form connection wiring.

The metal compound gas blown from the gas nozzle 13 into the opening 22 is generally a combination of W (tungsten), Pt (platinum), etc. with CO (carbon). Here, the case where W (CO) ₆ “tungsten hexacarbonyl” is used will be described.

The tip of a gas nozzle 13 for spraying a metal compound gas is brought close to the surface of the semiconductor element 6, and W (C
O) Inject ₆ gases. At this time, the degree of vacuum in the sample chamber 4 is reduced from 10 ⁻⁷ Torr to 10 ⁻⁵ Torr. Then, the FIB is formed in a region where a new connection wiring is to be formed.
1 is irradiated, FIB1 is irradiated at a portion where W is irradiated.
The reaction of (CO) _{6 with} the gas occurs, and W (CO) ₆ is separated into W and CO. Then, the separated CO is discharged from the sample chamber 4 to the outside by the vacuum pump 11, and only the remaining W accumulates in the irradiation area of the FIB1. Thus, the connection wiring 23 is formed by the deposited W.
The connection wiring 23 includes a part of Ga, CO, or the like, which is a main component of the FIB1, but does not have any particular problem in the function as the wiring because it has conductivity. In this manner, the lowermost internal wiring 17a and the uppermost internal wiring 17c are
The connection wiring 23 is connected in a conductive state.

Next, a case in which the internal wiring of the semiconductor element is cut and repaired will be described. FIG. 10C shows a state in which the internal wiring 17c in the uppermost layer is cut. In this case, FIB1 is irradiated to the protective film 15 corresponding to the cut portion of the internal wiring 17c in the uppermost layer by the same procedure as the opening of the FIB described with reference to FIG. The protective film 15 in the region 21 is etched. Then, the FI is set so that the etching time becomes longer.
By extending the irradiation time of B1 and continuing the etching even after the etching progresses to the inside of the internal wiring 17c, the internal wiring 17c is etched and cut over the entire thickness direction. Thereby, the uppermost internal wiring 17c is cut.

Next, a description will be given of a wiring correction method using a laser direct-writing apparatus with respect to such a wiring correction method using the FIB apparatus.

The laser direct writing apparatus irradiates the internal wiring of the semiconductor element with a laser beam having a short pulse width and heats and evaporates the surface of the internal wiring, thereby removing the protective film on the internal wiring. be able to. Further, it is also possible to form a film in an arbitrary region by laser CVD processing.

FIG. 11 shows a schematic configuration of a system for correcting internal wiring of a semiconductor element by a laser direct writing apparatus.

The laser direct writing apparatus B emits a laser beam in the horizontal direction by an oscillator 24 of a YAG laser or an Ar laser, and the emitted laser beam 25 is applied to a vertical lens barrel of a microscope. 26
The light is irradiated to the half mirror 27 in the inside. Half mirror 27
Reflects the laser beam to be irradiated downward, passes through the objective lens 28, and irradiates the sample chamber 30 disposed therebelow.

A glass window 29 is provided on the upper surface of the sample chamber 30, and the laser beam 25 is applied to the glass window 2.
9 and enter the sample chamber 30. In the sample chamber 30, a sample stage 31 is provided horizontally, and the semiconductor element 6 is fixed on the sample stage 31.
The laser beam 25 applied from the glass window 29 into the sample chamber 30 is applied to the surface of the semiconductor element 6 fixed to the sample stage 31.

A gas supply pipe 32 for supplying a metal gas into the sample chamber 30 is connected to one side of the sample chamber 30, and the sample chamber 30 to which the gas supply pipe 32 is connected is connected.
An exhaust pipe 33 for discharging gas from the sample chamber 30 is connected to the other side.

The eyepiece in the lens barrel 26 of the microscope has C
A CD camera 35 is attached, and the state in which the semiconductor element 6 fixed on the sample stage 31 of the sample chamber 30 is processed by the laser beam 25 is photographed by the CCD camera 35 via the half mirror 27. Is done. The state of the laser processing captured by the CCD camera 35 is image-processed by the CPU 35 and
Will be displayed on the screen. The sample stage 31 includes a CPU 35
Is controlled by the CPU 35 based on the conditions input by the input device 37 attached to the.

Using the laser direct writing apparatus B, the sample chamber 30
The procedure for correcting the internal wiring of the semiconductor element 6 disposed therein will be described with reference to FIGS.

As shown in FIG. 12A, the semiconductor element 6
Are two layers of internal wirings 17a and 17
b is provided in a laminated state with the insulating film 18 interposed therebetween.
Then, the uppermost internal wiring 17b and the lowermost internal wiring 1
7a, first, the uppermost internal wiring 1
7b, a short pulse laser beam 25
Is irradiated. When the internal wiring 17b is irradiated with the laser beam 25, the temperature of the internal wiring 17b absorbing the optical energy of the laser beam 25 rises rapidly, and
The protective film 15 is removed by melting and evaporating the metal material such as Al of 7b, and the opening 38 is formed. Thereby, the surface of the internal wiring 17b is exposed in the opening 38.

As described above, since the opening 38 is formed by the evaporating action of the material constituting the internal wiring 17b, the opening 38 has a thin and wide shape like a crater. Opening part 2 to be formed
As in 2, it cannot be formed in a narrow and deep shape. When the opening 38 is formed by the laser beam 25, it is necessary to prevent the laser beam 25 from unnecessarily melting the Al and the like constituting the internal wiring 17 b of the semiconductor element 6. The work of exposing the internal wiring 17b by irradiating such a laser beam is referred to as laser aperture.

Similarly, the protective film 15 corresponding to the portion to which the connection wiring is connected on the lowermost internal wiring 17a.
Is removed to form the opening 38.

When the laser opening is completed in this way, the internal wiring is supplied while supplying a metal compound gas (usually a mixed gas of W (CO) ₆ and Ar) into the sample chamber 30 through the gas supply pipe 32. A laser beam 25 is applied to a region where a connection wiring for connecting the internal wiring 17a to the internal wiring 17a is formed. In this case, as shown in FIG. 12B, an irradiation point 39 on the surface of the semiconductor element 6 to be irradiated with the laser beam.
Then, the metal compound gas is composed of metal (W) 40 and gas (CO
Alternatively, the metal (W) 40 is thermally decomposed into CO ₂ ) 41, and the gas (CO or CO ₂ ) 41 is discharged through the gas exhaust pipe 33 connected to the sample chamber 30. Then, the metal gas connecting the internal wires 17b and 17a is formed by the deposited gas 41.

When a long metal wiring is formed, the sample stage 31 is moved while irradiating the laser beam 25, and the irradiation point 39 of the laser beam 25 is moved. W) 4
0 is deposited. Thus, the metal wiring can be formed while forming the opening 38, and the metal wiring can be formed in a shorter time than in the case where the metal wiring is formed by irradiation of the FIB1.

[0036]

When the wiring of the semiconductor element is corrected using the FIB apparatus A and the laser direct drawing apparatus B, each has advantages and disadvantages. First, advantages and disadvantages (problems) when wiring correction is performed using the FIB device A will be described.

In the FIB apparatus A, since the ion beam can be focused to a minimum of 0.01 μm, an opening can be formed in a protective film on an arbitrary internal wiring for a fine wiring pattern. In addition, there is an advantage that the internal wiring can be connected and disconnected in a narrow range. In recent semiconductor elements, the internal wiring is multi-layered into three to seven layers, and it is indispensable to use the FIB device A when correcting the internal wiring in the lower layer. On the other hand,
When it is not necessary to form fine wiring, for example, when short-circuiting the wiring located at the end of the semiconductor element, the wiring of the metal (W) to be formed becomes as long as several mm,
The resistance of the connection wiring itself increases, and an enormous amount of processing time is required. Therefore, in this case, it is an unrealistic correction method.

As described above, the wiring correction method using the FIB apparatus A is applicable to a semiconductor element having a multilayer wiring structure by the following equation (1).
It can be said that it is effective for correction within a narrow range of 0 μm square.

On the other hand, advantages and disadvantages (problems) in the case where the wiring correction is performed by using the laser direct writing apparatus B are as follows.

When a laser beam is used, the time required for forming an opening in the protective film on the internal wiring and connecting or disconnecting the internal wiring is shorter than that of the FIB apparatus A.
The formation of the opening in the protective film and the cutting of the internal wiring can be performed in several seconds per one place. In the case where the internal wirings are connected by long connection wirings, the wiring formation speed is high, and the length of 30 μm can be formed in about 1 minute. As described above, when the laser direct writing apparatus B is used, the correction processing can be performed at about 10 times as high speed as when the FIB apparatus A is used.

However, there is a problem that fine processing by the laser direct writing apparatus B is not easy. That is, when an opening is formed in the protective film on the internal wiring, in the laser direct-writing apparatus B, the evaporation area of the internal wiring is used, so that the area of the opening tends to increase. Compared to the case where the opening is formed in the protective film by A, the opening is formed about 5 times in the upper internal wiring and about 10 times in the lower internal wiring. Also, when exposing the lower internal wiring in the semiconductor element having a multilayer wiring structure, it is necessary to increase the energy of the laser beam, so the internal wiring around the opening is also melted,
There is also a possibility that damage such as disconnection may be given to an internal wiring portion not related to the correction.

Similarly, when cutting the internal wiring, the internal wiring may be largely melted.

As described above, in the case of the laser direct writing apparatus B, the opening formed by the FIB apparatus A is
Since an area to form an opening about 0 times is required,
Depending on the pattern of the internal wiring, there is a possibility that such an opening cannot be formed. In addition, in the case of the internal wiring stacked in multiple layers, there is a possibility that an appropriate opening may not be formed for the internal wiring of the lowermost layer and the like, which is preferable for repairing a semiconductor element having a recent multilayer wiring structure. is not.

The FIB apparatus A and the laser direct writing apparatus B have the following three common disadvantages.

The first disadvantage is that functional elements such as transistors provided in the semiconductor element 6 may be affected. For FIB device A, 30 to 50 ke
Since the ion beam is irradiated onto the semiconductor element 6 at a high acceleration of V, the ion beam reaches the transistor element provided on the substrate when a long connection wiring is formed by the implanted ions, and the threshold voltage is increased. There is a possibility that the transistor characteristics such as the breakdown voltage and the basic characteristics of the transistor element such as the breakdown voltage may be changed. In addition, the transistor element may be broken by current stress of the ion beam during processing.

Since the laser beam passes through silicon oxide, silicon nitride, and the like used as an insulating film between layers of the internal wiring of the semiconductor element, when the internal wiring is modified, the laser beam is applied to a transistor provided on the substrate. Irradiation may occur, and similarly to FIB, transistor characteristics may be changed or deteriorated. In the modification of the wiring, change, deterioration, and the like of the transistor characteristics must be absolutely avoided.

A second disadvantage is that it is not easy to cross wires on the surface of the semiconductor device. In the FIB device A, when the formed metal (W) connection wires cross each other, it is necessary to form an insulating film so that the connection wires do not short-circuit each other. Insulating film is also F
Although it can be formed by an IB apparatus, a film thickness of several μm is required to obtain a required withstand voltage as an insulating film, and a processing time for forming an insulating film other than forming a connection wiring using metal (W) is required. Is required, and the working efficiency is significantly reduced. In the case of the laser direct writing apparatus B, since the insulating film cannot be formed, it is necessary to form the connection wirings so that they do not cross each other. It must be formed, and depending on the semiconductor element, connection wiring cannot be formed and internal wiring cannot be corrected.

The third disadvantage is the resistance value of the formed metal connection wiring itself. As a modification of the internal wiring of the semiconductor element, when the internal wirings are connected to each other by a metal connection wiring having a long distance of, for example, about 1 mm, the resistance of the connection wiring itself formed of metal becomes considerably high.
7 when forming a metal connection wiring by the IB device
It is about 50Ω, and about 540Ω when metal connection wiring is formed by a laser direct writing apparatus. When a metal connection wiring is formed by a laser direct writing apparatus as compared with the FIB apparatus, the formation time of the connection wiring is shortened, but the resistance value of the formed connection wiring does not greatly differ.

When the formed metal connection wiring is long and has high resistance, the signal transmitted through the connection wiring tends to be slower than the theoretical value. This is shown in FIG. FIG.
5 is a graph showing a theoretical waveform 42 and a measured waveform 43 of a clock signal when a long connection wiring is formed to correct an internal wiring. In the theoretical waveform 42, the rise (0
From 5 V to 5 V) is steep. In the measured waveform 43,
The rise 44 becomes slow, and a deviation from the theoretical waveform 42 occurs. The fall also has a similar tendency. As described above, when a waveform having a slow rise and fall is input to the next circuit, the threshold voltage of the transistor provided in the semiconductor element 6 (the voltage at which the transistor is turned on and off) changes. As a result, the operation timing of the transistor may change, and a malfunction may occur. Therefore, even when a long connection line is formed of metal, it is necessary to reduce the resistance value of the formed connection line.

The above is a common problem when the FIB apparatus A and the laser direct drawing apparatus B are used.

To solve the above problem, Japanese Patent Application Laid-Open No.
No. 240 discloses a method of correcting internal wiring using a laser beam. FIG. 14 shows a method of repairing a wiring by a laser disclosed in Japanese Patent Application Laid-Open No.
This will be described with reference to FIG.

As shown in FIGS. 14A to 14C, the semiconductor element 6 has a single-layer internal wiring 17 formed on a Si substrate 20 and covered with a protective film 15. When connecting predetermined portions of the internal wiring 17 to each other, first, the protective film 15 located on the part of the internal wiring 17 that is connected to each other is selectively removed by a laser beam, Openings 38 are formed respectively. As a result, a predetermined portion of the internal wiring 17 is exposed from each opening 38. After that, the thin metal wires 47 extending between the openings 38 are placed on the protective film 15. As shown in FIG. 14B, the thin metal wire 47 is formed by covering a rectangular conductor wire 46 having a flat cross section with an insulating film 45. After placing the thin metal wire 47 on the protective film 15, the laser beam 25 is applied to the thin metal wire 47 corresponding to each opening 39. As a result, the portions of the thin metal wires 47 irradiated with the laser beam are respectively melted, and as shown in FIG. Each enters and is connected to the internal wiring 17.

The thin metal wire 47 is irradiated with the laser beam 25 to form an insulating film 45 covering the conductor wire 46.
Are melted, and a part of the conductor wire 46 in a molten state is ohmically connected to the internal wiring 17.

As described above, the internal wiring 17 is formed by the thin metal wire 47.
Are connected by the low-resistance conductor line 46, thereby preventing the metal wiring from having a high resistance. Also,
The thin metal wire 47 is not affected by a step on the transistor element 48 provided on the Si substrate 20 in the semiconductor element 6, and therefore, there is no possibility of disconnection due to the step.

In addition, by using the thin metal wires 47, connection wirings that cross each other can be easily formed as shown in FIGS. 15 (a) and 15 (b). In this case, each of the pair of opening portions 38 is so formed that the internal wiring 17 provided in the semiconductor element 6 is exposed.
Are formed on the protective film 15, and the portions of each of the internal wirings 17 exposed from one of the pair of openings 38 and the fine metal wires 4 are formed.
7 and each end of the conductor wire 46 as described above,
The connection is made by irradiating a laser beam. afterwards,
Another thin metal wire 47 extends between the other pair of openings 38.
Are disposed so as to intersect with the thin metal wires 47 provided on the protective film 15, and the conductor wires 46 of the metal wires 47 and the portions of the internal wires 17 exposed from the openings 38 are arranged as described above. Are connected by irradiating a laser beam.

In this case, since the intersecting portions of the thin metal wires 47 are covered with the insulating film 45, short-circuiting between the intersecting thin metal wires 47 is prevented. In this manner, the connecting wires that intersect can be provided by the irradiation of the laser beam, and it is not necessary to form the connecting wires in a complicated shape.

Further, as shown in FIG. 16, a semiconductor element 6 is provided on
Also, in the case where the stitch portions 51 provided on the periphery of the zero are connected by the bonding wires 52,
The internal wiring of the semiconductor element 6 and the stitch portion 51 connected to the empty pin can be connected by irradiating a laser beam using the thin metal wire 47. In this case, since the thin metal wire 47 is covered with the insulating film 45 as described above, there is no danger of short-circuiting even when it comes into contact with the bonding wire 52.

As described above, according to the wiring correction method by laser beam irradiation disclosed in Japanese Patent Application Laid-Open No. 5-211240, not only the connection between the internal wirings 17 of the semiconductor element 6 but also the connection between the internal wirings and the external terminals. You can also.

However, this wiring correction method can easily cope with a semiconductor device having a complicated structure in which internal wirings are stacked in multiple layers, similarly to the conventional wiring correction method using a laser direct writing apparatus. Can not.

When an opening is formed in a protective film on an internal wiring by using a laser beam, as described above, the laser beam is applied to the internal wiring to evaporate the material constituting the internal wiring, thereby protecting the internal wiring. The opening is formed by removing the film. The laser beam irradiation conditions at this time are as follows:
The setting is made so as not to damage the internal wiring. However, since the surface shape of the semiconductor element is not constant, it is necessary to set irradiation conditions corresponding to the surface shape of the semiconductor element. However, it is not easy to set the laser beam irradiation conditions suitable for each semiconductor element, and it is necessary to set the conditions based on the small field of view of the laser beam for many semiconductor elements.

When a laser beam is used, for example, as in the case of the lowermost layer when the internal wiring has a five-layer structure, the lower the internal wiring layer exposed from the hole is, the more the hole is formed. The irradiation energy of the laser beam required to form the laser beam increases. As a result, the formed opening is larger than the area of the opening formed for the internal wiring provided in the upper layer. In addition, since the internal wirings provided above are each patterned into various shapes on the internal wirings provided in the lower layer, if the area of the opening becomes large, the internal wirings located above will be located. May be damaged by the laser beam. If the internal wiring is significantly damaged, the internal wiring may be cut. As a result, in a semiconductor device provided with a multi-layered internal wiring, a region where an opening can be formed by a laser beam is extremely narrow.

As described above, the wiring correction method using a laser beam disclosed in Japanese Patent Application Laid-Open No.
It is not easy to cope with wiring correction of a semiconductor element having a multilayer wiring structure.

Further, in this wiring correction method, the thin metal wire 4
7 is disposed on the opening 38 provided on the protective film 15, and it is necessary to irradiate the end with a laser beam. There is also a problem that the arrangement is not easy. Moreover, the opening 38
It is necessary to accurately irradiate the laser beam to the portion covering the opening 38 at the end of the thin metal wire 47 covering the metal wire 47, and the work is not easy, and the processing accuracy may be reduced. Furthermore, when the number of the intersecting metal thin wires 47 increases when the metal thin wires 47 cross each other, the uppermost metal thin wire 47 is disposed far away from the surface of the semiconductor element 6. In the fusion connection by laser beam irradiation, in order to cause the thin metal wire 47 to enter the opening 38 provided in the protective layer 15 in a molten state and to be connected to the internal wiring 17,
The fine metal wires 47 must be closely adhered to the surface of the semiconductor element.
There is a possibility that the connection is not securely made to the internal wiring and the reliability is reduced.

The present invention is intended to solve such a problem. It is an object of the present invention to provide a wiring correction method which can efficiently and precisely form a long wiring having a low resistance without adversely affecting a semiconductor element. It is to provide an apparatus and a method.

[0065]

According to the present invention, a semiconductor device is etched by irradiating a focused ion beam or a laser beam on an arbitrary portion of the surface of the semiconductor device fixed on a sample stage. And an element processing section for forming a metal film by spraying a semiconductor metal compound gas while irradiating the focused ion beam or the laser beam to an arbitrary portion of the surface of the semiconductor element on the semiconductor element; Wire supply means for supplying a wire-shaped metal wire thereon.

The metal conductor is a bare wire whose surface is not covered with an insulating film.

The conductor supply means can send out the metal conductor in synchronization with the movement of the semiconductor element.

The conductor supply means has a pressing lever for pressing the metal conductor supplied to the surface of the semiconductor element against the surface.

The lever has an opening window through which the vicinity of a portion where the metal conductor is pressed against the surface of the semiconductor element can be observed.

According to the wiring repair method of the present invention, the first and second internal wirings provided on the semiconductor element are reached using the focused ion beam or the laser beam.
A first step of forming each of the openings, and irradiating the first and second openings with a focused ion beam or a laser beam while spraying a metal compound gas to form the first and second openings. A second step of forming a conductive first plug and a second plug respectively in the second opening, and supplying a wire-shaped metal conductor near the first plug, Interconnecting the first and second plugs with a metal film formed by spraying a metal compound gas while irradiating a focused ion beam or a laser beam, respectively. Method.

The metal conductor is a bare wire whose surface is not covered with an insulating film.

In the third step, a plurality of metal wires are placed on the surface of the semiconductor element without contacting each other.

[0073]

Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a schematic configuration diagram showing an example of an embodiment of a wiring repair apparatus according to the present invention. This wiring correction device,
An element processing section constituted by the FIB device A and a conductor supply device 53 provided as a conductor supply means in the element processing section are provided. The FIB device A constituting the element processing section has substantially the same configuration as the conventional FIB device A shown in FIG. 8, and the FIB device A is provided on the sample chamber 4. The FIB apparatus A focuses the FIB 1 extracted by the high electric field from the ion source 2 to a diameter of at least 0.01 μm by the electrostatic lens housed in the lens barrel 3 and irradiates the FIB 1 into the sample chamber 4. .

The sample chamber 4 has the same configuration as that of the sample chamber 4 shown in FIG. 8 except that a conductive wire supply device 53 is provided inside. The mounted sample stage 5 is arranged in a horizontal state. The semiconductor element 6 mounted on the sample stage 5 includes:
The FIB 1 from the FIB apparatus A is irradiated. The FIB device A includes a vacuum pump 11 inside the lens barrel 3 for stably focusing the FIB 1 and forming a stable processing environment.
a, a high vacuum of about 1 × 10 ⁻⁷ Torr is always maintained. Similarly, the inside of the sample chamber 4 is also constantly maintained in a high vacuum of about 1 × 10 ⁻⁷ Torr by the vacuum pump 11b. Is held in.

The sample stage 5 can be driven in four directions (movement in the X-axis direction, Y-axis direction, and Z-axis direction, which are orthogonal to each other, and rotation around the vertical axis). The sample stage 5 is driven in four axes by a dedicated controller 12 provided in the CPU 9.

When the semiconductor element 6 is irradiated with the FIB 1, secondary electrons and secondary ions 7 are emitted from the surface of the semiconductor element 6, and the secondary electrons and the secondary ions 7 are mounted facing the sample stage 5. Is detected by the detected detector 8. The secondary electrons and secondary ions 7 detected by the detector 8 are image-processed by the CPU 9, and the surface of the semiconductor element 6 is displayed on the display screen of the motor 10. Thereby, the operator can observe the surface shape of the semiconductor element 6 at a high magnification.

When correcting any internal wiring provided on the semiconductor element 6, the operator moves the sample stage 5 to the CPU 9 while observing the surface image of the semiconductor element 6 displayed on the display screen of the monitor 10. Is driven by the dedicated controller 12 connected to the device, and the corrected portion of the internal wiring is aligned with the position where the FIB 1 is irradiated, and the portion is processed.

A gas nozzle 1 for depositing a predetermined material on the semiconductor element 6 is provided obliquely above the sample stage 5.
The semiconductor element 6 on the sample stage 5 is irradiated with the gas filled in the gas cylinder 14 from the tip of the gas nozzle 13. The gas nozzle 13 has a function of expanding and contracting. When a predetermined material is deposited on the surface of the semiconductor element 6, its tip is brought close to a distance of about 0.5 mm with respect to the surface of the semiconductor element 6. You. Depending on the type of gas filled in the gas cylinder 14, an insulating film can be formed on the semiconductor element 6 on the sample stage 5.

In the sample chamber 4, a wire supply device 53 is provided. The wire supply device 53 is arranged with the gas nozzle 13 in the sample chamber 4 across the sample stage 5 so as to supply a wire-shaped metal wire onto the surface of the semiconductor element 6 to be corrected. The wire supply device 53
The first driving mechanism 63 and the second driving mechanism 63 are provided on one side wall of the sample chamber 4.
It is attached by a drive mechanism 64.

The wire supply device 53 is disposed obliquely upward with respect to the surface of the semiconductor element 6 fixed horizontally on the sample stage 5, and extends along the axial direction of the wire supply device 53. The metal conductor is supplied to the semiconductor element 6 on the sample stage 5.

The first drive mechanism 63 supporting the wire supply device 53 is adapted to move the wire supply device 53 in the vertical Z-axis direction.
Moves the wire supply device 53 along the supply direction of the metal wire. First and second drive mechanisms 63 and 64
As a result, the wire supply device 53 approaches and separates from the surface of the semiconductor element 6 while maintaining the predetermined inclination angle.
Is moved along the direction of the projection line when the supply direction of the metal conductor is projected on the horizontal plane.

First and second drive mechanisms 63 and 64
Is controlled by a joystick type dedicated controller 12 connected to the CPU 9, and the wire supply device 53 is connected to the condition input device 3 connected to the CPU 9.
It is controlled according to the conditions input in.

FIG. 2 is a side view showing the detailed structure of the wire supply device 53 as a partially enlarged view, and FIG. 3 is a longitudinal sectional side view showing the internal structure of the wire supply device 53.

At the front end of the wire supply device 53, a cylindrical wire nozzle 54 for feeding the metal wire 56 forward is attached to the apparatus main body 71. A wire drum 59 in which a metal wire 56 is wound in a coil shape is provided on the far side of the wire nozzle 54 inside the apparatus main body 71, and the metal wire 56 pulled out from the wire drum 59 is provided.
Is guided by a glass guide 60, passes through the inside of the apparatus main body 71, and is supplied to the conductive wire nozzle 54. The metal conductive wire 56 is formed of a low-resistance metal such as Au or Al into a wire shape having a diameter of about 20 μm, and is a bare wire whose surface is not covered with an insulating film.

Inside the apparatus main body 71, the conductive wire drum 5
A flexible rubber-made drive roller 62a and a guide roller 62b are provided so as to face each other with the metal conductive wire 56 drawn out from the wire 9 therebetween. One drive roller 62a is driven to rotate at a predetermined speed by a micromotor 61a, and the other guide roller 62b is constantly urged toward the drive roller 62a by a spring. The metal wire 56 drawn from the wire drum 59 passes between the drive roller 62a and the guide roller 62b, and is pressed against the drive roller 62a by the guide roller 62b urged by a spring.

When the driving roller 62a is driven to rotate in a predetermined direction by the micromotor 61a, the metal conductor 56
Is driven by the rotational force of the drive roller 62a.
Thus, the metal conductor 56 is sequentially pulled out from the conductor drum 59 and supplied to the conductor nozzle 54. The metal conductor 56 supplied to the conductor nozzle 54 is continuously supplied from the tip of the conductor nozzle 54 to the surface of the semiconductor element 6 placed on the sample table 5. The micromotor 62b can also be driven in the reverse direction, and the metal wire 56 sent from the wire nozzle 54 is drawn back into the wire nozzle 54 by the reverse drive of the micromotor 62b.

The supply amount of the metal conductor 56 is controlled by the rotation of the micromotor 61a.
Is controlled by the CPU 9. The supply accuracy of the metal conductor 56 largely depends on the accuracy of the micromotor 61a. For this purpose, the micromotor 61a is provided with a mechanism for reading the number of rotations of the shaft.
The metal wire 56 is sent out from the wire nozzle 54 with an accuracy of ± 1 μm.

The device main body 71 of the wire supply device 53 includes:
A pressing lever 55 for attaching the metal conductor 56 sent from the conductor nozzle 54 to the surface of the semiconductor element 6 is attached. The pressing lever 55 is connected to the device main body 71.
A pair of arm portions 55a whose base ends are rotatably attached to the left and right side surfaces by a horizontal support shaft.
have. The arms 55a are arranged so as to approach each other as they become closer to the distal end, substantially along the conductive wire nozzle 54, and their distal ends are joined together and integrated. And each arm part 5
A flat pressing portion 55 is attached to the mutually joined tips of 5a.
b is integrally attached to each arm 55a in a state of being bent upward with respect to each arm 55a.

The pressing lever 55 is configured such that the pressing portion 55b is turned up and down around the base end of each arm portion 55a, and each arm portion 55a interferes with the conductive wire nozzle 54. Instead, it is pivoted downward. And
As each arm 55a is rotated downward, the pressing portion 55b is pressed against the surface of the semiconductor element 6 on the sample table 5 in a substantially horizontal state. In this case, the metal conductor 56 sent out from the conductor nozzle 54 is pressed against the surface of the semiconductor element 6 by a pressing part 55b provided integrally with each arm 55a. A circular opening 55c is provided at the center of the pressing portion 55b in order to observe the metal conductor 56 pressed against the semiconductor element 6.

The pressing lever 55 is rotated by a micromotor 61b provided in the apparatus main body 71, and the force for bringing the metal conductor 56 into close contact with the surface of the semiconductor element 6 is also controlled by the micromotor 61b. Controlled. The micromotor 61b is controlled with high accuracy by the CPU 9, similarly to the micromotor 61a that sends out the metal conductor 56 from the conductor nozzle 54.

A downwardly projecting claw 58 is provided at the bent portion of the pressing portion 55c which is provided integrally with the distal end portion of each arm portion 55a in a bent state. The claw portion 58 is further pressed in a state where the metal conductor 56 is pressed against the surface of the semiconductor element 6 by the pressing portion 55c.
6, whereby the claw portion 58 is bent from the metal wire 56 sent out from the wire nozzle 54 and bent so as to be pressed against the surface of the semiconductor element 6.
It becomes a state that bites into the part.

Next, a method for correcting the internal wiring of the semiconductor element 6 by using the wiring correcting device having such a configuration will be described.

First, the semiconductor element 6 is fixed to the sample stage 5 driven by four axes, and the inside of the lens barrel 3 and the sample chamber 4 are brought into a high vacuum state on the order of 10 ⁻⁷ Torr by the vacuum pump 11. Next, a high electric field is applied to the ion source 2 so that the FI
B1 is drawn into the lens barrel 3 and focused by the electrostatic lens in the lens barrel 3 to such an extent that the semiconductor element 6 can be processed.
Irradiation is performed on the surface of the semiconductor element 6. At this time, the gas inside the lens barrel 3 and the sample chamber 4 is discharged by the vacuum pump 11.
A predetermined vacuum state is maintained by being constantly sucked and evacuated to the outside, so that a stable FIB1 can be obtained.

By irradiating the focused FIB 1 onto the surface of the semiconductor element 6, 2
Secondary ions and secondary electrons 7 are emitted. Semiconductor element 6
Secondary ions and secondary electrons 7 emitted from the surface are detected by the detector 8 and subjected to image processing by the CPU 9, whereby the surface state of the semiconductor element 6 is displayed on the display screen of the monitor 10. Then, the internal wiring of the semiconductor element 6 is corrected by controlling the conductive wire supply device 53 by the dedicated controller 12 while observing the display screen of the monitor 10.

The specific procedure of the wiring correction work using the wire supply device 53 will be described with reference to FIGS. 4A to 4D for the semiconductor element 6 shown in FIG. Semiconductor element 6
Has three layers of internal wirings 17a to 17c in a laminated state, and the inner wiring 17a of the lowermost layer and the internal wiring 17c of the uppermost layer are separated from each other at a distance by a long metal conductor 53. Are connected.

First, as a first step, as shown in FIG. 4A, the sample stage 5 is raised to set the surface of the semiconductor element 6 at a predetermined height close to the gas nozzle 13. The predetermined height in this case is a height at which the distance from the gas nozzle 13 to the surface of the semiconductor element 6 becomes a predetermined value (for example, 200 μm). When the sample stage 5 is raised, the wire supply device 53 has been moved to the upper retreat position by the second drive mechanism 63, and the apparatus main body 7
1 is also attached to the device main body 71.
In a retracted state rotated upward.

In this state, the protective film 15 and the interlayer insulating layer 18 on a predetermined portion of the lowermost internal wiring 17a are removed so as to reach the two internal wirings 17a and 17c to be connected to the semiconductor element 6. Etching is performed by FIB1, and protective film 15 on a predetermined portion of internal wiring 17c in the uppermost layer is etched by FIB1, thereby forming a pair of FIB openings. Each FIB
When the apertures are formed, W (CO) ₆ as a metal compound gas is ejected from the gas nozzle 13 while irradiating the FIB 1 to deposit W on the respective FIB apertures, thereby forming the first plug 65 and the first plug 65. The second plugs 66 are respectively formed.

FIG. 5 is a plan view showing the semiconductor element 6 together with an enlarged view of a main part. As shown in FIG.
The plug 65 is buried in the insulating film 18 and the protective film 15 in a state where it reaches a portion to which the wiring in the lowermost internal wiring 17a is connected, and the other second plug 66 is a wiring in the uppermost internal wiring 17c. Are buried in the protective film 15 in a state where they have reached the portion to be connected.

Such a planar state of the semiconductor element 6 is detected by the detector 8 arranged in the sample chamber 4 and displayed on the display screen of the monitor 10. FIG.
(H) shows an image displayed on the display screen 10a of the monitor 10 in each processing step.
On the display screen 10a, the irradiation point 69 of the FIB 1 is indicated by the intersection 62 between the horizontal line and the vertical line.
In (a), the intersection 62 overlaps the first plug 65.

In the second step, the sample stage 5 is rotated such that the straight line connecting the first plug 65 and the second plug 66 formed in the first step is parallel to the horizontal line on the display screen 10a of the monitor 10. . As a result, the moving direction of the conductive wire supply device 53 in the horizontal plane and the sending direction of the metal conductive wire 56 from the conductive wire supply device 53 are in a state parallel to the straight line connecting the first plug 65 and the second plug 66. The device 53 includes the monitor 10
On the display screen 10a of FIG. 7, the display screen 10a moves parallel to the horizontal line, and from the conductive wire nozzle 54 of the conductive wire supply device 53,
The metal conductor 56 is sent out in parallel with the horizontal line of the display screen 10a. The metal wire 56 sent from the wire nozzle 54 is near the irradiation point 69 of the FIB 1 and intersects with the vertical line of the display screen 10a.

In such a state, as shown in FIG. 4B, the wire supply device 53 is connected to the irradiation point 65 of the FIB 1.
The tip of the conductive wire nozzle 54 is moved closer to the first plug 65 by moving it downward so as to approach the first plug 65. Thereafter, the metal wire 56 is sent out from the wire nozzle 54, and the tip of the metal wire 56 is brought into contact with the surface of the semiconductor element 6. The display screen 10 on the monitor 10 at this time
The image of FIG. 6A is shown in FIG.
Is sent out onto the surface of the semiconductor element 6 close to the first plug 65.

When the metal conductor 6 is sent out onto the surface of the semiconductor element 6, the pressing lever 55 attached to the conductor supplying device 53 is lowered from the upper retreat position to the lower pressing position, and the tip of the pressing lever 55 Pressing part 55b provided in the part
Is pressed against the tip of the metal conductor 56 sent to the surface of the semiconductor element 6. As a result, the metal conductor 56 is
The side of the plug 65 is pressed against the surface of the semiconductor element 6 and closely adheres to the surface of the semiconductor element 6. In this case, the first plug 65 and the metal conductor 56 can be observed by the image on the display screen 10a on the monitor 10 through the opening window 55c provided at the tip of the pressing portion 55b. An image of the display screen 10a on the monitor 10 in this case is shown in FIG.

In such a state, the first plug 65
The FIB 1 is irradiated while ejecting W (CO) ₆ as a metal compound gas from the gas nozzle 13 to connect the metal conductor 56 sent out onto the semiconductor element 6 with the FIB 1.
As shown in the image of the display screen 10a shown in (d), the W metal film 2 extends between the plug 65 and the metal conductor 56.
Form 3

When the second step is completed, in the next third step, first, the pressing lever 55 is retracted upward, and the semiconductor element 6 is moved along the horizontal line of the display screen 10a of the monitor 10. As shown in FIG. 4C, the sample stage 5 is moved so that the other plug 66 is displayed on the display screen 10a of the monitor 10, and the first plug 66 is connected to the FI.
It is made to coincide with the irradiation point 69 of B1. In addition, in synchronization with the movement of the semiconductor element 6, the metal wire 56 is sent out from the wire nozzle 54 of the wire supply device 53. The moving direction of the semiconductor element 6 at this time coincides with the sending direction of the metal conductor 56 in the horizontal plane. For this reason, the metal conductor 56 sent out with the movement of the semiconductor element 6 is linearly arranged with the shortest distance from the vicinity of the first plug 65 to the vicinity of the other second plug 66. FIG. 6E shows an image of the display screen 10a on the monitor 10 in this case.

As described above, in order to move the sample stage 5 to move the semiconductor element 6 and to send out the metal conductor 56 from the conductor nozzle 54, the metal conductor 54 connected to the first plug 65 is strongly pulled. First plug 65
There is no risk of peeling from When the metal lead 56 is placed in contact with the surface of the semiconductor element 6, the moving speed of the sample stage 5 is made equal to the sending speed of the metal lead 56 from the lead nozzle 54. Connect the metal lead 56 to the semiconductor element 6
In the case of arranging in a loop shape so as to form an interval with the surface of the sample, the feeding speed of the metal wire 56 from the wire nozzle 54 is made faster than the moving speed of the sample stage 5. By controlling the sending speed of the metal wire 56 from the wire nozzle 54 with respect to the moving speed of the sample stage 5, the shape of the loop formed by the metal wire 56 (semiconductor element 6)
Height from the surface) can be adjusted.

In this manner, when the metal conductive wire 56 is drawn out along the surface of the semiconductor element 6 and the metal conductive wire 56 is arranged close to the second plug 66, the metal conductive wire 5
Similarly to the case where the front end of the semiconductor element 6 is pressed against the surface of the semiconductor element 6, the pressing lever 55 is lowered, and the portion of the metal conductor 56 close to the second plug 66 is pressed by the pressing portion 55 c of the pressing lever 55. FIG. 6F shows an image of the display screen 10a on the monitor 10 in this case. By irradiating the FIB 1 while jetting W (CO) ₆ from the gas nozzle 13 in such a state, the metal film 23 made of W is formed between the plug 66 and the metal conductor 56, and both are formed. Connected. The image of the display screen 10a on the monitor 10 in this case is
As shown in FIG.

In this way, when the first flag 65 and the second plug 66 are connected by the metal conductor 56, as shown in FIG. 4D, the first flag 65 and the second plug 66 are sent out from the conductor nozzle 54 and then discharged. The metal wire 56 located near the tip of the wire nozzle 54 is cut. When cutting the metal conductive wire 56, the pressing portion 55 c of the pressing lever 55 is strongly pressed against the surface of the semiconductor element 6, and the claw 58 provided on the lower surface of the bent portion of the pressing lever 55 is sent out from the conductive wire nozzle 54. The metal conductive wire 56 that has been bent into the bent state is strongly bitten. Then, in such a state, the drive roller 62 provided in the device main body 71 of the wire supply device 53 is provided.
a is driven in a direction opposite to the direction in which the metal conductor 56 is sent out, and the metal conductor 56 is pulled back into the apparatus main body 71. As a result, the bent portion of the metal conductor 56 in which the claw portion 58 bites into the metal conductor 56 is cut. The image of the display screen 10a on the monitor 10 in this case is
It is shown in FIG.

When the metal conductor 56 is cut in this manner, the pressing lever 55 is rotated to the upper retracted position, and the conductor supply device 53 is driven by the first and second driving mechanisms 63 and 64 to switch the semiconductor element. 6 away. This allows
The correction of the internal wiring in the semiconductor element 6 is completed.

As described above, the wiring repair apparatus of the present invention
Element processing section having IB device A and wire supply device 53
Therefore, the portions of the internal wiring of the semiconductor element 6 that are far apart can be connected efficiently and with high precision. Further, since the connection wiring is formed by the low-resistance metal conductor 56 supplied from the conductor supply device 53, there is no possibility that the resistance value increases even if the metal conductor 56 becomes longer. In addition, since the operator can perform the internal wiring correction work while observing the image displayed on the display screen 10a of the monitor 10, various operations are facilitated and workability is significantly improved.

Table 1 shows that the wiring correction device of the present invention
The internal wiring of the upper layer and the lower layer of the semiconductor element
In the case where connection wires are formed by connection using the metal wires 56 supplied from the wire supply device 53, the time for forming the opening in the semiconductor element, the time for forming the connection wires, and the time for forming the connection wires. The resistance value is compared with a case where a connection wiring is formed using a conventional FIB apparatus A and a laser direct drawing apparatus B.

[0112]

[Table 1] In the wiring correction device of the present invention, an Au wire was used as the metal conductor 56 supplied from the conductor supply device 53. In this case, the resistance value of the connection wiring formed by the metal wire 56 which is an Au wire was 12.5Ω at a wiring length of 1 mm. On the other hand, the connection wiring of the metal W formed by the FIB apparatus A is 750 Ω, and the connection wiring of the metal W formed by the laser direct writing apparatus B is 540 Ω. As a result, the resistance is reduced by one digit.

The opening time for forming the opening is determined by FI
As in the case of only the device B, the processing time is 1 minute per one place, but the processing time required to form the connection wiring is 1 m
The wiring length of m is within 30 minutes, which is much shorter than that of 5 hours and a half in the case of the FIB apparatus A alone, and is the same as the case of forming the connection wiring by the laser direct drawing apparatus B. I have.

The diameter of the aperture is the same as in the case of the FIB apparatus A, and is much smaller than that of the laser direct drawing apparatus B. Therefore, the wiring repair apparatus of the present invention can efficiently and accurately form long wires having low resistance without adversely affecting the semiconductor element.

In the wiring repair apparatus of the present invention, a plurality of connection wirings can be provided on a semiconductor element to connect internal wirings. For example, FIG. 7A to FIG. 7C show a case where three connection wirings are connected by the metal conductor 56.
It will be described based on.

As shown in FIG. 7A, when three connection wirings 56a, 56b and 56c are formed on the semiconductor element 6 by the metal conductor 56, the internal wiring of the semiconductor element 6 and each connection wiring are formed. Using the FIB device A, an opening is formed in each of the connection scheduled portions 56a to 56c, and a plug is formed in each opening. Thereafter, the position where each plug is formed is specified based on the image on the display screen of the monitor, and it is determined which pair of plugs are connected to each other. Then, the length of the connection wirings 56a to 56c to be formed is calculated by the CPU 9, and the order in which the connection wirings 56a to 56c are formed is determined.

The connection wirings 56a to 56c are formed in the order of the wiring length. In FIG. 7A, the connection wiring 56a
Is the shortest, the connection wiring 56b is the second longest, and the connection wiring 56c is the longest. First, the longest connection wiring 56c is formed, and then, after the connection wiring 56b is formed, the shortest connection wiring 56a is formed. To form

In this manner, each of the connection wires 56a-56
When the order of forming c is determined, the wiring directions of the connection wirings 56a to 56c are aligned with the horizontal lines on the display screen of the monitor 10 as in the case where the connection wirings 56a to 56c are formed by the metal conductors 56, respectively. The sample stages 5 are rotated so as to be parallel, and the rotation angle of the sample stage 5 in each case is stored in the CPU 9.

Next, as shown in FIG. 7B, the respective intersections 67 of the connection wirings 56a to 56c are designated on the display screen 10a of the monitor 10 and stored in the CPU 9.

In such a state, the CPU 9 determines the order in which the connection wirings 56a to 56c are formed,
From each of the intersections 67a to 56c,
Calculate loop heights 6a-56c. The operator checks the calculated loop height, and checks each connection wiring 56a.
56c do not contact each other, the connection wiring 56
The formation of a to 56c is performed. Each connection wiring 56a-56
The method of forming c is as described above.

It is possible to specify an arbitrary value for the interval at the intersection of each of the connection wirings 56a to 56c to the CPU 9, and the interval of about 100 μm is usually sufficient.

FIG. 7C shows all of the connection wirings 56a to 56a.
The state after 6c is formed is shown three-dimensionally. The longest connection wiring 56c is arranged along the surface of the semiconductor element 6, and the next longest connection wiring 56b is
One intersection 67 designated before forming 6a-56c
, The wires are arranged so as to straddle the connection wire 56a. The shortest connection wiring 56a straddles the connection wiring 56b at the other intersection 67.

The connection wiring 56c arranged along the surface of the semiconductor element 6 is in a state of being in close contact with the surface of the semiconductor element 6,
It may be in any state where it is not in close contact. When the connection wiring 56c is formed in close contact with the surface of the semiconductor element 6, the connection wiring 56c can be formed more efficiently.

As described above, in the wiring correction device provided with the wire supply device 53, even when a plurality of connection wirings are formed on the semiconductor element 6, the wiring connection can be made without complicated routing of the connection wirings. Since the operation can be performed without an insulating layer interposed therebetween, the operation can be performed efficiently. Further, even when the semiconductor element is sealed in the package, the connection wiring for connecting the internal wiring and the external terminal can be easily formed without contacting the wire bonding.

The wiring correction device of the above embodiment is
The wire supplying device 53 is provided in the element processing portion provided with the IB device A.
However, a lead wire supply device may be provided in the element processing section provided with the laser direct drawing device B.

[0126]

The wiring repair apparatus and method of the present invention, when repairing the internal wiring of a semiconductor device by using the FIB or the laser beam as described above, form a wire-like metal conductor on the surface of the semiconductor device. Since a bare wire whose surface is not covered with an insulating film is supplied, connection wiring having a long distance can be efficiently connected in a short time. In addition, since damage to the semiconductor element can be reduced, even in a semiconductor element having an internal wiring having a multilayer structure, the internal wiring can be corrected and the resistance of the connection wiring can be reduced. Further, a plurality of connection wirings can be easily and efficiently crossed on the surface of the semiconductor element.

[Brief description of the drawings]

FIG. 1 is an apparatus configuration diagram showing an example of an embodiment of a wiring repair apparatus of the present invention.

FIG. 2 is a side view showing a detailed structure of a conductive wire supply device provided in the wiring correction device together with a partially enlarged view.

FIG. 3 is a vertical sectional side view showing an internal structure of the wire supply device.

FIGS. 4A to 4D are cross-sectional views each showing a specific procedure in a case where wiring is corrected using the conductive wire supply device.

FIG. 5 shows a position where a plug provided in a semiconductor device is formed;
It is a top view shown with some enlarged views.

FIGS. 6A to 6H are images displayed on a display screen of a monitor for displaying a processed portion in a semiconductor device when wiring is corrected using the conductor supply device.

FIGS. 7A to 7C are explanatory diagrams of specific procedures when a plurality of wirings are formed on a semiconductor element using the conductive wire supply device.

FIG. 8 is a schematic configuration diagram of a wiring repair system for a semiconductor element using an FIB device.

FIG. 9 is a schematic sectional view showing the structure of a semiconductor device.

FIGS. 10A to 10C are cross-sectional views illustrating procedures of a method of correcting an internal wiring by a wiring correction system using an FIB device.

FIG. 11 is a schematic configuration diagram of a wiring correction system using a laser direct drawing apparatus.

FIGS. 12A and 12B are cross-sectional views showing procedures of a method of correcting internal wiring by a wiring correction system using a laser direct drawing apparatus.

FIG. 13 is a waveform diagram showing a theoretical waveform and a measured waveform of a clock signal when a long wiring is formed.

FIGS. 14A to 14C are explanatory diagrams of a method of correcting internal wiring by a wiring correction system using a laser direct drawing apparatus.

FIGS. 15A and 15B are explanatory views of a conventional wiring correction method for forming a cross wiring by using a laser.

FIG. 16 is a conventional explanatory view of a wiring correction method for connecting an internal wiring and an external wiring of a semiconductor element.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Ion beam 2 Ion source 4 Sample room 5 Sample stage 6 Semiconductor element 10 Monitor 11 Vacuum pump 13 Gas nozzle 15 Protective film 16 Organic film 17 Internal wiring 18 Interlayer film 19 Plug 20 Diffusion layer 21 FIB irradiation area 22 FIB opening 23 Metal Film 24 Oscillator 25 Laser beam 30 Sample chamber 31 Sample stage 32 Gas supply pipe 33 Exhaust pipe 36 Monitor 37 Input device 38 Laser aperture 39 Laser beam irradiation point 40 Metal 41 Gas 53 Conductor supply device 54 Conductor nozzle 55 Press lever 55a Arm Part 55b Pressing part 55c Opening window 56 Metal conducting wire 58 Claw 59 Conducting drum 60 Guide 61 Micromotor 62a Drive roller 62b Guide roller 63 First drive mechanism 64 Second drive mechanism 65 Plug 66 Plug 67 Crossing

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 4E066 BA13 4E068 AH03 DA09 5F038 CD05 CD15 EZ11 EZ20 5F064 FF42 FF44 FF48 GG10

Claims (8)

[Claims] At least one of a surface of a semiconductor element fixed on a sample stage is irradiated with a focused ion beam or a laser beam to etch the semiconductor element and to attach the surface of the semiconductor element to the semiconductor element. An element processing unit for forming a metal film by spraying a semiconductor metal compound gas while irradiating the focused ion beam or the laser beam to an arbitrary portion; and a wire supply for supplying a wire-shaped metal wire on the surface of the semiconductor element. A wiring correction device comprising: 2. The wiring repair device according to claim 1, wherein the metal conductor is a bare wire whose surface is not covered with an insulating film. 3. The wiring repair apparatus according to claim 1, wherein said conductor supply means can send out said metal conductor in synchronization with movement of said semiconductor element. 4. The wiring correction device according to claim 1, wherein the conductor supply means has a pressing lever for pressing a metal conductor supplied to the surface of the semiconductor element against the surface. 5. The wiring repair apparatus according to claim 4, wherein the lever has an opening window through which the vicinity of a portion where the metal conductor is pressed against the surface of the semiconductor element can be observed. 6. A first step of using a focused ion beam or a laser beam to form first and second openings respectively reaching first and second internal wirings provided in a semiconductor element; The first and second openings are irradiated with a focused ion beam or a laser beam while spraying a metal compound gas, so that the first opening and the second opening have a conductive first plug. A second step of forming a second plug and a second plug, respectively, supplying a wire-shaped metal conductor near the first plug, and connecting the metal conductor and the first and second plugs to a focused ion beam or A method of connecting with a metal film formed by spraying a metal compound gas while irradiating a laser beam. 7. The wiring correction method according to claim 6, wherein the metal conductor is a bare wire whose surface is not covered with an insulating film. 8. The wiring correction method according to claim 7, wherein in the third step, a plurality of metal conductors are placed on the surface of the semiconductor element in a non-contact manner.