JP2002231985A - Photovoltaic element - Google Patents

Abstract

PROBLEM TO BE SOLVED: To shorten the manufacturing time of a conductive semiconductor layer while drop in photoelectric conversion efficiency and increase in light deterioration rate are prevented, and to provide a less expensive photovoltaic element. SOLUTION: The photovoltaic element has constitution where a first conductive semiconductor layer 102 constituted of a non-single crystal semiconductor, a substantially intrinsic semiconductor layer 105 and a second conductive semiconductor layer 106 are sequentially laminated on a substrate 101. The first conductive semiconductor layer 102 is constituted of an amorphous semiconductor and a first fine crystal semiconductor 103 including much amorphousness is formed between the first conductive semiconductor layer 102 and the substantially real semiconductor layer 105 at first. Then, a second fine crystal semiconductor 104 is formed at film forming speed slower than the first conductive semiconductor layer 102 at the first fine crystal semiconductor.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

The present invention relates to a photovoltaic element in which a main power generation layer is made of a non-single-crystal semiconductor.

[0002]

2. Description of the Related Art As a photoelectric conversion element such as a photovoltaic element or a sensor, a back reflection layer typified by ZnO or Ag, which can be an electrode, is formed on a substrate and amorphous silicon having a pin or nip junction is formed. Is formed by a glow discharge decomposition method or the like, and then ITO or SnO ₂
A transparent electrode formed of a light-transmitting conductive oxide film as a typical example is known. The photoelectric conversion element composed of these non-single-crystal semiconductors has a photoelectric conversion efficiency (Eff.)
Is an important issue.

Conventionally, in a photoelectric conversion element composed only of amorphous silicon, the interface factor between the electrode and the amorphous silicon conductive layer is high, so that the improvement of the curvature factor (FF) is hindered. I was As one means for solving the problem, it is recommended to use crystalline silicon for the conductive layer. F. Improvements, and even
Due to an increase in photocurrent (Jsc) due to improvement in light transmittance, etc., Eff. Is improved.

However, in order to form microcrystalline silicon as an example of a crystalline semiconductor, a method of increasing the high-frequency power applied to the glow discharge electrode, increasing the amount of hydrogen, and the like are taken. The surface of the substrate such as the semiconductor layer or the back electrode is damaged by the collision of high-speed charged particles of the plasma generated by the glow discharge, and the interface level increases, and Eff. Had declined. In addition, microcrystalline silicon is liable to generate fine cracks, which generates a leakage current, and the Eff. Had been reduced.

[0005] JP-A-1-280365 and JP-A-6-1985
Japanese Patent Application Laid-Open No. 3-58974 discloses that a conductive semiconductor layer is composed of two layers, and a conductive layer formed on the i-layer side is an amorphous semiconductor.
Further, a method of forming a conductive layer from a microcrystalline semiconductor thereon is disclosed. According to this method, plasma damage to the surface of the i-type layer can be reduced, and generation of an interface level serving as a recombination center at the interface between the i-type layer and the conductive layer can be suppressed.

In Japanese Patent Application Laid-Open No. Hei 7-122761, an amorphous conductive layer is formed on an electrode, and a microcrystalline conductive layer is further formed on the amorphous conductive layer. The electrode material can be prevented from being mixed into the layer, and the underlayer can be more completely covered with smooth amorphous silicon, and there are no fine cracks in the semiconductor and the leakage current can be reduced. Is disclosed.

In the case of the i-type layer, the film formation speed of the i-type layer in contact with the p-type layer and the bulk i-type layer is changed at different film formation speeds, so that the time required to form the i-type layer can be reduced. The possibility has been disclosed in Japanese Patent Publication No. 7-99776.

Further, by forming the microcrystalline i-type layer on the amorphous i-type layer while decreasing the film forming rate, it is possible to shorten the formation time of the microcrystalline layer in the i-type layer. Is disclosed in JP-A-10-313129.

[0009]

In a solar cell which is regarded as one of the new energies, not only high efficiency but also low cost is one of the important research and development issues.
Amorphous silicon has been attracting attention as a material that can be reduced in cost, but has not been able to realize cost reduction due to a low film formation rate and a long manufacturing time. However, in recent years, some measures have been taken to reduce the time required to form an i-type semiconductor layer requiring a large film thickness. The method disclosed in Japanese Patent Publication No. 7-99776 is a method in which an i-type layer in contact with the first conductive layer is formed at a low film formation rate, and thereafter, the film formation rate is increased, and the interface characteristics are favorably maintained. In addition, the manufacturing time of the i-type layer can be reduced.

In order to further reduce the cost, the problem now is not only the time required for forming the i-type layer but also the time required for forming the p-type layer and the n-type layer in order to shorten the time required for manufacturing the entire photovoltaic element. There has been a problem that the time for forming the conductive layer needs to be shortened.

In order to shorten the time for forming the conductive layer, it is conceivable to form the conductive layer at a high speed. However,
In the structure of the photovoltaic element disclosed in Japanese Patent Application Laid-Open No. 7-122761, when the first conductive layer is formed at a high speed, the amorphous silicon is formed at a high speed to form a uniform film on the underlayer. It is pointed out that cracks, cracks, and the like are formed around the rapidly growing island portion. Further, if microcrystalline silicon is formed thereon at a high speed, cracks are easily generated even when microcrystalline silicon is formed, as described above, so that reduction of cracks generated in the semiconductor causes leakage current, and Eff. Causes a decrease in Further, when microcrystalline silicon is formed at a high film forming rate, the crystallinity decreases, and Ef
f. And the deterioration rate of light is increased.

The present invention solves the above-mentioned problems, reduces the photoelectric conversion efficiency and increases the photodegradation rate, shortens the manufacturing time of the conductive semiconductor layer, and realizes a lower-cost photovoltaic device. The purpose is to do.

[0013]

In order to achieve the above object, a photovoltaic device of the present invention comprises at least one photovoltaic element on a substrate.
A photovoltaic element having a configuration in which a first conductive semiconductor layer made of two non-single-crystal semiconductors, a substantially intrinsic semiconductor layer, and a second conductive semiconductor layer are sequentially stacked; Forming a first microcrystalline semiconductor containing a large amount of amorphous material between the first conductivity type semiconductor layer and the substantially intrinsic semiconductor layer; After that, the first conductive type semiconductor layer and the first
The second microcrystalline semiconductor is formed at a lower deposition rate than the microcrystalline semiconductor.

According to the structure of the present invention, the first conductive type semiconductor layer of the amorphous semiconductor is formed at a high speed, the microcrystalline semiconductor thereafter is also formed at a high speed, and then the microcrystalline semiconductor is formed at a lower speed. For this reason, cracks and cracks around the portion formed at a high speed are covered with the microcrystalline layer formed at a low speed, and the generation of leakage current can be suppressed. In addition, by covering a surface defect of a microcrystalline semiconductor formed at a high speed with a microcrystalline semiconductor formed at a low speed, an interface state with a substantially intrinsic semiconductor layer (i-type layer) can be reduced.

The characteristic structure of the present invention is also effective as an interface layer between the first conductive semiconductor layer and the i-type layer in a tandem photovoltaic element such as a double cell or a triple cell having a plurality of nip junctions. is there. Taking the case of a double cell composed of a bottom cell and a top cell as an example, an amorphous semiconductor is formed at a high speed as a first conductivity type semiconductor layer of the top cell, and then a microcrystalline semiconductor is formed at a high speed.
Furthermore, by forming a microcrystalline semiconductor on it at low speed,
It is possible to reduce the resistance of the first conductive semiconductor layer of the top cell and reduce the manufacturing time without damaging the second conductive semiconductor layer of the bottom cell formed earlier.

The photovoltaic device of the present invention further has, as a further feature, that the first microcrystalline semiconductor and the second microcrystalline semiconductor are the same conductive semiconductor as the first conductive semiconductor layer. "The concentration of the impurity imparting conductivity in the first microcrystalline semiconductor is higher than that of the second microcrystalline semiconductor.""The film formation rate of the first microcrystalline semiconductor is continuously increased in the second microcrystalline semiconductor. Decreasing toward semiconductors ".

[0017]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 schematically shows a cross-sectional structure of a photovoltaic device according to one embodiment of the present invention. In FIG. 1, 101 is a substrate, and 102 is an amorphous n film formed at a high speed.
Mold layer, 103 is a microcrystalline n-type layer formed at a high speed, 104
Is a microcrystalline n-type layer formed at a low speed, 105 is an amorphous i-type layer, 106 is a microcrystalline p-type layer, and 107 is an upper electrode (transparent electrode).

In the photovoltaic device of the present invention having the structure shown in FIG. 1, an amorphous n-type layer 102 is provided between an amorphous n-type layer 102 and an amorphous i-type layer 105. A microcrystalline n-type layer (first microcrystalline semiconductor) 103, which is formed at a high speed and contains a large amount of amorphous material, is formed first, and then the amorphous n-type layer 103 is formed.
Microlayer n-type layer (second microcrystalline semiconductor) 104 formed at a lower deposition rate than mold layer 102 and first microcrystalline semiconductor 103
Are formed.

Hereinafter, the components of the photovoltaic device of the present invention will be briefly described, but the present invention is not limited thereto.

(Semiconductor Layer) The semiconductor layers 102 to 106 are
Silicon-based amorphous material (including microcrystals)
From non-single-crystal materials to polycrystals. As a method for forming a semiconductor layer, there are a vapor deposition method, a sputtering method, a high-frequency plasma CVD method, a microwave CVD method, and a hot wire CV.
Known methods such as the D method and the photo CVD method can be used as desired. Industrially adopted methods include:
A high frequency plasma CVD method in which a source gas is decomposed by plasma and deposited on a substrate is preferably used.

In the high-frequency plasma CVD method, a source gas composed of a mixed gas of SiH ₄ , Si ₂ H ₆ , H _2, and He is decomposed by plasma to form a substantially intrinsic silicon-based non-single-crystal semiconductor. can do. As a valence electron controlling agent for obtaining an n-type semiconductor, a compound PH ₃ containing an element of Group V of the periodic table such as P, N, As, Sb, or the like is used. As a valence electron controlling agent for obtaining a p-type semiconductor, compounds BF ₃ and B ₂ H ₆ containing elements of Group III of the periodic table such as B, Al, Ga and In are used.

The first and second conductive semiconductor layers in the photovoltaic device of the present invention are respectively an n-type layer and a p-type layer, or vice versa.

(Substrate) The substrate 101 is formed by forming a conductive film on a light-transmitting insulator such as a glass substrate, a non-light-transmitting conductor such as a stainless steel substrate, or a non-light-transmitting conductor such as Ag or Al. Provided with a reflective layer of ZnO or Sn
A light-transmitting conductive film such as O ₂ is used.

(Film Forming Rate) The film forming rate of the amorphous n-type layer 102, the first microcrystalline semiconductor 103, and the second microcrystalline semiconductor 104 is controlled mainly by controlling the supply amount of the source gas. Thus, it is possible to change the deposition rate while maintaining the desired crystallinity. Specifically, for example, when a semiconductor is formed on a stationary substrate, the supply amount of the source gas is changed with time, and when the semiconductor is formed on a moving substrate, the supply amount of the source gas is changed. Means for spatially changing the direction are taken. If necessary, high-frequency power is controlled.

[0025]

EXAMPLES Examples of the present invention will be described below, but the present invention is not limited to these examples.

Example 1 As an example of the present invention, a photovoltaic element as shown in FIG. 1 was manufactured. In this embodiment, a photovoltaic element was manufactured using a roll-to-roll type plasma CVD apparatus capable of continuously forming a semiconductor film on a strip-shaped substrate as shown in FIG. Hereinafter, description will be given in accordance with the manufacturing procedure with reference to FIG.

(1) Ag and ZnO were deposited on the surface of a belt-like stainless steel plate by a DC sputtering device (not shown) to prepare a belt-like substrate 201 having a fine uneven surface.

(2) Unwinding the bobbin 2
03, the unwinding chamber 204 for the band-shaped substrate.
Set to

(3) The belt-like substrate 201 is connected to each gas gate 20
2 and each of the film forming chambers 207 to 210, passed to a winding chamber 206 for a belt-like substrate, attached to a winding bobbin 205, and tensioned so as not to loosen. Thereafter, the inside of the apparatus was evacuated.

(4) He gas was introduced into each film forming chamber while evacuation was performed, and the inside of each film forming chamber was baked at about 350 ° C. in a He atmosphere of about 200 Pa.

(5) After the heating and baking, 500 sccm of H ₂ was introduced as a gate gas into each gas gate 202, and a predetermined flow rate of each raw material gas was introduced into each film forming chamber, and the internal pressure of each chamber was set to a predetermined pressure.

(6) The take-up bobbin 205 in the take-up chamber 206 for the belt-like substrate is rotated to move the belt-like substrate 201 from the unwinding chamber 204 to the take-up chamber 206 in the direction 120.
It was moved continuously at a constant speed of cm / min. Further, temperature control was performed by a temperature control device (not shown) provided in each of the film forming chambers so that the moving strip-shaped substrate 201 had a predetermined temperature in the film forming space of each of the film forming chambers.

(7) When the temperature of the strip-shaped substrate 201 is stabilized, the production of each semiconductor film is started in each film forming chamber by the high-frequency plasma CVD method.

The discharge chamber installed in each of the film forming chambers 207 to 210 in FIG. 2 has a structure as shown in FIG. FIG.
, The strip-shaped substrate 201 enters the vacuum vessel 502 from the gas gate 503, moves from left to right in the drawing, and exits to the gas gate 504. A discharge chamber 505 is provided inside the vacuum vessel 502, and the electrically grounded strip-shaped substrate 201 is provided.
High-frequency power is supplied from a high-frequency power supply (not shown) between the substrate and the parallel plate electrode (discharge electrode) 506 to form plasma in the discharge chamber 505, and the lower surface (front surface) of the strip substrate
Then, a silicon-based non-single-crystal semiconductor is formed. Discharge chamber 505
Is a source gas inlet pipe 507 connected to a source gas supply system (not shown) and an exhaust pipe 5 connected to an exhaust device (not shown).
08 is provided to form a gas flow parallel to the moving direction of the strip-shaped substrate. A block heater 509 is provided on the source gas inflow path to perform preheating of the source gas before plasma decomposition and heating of the discharge chamber 505. A discharge chamber outside exhaust port 510 is provided in a discharge path of the exhaust gas. The gas is discharged to the pipe 508 to prevent impurities from being mixed into the deposited film. In addition, a plasma leakage guard (film formation region opening adjusting plate) 511 is provided at the entrance and exit of the strip-shaped substrate 201 above the discharge chamber 505 to prevent the plasma inside the discharge chamber 505 from leaking to the outside. I have.

The discharge chamber having the structure shown in FIG. 5 installed in each of the film forming chambers 207 to 210 is provided on the surface of the continuously moving strip-shaped substrate 201 in the order of plasma on the gas supply side and plasma on the gas exhaust side. 13.56 MHz high-frequency power was supplied from a discharge electrode 506 from a power supply (not shown) via a matching device. By supplying the discharge power, the source gas in each of the film forming chambers was turned into plasma, and a semiconductor film was formed on the surface of the belt-like substrate 201 which continuously moved in each of the film forming chambers.

Specifically, Ag and Zn are deposited on a stainless steel substrate.
An amorphous n-type layer 102 (film formation rate = 1.0 nm / sec) formed of amorphous silicon at a high speed in order on a substrate 201 (substrate 101 in FIG. 1) on which O is laminated, and microcrystals High-speed microcrystalline n-type layer 103 made of silicon
(Film formation rate = 1.0 nm / sec) and a microcrystalline n-type layer 104 formed at a low speed (film formation rate = 0.2 nm / sec), and further an i-type layer 105 made of amorphous silicon (film formation rate =
1.5 nm / sec), a p-type layer 106 of microcrystalline silicon (film formation rate = 0.2 nm / sec) was formed.
In this example, the microcrystalline n-type layers 103 and 104 having different deposition rates were formed by changing the flow rate of SiH ₄ and the high-frequency power.

FIG. 6 shows an example of a film forming speed distribution in the discharge chamber. FIG. 6 also shows the distribution of crystallinity represented by the intensity ratio of the peak due to amorphous silicon and the peak due to crystalline silicon in Raman scattering spectroscopy. Under film-forming conditions in which high-frequency power is large such that microcrystalline silicon is formed, the raw material gas is rapidly decomposed by large high-frequency power in the vicinity of the gas blowing portion of the discharge chamber 505, and becomes thick as a microcrystalline silicon film on the belt-shaped substrate 201. accumulate. Further, the raw material gas that has not been decomposed in the vicinity of the gas blowing section (raw material gas introduction pipe) sequentially moves from left to right in FIG.
5, the gas is decomposed while flowing toward the exhaust hole, and is deposited as a microcrystalline silicon film on the belt-shaped substrate 201. However, since the source gas is gradually depleted, the formed film thickness gradually decreases. Under the film forming conditions in which the high-frequency power is large and the H ₂ dilution ratio is high, the film forming speed is reduced as compared with FIG. 6, but the distribution is reduced. Under such film forming conditions, Si
The film formation rate can be increased by increasing the H ₄ flow rate, increasing the discharge frequency, or shortening the distance between the discharge electrode and the substrate.

As described above, the respective semiconductor layers were stacked on the belt-like substrate 201 (the substrate 101 in FIG. 1) in the order shown in FIG. 1 in each film forming chamber.

(9) After the formation of the semiconductor laminated film, the supply of the discharge power, the introduction of the raw material gas, and the heating of the belt-like substrate and the film forming chamber were stopped, and the film forming chamber was purged. Thereafter, the apparatus is opened after sufficiently cooling the band-shaped substrate and the inside of the apparatus, and the band-shaped substrate 201 wound on the take-up bobbin 205 is opened.
Was taken out from the winding chamber 206 of the belt-shaped substrate into the atmosphere.

(10) A transparent electrode (upper electrode) 10 is formed on the formed semiconductor laminated film by using a sputtering device (not shown).
A single-type photovoltaic element 7 is formed by forming an ITO thin film on the entire surface, forming a thin line-shaped Ag electrode as a collecting electrode (not shown) at regular intervals, and performing modularization such as serialization of unit elements. Were continuously produced.

The solar cell module according to the present embodiment manufactured as described above was manufactured using AM1.5 (100 mW / cm ² ).
Were evaluated under simulated sunlight irradiation. And AM
1.5 (100 mW / cm ² ) simulated sunlight at a temperature of 50
The photoelectric conversion efficiency Eff2 in the state of continuous irradiation at 500C and photodegradation for 500 hours was measured, and the photodegradation rate (= (Eff1−Eff2) / Eff1) in comparison with the initial efficiency Eff1 was obtained.

For comparison, a photovoltaic element as shown in FIG. 3 was manufactured as a conventional example. That is, the amorphous n-type layer 3
02 (film formation rate = 1.0 nm / sec) and a microcrystalline n-type layer 303 formed at a low rate (film formation rate = 0.2 nm / sec).
An n-type layer was constituted by the two layers c). At this time, the formation time of the microcrystalline n-type layer 303 was lengthened so that the film thickness of the microcrystalline n-type layer was the same as in Example 1 (Comparative Example 1-1 device).
Except for this, the device was prepared in the same manner as in Example 1, and the same measurement was performed.

For further comparison, the amorphous n-type layer 30
Microcrystalline n-type layer 303 formed at a high speed of 2 (film formation rate = 1.0 nm / sec) (film formation rate = 1.0 nm / sec)
(Comparative Example 1-2 device). Except for this, the device was prepared in the same manner as in Example 1, and the same measurement was performed.

As a result, the photoelectric conversion efficiency and the light deterioration rate of the device of Comparative Example 1-1 standardized with the values of the device of Example 1 were almost equal. That is, Example 1 of the present invention in which a part of the microcrystalline n-type layer (microcrystalline n-type layer 103) was formed at a high speed.
In the device of Comparative Example 1-1, good photoelectric conversion efficiency similar to that of the device of Comparative Example 1-1 in which all the microcrystalline n-type layers were formed at a low speed was obtained.

That is, according to the present invention, it has become possible to form a microcrystalline n-type layer in a shorter time while preventing a decrease in photoelectric conversion efficiency and an increase in the rate of light degradation.

The photoelectric conversion efficiency of the device of Comparative Example 1-2, which was normalized by the value of the device of Example 1, was low. That is, when all the microcrystalline n-type layers were formed at a high speed as in the device of Comparative Example 1-2, the photoelectric conversion efficiency was reduced due to the occurrence of leakage current and interface states. The light degradation rate of the device of Example 1 is smaller than that of the device of Comparative Example 1-2. By forming a part of the microcrystalline n-type layer (microcrystalline n-type layer 104) at a low speed, this low-speed growth is achieved. The interface states could be effectively covered by the film, and light degradation could be reduced.

Example 2 A photovoltaic element as shown in FIG. 4 was replaced with a roll-to-roll type plasma CV shown in FIG.
It was produced using a D apparatus.

An amorphous n-type layer 402 formed of amorphous silicon at a high speed in order on a stainless steel substrate 401 on which Ag and ZnO are laminated (film formation rate = 1.0 nm /
sec), a microcrystalline n-type layer 403 made of microcrystalline silicon formed at a high speed (film forming rate = 1.0 nm / sec) and a microcrystalline n-type layer 404 formed at a low speed (film forming rate = 0.2 n)
m / sec), i-type layer 405 made of microcrystalline silicon
(Film formation rate = 3.0 nm / sec), p-type layer 406 made of microcrystalline silicon (Film formation rate = 0.2 nm / sec)
Was formed.

In this embodiment, by changing the flow rate of the SiH ₄ and the high-frequency power and changing the H ₂ dilution ratio,
Microcrystalline n-type layers 403 and 404 having different deposition rates were formed. The i-type layer 405 made of microcrystalline silicon has realized a higher film forming rate by narrowing the distance between the discharge electrode and the substrate and increasing the flow rate of SiH _{4 as} compared with other layers. The impurity concentration of the microcrystalline n-type layer 403 formed at a high speed was higher than that of the amorphous n-type layer 402 and the microcrystalline n-type layer 404 formed at a low speed (Example 2-1).

The microcrystalline n-type layer 403 formed at a high speed
A photovoltaic element was formed with the impurity concentration of the microcrystalline n-type layer 404 formed at a low speed set to zero (Example 2-2 element).

The film forming conditions are adjusted so that the film forming rate distribution and the crystallinity distribution as shown in FIG. 6 are obtained, and the microcrystalline n-type layer 403 formed at a high speed is formed in one discharge chamber. After forming the film while changing the film formation rate continuously from low to low, a photovoltaic element was formed in which the microcrystalline n-type layer 404 was formed at low speed (Example 2-3 elements).

For comparison, a photovoltaic device was manufactured in the same manner as in Example 2-1 except that the photovoltaic device was formed without forming the microcrystalline layer 404 formed at a low speed. Comparative Example 2 element).

Each solar cell module formed with the above photovoltaic elements was subjected to the same measurement as that of the element of Example 1.

As a result, higher photoelectric conversion efficiencies were obtained in the devices of Examples 2-1, 2-2, and 2-3 than in the device of Comparative Example 2. This is because the amorphous n-type layer 402 was formed at a high speed, and then microcrystalline silicon was formed at a high speed.
It is considered that this is because the device cannot cover cracks and cracks and generates leakage current and interface states. That is, when microcrystalline silicon is formed at a low speed on microcrystalline silicon formed at a high speed as in the elements of Examples 2-1, 2-2, and 2-3, cracks and the like can be covered,
The leakage current and the interface state were reduced, and high photoelectric conversion efficiency was obtained.

When microcrystalline silicon is formed at a high speed, high crystallinity cannot be obtained, and when microcrystalline silicon (i-type layer 405) is formed thereon at a higher speed, the crystallinity further decreases, resulting in high photoelectricity. Conversion efficiency cannot be obtained. That is, as in the elements of Examples 2-1, 2-2, and 2-3, the microcrystalline semiconductor is further formed at a low speed on the microcrystalline silicon formed at a high speed, so that the underlayer can be formed without gaps and the crystallinity can be improved. High-crystal silicon (i-type layer 4)
05), microcrystalline silicon having high crystallinity can be formed, and a photovoltaic element having high photoelectric conversion efficiency can be manufactured.

In particular, the microcrystalline n-type layer 403 formed at a high speed
In Example 2-1 in which the impurity concentration was increased, a device having a smaller light degradation rate than the device in Comparative Example 2 was obtained. This is because crystal nuclei in forming microcrystalline silicon are easily formed by increasing the impurity concentration, and the i-type layer 405 formed thereon also becomes microcrystalline silicon having high crystallinity.
The generation of defects in the film was suppressed, and a photovoltaic element having a small photodegradation rate was produced. Considering the diffusion of impurities into the underlying layer or the i-type layer 405 formed on the substrate 401, the high-speed microcrystalline n-type layer 403 which is an intermediate layer of the three n-type layers
It is effective to increase the impurity concentration of. In other words, when a crystal nucleus is formed in the high-speed deposited microcrystalline n-type layer 403 and then the microcrystalline n-type layer 404 is formed at a low speed, a semiconductor layer is formed while maintaining high crystallinity. Can be said to be sufficient if the microcrystalline n-type layer 403 is formed at a high speed.

In the device of Example 2-3, a high photoelectric conversion efficiency was obtained, and the light deterioration rate was smaller than that of the device of Example 2-1. High-speed microcrystalline n-type layer 403 with a microcrystalline n-type layer in which the deposition rate is continuously changed from high speed to low speed
Is formed, high photoelectric conversion efficiency is obtained, and cracks and cracks generated by high-speed film formation are continuously covered while changing the film formation speed of microcrystalline silicon, so that microcrystals n with less defects are formed. A photovoltaic element composed of a mold layer and a microcrystalline i-type layer is obtained.

(Embodiment 3) Two n's as shown in FIG.
A double cell type photovoltaic element having an ip junction was manufactured.

For the production, two roll-to-roll apparatuses shown in FIG. 2 are prepared, and one of them is used as in the second embodiment.
1 (a substrate 701 in FIG. 7), a microcrystalline silicon nip cell (702 to 70) in which an i-type layer is composed of microcrystalline silicon.
6) was manufactured while being continuously transported, and the strip-shaped substrate wound up on the take-up bobbin was taken out into the atmosphere, set in another unwinding chamber, and the i-type layer was made amorphous as in Example 1. Silicon nip cell (707) made of porous silicon
To 711) while transporting them continuously, to produce a double cell composed of two nip cells. Further, an ITO thin film was formed on the entire surface as a transparent electrode 712 by using a sputtering device (not shown), and a thin line-shaped Ag electrode was formed at regular intervals as a current collecting electrode (not shown). And

The n-type layer 702 of the amorphous silicon nip cell
-704 and n-type layer 70 of microcrystalline silicon nip cell
7 to 709 had a three-layer structure of high-speed amorphous, high-speed microcrystal, and low-speed microcrystal as in Example 1. Microcrystalline silicon ni
The n-type layer of the p-cell is different from the n-type layer of the amorphous silicon nip cell in that the underlying layer is not the substrate 701 made of a conductive material but the p-type layer 706.
Note that the p-type layer of the amorphous silicon nip cell was made of microcrystalline silicon.

In the double cell as in this embodiment, the contact interface between the two cells, that is, p / which forms the contact interface between the amorphous silicon nip cell and the microcrystalline silicon nip cell.
It is required that no photovoltaic is generated at the n reverse junction. Generally, in a p / n reverse junction formed of non-single-crystal silicon, there are many defect levels in each of the p-type layer and the n-type layer, and carriers are recombined via the defect level and the interface level to form an ohmic junction. Becomes However, depending on the film formation conditions of each of the p-type and n-type layers, a pn junction may be formed instead of an ohmic junction, generating a photovoltaic force in the opposite direction and reducing the photoelectric conversion efficiency of the photovoltaic element. .

For reference, a photovoltaic element was formed without forming the n-type low-speed microcrystalline layer 709 of the microcrystalline silicon nip cell (reference element). The same measurement as in Example 1 was performed for each solar cell module formed with these photovoltaic elements.

Although the reference device did not provide so good conversion efficiency, the device of Example 3 obtained high photoelectric conversion efficiency. This is because even on a p-type layer composed of microcrystalline silicon, cracks occur only with amorphous silicon formed at high speed and microcrystalline silicon formed at high speed alone,
High photoelectric conversion efficiency cannot be obtained, probably because of leakage current. That is, after forming an amorphous silicon nip cell,
An extremely thin silicon oxide film formed on the surface of the p-type layer in the process of being taken out to the atmosphere,
Amorphous silicon formed at a high speed and microcrystalline silicon formed at a high speed cannot be covered, and a favorable interface is not formed at the p / n reverse junction, and a photovoltaic force in the opposite direction is generated. The photoelectric conversion efficiency decreases.

[0064]

According to the present invention, it is possible to realize a photovoltaic element having a high photoelectric conversion efficiency with less photodeterioration in a shorter film formation time than in the prior art. That is, according to the present invention, the first conductive type semiconductor layer of the amorphous semiconductor is formed at a high speed, the microcrystalline semiconductor thereafter is formed at a high speed, and then the microcrystalline semiconductor is formed at a lower speed. Cracks and cracks around the rapidly grown portion are covered with a microcrystalline layer formed at a low speed, thereby suppressing generation of leakage current. Further, by covering a surface defect of a microcrystalline semiconductor formed at a high speed with a microcrystalline semiconductor formed at a low speed, an interface state with an i-type layer can be reduced. Further, it is possible to form a photovoltaic element made of microcrystalline silicon that maintains high crystallinity. The configuration of the present invention is also effective as an interface layer between each first conductive semiconductor layer and an i-type layer in a tandem photovoltaic element such as a double cell or a triple cell having a plurality of nip junctions. Taking the case of a double cell composed of a bottom cell and a top cell as an example, the first cell of the top cell
Forming an amorphous semiconductor at high speed as a conductive semiconductor layer of
Thereafter, a microcrystalline semiconductor is formed at a high speed, and a microcrystalline semiconductor is further formed thereon at a low speed, so that the first conductive type of the top cell is not damaged without damaging the second conductive type semiconductor layer of the bottom cell. It is possible to reduce the resistance of the semiconductor layer and reduce the manufacturing time.

[Brief description of the drawings]

FIG. 1 shows an embodiment of a photovoltaic device of the present invention (Example 1).
FIG. 2 is a cross-sectional view schematically showing the configuration of FIG.

FIG. 2 is a schematic diagram of a mass-production type film forming apparatus used in Example 1 of the present invention.

FIG. 3 is a cross-sectional view schematically illustrating a configuration of a conventional photovoltaic element.

FIG. 4 is a cross-sectional view schematically showing a configuration of another embodiment (Example 2) of the photovoltaic device of the present invention.

FIG. 5 is a schematic diagram of a discharge chamber installed in a mass production type film forming apparatus used in the present invention.

FIG. 6 is a diagram showing a deposition rate distribution and a crystallinity distribution in a discharge chamber.

FIG. 7 is a cross-sectional view schematically showing a configuration of still another embodiment (Example 3) of the photovoltaic device of the present invention.

[Explanation of symbols]

101, 301, 401, 701 Conductive substrate 102, 302, 402, 702, 707 Amorphous n-type layer (high-speed film formation) 103, 303, 403, 703, 708 Microcrystalline n-type layer (high-speed film formation) 104 , 404, 704, 709 Microcrystalline n-type layer (low-speed deposition) 105, 305, 710 Amorphous i-type layer 405, 705 Microcrystalline i-type layer 106, 306, 406, 706, 711 Microcrystalline p-type layer 107 , 307, 407, 712 Upper electrode 201 Strip substrate 202 Gas gate 203 Strip substrate unwinding bobbin 204 Strip substrate unwinding chamber 205 Strip substrate winding bobbin 206 Strip substrate winding chamber 207 N-type layer deposition chamber 208, 209 i-type layer deposition chamber 210 p-type layer deposition chamber 502 vacuum chamber 503, 504 gas gate 505 discharge chamber 506 discharge electrode 50 Raw material gas introduction pipe 508 exhaust pipe 509 block heater 510 discharge chamber external exhaust port 511 deposition region opening adjusting plate 512 lid 513 lamp heater 514 thermocouple 515 reflector 516 support rollers 517 gate gas introducing pipe

Continued on the front page F term (reference) 4K030 AA06 AA17 AA20 BA29 BA30 BB04 BB12 CA02 CA17 FA03 GA14 HA04 JA05 JA06 JA12 JA16 KA30 LA16 5F051 AA04 AA05 CA15 CA22 CB15 DA04 DA17 FA04 GA02 GA06

Claims (4)

[Claims] 1. A semiconductor device having a structure in which at least one first conductive semiconductor layer made of a non-single-crystal semiconductor, a substantially intrinsic semiconductor layer, and a second conductive semiconductor layer are sequentially stacked on a substrate. In the photovoltaic element, the first conductivity type semiconductor layer is formed of an amorphous semiconductor, and a large amount of amorphous is present between the first conductivity type semiconductor layer and the substantially intrinsic semiconductor layer. A first microcrystalline semiconductor including the first microcrystalline semiconductor is formed first, and then a second microcrystalline semiconductor is formed at a lower deposition rate than the first conductive semiconductor layer and the first microcrystalline semiconductor. Power element. 2. The photovoltaic device according to claim 1, wherein said first microcrystalline semiconductor and said second microcrystalline semiconductor are the same conductivity type semiconductor as said first conductivity type semiconductor layer. 3. The photovoltaic device according to claim 2, wherein the concentration of the impurity imparting conductivity in the first microcrystalline semiconductor is higher than that of the second microcrystalline semiconductor. 4. The photovoltaic device according to claim 1, wherein a film formation rate of said first microcrystalline semiconductor decreases continuously toward said second microcrystalline semiconductor. Power element.