JP2001237187A - Manufacturing method of crystalline silicon semiconductor thin film - Google Patents

Abstract

PROBLEM TO BE SOLVED: To enhance the production efficiency of a crystalline silicon semiconductor thin film, which is formed by a low-temperature plasma CVD method, by increasing the film-forming rate of the thin film and also to modify the characteristics of the film. SOLUTION: The manufacturing method of a crystalline silicon semiconductor thin film is characterized by that a plasma discharge electrode to blow off reaction gas is arranged in opposition to a substrate, each of a plurality of gas exhaust holes being included in the electrode has the long sectional diameter on the gas exhaust side in comparison with the sectional diameter on the gas introducing side, the gas pressure within a reaction chamber is a pressure higher than 5 Torr, the reaction gas contains silane gas and hydrogen gas as its main component and the deposition rate of the silicon semiconductor thin film is higher than 1 μm/h as the condition that the silicon semiconductor thin film is deposited by a plasma CVD method.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor thin film, and more particularly to a method for reducing the cost and improving characteristics of a crystalline silicon-based (including a silicon alloy) semiconductor thin film. In this specification, the terms “crystalline”, “polycrystalline”, and “microcrystalline” include those that partially include an amorphous state as generally used in the technical field of silicon-based thin films. Is also meant.

[0002]

2. Description of the Related Art At present, a plasma CVD method is often used for forming various semiconductor thin films. As a typical example, a silicon-based thin film required for a thin-film solar cell, a photosensitive drum of an electrophotographic copier, a TFT array of a liquid crystal display, and the like is formed using a plasma CVD method. Here, taking the thin-film photoelectric conversion device as an example, it generally includes a pin junction, and the photoelectric conversion action mainly occurs in the i-layer, which is a substantially intrinsic semiconductor layer. Then, p, which is a conductive type layer for generating an electric field,
The layers and the n-layer are much thinner than the i-layer, and the performance of the thin-film photoelectric conversion device is significantly affected by the characteristics of the i-layer. Therefore, regardless of whether the p-layer and the n-layer are amorphous or crystalline, when the i-layer is amorphous, it is called an amorphous (type) thin film photoelectric conversion device, and the i-layer is crystalline. In the case of high quality, it is called a crystalline (type) thin film photoelectric conversion device.

A typical example of the thin film photoelectric conversion device is an amorphous silicon solar cell. Since the amorphous photoelectric conversion material is usually formed by a plasma CVD method at a low film forming temperature of about 200 ° C., it can be formed on an inexpensive substrate such as glass, stainless steel, and an organic film, and can be manufactured at low cost. It is expected as a leading material for photoelectric conversion devices. In addition, since amorphous silicon has a large absorption coefficient in the visible light region, a solar cell using an amorphous photoelectric conversion layer with a thin film thickness of 500 nm or less has a large absorption coefficient.
A short circuit current of 5 mA / cm2 or more is realized.

However, in the case of amorphous silicon-based materials, Steb
As is called the ler-Wronskey effect, there is a problem that the photoelectric conversion characteristic is reduced by long-term light irradiation, and the effective sensitivity wavelength region is up to about 800 nm. Therefore, in a photoelectric conversion device using an amorphous silicon-based material, its reliability and high performance are limited, and the inherent advantages of the freedom of substrate selection and the use of a low-cost process are sufficient. Has not been utilized.

On the other hand, in recent years, photoelectric conversion devices using a semiconductor thin film containing crystalline silicon such as polycrystalline silicon or microcrystalline silicon have been vigorously developed. These developments attempt to achieve both low-cost and high-performance photoelectric conversion devices by forming high-quality crystalline silicon thin films on low-cost processes on inexpensive substrates. It is expected to be applied to various photoelectric conversion devices.

[0006] As a method of forming these crystalline silicon thin films, for example, they are deposited directly on a substrate by a CVD method or a sputtering method, or an amorphous film is once deposited by a similar process, and then thermal annealing or laser annealing is performed. There is a method of achieving crystallization by performing, for example, but in any case, in order to use an inexpensive substrate as described above, 55
It must be performed in a process at 0 ° C. or lower.

Among such processes, plasma C
The method of directly depositing a crystalline silicon thin film by the VD method is the easiest to lower the temperature of the process and increase the area of the thin film, and it is expected that a high-quality film can be obtained by a relatively simple process. . When a polycrystalline silicon thin film is obtained by such a method, a high-quality silicon thin film containing a crystalline material is once formed on a substrate by some process, and then formed as a seed layer or a crystallization control layer thereon. Thus, a high-quality polycrystalline silicon thin film can be formed even at a relatively low temperature.

On the other hand, the silane-based source gas is diluted 10 times or more with hydrogen, and the pressure in the plasma reaction chamber is reduced to 10 mTorr or more.
It is well known that a microcrystalline silicon thin film can be obtained by forming a film by a plasma CVD method at a temperature within a range of 1 Torr. Can be For example, a photoelectric conversion device including a photoelectric conversion unit formed of a microcrystalline silicon pin junction is disclosed in Appl, Phys, Lett., Vol 65,
1994, p.860. This photoelectric conversion unit is composed of a p-type semiconductor layer, an i-type semiconductor layer and an n-type semiconductor layer, which are simply stacked sequentially by a plasma CVD method, and all of these semiconductor layers are microcrystalline silicon. It is characterized by. However, in order to obtain a high-quality crystalline silicon film and further a high-performance silicon-based thin-film photoelectric conversion device, the film forming rate is 0.6 μm / hr in the thickness direction under the conventional manufacturing method and conditions. It is slower than this, and is only about the same as or less than that of the amorphous silicon film.

On the other hand, an example in which a silicon film is formed under a relatively high pressure of 5 Torr by a low-temperature plasma CVD method is described in Japanese Patent Application Laid-Open No. 4-137725. However, in this case, a silicon thin film is directly deposited on a substrate such as glass, and this is a comparative example with respect to the invention disclosed in Japanese Patent Application Laid-Open No. 4-137725. It is not applicable.

In general, when the pressure condition of the plasma CVD method is increased, a large amount of powdery products and dust are generated in the plasma reaction chamber. In that case, there is a high risk that the dust or the like will fly to the surface of the film being deposited and be taken into the deposited film, which may cause pinholes in the film. In order to reduce such deterioration of the film quality, the inside of the reaction chamber must be frequently cleaned. In particular, when a film is formed under a low temperature condition such as 550 ° C. or lower, these problems when the pressure in the reaction chamber is increased become remarkable. In addition, in the manufacture of a photoelectric conversion device such as a solar cell, a large-area thin film needs to be deposited, which causes problems such as a reduction in product yield and an increase in labor and cost for maintaining and managing the film formation device.

Therefore, the silicon-based thin film is formed by plasma C
In the case of manufacturing using the VD method, as described above, a pressure condition of usually 1 Torr or less has been conventionally used.

[0012]

The photoelectric conversion device including the crystalline silicon-based semiconductor thin film as described above has the following problems. That is, when used as a photoelectric conversion layer of a solar cell, whether it is polycrystalline silicon or microcrystalline silicon partially containing an amorphous phase, sunlight can be sufficiently absorbed in consideration of the absorption coefficient of crystalline silicon. In order to absorb the film, a film thickness of at least several μm to several tens μm is preferable. This means that the thickness is slightly less than one digit to two digits thicker than the case of the amorphous silicon photoelectric conversion layer.

However, according to the prior art, in order to obtain a high-quality crystalline silicon-based semiconductor thin film at a low temperature by a plasma CVD method, various factors such as temperature, pressure in a reaction chamber, high-frequency power, and gas flow ratio are required. Even when the film forming condition parameters were examined, the film forming speed was about the same as or lower than that of the amorphous silicon film, for example, only about 0.6 μm / hr. In other words, the crystalline silicon thin film photoelectric conversion layer requires several times to tens of times the film formation time of the amorphous silicon photoelectric conversion layer, and it is difficult to improve the throughput of the manufacturing process of the photoelectric conversion device. This hinders cost reduction.

In view of the above-mentioned problems in the prior art, an object of the present invention is to increase the film forming rate of a crystalline silicon-based semiconductor thin film formed by a low-temperature plasma CVD method, thereby improving the throughput of the manufacturing process, and It is to improve the characteristics of a silicon-based thin film.

[0015]

In the method of manufacturing a crystalline silicon-based semiconductor thin film according to the present invention, conditions for depositing the silicon-based thin film on a substrate by a plasma CVD method are as follows: A second electrode is disposed opposite the substrate; the second electrode has a plurality of gas discharge holes for discharging a reaction gas for depositing a silicon-based thin film toward the substrate. Each of the gas discharge holes has a larger cross-sectional diameter on the gas discharge side than on the gas inlet side; the reaction gas pressure in the reaction chamber is set to 5 Torr or more; and the reaction gas contains silane gas and hydrogen gas as main components. Included; and characterized in that the deposition rate of the silicon-based thin film is 1 μm / h or more.

[0016]

FIG. 1 is a schematic perspective view illustrating a thin-film photoelectric conversion device including a crystalline silicon-based semiconductor thin film manufactured according to one embodiment of the present invention. A metal such as stainless steel,
An organic film, low-melting-point inexpensive glass, or the like can be used.

The back electrode 110 on the substrate 101 includes one or more of the following thin films (A) and (B) and can be formed by, for example, an evaporation method or a sputtering method. (A) Ti, Cr, Al, Ag, Au, Cu and P
A metal thin film including a layer made of at least one metal selected from t or an alloy thereof. (B) A transparent conductive thin film including a layer made of at least one oxide selected from ITO, SnO ₂ and ZnO.

On the back electrode 110, the photoelectric conversion unit 1
One of the eleventh conductive semiconductor layers 104 is deposited by a plasma CVD method. The one-conductivity-type semiconductor layer 104 contains, for example, phosphorous, which is a conductivity-type determining impurity atom, of 0.0.
An n-type silicon layer doped with 1 atomic% or more or a p-type silicon layer doped with boron at 0.01 atomic% or more can be used. However, these conditions for the one-conductivity-type semiconductor layer 104 are not limited. For example, nitrogen or the like for an n-type layer or aluminum or the like for a p-type layer may be used as impurity atoms. Alloy materials such as carbide and silicon germanium may be used. The one-conductivity-type silicon-based thin film 104 may be polycrystalline, microcrystalline, or amorphous, and its thickness may be set, for example, in the range of 2 to 150 nm.

Photoelectric conversion layer 105 of crystalline silicon-based thin film
As a non-doped i-type polycrystalline silicon thin film, an i-type microcrystalline silicon thin film having a volume crystallization fraction of 80% or more, or a weak p-type or weak n-type containing a small amount of impurities, sufficient photoelectric conversion efficiency is provided. Some silicon-based thin film materials can be used. Further, the photoelectric conversion layer 105 is not limited to these materials, and an alloy material such as silicon carbide or silicon germanium may be used. The thickness of the photoelectric conversion layer 105 is in the range of 0.5 to 10 μm, and has a necessary and sufficient thickness as a crystalline silicon thin film photoelectric conversion layer.

The crystalline silicon-based photoelectric conversion layer 105 is formed by a parallel plate electrode type plasma CVD method, and a high frequency power supply having a frequency of 150 MHz or less and an HF band to a VHF band can be used. In addition, these plasma CVD
The film formation temperature of the crystalline silicon-based photoelectric conversion layer 105 in the method is 550 ° C. or lower at which the above-mentioned inexpensive substrate can be used.

During the deposition of the crystalline silicon-based thin film photoelectric conversion layer 105, the distance between the substrate mounted on one electrode and the electrode facing the substrate in the plasma CVD reaction chamber is set within a range of 8 to 30 mm. And the reaction chamber pressure is 5
Torr or higher. Further, the high frequency power density at that time is preferably 40 mW / cm ² or more. Further, it is preferable that a silane-based gas and a hydrogen gas be contained as main components of the gas introduced into the reaction chamber, and that a flow rate ratio of the hydrogen gas to the silane-based gas be 40 times or more. As the silane-based gas, monosilane, disilane and the like are preferable. In addition, silicon halide gas such as silicon tetrafluoride, silicon tetrachloride and dichlorosilane may be used. In addition, an inert gas such as a rare gas, preferably helium, neon, or argon may be used. The crystalline silicon-based photoelectric conversion layer 105 as described above
Under the above forming conditions, the film forming speed can be made 1 μm / hour or more.

Most of the crystal grains contained in the crystalline silicon-based thin film 105 extend upward from the underlayer 104 in a columnar shape and grow. Many of these crystal grains have a preferential crystal orientation plane of (110) parallel to the film plane, and the intensity ratio of the (111) diffraction peak to the (220) diffraction peak determined by X-ray diffraction is 1/5 or less. And preferably 1/10 or less. Note that even when the surface shape of the one-conductivity-type layer 104 as the underlayer is substantially flat, the photoelectric conversion layer 1
After the formation of the film 05, a surface texture structure having fine irregularities at intervals of about one digit smaller than the film thickness is formed. Further, the obtained crystalline silicon-based thin film 10
5 is preferably such that the hydrogen content determined by secondary ion mass spectrometry is in the range of 0.1 atomic% or more and 20 atomic% or less.

The crystalline silicon-based thin film 10 of the present invention
In the formation method 5, since a high pressure is used as compared with the conventional pressure condition of 1 Torr or less, ion damage in the film can be reduced as much as possible. Therefore, even if the high-frequency power is increased or the gas flow rate is increased to increase the deposition rate,
Good quality film can be formed at high speed with little ion damage on the surface of the deposited film. In addition, if film formation is performed under high pressure conditions, contamination due to powder generation in the reaction chamber may be a concern, but since the raw material gas is diluted with a high heat conductive gas such as hydrogen in a larger amount than in the past, such Problems are less likely to occur.

Further, for the following reason, in the present invention, a crystalline silicon-based thin film 105 having higher quality than that of the conventional method can be obtained. First, since the deposition rate is high, the rate at which impurity atoms such as oxygen and nitrogen remaining in the reaction chamber are taken into the film decreases. Further, since the crystal nucleus generation time in the early stage of film growth is short, the nucleus generation density is relatively reduced, and crystal grains having a large grain size and strong crystal orientation are easily formed. Further, when a film is formed under a high pressure, the crystal grain boundaries and defects in the grains are easily passivated by hydrogen, and the defect density thereof is reduced.

In FIG. 2, an example of a plasma CVD apparatus which can be preferably used for forming the crystalline silicon-based thin film 105 as described above is illustrated in a schematic sectional view. In this plasma CVD apparatus, a lower discharge electrode 222 and an upper electrode 223 are provided to generate plasma 228 in the reaction chamber 221.
These two electrodes 222, 22 facing each other up and down
At least one of the members 3 is movable in a vertical direction, a horizontal direction, and / or an inclined direction, and the distance between the members 3 can be reduced or enlarged.

The substrate 101 is introduced into the reaction chamber 221 through an entrance 225 provided with a valve (not shown), and can be mounted on the upper electrode 223. At this time, the electrode 223
In order to facilitate the mounting of the substrate to the
The interval between 2,223 is enlarged. The lower electrode 222 is hollow so as to guide the reaction gas 226, and its upper surface has a plurality of gas blowing holes for blowing the reaction gas toward the substrate 101. As these gas blowing holes, generally cylindrical holes having a constant cross-sectional diameter are used, but in the present invention, divergent nozzle-shaped holes having a larger cross-sectional diameter on the gas discharge side than on the gas introduction side are used. . If the substrate 101 is mounted on the upper electrode 223, the distance between the substrate 101 and the counter electrode 222 is 8 to 3
The distance is set within a range of 0 mm. The inside of the reaction chamber 221 is evacuated through the exhaust passage 227, and at the same time, a reaction gas is supplied from a divergent nozzle-shaped hole of the counter electrode 222, so that a predetermined reaction gas pressure can be maintained.

In general, when a counter electrode having a normal cylindrical gas blowing hole is used, the gas pressure required to maintain plasma discharge is inversely related to the distance between the substrate electrodes. The distance between the substrate electrodes must be relatively large. Conversely, when the gas pressure is large, the distance between the substrate electrodes must be reduced. For example,
When a counter electrode having a normal cylindrical gas blowing hole is used, the distance between the substrate electrodes must be set to a small distance of 10 mm or less under a reaction gas pressure of 5 Torr or more. Under such a narrow distance between the substrate electrodes,
Since plasma is generated in a limited narrow area, a large amount of silicon powder may be generated. In addition, it is difficult to maintain the uniformity of the flow and concentration of the reaction gas under such a narrow distance between the substrate electrodes. Tends to occur.

On the other hand, as in the present invention, the counter electrode 22
When 2 has a divergent nozzle-shaped gas blowing hole, 5 Torr
Even under a gas pressure of r or more, it becomes possible to maintain the discharge by the distance between the substrate electrodes within a wide range such as 8 to 30 mm. That is, in the case of using a counter electrode having a divergent nozzle-shaped gas blowing hole, the distance between the substrate electrodes can be set larger than in the case of using a counter electrode having a normal cylindrical gas blowing hole. Therefore, by using a counter electrode having a divergent nozzle-shaped gas blowing hole as in the present invention, it is possible to reduce the generation of silicon powder even under a high reaction gas pressure, and to obtain a photoelectric element having a large light receiving area. Also in the conversion device, it is possible to reduce the variation in locational characteristics.

FIG. 3 schematically illustrates the cross-sectional shape of an example of a divergent nozzle-shaped gas blowing hole that can be used in the counter electrode 222. In the divergent nozzle-shaped gas blowing hole as shown in FIG.
May be set, for example, in the range of 1.6 to 3.8 mm. The opening angle B of the conical portion can be set within a range of about 22 degrees. The cross-sectional diameter C of the short cylinder at the bottom of the conical portion can be set in the range of about 1.1-1.6 mm. The cross-sectional diameter E of the cylindrical portion on the gas introduction side is about 0.4 to 0.7 m.
m can be set. The total length F of the conical portion and the cylindrical portion on the gas discharge side can be set within a range of about 6 to 8.4 mm. And the length G of the cylindrical portion on the gas introduction side is
It can be set within the range of about 2-2.5 mm. However, FIG.
It is needless to say that the cross-sectional shape shown in FIG. 1 is merely an example that can be adopted as the divergent nozzle-shaped gas blowing hole, and various divergent nozzle-shaped holes having other cross-sectional shapes can also be used.

On the photoelectric conversion layer 105, the underlying layer 10
A silicon-based thin film as the conductive semiconductor layer 106 of the type opposite to that of No. 4 is deposited by a plasma CVD method. As the reverse conductivity type silicon-based thin film 106, for example, a p-type silicon thin film doped with boron, which is a conductivity type determining impurity atom, in an amount of 0.01 atomic% or more, or an n-type silicon film doped with phosphorus in an amount of 0.01 atomic% or more A thin film or the like can be used. However, these conditions for the opposite conductivity type semiconductor layer 106 are not limited, and for example, aluminum or the like for p-type or nitrogen or the like for n-type may be used as impurity atoms, and silicon carbide may be used. Alternatively, a film of an alloy material such as silicon germanium may be used. This reverse conductivity type silicon-based thin film 106 may be polycrystalline, microcrystalline, or amorphous, and has a thickness of 2 to 150 n.
m.

On the photoelectric conversion unit 111, ITO,
A transparent conductive oxide film 107 composed of at least one layer selected from SnO ₂ , ZnO or the like is formed, and further thereon Al, Ag, Au, Cu,
A comb-shaped metal electrode 108 including a layer of at least one metal selected from Pt or the like or an alloy thereof is formed by a sputtering method or a vapor deposition method, whereby the photoelectric conversion device as shown in FIG. Complete.

FIG. 1 shows only one example of a silicon-based thin film photoelectric conversion device to which the manufacturing method according to the present invention can be applied. Tandem including, in addition to at least one crystalline thin film photoelectric conversion unit including a porous photoelectric conversion layer, and at least another amorphous thin film photoelectric conversion unit including an amorphous photoelectric conversion layer formed by a known method It is needless to say that the present invention can be applied to a type photoelectric conversion device.

As shown in, for example, a schematic perspective view of FIG. 4, as another embodiment of the present invention, a tandem silicon-based thin film photoelectric conversion device of a type in which light is incident from the glass substrate side. Can be manufactured. In the photoelectric conversion device of FIG. 4, a layer 407 corresponding to the transparent conductive layer 107 in FIG. The first photoelectric conversion unit 412, the second photoelectric conversion unit 411, and the back electrode 410 are stacked on the transparent conductive layer 407. First photoelectric conversion unit 4
Reference numeral 12 denotes an amorphous photoelectric conversion unit, which is a first conductive type microcrystalline or amorphous silicon thin film 4 which is sequentially laminated.
15, a substantially intrinsic semiconductor amorphous silicon-based thin film photoelectric conversion layer 414 and a microcrystalline or amorphous silicon-based thin film 413 of the opposite conductivity type. On the first photoelectric conversion unit 412, a plurality of layers 402 to 406 respectively corresponding to the plurality of layers 102 to 106 in FIG. At this time, each of the layers 402 to 402 in FIG.
406 can be similarly formed according to the corresponding layers 102 to 106 in FIG.

Among the series of manufacturing processes of the silicon-based thin film photoelectric conversion device described above, the biggest problem in improving the throughput is the crystalline photoelectric conversion layer requiring a large film thickness. Needless to say, the manufacturing process was (105, 405). However, according to the present invention, the film formation rate of the crystalline photoelectric conversion layer is greatly improved, and a higher quality film can be obtained.
This can greatly contribute to higher performance and lower cost of the silicon-based thin film photoelectric conversion device.

[0035]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, a thin-film solar cell which can utilize a crystalline silicon-based semiconductor thin film according to a manufacturing method of an embodiment of the present invention will be described.

(Example 1) A crystalline silicon thin film solar cell as Example 1 was manufactured corresponding to the embodiment of FIG. First, a back electrode 110 is placed on a glass substrate 101.
As a result, each of the metal film 102 including the Ti layer and the Ag layer and the ZnO film 103 thereon was formed by a sputtering method. On the back electrode 110, a crystalline photoelectric conversion unit 111 was formed. N-layer 104, i-layer 105, and p-layer 106 included in photoelectric conversion unit 111
Are 100 nm, 2.5 μm, and 100 n, respectively.
m thickness.

At the time of depositing the i-layer 105, a counter electrode having a plurality of divergent nozzle-shaped gas blowing holes was used, and the distance between the substrate electrodes was set to 11 mm. When a counter electrode having a divergent nozzle-shaped gas blowing hole was used, the reaction chamber pressure capable of maintaining plasma discharge could be increased even when the distance between the substrate electrodes was 10 mm or more, and was set to 9.5 Torr. Silane and hydrogen were used as reaction gases, and the flow rate of hydrogen to silane was set to 150 times, and 13.5
The high frequency power density applied from a 6 MHz RF power supply was 99.5 mW / cm ² . Such a plasma C
Under the VD condition, the deposition rate of the i-layer 105 is 1.3.
μm / h.

The light of AM1.5 was applied to the crystalline silicon thin film solar cell of Example 1 as the incident light 109 at 100 mW /
In the output characteristics when irradiated at a luminous intensity of cm ² , the open-circuit voltage was 0.502 V, and the short-circuit current density was 25.1 mA /
cm ² , fill factor 77.1%, and conversion efficiency 9.
7%.

(Example 2) As Example 2, a crystalline silicon thin film solar cell was fabricated in a manner similar to Example 1. In the second embodiment, the crystalline silicon photoelectric conversion layer 105
Except that the film forming conditions of Example 1 were changed, the film forming conditions and device structure of the other layers were exactly the same as those in Example 1. That is, in Example 2, the reaction chamber pressure was set to 5.
0 Torr, and the distance between the substrate electrodes was set to 15 mm. Then, the flow rate of hydrogen to silane was increased 79 times, and the RF power density was 49.7 mW / cm ² .
Under these plasma CVD conditions, the deposition rate of the i-layer 105 was 1 μm / h.

In the second embodiment, since the pressure in the reaction chamber is reduced as compared with the first embodiment, the distance between the substrate electrodes can be further increased, and accordingly, the flow ratio of hydrogen to silane and the RF power density are reduced. can do.

In the output characteristics when the crystalline silicon thin film solar cell according to the second embodiment is irradiated with incident light 109 under the same conditions as in the first embodiment, the open-circuit voltage is 0.4
93V, short circuit current density was 23.4 mA / cm ² , fill factor was 78.0%, and conversion efficiency was 9.0%.

Example 3 As Example 3, a crystalline silicon thin-film solar cell was produced in a manner similar to Example 2. The third embodiment is different from the second embodiment only in that the high frequency power supply for forming the i-layer 105 is changed from HF to VHF of 40 MHz and the flow rate of hydrogen to silane is increased 45 times. Under these plasma CVD conditions, the deposition rate of the i-layer 105 was 2.8 μm / h. That is, it is understood that the flow rate ratio of hydrogen to silane can be reduced by increasing the frequency of the high frequency applied to the discharge electrode.

In the output characteristics when the crystalline silicon thin-film solar cell of Example 3 was irradiated with incident light 109 in the same manner as in Example 1, the open-circuit voltage was 0.47.
9 V, short-circuit current density was 24.4 mA / cm ² , fill factor was 75.4%, and conversion efficiency was 8.8%.

Example 4 corresponds to the embodiment of FIG.
And a tandem-type silicon thin-film solar cell as Example 4.
Was produced. First, a transparent electrode layer is formed on a glass substrate 401.
SnO as 407 _TwoA film is formed by CVD
Was. On the transparent electrode 407, an amorphous photoelectric conversion unit layer
412, crystalline photoelectric conversion unit layer 411, and back surface
The electrode 410 was laminated.

Under the deposition conditions for the amorphous i-layer 414 included in the amorphous photoelectric conversion unit 412, silane of 10 sccm is used as a reaction gas, and RF of 13.56 MHz is applied under a reaction chamber pressure of 0.3 Torr. Power density 1
5 mW / cm ² was applied. Then, the amorphous i-layer 41
4 was deposited to a thickness of 0.25 μm.

The plurality of layers 404 to 406 included in the crystalline photoelectric conversion unit 411 laminated on the amorphous photoelectric conversion unit 412 correspond to the conditions for forming the corresponding plurality of layers 104 to 106 in the first embodiment. Formed under the same conditions. On the crystalline photoelectric conversion unit 411, an ITO film 403 and an Ag film 402 were laminated as a back electrode 410.

For the tandem silicon thin-film solar cell of Example 4, 1 light of AM1.5 was applied as incident light 409.
In the output characteristics when irradiated with a light amount of 00 mW / cm ² , the open-circuit voltage is 1.37 V and the short-circuit current density is 11.
6 mA / cm ² , fill factor 74.9%, and conversion efficiency 11.9%.

Example 5 As Example 5, a tandem silicon thin-film solar cell similar to that of Example 4 was manufactured. In the fifth embodiment, the crystalline photoelectric conversion layer 405
Is different from Example 4 only in that it was formed under the same conditions as the crystalline photoelectric conversion layer 105 of Example 2.

The output characteristics when the incident light 409 was applied to the tandem thin-film solar cell of Example 5 under the same conditions as in Example 4 showed that the open-circuit voltage was 1.36 V and the short-circuit current density was 10.6 mW. / Cm ² , fill factor 76.2
%, And the conversion efficiency was 11.0%.

Example 6 As Example 6, a tandem silicon thin-film solar cell similar to Example 5 was produced. In the sixth embodiment, the crystalline photoelectric conversion layer 405
Is different from Example 5 only in that it was formed under the same conditions as Example 3.

The output characteristics when the incident light 409 was applied to the tandem thin-film solar cell of Example 6 in the same manner as in Example 5 showed that the open-circuit voltage was 1.33 V and the short-circuit current density was 11.1 mA. / Cm ² , fill factor 72.2
%, And the conversion efficiency was 10.6%.

[0052]

As described above, according to the present invention, a crystalline silicon-based semiconductor thin film is formed on an inexpensive substrate by plasma CVD.
When the film is formed at a low temperature by the method, the film forming speed can be greatly improved as compared with the related art, and good film quality can be obtained. Therefore, the present invention can greatly contribute to both high performance and low cost of various devices using the crystalline silicon-based semiconductor thin film.

[Brief description of the drawings]

FIG. 1 is a schematic perspective view showing an example of a photoelectric conversion device including a crystalline silicon-based semiconductor thin film obtained by a manufacturing method according to an embodiment of the present invention.

FIG. 2 is a schematic sectional view showing a plasma CVD apparatus that can be used in the manufacturing method according to the embodiment of the present invention.

FIG. 3 is a schematic sectional view showing an example of a divergent nozzle-shaped gas blowing hole that can be preferably used in a reaction gas blowing electrode of a plasma CVD apparatus.

FIG. 4 is a schematic perspective view showing an example of a tandem-type thin-film photoelectric conversion device obtained by using a manufacturing method according to another embodiment of the present invention.

[Explanation of symbols]

101, 401 A substrate such as glass, 102, 402 A
g, 103,403 ZnO, ITO, etc.
04,404,413 For example, n-type silicon layer, 1
05,405 crystalline silicon-based photoelectric conversion layer, 106,
406, 415, for example, p-type silicon layer, 107, 4
07 Transparent conductive film of ITO, SnO _2, etc., 108 Ag
, 109,409 irradiation light, 110,41
0 back electrode, 111, 411 crystalline silicon-based photoelectric conversion unit, 222 reactive gas blowing electrode, 223
Substrate mounting electrode, 414 Amorphous silicon-based photoelectric conversion layer.

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI Theme coat ゛ (Reference) H01L 31/04 X WF Term (Reference) 4G077 AA03 BA04 DB04 DB11 DB16 EA01 EA04 4K030 AA06 AA17 BA29 BA45 CA06 CA17 EA04 FA03 HA04 JA01 JA05 JA09 JA10 JA12 JA16 JA18 KA17 LA16 5F045 AA08 AB03 AB06 AC01 AC02 AC03 AC05 AC16 AC17 AD09 AE21 AE23 AF07 BB07 BB08 BB09 BB12 BB14 BB16 CA13 DA61 EE12 EH05 EH07 EH14 CA07 A0703F07CA02 DA04 DA17 FA02 FA03 FA04 FA06 FA18

Claims (7)

[Claims] 1. A method for manufacturing a crystalline silicon-based semiconductor thin film, comprising: depositing the silicon-based thin film on a substrate by a plasma CVD method, wherein the substrate is disposed on a first electrode in a plasma reaction chamber. A second electrode is disposed to face the substrate, the second electrode having a plurality of gas discharge holes for discharging a reaction gas for depositing the silicon-based thin film toward the substrate; Each of the gas discharge holes has a larger cross-sectional diameter on a gas discharge side than on a gas introduction side, a reaction gas pressure in the reaction chamber is 5 Torr or more, and the reaction gas contains silane gas and hydrogen gas as main components. A method for producing a crystalline silicon-based semiconductor thin film, wherein the deposition rate of the silicon-based thin film is 1 μm / h or more. 2. The method according to claim 1, wherein the distance between the second electrode and the substrate is 0.1.
2. The method according to claim 1, wherein the distance is in the range of 8 to 30 mm.
3. The method for producing a crystalline silicon-based semiconductor thin film according to item 1. 3. A flow rate ratio of the hydrogen gas to the silane-based gas is 40 times or more.
Or the method for producing a crystalline silicon-based semiconductor thin film according to item 2. 4. A power supply between the first and second electrodes of 40 mW /
The method for producing a crystalline silicon-based semiconductor thin film according to any one of claims 1 to 3, wherein a discharge power of not less than ² cm ² is applied. 5. A voltage between HF and V between the first and second electrodes.
5. The method for producing a crystalline silicon-based semiconductor thin film according to claim 1, wherein a high-frequency power in a range up to HF is applied. 6. The temperature of the silicon-based thin film is 100 to 400 ° C.
Is a crystalline silicon film having a volume crystallization fraction of 80% or more, which can be formed under an underlayer temperature in the range of 0.1% to 20% by atom, and 0.5% to 20% by atom. 1
The method for producing a crystalline silicon-based semiconductor thin film according to any one of claims 1 to 5, having a thickness within a range of 0 µm. 7. The silicon-based thin film has a preferred crystal orientation plane of (110) parallel to the film plane, and the intensity ratio of the (111) diffraction peak to the (220) diffraction peak in the X-ray diffraction is 1/1. The method for producing a crystalline silicon-based semiconductor thin film according to any one of claims 1 to 6, wherein the number is 5 or less.