JP2002217726A - Frequency synthesizer - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a frequency synthesizer that avoids the problem of frequency interference in the case of a simultaneous transmission/reception operation, prevents undesired transmission of spurious radiation in the case of a TDMA operation, especially transmission of spurious radiation with a frequency which cannot be eliminated by a filter within a frequency band, and reduces the current consumption in the case of the TDMA operation and the simultaneous transmission/reception operation. SOLUTION: A mixer sums a high local oscillation frequency and an intermediate local oscillation frequency in the case of the simultaneous transmission/ reception operation to form a transmission carrier frequency, and frequencies sufficiently apart from each other are selected for the high local oscillation frequency and the intermediate local oscillation frequency. In the case of the TDMA operation, a mixer sums the high local oscillation frequency and a frequency resulting from applying 1/4 frequency division to the high local oscillation frequency to form the transmission carrier frequency. Furthermore, in the case of the TDMA operation, supply of power to an intermediate frequency local oscillation section is stopped. In the case of the simultaneous transmission/ reception operation, supply of power to a 1/4 frequency divider is stopped.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a TDMA (Time Divi
It is used for a communication device that can switch and operate both the sion multiple access method and the simultaneous transmission / reception method.

[0002]

2. Description of the Related Art A conventional example of a frequency synthesizer used in a portable telephone device will be described with reference to FIG. FIG. 5 is a block diagram of a conventional frequency synthesizer. The frequency synthesizer shown in FIG. 5 includes a voltage-controlled oscillator 2, a low-pass filter 3, and a high-frequency PLL (Phase Locked Loop) circuit 4.
, The high-frequency local oscillator 20 is constituted by a PLL.
The voltage controlled oscillator 5, the low-pass filter 6, and the intermediate frequency PLL circuit 7 constitute the intermediate frequency local oscillator 30 with a PLL.

The output of the high-frequency local oscillator 20 is supplied to a receiver (RX) and the mixer 1. The mixer 1 adds the high frequency local oscillation frequency and the intermediate frequency local oscillation frequency, and supplies the sum as a transmission carrier frequency to a transmission unit (TX).

An 800 MHz PDC (Personal Digital)
In the cellular telephone system, three frequency bands of D band, A band, and C band are used. The D band, A band, and C band are respectively Is set as follows. The receiving intermediate frequency is 130.05M
Hz, and the high-frequency local oscillation frequency = the reception frequency−the reception intermediate frequency (130.05 MHz).
When the transmission intermediate frequency is selected under these conditions, the D band is 260.05 MHz, the A band is 185.05 MHz, and the C band is 185.05 MHz.

[0005]

In this configuration, the D band and the C band are not problematic, but in the case of the A band, the fifth harmonic of the transmission intermediate frequency 185.05 MHz, that is, 925.25M is used.
Hz spurious wave is generated. This frequency cannot be removed by the filter because it is within the transmission band. Therefore,
A configuration as shown in FIG. 6 is adopted as an improvement measure.

In FIG. 6, a high-frequency local oscillator 20 is formed as in FIG. 5, and its output is input to a 分 frequency divider 8. There is no intermediate frequency local oscillation section 30, and the mixer 1
The frequency of the し て frequency divider 8 and the frequency of the high frequency local oscillator 20 are added to generate a transmission frequency.

In the case of this system, the high-frequency local oscillator 20 generates another frequency at the time of transmission and at the time of reception. Therefore, in the TDMA operation, the frequency is switched and used in a time-division manner, so that the configuration shown in FIG. 6 can be applied.

Therefore, the configuration shown in FIG. 7 is adopted for simultaneous transmission / reception operation. In FIG. 7, a high-frequency local oscillator 20-1 for reception and a high-frequency local oscillator 20-2 for transmission are shown.
Are configured separately. The problem with this configuration is that current consumption increases because there are two high-frequency local oscillators 20-1 and 20-2, and above all, there are two PLL circuits that generate two approximate frequencies. And a problem of causing mutual interference is known.

The present invention has been made in view of such a background, and an object of the present invention is to provide a frequency synthesizer capable of avoiding the problem of frequency interference during simultaneous transmission / reception operation. SUMMARY OF THE INVENTION An object of the present invention is to provide a frequency synthesizer capable of avoiding generation of unnecessary transmission spurious, particularly spurious of a frequency that cannot be removed by a filter in a band, in TDMA operation. The present invention relates to TDMA
An object of the present invention is to provide a frequency synthesizer capable of reducing current consumption during operation and simultaneous transmission / reception operation.

[0010]

According to the frequency synthesizer of the present invention, in simultaneous transmission / reception operation, a high frequency local oscillation frequency and an intermediate frequency local oscillation frequency are added by a mixer to form a transmission carrier frequency. Since the oscillation frequency and the intermediate frequency local oscillation frequency are selected to be sufficiently separated from each other, the problem of frequency interference can be avoided.

Further, in the TDMA operation, the transmission carrier frequency is constituted by adding the high-frequency local oscillation frequency and the frequency obtained by dividing the high-frequency local oscillation frequency by 1/4 using a mixer, so that unnecessary transmission spurious, especially It is possible to avoid the occurrence of spurious at frequencies that cannot be removed by a filter in the band.

Further, since the intermediate frequency local oscillation section is not required in the TDMA operation, the power consumption of the intermediate frequency local oscillation section is stopped to reduce the current consumption in the TDMA operation.

In the simultaneous transmission / reception operation, two high frequency local oscillators are not required. In the simultaneous transmission / reception operation, the power supply to the 1/4 frequency divider is stopped. Current consumption can be reduced.

That is, the present invention relates to a frequency synthesizer, which is characterized by a first low-pass filter and a first voltage to which an output of the first low-pass filter is input. A control oscillator, receives the output of the first voltage-controlled oscillator, compares the phase of the frequency with the first reference oscillation frequency, and outputs a charge output corresponding to the phase difference to the first low-pass filter. A high-frequency local oscillator having a high-frequency PLL circuit, a second low-pass filter, a second voltage-controlled oscillator to which the output of the second low-pass filter is input, and a second voltage An intermediate frequency PLL circuit that receives the output of the control oscillator, compares the frequency with the second reference oscillation frequency, and outputs a charge output corresponding to the phase difference to the second low-pass filter. An intermediate frequency local oscillator, and the first voltage controlled oscillator A 1/4 frequency divider output is input,
The output of the 1/4 frequency divider is connected to one input terminal, the output of the second voltage controlled oscillator is connected to the other input terminal, and one of the two input terminals is connected to the output terminal. And a mixer for adding the output of the switch and the output of the first voltage controlled oscillator.

During TDMA operation, it is desirable to provide a means for stopping power supply to the intermediate frequency local oscillator. In addition, it is desirable to have a means for stopping the power supply of the 1/4 frequency divider during the simultaneous transmission / reception operation.

A modulator may be inserted between the switch and the mixer.

[0017]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A frequency synthesizer according to an embodiment of the present invention will be described with reference to FIGS. FIG. 1 is a block diagram of a frequency synthesizer according to a first embodiment of the present invention. FIG. 3 is a block diagram of a frequency synthesizer according to a second embodiment of the present invention.

As shown in FIG. 1, the frequency synthesizer according to the first embodiment of the present invention comprises a low-pass filter 3, a voltage-controlled oscillator 2 to which the output of the low-pass filter 3 is input, and a voltage-controlled oscillator 2. 2. A high-frequency local oscillator comprising: a high-frequency PLL circuit 4 which receives the output of the second output 2 and compares the frequency with the first reference oscillation frequency, and outputs a charge output corresponding to the phase difference to the low-pass filter 3. 20, a low-pass filter 6, a voltage-controlled oscillator 5 to which the output of the low-pass filter 6 is input,
An intermediate frequency PLL which receives the output of the voltage controlled oscillator 5, compares the frequency with the second reference oscillation frequency, and outputs a charge output according to the phase difference to the low-pass filter 6.
An intermediate frequency local oscillator 30 having a circuit 7, a quarter frequency divider 8 to which the output of the voltage controlled oscillator 2 is input,
The output of the frequency divider 8 is connected to the terminal a,
Is connected to the terminal b, and a switch 9 for switching and connecting either the terminal a or the terminal b to the output terminal, and the mixer 1 to which the output of the switch 9 and the output of the voltage controlled oscillator 2 are added. It is characterized by the following.

The control means (not shown) controls the TDM
During operation A, the power supply to the intermediate frequency local oscillation unit 30 is stopped. In the simultaneous transmission / reception operation, the 1/4 frequency divider 8
Turn off the power supply of the.

In the second embodiment, a modulator 10 is inserted between the switch 9 and the mixer 1 as shown in FIG.

Hereinafter, embodiments of the present invention will be described in more detail.

(First Embodiment) A frequency synthesizer according to a first embodiment of the present invention comprises a high-frequency local oscillator 2 composed of a voltage-controlled oscillator 2, a low-pass filter 3, and a high-frequency PLL circuit 4.
0, voltage-controlled oscillator 5, low-pass filter 6, intermediate frequency PL
An intermediate frequency local oscillator 30 constituted by the L circuit 7,
It comprises a frequency divider 8, a switch 9 and the mixer 1.

The high frequency local oscillator 20 receives the output of the voltage controlled oscillator 2 into the high frequency PLL circuit 4,
The L circuit 4 compares the phase with the first reference oscillation frequency, and supplies a charge output according to the phase difference to the low-pass filter 3. Further, the output of the low-pass filter 3 is supplied to the voltage-controlled oscillator 2 to constitute a generally known PLL. Also,
The output of the voltage controlled oscillator 2 is the output of the high frequency local oscillator 20.

The intermediate frequency local oscillating unit 30 receives the output of the voltage controlled oscillator 5 into the intermediate frequency PLL circuit 7, compares the phase with the second reference oscillation frequency in the intermediate frequency PLL circuit 7, and responds to the phase difference. The charge output is supplied to a low-pass filter 6. Further, the output of the low-pass filter 6 is supplied to the voltage-controlled oscillator 5 to constitute a generally known PLL.
Further, the output of the voltage controlled oscillator 5 becomes the output of the intermediate frequency local oscillator 30 and is connected to the terminal b of the switch 9.

The 1/4 frequency divider 8 includes a high-frequency local oscillator 20
Is input, the high-frequency local oscillation frequency is divided by １ ／ and output, and connected to the terminal a of the switch 9. Switch 9
Selects one of the outputs of the １ ／ frequency divider 8 and the intermediate frequency local oscillation unit 30 and supplies the same to the mixer 1. Mixer 1
Outputs the sum of the output frequency of the high-frequency local oscillator 20 and the output frequency of the switch 9.

Next, the operation of the frequency synthesizer of the first embodiment will be described. The frequency synthesizer of the first embodiment is
The description will be made assuming that the mobile phone device is used. The frequency configuration of the mobile phone device using the frequency synthesizer is an 800 MHz PDC mobile phone system, and three frequency bands of D band, A band, and C band are used. The D band, A band, and C band are respectively Is set as follows. Mobile phone devices that can send and receive simultaneously
It is necessary to perform transmission and reception in the TDMA (time division) system for all three bands and simultaneous transmission and reception in the D band. The reception intermediate frequency is 1
30.05 MHz is selected. The frequency synthesizer of the present invention provides a receiving station originating frequency and a transmitting carrier frequency. The receiving station oscillation frequency is (receiving frequency-receiving intermediate frequency (130.05 MHz)).

A. In the TDMA operation shown in FIG. 2, the switch 9 is connected to the side a. The intermediate frequency local oscillator 30
Turn off the power supply and stop the output. 1/4 frequency divider 8
Turns on the power supply and puts it in the operating state. At the timing of LM (level measurement for antenna switching diversity) and the reception slot, the high-frequency local oscillation unit 20 supplies the reception unit (RX) with a frequency that is the reception frequency-reception intermediate frequency. At the timing of the transmission slot, a frequency that is represented by the following equation is supplied to the ４ frequency divider 8 and the mixer 1.
The high frequency local oscillation frequency input to the frequency divider 8 is
The frequency is divided by ４ and supplied to the mixer 1 through the switch 9.

The mixer 1 adds a high-frequency local oscillation frequency and a quarter of the high-frequency local oscillation frequency to generate a transmission frequency and supplies the transmission frequency to a transmission unit (TX). Therefore, the frequency output from the high-frequency local oscillation unit 20 is calculated as (transmission frequency × 4/5) during transmission, and is calculated as (reception frequency−reception intermediate frequency (130.05 MHz) during reception). Becomes Further, the output of the transmitting side of the frequency synthesizer of the present invention is the transmission frequency because (high-frequency local oscillation frequency / 4) + high-frequency local oscillation frequency = high-frequency local oscillation frequency × (5/4).

B. In the simultaneous transmission / reception operation shown in FIG. 2, the switch 9 is connected to the b side. Intermediate frequency local oscillator 30
Turns on the power supply and puts it in the operating state. The 1/4 frequency divider 8 stops power supply and stops operation. The high-frequency local oscillating unit 20 supplies the receiving unit and the mixer 1 with a frequency equal to the receiving frequency-the receiving intermediate frequency. The intermediate frequency local oscillating unit 30 supplies the mixer 1 with a frequency equal to the transmission frequency−the high frequency local oscillating frequency through the switch 9. The mixer 1 adds the high frequency local oscillation frequency and the intermediate frequency local oscillation frequency, generates a transmission frequency, and supplies the transmission frequency to the transmission unit. Therefore, the frequency output from the high-frequency local oscillator is calculated as follows: reception frequency-reception intermediate frequency (130.05 MHz). At the time of the simultaneous transmission / reception operation, since only the D band is used, the D band is 679.95 to 697.95 MHz. Further, the output of the transmitting side of the frequency synthesizer of the present invention is represented by: high frequency local oscillation frequency + intermediate frequency local oscillation frequency (26
0.05 MHz), and the transmission frequency is D band: 940 to 958 MHz.

The control procedure of the frequency synthesizer of the present invention will be described with reference to FIG. FIG. 4 is a flowchart showing a control procedure of the frequency synthesizer of the embodiment of the present invention performed by control means (not shown). First, it is determined whether the operation to be performed is a simultaneous transmission / reception operation (S1).
In the case of simultaneous transmission / reception operation, the power supply to the 1/4 frequency divider 8 is stopped (S2). Power is supplied to the intermediate frequency local oscillator 30 (S3). Connect switch 9 to terminal b (S
4). The high frequency local oscillation frequency is set to the reception frequency -130.05 MHz (S5).

It is determined whether the operation to be performed is the simultaneous transmission / reception operation (S1). If the operation is not the simultaneous transmission / reception operation, the TDMA operation is performed, so that the power supply to the intermediate frequency local oscillation unit 30 is stopped (S6). . Power is supplied to the 1/4 frequency divider 8 (S7). Connect switch 9 to terminal a (S
8). It is determined whether the current time slot is a transmission slot (S9), and if it is a transmission slot, the high frequency local oscillation frequency is set to (transmission frequency × (4/5)) (S10). Further, it is determined whether the current time slot is a transmission slot (S9). If the current time slot is not a transmission slot, it is a reception slot, so that the high-frequency local oscillation frequency is set to the reception frequency -130.05 MHz (S11).

(Second Embodiment) A second embodiment of the present invention will be described with reference to FIG. In the first embodiment, the transmission carrier frequency is output. In the second embodiment, the transmission carrier frequency is modulated and used. As shown in FIG. 3, a modulator 10 is inserted between the switch 9 and the mixer 1 according to the first embodiment, modulated at an intermediate frequency, and then converted into a transmission frequency by the mixer 1 for use.

[0033]

As described above, according to the present invention,
During simultaneous transmission / reception operation, the problem of frequency interference can be avoided. At the time of TDMA operation, it is possible to avoid occurrence of unnecessary transmission spurious, particularly spurious of a frequency that cannot be removed by a filter in a band. Current consumption can be reduced during TDMA operation and simultaneous transmission / reception operation.

[Brief description of the drawings]

FIG. 1 is a block diagram of a frequency synthesizer according to a first embodiment of the present invention.

FIG. 2 is a diagram showing a time slot configuration of a TDMA system and a simultaneous transmission / reception system.

FIG. 3 is a block diagram of a frequency synthesizer according to a second embodiment of the present invention.

FIG. 4 is a flowchart showing a control procedure of the frequency synthesizer according to the embodiment of the present invention.

FIG. 5 is a block diagram of a conventional frequency synthesizer.

FIG. 6 is a block diagram of a conventional frequency synthesizer.

FIG. 7 is a block diagram of a conventional synthesizer.

[Explanation of symbols]

 Reference Signs List 1 mixer 2, 5, 15 voltage controlled oscillator 3, 6, 16 low-pass filter 4 high-frequency PLL circuit 7, 17 intermediate frequency PLL circuit 8 1/4 frequency divider 9 switch 10 modulator 20, 20-1, 20- 2 High frequency local oscillation section 30 Intermediate frequency local oscillation section

Claims (4)

[Claims] 1. A first low-pass filter, a first voltage-controlled oscillator to which the output of the first low-pass filter is input, and an output of the first voltage-controlled oscillator to which the output of the first voltage-controlled oscillator is input. A high-frequency PLL (Phase Locked Loop) circuit that compares the phase of the frequency with the first reference oscillation frequency and outputs a charge output corresponding to the phase difference to the first low-pass filter; A second low-pass filter, a second voltage-controlled oscillator to which the output of the second low-pass filter is input, and an output of the second voltage-controlled oscillator to input the frequency and the second An intermediate frequency local oscillation unit including an intermediate frequency PLL circuit that compares the phase of the reference oscillation frequency with the reference oscillation frequency and outputs a charge output corresponding to the phase difference to the second low-pass filter; and the first voltage control. A quarter frequency divider to which the output of the oscillator is input, and an output of the quarter frequency divider A switch connected to one input terminal, an output of the second voltage-controlled oscillator is connected to the other input terminal, and a switch for switching and connecting one of the two input terminals to an output terminal; and A mixer for adding the output of the first voltage controlled oscillator to the output of the first voltage controlled oscillator. 2. TDMA (Time Division Multiple Acce
2. The frequency synthesizer according to claim 1, further comprising: a means for stopping power supply to the intermediate frequency local oscillator during operation. 3. The frequency synthesizer according to claim 1, further comprising means for stopping power supply to said 1/4 frequency divider during simultaneous transmission / reception operation. 4. The frequency synthesizer according to claim 1, wherein a modulator is inserted between said switch and said mixer.