JP2002215084A - Plasma display device and driving method therefor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To solve the problem that luminous efficiency is high but it is difficult to obtain stable discharges when electricity is discharged at the rising time of an impressed voltage using LC resonance in a method for driving a plasma display panel. SOLUTION: In the method for driving the plasma display panel using the LC resonance at rising and falling of a voltage pulse, electricity is discharged at rising or falling of the voltage pulse and the electric discharges are stabilized by controlling the amplitude of the LC resonance.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a plasma display panel used for displaying an image on a computer, a television, or the like, and to a reduction in driving voltage and an improvement in image quality of an image display device using the same.

[0002]

2. Description of the Related Art FIG. 7 shows the structure of a conventional plasma display device, and FIG. 8 shows a schematic perspective view of a plasma display panel. FIG. 9 is a sectional view taken along line BB of FIG.

A conventional plasma display panel (hereinafter, referred to as a PDP) 1 has a discharge space 2 as shown in FIG.
The front substrate 3 made of glass and the rear substrate 4 made of glass are arranged to face each other.

On the front substrate 3, a pair of strip-like scanning electrodes 7 and sustaining electrodes 8 covered with a dielectric layer 5 and a protective film 6 are provided.
Are arranged in parallel with each other.

[0005] On the back substrate 4, strip-shaped data electrodes 9 are arranged in parallel with each other in a direction orthogonal to the scanning electrodes 7 and the sustaining electrodes 8, and the data electrodes 9 are separated from each other.
In addition, a strip-shaped partition wall 12 for forming the discharge space 2 is provided between the data electrodes 9. Further, a phosphor layer 11 is formed over the data electrode 9 and over the side surface of the partition wall 12. Further, the discharge space 2 is filled with a mixed gas of xenon (Xe) and at least one of helium (He), neon (Ne), and argon (Ar).

[0006] The panel 1 is configured to view an image display from the front substrate 3 side, and scan electrodes 7 in the discharge space 2.
The phosphor layer 11 is excited by ultraviolet rays generated by the discharge between the electrode and the sustain electrode 8, and the visible light from the phosphor layer 11 is used for display light emission.

FIG. 10 shows a conventional drive circuit for realizing a voltage pulse waveform for generating a sustain discharge between scan electrode 7 and sustain electrode 8, and FIG. 11 shows an output voltage waveform and a timing chart of each signal. .

To apply a voltage to a load panel having a capacitance component such as a plasma display panel, a charge / discharge circuit 210 for charging / discharging the capacitance component of the panel and a maintenance circuit 220 for keeping the voltage constant are provided. A driving method for reducing reactive power consumed in a capacitance component of a panel by using a circuit configuration is used.

The circuit configuration has been disclosed in, for example, JP-A-62-192798, JP-A-11-344952, and JP-A-2000-163012.

Each of these circuit configurations differs in details in detail, but basically all of them include charge / discharge of a panel,
That is, the purpose of the present invention is to reduce the reactive power by utilizing the capacitance of the panel and the LC resonance caused by the inductance element 60 when the applied voltage rises and falls.

The operation principle of the conventional driving circuit will be described with reference to FIG.

When the switching element switches at high speed, the voltage across the capacitor 70 becomes Vcc / 2 if there is no impedance of each element and wiring. As shown in FIG. 10, first, only the switch element 40 is turned ON. Then, a resonance current flows into the display panel 50 by the capacitor 70 and the inductance element 60.
At this time, if there is no impedance of each element and wiring, the voltage pulse amplitude formed by the resonance current in the capacitance component of the display panel 50 is Vcc.

Next, a voltage is applied from the switch element 10 in order to keep the electrodes at a constant voltage. At this time, a discharge occurs in the PDP and a discharge current flows. At this time, the charge stored in the capacitance component of the panel, which is unrelated to the discharge, is collected by the capacitor 70 in the charge / discharge circuit 210 by turning on the switch element 30. At this time, the switching element 1
0, 20, and 40 are off. Then, the switch element 20 is turned on to remove the uncollected electric charge from the panel and fix the electrode to the ground potential.

As means for realizing high efficiency in a plasma display panel, for example, JP-A-2000-206
There is a driving technique disclosed in, for example, 928, in which a multi-step voltage is applied to generate light in multiple steps to increase the light emission efficiency and to reduce the change in the light emission intensity depending on the load factor.

[0015]

However, in order to realize the above-described multi-step step-shaped voltage pulse, the circuit scale becomes larger than that of a single-step voltage pulse, and a necessary high breakdown voltage FET is required. The increased number increases the cost of the circuit.

A method of applying a voltage pulse for reducing reactive power using LC resonance to a capacitive load is such that the longer the rise time and the fall time of the voltage pulse, the more the panel is charged and discharged. Since the peak value of the current becomes smaller, the circuit loss can be kept low, the efficiency of collecting the charged electric charge in the panel can be increased, and the reactive power can be reduced.However, if the voltage change to the panel is performed in multiple steps, In addition, since the voltage change of the voltage pulse at each step becomes small, the rise time or the fall time becomes short, and the charge accumulated in the plasma display panel, which is a capacitive load, cannot be efficiently collected. ,
There is a problem that the reactive power increases.

Further, when the discharge is caused in two stages, the formation of wall charges becomes insufficient as compared with a single strong discharge in a single step. In particular, when a high-frequency voltage pulse of 200 kHz or more is applied, the required maintenance voltage is reduced. There is a problem that rises sharply.

Further, in the above driving method, in a PDP having an asymmetric discharge cell as shown in FIG.
As shown in (1), the timing at which discharge starts depends mainly on the size of the discharge space.

This is mainly because electrons and excited atoms are trapped in the partition walls due to the narrow cell width, and the probability of being electrically neutralized there increases, and the voltage required to reach discharge increases. The reason is that the narrower the cell width, the later the timing of the discharge is delayed.

Thus, in the driving method in which a discharge is generated at the time of LC resonance, when the recovery inductor 60 attempts to flow a discharge current larger than the charge / discharge current at the time of LC resonance, the recovery inductor 60 functions as a current limiting element. Since the applied voltage is dropped, the cell which is to be discharged late at the timing when the voltage is dropped by the previously discharged cell will have a discharge failure, or the voltage required for reliable discharge will increase. There was a problem of getting it.

[0021] The problem is that the frequency of the voltage pulse is set to 2
When the frequency is set to 00 kHz or more, the formation time of the wall charge including the dark current after the discharge is shortened.

In a PDP using a finely divided electrode group as disclosed in Japanese Patent Application Laid-Open No. 8-315735 or the like, instead of an electrode comprising a transparent electrode and a bus electrode as shown in FIG. Since the time required for the discharge to spread is longer than that of a flat electrode using a transparent electrode or the like as described in (1), the above-mentioned problem caused by a voltage drop at the time of discharge appears more remarkably.

FIG. 7 is a conceptual diagram of an electrode configuration of a PDP using a fine electrode group, and FIG. 6 shows a typical discharge current at that time.

[0024]

In order to solve this problem, a driving method of a plasma display panel according to the present invention comprises a single-stage voltage pulse, and efficiently reduces reactive power when the voltage rises and falls. Use the LC resonance circuit with long rise time and fall time
At the same time, the discharge is started at the time of the rise and fall of the voltage pulse, and the discharge is temporally broadened by using the current limiting capability of the recovery coil at the LC resonance, or 2
At the same time, the discharge instability due to the change in the load factor during the discharge at the time of LC resonance is reduced.
By controlling the terminal voltage on the panel side, it is possible to achieve more efficient and stable discharge.

[0025]

Embodiments of the present invention will be described below with reference to the drawings.

(Embodiment 1) FIG. 1 shows a circuit diagram of a drive circuit used in Embodiment 1 of the present invention. Figure 1 shows the basic operation
1 is similar to the operation shown in FIG. 1, except that a power supply is connected to a terminal on the panel side of the charge recovery capacitor 70, and a voltage amplitude of LC resonance composed of the panel 50 as a capacitive load and the recovery coil 60 is adjusted. have.

Using this circuit, a voltage pulse is applied to the scan electrode 7 and the sustain electrode 8 of the conventional plasma display panel shown in FIG. 8 with a half-period shift, and a discharge is generated when the voltage pulse rises.

The timing for generating the discharge is determined by the scanning electrode 7.
Length of discharge gap between electrode and sustain electrode 8, applied voltage value V
cc, the rise and fall slope of the voltage pulse can be almost controlled, and the discharge timing can be accelerated and caused to rise at the rise of the voltage pulse by narrowing the discharge gap and increasing the applied voltage value. It is possible,
To maintain the brightness, luminous efficiency, and discharge voltage of the discharge, and to cause discharge at the rise of the voltage pulse, prolong the rise time of the voltage pulse, that is, make the slope of the rise of the pulse gentle to discharge at LC resonance. It is most appropriate to cause

Also, by increasing the rise and fall times, the charge / discharge efficiency of charges to the panel increases,
This has the effect of reducing reactive power. At this time, in terms of charge recovery efficiency, the rise time is preferably 400 ns or more, particularly preferably 500 ns or more.

Generating a discharge at the time of LC resonance means that a mechanism for supplying a large discharge current only by supplying a charge current to the panel, which is a capacitive load, using LC resonance at the rise of a voltage pulse. Has not become
Conversely, since the discharge current is limited by the inductor 60, if a high-load discharge is generated at the rise of the voltage pulse, the panel is not charged to Vcc, the voltage drops, and the switch 11 is turned on. As a result, the voltage rapidly rises to Vcc.

As a result, when the load is low, the voltage drop is small, so that the discharge is broad, and when the load is high, the voltage drop is large. The discharge occurs in two stages as shown in FIG. Can be raised. However, in this driving method, the amount of voltage drop increases as the load increases, so that the discharge becomes unstable or the initial intensity of the discharge decreases, and the ratio of light emission generated when the switch 11 is turned on decreases. And the increase in luminous efficiency is not so noticeable under high load.

Therefore, in this embodiment, the amplitude of the LC resonance is increased by operating the terminal voltage Vm on the panel side of the charge recovery capacitor 70 with the power supply, and the voltage drop due to the discharge at the rise of the voltage is reduced. By stabilizing the discharge and increasing the discharge intensity at the rise of the voltage as shown in FIG. 2B, it is possible to drive the discharge efficiency even under a high load.

At this time, if the voltage Vm is set to be extremely higher than 1/2 Vcc, it means that the central potential of the LC resonance rises, and the charge collection efficiency is lowered because the charge cannot be collected completely from the panel. This leads to a sudden increase in reactive power. Therefore, when the potential of Vm is, for example, Vcc is about 180 V, when the Vcc is about 0 to 10 V, particularly about 0 to 5 V and more than about 1/2 Vcc, the luminous efficiency can be increased without substantially increasing the reactive power.

In this drive, ideally, V
Even if the potential of m is not applied, the potential should be Ｖ Vcc. However, in an actual circuit, the potential is lower than １ ／ Vcc by about several volts due to loss. Therefore, even if Vm is fixed to 1/2 Vcc, the effect of increasing the luminous efficiency is exhibited.

Further, since the voltage drop due to the discharge at the time of LC resonance varies depending on the load factor due to the discharge, Vm is increased when the load factor is high, and Vm is reduced by 1 / when the load factor is low.
By making it 2Vcc, while realizing high luminous efficiency,
The charge collection efficiency of the panel can be increased and the reactive power can be reduced.

When the voltage pulse becomes 200 kHz or more, the pulse width becomes short, the wall charge formation due to the discharge becomes insufficient, and the voltage required for the discharge tends to increase. Due to the above-described driving to increase the strength, it is possible to reliably form wall charges and suppress a rise in the discharge voltage even in the voltage pulse driving of 200 kHz or more.

When the load factor is low, the voltage drop due to the discharge current is small. Therefore, even if the rise and fall times of the voltage pulse are lengthened, the discharge is hardly affected.
When the load is low, the reactive power rises more than when the load is high, and the reactive power can be further reduced by lengthening the fall time.

It should be noted that the present invention is not limited to the drive circuit shown in FIG.
In the driving method using the C resonance circuit, the same effect can be obtained by operating the terminal voltage of the charge recovery capacitor with the power supply.

In this embodiment, an example was given in which the voltage pulse was set to a positive voltage and the discharge was performed at the rise of the voltage. However, the driving method for discharging at the fall and the discharge at the negative voltage pulse were used. The same can be applied to the driving method.

Further, by providing the driving circuit and the plasma display panel of the present invention, a plasma display device having high luminous efficiency can be realized.

(Embodiment 2) In Embodiment 2 of the present invention, the asymmetric cell plasma display panel shown in FIG. 3 having an uneven cell spacing is driven by the driving method of the present invention.

In the second embodiment, in addition to the above effects, the terminal voltage Vm on the panel side of the charge recovery capacitor is manipulated to increase the LC resonance amplitude to reduce the voltage drop amount. This makes it possible to stably cause a discharge in a cell having a narrow width, particularly when the discharge starts with a delay in timing.

By this effect, the voltage required to normally discharge all the cells can be reduced as compared with the case where Vm is applied, and the luminous efficiency can be increased.

This effect is obtained when the frequency of the voltage pulse is 2
This is remarkable when the frequency is higher than 00 kHz, and the required discharge voltage can be greatly reduced as compared with the case where the terminal voltage of the charge recovery capacitor is not operated.

Further, in the asymmetric cell using the driving method of the present invention, a plasma display panel which has an increased luminous efficiency and an increased color temperature in white display by enlarging the cell area to which a blue phosphor is applied. Can be realized.

(Embodiment 3) In Embodiment 3 of the present invention, the plasma display panel shown in FIG. 5 using a fine electrode group as a discharge electrode is driven by the driving method of the present invention.

In the third embodiment, in addition to the above effects, the voltage drop amount is reduced by operating the terminal voltage Vm of the charge recovery capacitor on the panel side to increase the amplitude of LC resonance. This makes it possible to stabilize the discharge of the microelectrode group in which the discharge becomes temporally discrete or broad and time is required for the progress of the discharge.

As a result, the required discharge voltage can be reduced and the luminous efficiency can be increased as compared with the case where the terminal voltage of the charge recovery capacitor is not operated.

Further, by using the driving method of the present invention in a plasma display panel in which an asymmetric cell and a fine electrode group are combined, the effects of the present invention described above can be more remarkably obtained.

[0050]

As described above, the driving method of the plasma display panel according to the present invention comprises a single-stage voltage pulse, and the rising time and the falling time of the voltage rise and fall in order to efficiently reduce the reactive power. Utilizing an LC resonance circuit that took a long time, at the same time, starting discharge at the rise and fall of the voltage pulse, and using the current limiting capability of the recovery coil in LC resonance to broadly discharge or By generating light in two stages, highly efficient light emission is realized without a large increase in circuit cost.

At the same time, the instability of the discharge due to the change in the load factor during the discharge at the time of LC resonance is reduced by the charge recovery capacitor 7.
By controlling the terminal voltage on the panel side of 0, suppression is achieved, and more efficient and stable discharge is realized.

[Brief description of the drawings]

FIG. 1 is a circuit diagram of an embodiment of the present invention.

FIG. 2 is a timing chart of a voltage pulse waveform, a light emission waveform, and various signals of a driving circuit according to an embodiment of the present invention.

FIG. 3 is a configuration diagram of a plasma display panel having an asymmetric cell structure.

FIG. 4 is a light emission timing chart of an asymmetric cell.

FIG. 5 is a configuration diagram of a plasma display panel using a fine electrode group.

FIG. 6 is a diagram showing light emission characteristics of a plasma display panel using a fine electrode group.

FIG. 7 is a configuration diagram of a plasma display device.

FIG. 8 is a conceptual perspective view of a conventional plasma display panel.

FIG. 9 is a sectional view of a main part of the plasma display panel.

FIG. 10 is a drive circuit diagram of a conventional plasma display panel.

FIG. 11 is a timing chart of output waveforms and signals of a conventional drive circuit.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Panel 2 Discharge space 3 Front substrate 4 Back substrate 5 Dielectric layer 6 Protective film 7 Scan electrode 7a Transparent electrode 7b Bus electrode 8 Sustain electrode 8a Transparent electrode 8b Bus electrode 9 Data electrode 11 Phosphor layer 12 Partition walls 13, 14, 15 Discharge cell 10, 20, 30, 40 Switch element 50 Panel of capacitive load 60 Inductance element 70 Charge recovery capacitor 80, 90, 100, 110, 120 Diode 130 LC resonance amplitude control circuit 210 Charge / discharge circuit 220 Maintenance circuit

Continued on the front page (72) Inventor Tohru Ando 1006 Kazuma Kadoma, Osaka Pref. Matsushita Electric Industrial Co., Ltd. 5C040 FA01 GK16 MA03 MA12 MA14 MA26 5C080 AA05 BB05 CC03 DD26 EE29 FF07 FF12 GG12 HH02 HH04 JJ02 JJ03 JJ04 JJ06

Claims (12)

[Claims] 1. A rising and falling voltage pulse having an LC
A method of driving a plasma display panel using resonance, wherein a discharge is generated when the voltage pulse rises or falls, and the discharge is stabilized by controlling the amplitude of the LC resonance. Panel driving method. 2. The driving method of a plasma display panel according to claim 1, wherein a terminal on the panel side of the charge recovery capacitor is clamped to a voltage of １ ／ of an applied voltage pulse. 3. The method of driving a plasma display panel according to claim 1, wherein the terminal on the panel side of the charge recovery capacitor is clamped to a voltage higher than half the voltage of the applied voltage pulse. 4. The driving method for a plasma display panel according to claim 1, wherein a voltage for clamping a panel-side terminal of the charge recovery capacitor is controlled by a load factor. 5. The method of driving a plasma display panel according to claim 1, wherein the voltage for clamping the panel-side terminal of the charge recovery capacitor is increased as the load factor increases. 6. The method of driving a plasma display panel according to claim 1, wherein rise and fall times of the voltage pulse are controlled by a load factor. 7. The method of driving a plasma display panel according to claim 1, wherein the rise and fall times of the voltage pulse are made longer as the load factor becomes lower. 8. The method of driving a plasma display panel according to claim 1, wherein the frequency of the voltage pulse is 200 kHz or more. 9. The plasma display panel according to claim 1,
A plasma display device driven by the driving method according to any one of claims 8 to 10. 10. A plasma display panel according to claim 1, wherein the size of the discharge cells is asymmetric.
8. A plasma display device driven by the driving method according to any one of 8. 11. A plasma display panel comprising discharge cells coated with phosphors emitting red, green and blue, wherein a discharge cell space coated with at least a blue phosphor is wider than other cells. The plasma display device according to claim 10, wherein 12. A plasma display device using a driving method according to claim 1 to drive a plasma display panel using fine electrode groups divided into sustain discharge electrodes.