KR100587285B1 - Driving Circuit Of Plasma Display Panel Using High Frequency - Google Patents

Abstract

The present invention relates to a driving circuit of a plasma display panel using a high frequency capable of switching a high frequency signal without time delay.

In the plasma display panel driving circuit using the high frequency of the present invention, the impedance matching which can switch the high frequency signal by matching the high frequency generating means for generating the high frequency signal, the impedance of the high frequency generating means and the plasma display panel, and changing the impedance. A means is provided.

According to the present invention, by simply changing the impedance in the impedance matching circuit to switch the high frequency signal without time delay, it is possible to sufficiently secure the display time for the grayscale implementation.

Description

Driving Circuit of Plasma Display Panel Using High Frequency             

BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a sectional view showing the structure of a discharge cell constituted of a conventional three-electrode alternating current surface discharge plasma display panel.

2 is a perspective view showing the structure of a discharge cell formed in a conventional plasma display panel using a high frequency wave.

FIG. 3 is an overall electrode layout view of a plasma display panel including the discharge cells shown in FIG. 2.

4 is a signal waveform diagram for driving the discharge cell shown in FIG.

5 is a signal waveform diagram illustrating a method of implementing grayscale by switching a high frequency signal;

6 is a block diagram showing a high frequency driving circuit of a conventional plasma display panel.

FIG. 7 is a basic circuit diagram of the matching circuit of FIG. 6. FIG.

8 is a circuit diagram illustrating a matching circuit included in a high frequency driving circuit of a plasma display panel according to an exemplary embodiment of the present invention.

9 is a block diagram illustrating a high frequency driving circuit of the plasma display panel according to an exemplary embodiment of the present invention.

<Brief description of symbols for the main parts of the drawings>

10, 40: upper substrate 12, 42: lower substrate

14, 46, 34: scanning electrode 16: sustaining electrode

18, 24, 48: dielectric layer 20: protective layer

22, 44, 36: address electrodes 26, 54: phosphor

21: discharge space 28, 34: discharge cell

30: high frequency generator 32: amplifier

34, 60: matching circuit 36: panel

50: high frequency electrode 52: partition wall

62 switch 64 control unit

The present invention relates to a plasma display device, and more particularly, to a driving circuit of a plasma display panel using a high frequency capable of switching a high frequency signal without time delay.

Recently, research on plasma display panels (hereinafter referred to as PDPs), which are easy to manufacture panels as large-area flat panel displays, has been actively conducted according to the needs of large flat panel displays. The PDP generally uses a gas discharge phenomenon to display an image using visible light generated by vacuum ultraviolet rays generated during gas discharge to emit phosphors.

Referring to FIG. 1, a structure of a discharge cell configured in a PDP of a three-electrode alternating current (AC) surface discharge method which is commonly used is shown.

In the discharge cell 28 of the PDP shown in FIG. 1, an upper substrate 10 and a lower substrate 12, which are display surfaces of an image, are arranged to be separated by a partition wall (not shown), and a sustain electrode on the upper substrate 10 is provided. A pair, that is, the scan / sustain electrode 14 and the sustain electrode 16 are formed side by side with an upper dielectric layer 18 and a protective layer 20 applied thereon. The address electrode 22 is formed on the lower substrate 12 in a direction perpendicular to the sustain electrode pairs 14 and 16, and the lower dielectric layer 24 and the fluorescent layer 26 are sequentially applied thereon. The discharge gas is injected into the discharge space 21 provided by the partition wall.

The discharge cell having such a configuration is selected by the address discharge between the address electrode 22 and the scan / hold electrode 14, and then the vacuum ultraviolet rays generated by the continuous sustain discharge between the sustain electrodes 14 and 16 are discharged from the phosphor 26. By emitting light, visible light is emitted. In this case, by adjusting the sustain discharge period, that is, the number of sustain discharges, a gray scale necessary for displaying an image is realized. Accordingly, the number of sustain discharges is an important factor in determining the brightness and discharge efficiency of the PDP. For this sustain discharge, a step pulse having a duty ratio of 1 is periodically applied to the sustain electrodes 14 and 16 periodically. At this time, the frequency is generally about 200 to 300 kHz and the pulse width is about 10 to 20 kHz. In this case, the sustain discharge occurs only once at an extremely short instant per sustain pulse. The charged particles generated by the sustain discharge move the discharge paths formed between the sustain electrodes according to the polarities of the electrodes, so that wall charges are formed in the discharge space of the cell, and the discharge voltage in the discharge space decreases due to the wall charges. Will stop. As described above, the sustain discharge by the existing sustain pulse is generated only once at a short time per pulse, and most of the other time is consumed in the preparation of the wall charge and the next discharge, so that the discharge efficiency of the PDP is inevitably low.

Recently, in order to solve the low discharge efficiency problem of the PDP, a method of using a high frequency discharge using a high frequency signal as a display discharge has recently emerged. High frequency discharge is usually generated by high frequency signals in the range of tens of MHz to hundreds of MHz. As the electron vibrates by vibrating electric field, it causes continuous ionization and excitation of discharge gas. It can cause continuous discharge. The high frequency discharge has a physical effect such as a positive column having a very high discharge efficiency when the distance between the electrodes is long in the glow discharge. Accordingly, there is an advantage that can significantly improve the discharge efficiency of the PDP when using a high frequency discharge.

2, there is shown a perspective view of a discharge cell configured in a PDP using a high frequency wave.

The PDP discharge cell shown in FIG. 2 includes a high frequency electrode 50 disposed on the upper substrate 40, an address electrode 44 and a scanning electrode 46 disposed on the lower substrate 42. The upper substrate 40 and the lower substrate 42 are disposed to face each other in parallel, and the address electrode 44 in the vertical direction and the scan electrode 46 in the horizontal direction are formed on the lower substrate 42. A dielectric layer 48 is formed between the address electrode 44 and the scan electrode 46. In the upper substrate 40, a metal electrode to which a high frequency voltage is applied in the same direction as the scan electrode 46, that is, a high frequency electrode 50 is formed. Between the upper substrate 40 and the lower substrate 42, barrier ribs 52 for eliminating optical interference between neighboring discharge cells are formed in a closed block structure. On the surfaces of the upper substrate 40 and the partition wall 52 on which the high frequency electrode 50 is formed, a phosphor 54 for generating visible light of red, green, or blue color is coated. Then, the discharge gas is filled in the discharge space therein.

FIG. 3 shows the overall electrode arrangement structure of the PDP constituting the discharge cell shown in FIG.

In FIG. 3, the PDP includes address electrode lines X1 to Xm disposed corresponding to each column line, and scan electrode lines Y1 arranged side by side corresponding to each row line. Yn) and high frequency electrode lines RF. The discharge cells 34 are provided at the intersections of the address electrode lines X1 to Xm, the scan electrode lines Y1 to Yn, and the high frequency electrode lines RF.

FIG. 4 shows a voltage waveform diagram of driving the discharge cell shown in FIG. 3.

First, in the discharge cell of FIG. 3, the high frequency electrode 50 is continuously supplied with a high frequency voltage of several tens of MHz or more. Thus, in the section a where the high frequency signal is supplied only to the high frequency electrode 50, no charged particles are generated in the discharge space, so that discharge does not occur. In section b where the data signal Vd is supplied to the address electrode 44 and the scan signal Vs is supplied to the scan electrode 46, an address discharge occurs between the address electrode 44 and the scan electrode 46. Whole particles are produced. The charged particles generated by the address discharge are generated by the high frequency electrode 50 by the high frequency voltage supplied to the high frequency electrode 50 and the center voltage Vc of the high frequency voltage constantly supplied to the scan electrode 46 during the period c. The ions do not move between the scan electrode 46 and only the electrons are vibrated in a state where only the electrons are not attracted to the two electrodes 46 and 50. In this way, the vibrating electrons ionize and excite the discharge gas continuously and emit vacuum ultraviolet rays while emitting excited atoms and molecules to the ground state to emit phosphors. In addition, the erase signal Ve is supplied to the scan electrode 46 in the period d, and the electrons are no longer vibrated and are attracted to the scan electrode 44 so that the charged particles disappear.

In order to generate high frequency discharge, a high frequency signal with a constant power must be supplied to the panel, and the power must be proportionally increased as the size of the panel increases. Accordingly, in a PDP using a high frequency, a high frequency circuit for generating and supplying a high power, that is, a high voltage, high voltage signal is most important. Here, the high frequency voltage required for high frequency discharge is usually several hundred volts (V) or more. In order to implement grayscale in a PDP using a high frequency signal having a high voltage, an on / off operation of a high frequency signal by a switching signal as shown in FIG. 5 is required. In order to turn on / off a high frequency signal, a method of turning on / off a generator of a high frequency signal is common. However, when the high voltage signal is turned on / off, a switching operation for completely turning on / off the signal is required in the high frequency amplifier connected to the output terminal of the high frequency generator. Accordingly, the high frequency generator has a soft start to protect the circuit. In other words, the high frequency generator gradually increases the voltage in a range in which the rush current is minimized in order to prevent the circuit from being damaged by the rush current when generating a high voltage signal quickly. However, such a soft start method should spend tens to hundreds of microseconds as the rising time before the high frequency signal reaches a steady state. This high frequency signal switching method has an adverse effect on securing display time, which is considered the most important in PDP, and thus cannot be applied to PDP.

Accordingly, conventionally, as shown in FIG. 4, high frequency discharge is started by using the charged particles generated by the address discharge and the high frequency signal while continuously supplying the high frequency signal without switching, and an erase signal having a predetermined level is applied to the scan electrode. A method of stopping high frequency discharge by applying is used. Therefore, in the conventional PDP driving method using high frequency, gray scale is implemented by changing the timing of applying the erase signal. However, when the high frequency signal is continuously applied in addition to the high frequency discharge period as described above, problems such as interference and noise caused by the high frequency signal not only occur but also a problem in which the false discharge occurs due to the high frequency signal. For this reason, the necessity of quickly switching to a unit of time to display a high frequency signal is emerging.

Accordingly, an object of the present invention is to provide a PDP driving circuit using a high frequency to ensure sufficient display time for grayscale implementation by switching a high frequency signal without time delay.

Another object of the present invention is to provide a PDP driving circuit using a high frequency capable of stably driving the PDP by switching a high frequency signal without time delay.

In order to achieve the above object, the PDP driving circuit using the high frequency according to the present invention is a high frequency signal generating means for generating a high frequency signal, and matching the impedance of the high frequency generating means and the plasma display panel and varying the impedance to generate a high frequency signal And an impedance matching means capable of switching.

Other objects and advantages of the present invention in addition to the above object will be apparent from the description of the preferred embodiment of the present invention with reference to the accompanying drawings.

The present invention proposes a driving circuit capable of turning on / off a high frequency signal more efficiently without directly controlling a circuit generating a high frequency signal. In detail, the present invention adjusts the power of the high frequency signal by varying the impedance of the impedance matching circuit provided to match the impedance with the PDP in the high frequency driving circuit.

6, there is shown a block diagram showing the configuration of a high frequency drive circuit of a conventional PDP.

The PDP high frequency drive circuit shown in FIG. 6 includes a high frequency generator 30 for generating a high frequency signal, an amplifier 32 for amplifying the high frequency signal from the high frequency generator 30, an amplifier 32 and a panel 36. And a matching circuit 34 connected therebetween. Here, the high frequency generator 30 generates a high frequency signal and outputs it to the amplifier 32. The amplifier 32 amplifies the high frequency signal generated by the high frequency generator 30 with sufficient power to cause high frequency discharge and outputs it to the matching circuit 34. The matching circuit 34 matches the impedance of the high frequency signal input from the amplifier 32 with the impedance of the panel 36 so that the high frequency signal of maximum power is supplied to the panel 36. This matching circuit 34 is an indispensable circuit in a circuit using high frequency. This is because the impedance of the high frequency amplifier 32 and the impedance of the panel 36 are equal to each other so that the maximum power is transmitted to the panel 36. In this case, the matching circuit 34 serves to match the impedance of both ends. On the other hand, the incident wave and the reflected wave exist in the high frequency circuit as shown in FIG. The actual panel 36 is supplied with power in which incident and reflected waves overlap. Accordingly, supplying the maximum power by matching the impedance means that the incident wave is supplied to the panel 36 as it is by minimizing the reflected wave.

FIG. 7 shows a basic circuit configuration of the matching circuit 34 shown in FIG.

The matching circuit 34 shown in FIG. 7 includes a first capacitor C1 connected between the first node N1 connected to the output terminal of the amplifier 32 and ground for impedance matching, and a first node N1. And a second capacitor C2 and an inductor L connected in series between the input terminal and the input terminal of the panel 36. The impedance matching with the panel 36 is performed by the values of the first and second capacitors C1 and C2 and the inductor L, and the values of the passive elements C1, C2 and L are determined by the panel 36. Depending on the impedance and the characteristics of the system, the optimum value is determined and fixed. Here, the influence of the values of the first and second capacitors C1 and C2 on the system is slightly different. In particular, the variable amount of the second capacitor C2, which is a series capacitor, has a great influence on the system. In other words, the power of the high frequency signal supplied to the small amount of change of the second capacitor C2, for example, the amount of change of several tens of pF, is changed to a large width (hundreds of V). Accordingly, when the value of the second capacitor C2 is changed in the matching circuit 34, the high frequency power can be adjusted without directly controlling the main signal line of the high frequency signal. Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to FIGS. 8 and 9.

8 illustrates a detailed configuration of an impedance matching circuit capable of switching a high frequency signal in a driving circuit of a PDP using a high frequency according to an embodiment of the present invention.

The impedance matching circuit 50 illustrated in FIG. 8 includes a first capacitor C1 connected between the first node N1 connected to the output terminal of the amplifier 32 and ground, a first node N1, and a second node. The second and third capacitors C2 and C3 connected in parallel between the nodes N2, the switch 62 connected between the first node N1 and the third capacitor C3, and the second node ( The inductor L connected between N2) and the input terminal of the panel 36 is configured. In the case where the panel 36 is normally operated by the high frequency signal, the impedances of the amplifier 32 and the panel 36 are increased by the designed values of the first and second capacitors C1 and C2 and the inductor L. Assume a match. In this case, by selectively connecting the third capacitor C3 to the second capacitor C2 in parallel using the switch 62, the high frequency signal can be turned on / off. In detail, when the switch 62 is turned on to connect the third capacitor C3 to the second capacitor C2 in parallel in order to turn off the high frequency signal, the value of the series capacitance changes from C2 to C2 // C3 so that the total impedance Will change the value. Since the impedances of the amplifier 32 and the panel 36 do not match due to the impedance change of the matching circuit, the reflected wave increases and the incident wave decreases, thereby obtaining the same effect as turning off the high frequency signal. As described above, since the series capacitance has a great influence on the impedance change of the matching circuit 60 even with a small amount, the high frequency signal can be turned on / off by changing the series capacitance value. On the other hand, when the high frequency signal is to be turned on, the matching circuit 60 is composed of the first and second capacitors C1 and C2 and the inductor L by turning off the switch 62 so that the amplifier 32 and the panel ( Since the impedance of 36 is matched, a high frequency signal having the maximum power is supplied to the panel 36.

Alternatively, the on / off operation of the high frequency signal can be reversed by setting the capacitance of the second capacitor C2 sufficiently larger than the capacitance of the third capacitor C3. In this case, since the capacity of the second capacitor C2 is much larger, even if the circuit is operated including the third capacitor C3, most of the high frequency signals are transmitted through the second capacitor C2, so only the third capacitor C3 is used. Turning on / off does not have a significant effect on the system. By using this, a method of operating C2 // C3 at normal power supply and turning off C3 at high frequency signal off may be applied.

9 is a block diagram showing a PDP high frequency driving circuit according to the present invention to which the impedance matching circuit 60 shown in FIG. 8 is applied. The PDP high frequency driving circuit of FIG. 9 includes a high frequency generator 30 for generating a high frequency signal; An amplifier 32 for amplifying a high frequency signal from the high frequency generator 30 and a matching circuit 60 connected between the amplifier 32 and the panel 36 to match impedance and to turn on / off a high frequency signal. And a control unit 64 for applying an on / off signal to the matching circuit 60.

In the PDP high frequency driving circuit shown in FIG. 9, the high frequency generator 30 generates a high frequency signal and outputs the high frequency signal to the amplifier 32. The amplifier 32 amplifies the high frequency signal generated by the high frequency generator 30 with sufficient power to cause high frequency discharge and outputs it to the matching circuit 60. The matching circuit 60 matches the impedance of the high frequency signal input from the amplifier 32 with the impedance of the panel 36 so that the high frequency signal of maximum power is supplied to the panel 36. In addition, the matching circuit 60 switches the high frequency signal by selectively changing the impedance according to the switching signal input from the controller 64 as described above. As illustrated in FIG. 5, the controller 64 applies a switching signal to the matching circuit 60 at a time for turning on / off a high frequency signal so that the high frequency signal is turned on / off. In this way, there is no delay on the circuit as in the conventional rising time by switching the high frequency signal by changing the impedance of the matching circuit without directly controlling the main circuit of the high frequency signal, thereby ensuring sufficient display time for implementing gray scale. It becomes possible.

As described above, according to the PDP driving circuit using the high frequency according to the present invention, by simply changing the impedance in the impedance matching circuit to switch the high frequency signal without time delay, it is possible to sufficiently secure the display time for the grayscale implementation. Furthermore, according to the PDP driving circuit using the high frequency according to the present invention, it is possible to stably drive the PDP using the high frequency by switching the high frequency signal and supplying it to the panel only during the display period.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the technical spirit of the present invention. Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification but should be defined by the claims.

Claims (6)

In a driving circuit of a plasma display panel using high frequency discharge, High frequency generating means for generating a high frequency signal; An impedance matching means for matching the impedance between the high frequency generating means and the plasma display panel and switching the high frequency signal by changing a value of a series capacitance according to the switching signal; Control means for applying a switching signal of the high frequency signal; And amplifying means for amplifying the high frequency signal from said high frequency generating means with sufficient power to cause high frequency discharge. delete delete delete The method of claim 1, The impedance matching means And a second capacitor connected to a series capacitor in parallel in response to the switching signal to change the value of the series capacitance. The method of claim 5, wherein And the capacitance of the series capacitor is set sufficiently larger than that of the second capacitor.

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