JP2002208692A - Solid-state image-pickup device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To increase the amount of charges handled by a transfer register, without deteriorating transfer efficiency of signal charges. SOLUTION: In a vertical transfer register 130, a region which serves as an accumulation portion 132 is additionally doped with an N-type impurity. By utilizing the potential well generated by this doping, the potential of the accumulation portion 132 is made deeper to generate a potential difference between the accumulation portion 132 and a transfer portion 134. Since the N-type impurity has less heat diffusion than that of a P-type impurity, diffusion of the impurity added to generate the potential difference under an electrode having a difference phase can be prevented. As a result, not potential barrier is formed, and the accumulation portion can be doped with the N-type impurity at a high concentration. Since the potential difference between the accumulation portion 132 and the transfer portion 134 can be increased, amount of charges handled can be increased without deteriorating the transfer efficiency.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solid-state image pickup device in which signal charges of a plurality of pixel sensors are transferred by a transfer register and output as an image signal, and the charge handled without deteriorating the transfer efficiency of the transfer register. The present invention relates to a solid-state imaging device whose amount can be increased.

[0002]

2. Description of the Related Art FIG. 2 is a schematic plan view for explaining the arrangement of a sensor section and a transfer register of a CCD solid-state imaging device. This CCD solid-state imaging device is provided on a semiconductor substrate 10.
A plurality of sensor units 20 each forming an imaging pixel are arranged in a matrix, and a plurality of vertical (V) transfer register units 30 are arranged along the vertical arrangement of the sensor units 20.
And a horizontal (H) transfer register section 40 is provided outside one end of each vertical register section 30.

Each sensor unit 20 has, for example, a structure of a photodiode, and converts light incident from a light receiving surface into a signal charge corresponding to the amount of light. Vertical transfer register 3
At 0, the signal charges accumulated in the sensor section 20 are taken in through a read gate section described later and transferred in the vertical direction. The horizontal transfer register section 40 transfers the signal charges from the vertical transfer register section 30 in the horizontal direction. Are output from the output unit 50 as image signals.

In the above-mentioned conventional CCD solid-state image pickup device, when the vertical transfer register section is constituted by an N-type buried channel as described later, and this vertical transfer register section is driven by a two-phase clock, There are two major factors that determine the amount of charge handled by the transfer register unit: the size of the area of the vertical transfer register unit itself, and the potential difference between the storage unit and the transfer unit that constitute the N-type buried channel. Therefore, as a method of increasing the amount of handled charges, a method of increasing the area of the vertical transfer register unit and a method of increasing the potential difference between the accumulation unit and the transfer unit of the N-type buried channel can be considered.

However, in the method of enlarging the area of the vertical transfer register, the area of the entire solid-state image sensor is increased or the area of the entire solid-state image sensor is not changed by the amount of the area of the vertical transfer register. In this case, it is necessary to reduce the opening area of the sensor unit. Therefore, if the area of the entire solid-state imaging device is increased, the size of the entire imaging device provided with the solid-state imaging device is increased.
Further, when the opening area of the sensor unit is reduced, there is a problem that the sensitivity of the sensor unit is reduced.

Therefore, it is effective to employ a method of increasing the potential difference between the accumulation section and the transfer section of the N-type buried channel.
There is known a method of providing a potential well region by adding a P-type impurity to a type accumulation portion. FIG.
FIG. 3A is a view for explaining a vertical transfer register section in which a P-type impurity-added region is provided in the accumulation section of such an N-type buried channel. FIG. 3A is a cross-sectional view showing the structure of the vertical transfer register section. FIG. 3B is an explanatory diagram showing a potential state at the time of signal charge transfer.

In FIG. 3A, an N-type semiconductor substrate 10
Is provided with a P-type layer 12, and an N-type buried channel layer of the vertical transfer register section 30 is formed thereon. On the upper surface of the vertical transfer register section 30, the two-phase transfer electrodes 3 to which the two-phase transfer clocks ΦV1 and ΦV2 are applied.
6, 38 are provided. Note that FIG. 3B shows N in the case where a signal charge is transferred from the transfer electrode 36 to the transfer electrode 38 by applying a voltage lower than that of the transfer electrode 38 to the transfer electrode 36.
2 shows the state of the potential of the mold buried channel. In addition, storage sections 32 and transfer sections 34 of N-type buried channel layers are provided alternately corresponding to the transfer electrodes 36 and 38. The transfer section 34 is provided with a P-type impurity-added region 34A for obtaining a potential well region.

[0008]

However, as described above, in order to obtain a potential difference between the storage section 32 and the transfer section 34, the transfer section 34 using the N-type buried channel layer needs to be
When the potential well region is obtained by providing the type impurity added region 34A, the diffusion of the impurity due to the heat applied in the process (the region indicated by the broken line A in the figure) is large, so that it is located below the adjacent transfer electrodes having different phases. The impurities are also easy to spread. As a result, as shown by a point B in FIG. 3B, an unnecessary potential barrier (or potential dip) is formed between the transfer electrode 36 and the transfer electrode 38, and the potential barrier transfers the signal charge. Since a residue occurs, the accumulation unit 32 and the transfer unit 34
Has a problem in that the potential difference is limited, and the amount of electric charges handled cannot be increased.

SUMMARY OF THE INVENTION It is an object of the present invention to increase the potential difference between a storage portion and a transfer portion of a buried channel region for transferring signal charges, thereby increasing the amount of handled charges without deteriorating the transfer efficiency of signal charges. It is an object of the present invention to provide a solid-state imaging device that can perform the above-described operations.

[0010]

According to the present invention, in order to achieve the above object, in a solid-state imaging device in which signal charges of a plurality of pixel sensors are transferred by a transfer register and output as an image pickup signal, the transfer register includes Corresponding to each of a plurality of transfer electrodes provided on the upper surface of the semiconductor-type substrate at predetermined intervals along the transfer direction of the signal charge, the N-type is alternately provided in the transfer direction of the signal charge on the semiconductor-type substrate. Having a storage unit and a transfer unit composed of a buried channel region, and
The accumulation unit has a potential well region for obtaining a potential difference between the accumulation unit and the transfer unit, and the potential well region is formed by adding an N-type impurity to the accumulation unit.

In the solid-state imaging device according to the present invention, the signal charges of the plurality of pixel sensors are read out to the transfer register by the read pulse, and are sequentially transferred based on the transfer clock. In such a solid-state imaging device, a potential difference between the accumulation unit and the transfer unit is obtained by providing a potential well region by adding an impurity to the accumulation unit of the N-type buried channel region forming the transfer register unit. Here, in the present invention, this impurity addition is
Since thermal diffusion of impurities below the adjacent transfer electrodes having different phases is suppressed by doping with the type impurity, a steep impurity distribution can be obtained, and the potential difference between the accumulation portion and the transfer portion is increased. be able to. As a result, the amount of charge handled can be increased without increasing the area of the transfer register.

[0012]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of the solid-state imaging device according to the present invention will be described below. FIG. 1 is a diagram illustrating a vertical transfer register section of a CCD solid-state imaging device according to an embodiment of the present invention. FIG. 1A is a cross-sectional view illustrating the structure of the vertical transfer register section, and FIG. FIG. 4 is an explanatory diagram showing a potential state at the time of transferring signal charges. The overall structure of the solid-state imaging device is, for example, the same as that shown in FIG. In FIG. 1A, an N-type semiconductor substrate 11
0, a P-type layer 112 is provided, and an N-type buried channel layer of the vertical transfer register section 130 is formed thereon. On the upper surface of the vertical transfer register section 130, two-phase transfer electrodes 136 and 138 to which two-phase transfer clocks ΦV1 and ΦV2 are applied are provided. In such a vertical transfer register section 130, charges accumulated in the sensor section are read out to the vertical transfer register section 130 by a read pulse, and then sequentially transferred in the vertical direction by two-phase transfer clocks ΦV1 and ΦV2.

In FIG. 1B, a voltage lower than that of the transfer electrode 138 is applied to the transfer electrode 136 to transfer the transfer electrode 136.
5 shows the state of the potential of the N-type buried channel when the signal charge is transferred to the transfer electrode 138. In addition, storage sections 132 and transfer sections 134 of N-type buried channel layers are provided alternately corresponding to the transfer electrodes 136 and 138. In addition, the accumulating portion 132 has an N + type impurity-added region 13 for generating a potential well region for obtaining a potential difference between the accumulating portion and the transfer portion.
2A is provided. This N + type impurity added region 13
2A is provided in the storage section 132 by ion implantation of N-type impurity ions.

That is, the vertical transfer register unit 13 of this embodiment
0, first, the entire register section is transferred to the transfer section 13.
4 so as to have a potential of 4.
In this embodiment, a step of doping an N-type impurity only in the region No. 2 is added. Then, the storage unit 1 is made using a potential well generated by this additional step.
32, the storage unit 132 and the transfer unit 1
To form a potential difference between them. Here, since the N-type impurity generally has a characteristic that thermal diffusion is smaller than that of the P-type impurity, the diffusion of the impurity added for forming the potential difference to the lower layer of the electrode having a different phase is suppressed. It is possible to

Therefore, it is possible to dope the N-type impurity at a high concentration without forming a potential dip or a potential barrier which may lower the transfer efficiency as shown in FIG. Since the potential difference between 132 and the transfer unit 134 can be increased, it is possible to increase the amount of charge handled without lowering the transfer efficiency. Further, as the pixel (cell) size in the solid-state imaging device becomes finer, the charge storage area of the register section becomes smaller. Therefore, the potential difference between the storage section and the transfer section is increased in order to increase the amount of charge handled. The need to do so is increasing. Therefore,
For example, as shown in FIG. 1B, the solid-state imaging device of the present invention capable of forming a steep impurity profile can provide a structure effective for miniaturizing the cell size.

In the above example, the solid-state image pickup device in which the signal charges of the pixel sensor units arranged in a matrix are transferred by the vertical transfer register unit and the horizontal transfer register unit and output as an image pickup signal is provided. Although the present invention has been described with reference to the case where the present invention is applied, the present invention is not limited to this. For example, the present invention can be applied to a transfer register of a line sensor.

[0017]

As described above, in the solid-state imaging device according to the present invention, when a potential well region for obtaining a potential difference between the storage section of the transfer register section and the transfer section is provided in the storage section, heat is applied to the storage section. It is formed by adding an N-type impurity with small diffusion. For this reason, thermal diffusion of impurities below the adjacent transfer electrodes having different phases is suppressed, so that a steep impurity distribution can be obtained, and a potential difference between the accumulation unit and the transfer unit can be increased. As a result, there is an effect that the amount of handled charges can be increased without increasing the area of the transfer register.
In particular, since the charge accumulation area of the register section tends to be narrowed with the recent miniaturization of the pixel (cell) size in the solid-state imaging device, a steep impurity profile is formed to form a gap between the accumulation section and the transfer section. The configuration of the present invention, in which the amount of electric charges handled can be increased by increasing the potential difference of the present invention, has a particularly remarkable effect.

[Brief description of the drawings]

FIG. 1 is a diagram illustrating a vertical transfer register section of a CCD solid-state imaging device according to an embodiment of the present invention;
FIG. 1B is a cross-sectional view showing the structure of the vertical transfer register section, and FIG.
FIG. 4 is an explanatory diagram showing a potential state at the time of signal charge transfer.

FIG. 2 is a schematic plan view for explaining an arrangement of a sensor unit and a transfer register of a conventional CCD solid-state imaging device.

3A and 3B are diagrams for explaining a vertical transfer register unit in a conventional CCD solid-state imaging device. FIG. 3A is a cross-sectional view showing the structure of the vertical transfer register unit, and FIG. It is explanatory drawing which shows the state of a potential.

[Explanation of symbols]

110 ... N-type semiconductor substrate, 112 ... P-type layer, 130
... Vertical transfer register section 132 132 Storage section 132A
..., N + type impurity added region, 134,.
6, 138... Transfer electrodes.

Claims (5)

[Claims] 1. A solid-state imaging device that transfers signal charges of a plurality of pixel sensor units by a transfer register unit and outputs the signal charges as an image signal, wherein the transfer register unit is disposed on an upper surface of a semiconductor substrate in a transfer direction of the signal charges. Corresponding to each of a plurality of transfer electrodes provided at a predetermined interval along the semiconductor substrate, the semiconductor-type substrate has a storage portion and a transfer portion formed of an N-type buried channel region alternately in a signal charge transfer direction. And the accumulation unit has a potential well region for obtaining a potential difference between the accumulation unit and the transfer unit, and the potential well region is formed by adding an N-type impurity to the accumulation unit. Solid-state imaging device. 2. The solid-state imaging device according to claim 2, wherein said potential well region is formed by ion implantation of an N-type impurity. 3. The solid-state imaging device according to claim 1, wherein the potential well region is formed by adding a high-concentration N-type impurity to the accumulation section. 4. The transfer register section includes one transfer electrode for each transfer electrode.
2. The solid-state imaging device according to claim 1, wherein the solid-state imaging device is a two-phase drive type vertical transfer register that applies transfer clocks having different phases every other time. 5. A vertical transfer register unit for vertically transferring signal charges of a pixel sensor unit arranged in a matrix, and a signal charge transferred by the vertical transfer register unit is transferred in a horizontal direction to obtain an image signal. 2. The solid-state imaging device according to claim 1, further comprising: a horizontal transfer register section for outputting, wherein the vertical transfer register section is provided with a potential well region in the storage section by adding the N-type impurity.