JP2002207542A - Automatic discrimination value-setting device for expansion unit board - Google Patents

Abstract

PROBLEM TO BE SOLVED: To easily additionally install an expansion unit board to a basic unit board by only adding two kinds of elements and regular wiring when additionally installing the expansion board, by use of the same element composed of a circuit comprising a few kinds of elements. SOLUTION: In an automatic discrimination value-setting device for the expansion unit boards 16a, 16b, 16c, etc., the respective expansion unit boards 16a, 16b, 16c, etc., connected to the basic unit board 14 are mutually cascade- connected by n (n>=2) signal lines 18, and the respective expansion units 16a, 16b, 16c, etc., have discrimination value-setting circuits 12, 120, 220 each additionally setting its discrimination value D. The discrimination value-setting circuit 12, 120, 220 includes a first exclusive OR circuit 24 outputting the exclusive OR of a high electric potential input 42 and a first signal S1 of the n signal lines 18, and a second exclusive OR circuit 28 outputting the exclusive OR of the first signal S1 and an input of a second signal S2. The high electric potential input 42 of the connected expansion unit board additionally changes and sets each the discrimination value D.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION The present invention relates to a system for extending a system by connecting a plurality of extension unit boards to a basic unit board of various measuring instruments, electronic computers, and the like. The present invention relates to an automatic identification value setting device for an extension unit board for setting a value.

[0002]

2. Description of the Related Art Conventionally, it has been general practice to expand the functions of various measuring instruments and computers by connecting various extension boards. For example, in the case of a computer,
Empty slot (connector) on the bus provided on the U board
In addition, the function is expanded by connecting the corresponding type of expansion board. In this case, connectors for connecting the extension boards to the basic CPU board in advance are provided in a number corresponding to the number of extension boards to be connected. Examples of the expansion board include an expansion I / O board, an expansion memory, a disk drive controller, a parallel port, a serial port, a PC card, and a USB port.

[0003] In measuring the intensity of light transmitted through an optical fiber, an optical power meter is generally used.
A multi-channel optical power meter is used for simultaneously measuring a plurality of light intensities having different wavelength bands. When constructing a multi-channel system such as a multi-channel optical power meter as shown in FIG.
Expansion unit boards of the same function are added on the basic unit board (CPU board) (for example, each has a measurement function for two channels), and in order to define their identification values, each additional unit board Are connected to the basic unit board by a bus cable (addresses and data are also transmitted and received by the bus cable). In this case, for example, the same number of 3 expansion unit boards as 3 expansion unit boards are added.
It is necessary to provide this connector on the basic unit board.

[0004] In addition, as a configuration in which expansion boards are connected in a daisy chain to extend functions, for example, a computer SC
SI connection and JP-A-11-3309 have been proposed.

[0005]

However, in conventional various measuring instruments and computers, it is necessary to provide a necessary number of connectors for connecting extension boards to the CPU board in advance, and the conventional multi-channel optical power is required. Similarly, it has been common for the meter to connect an extension board to a connector provided in advance. In these devices, one bus cable is connected to each connector of the expansion board and the CPU board.
On the U board, it is necessary to previously fixedly provide a number of connectors corresponding to the number of expansion boards that can be added or scheduled to be added. Therefore, the CPU of the connector
This occupies a large area in the board, and furthermore, the bus cable for connection is stored in the device, so that the entire device is inevitably enlarged.

[0006] When expansion boards are added in a daisy chain with respect to the CPU board, the identification value added to the existing expansion board is changed each time the expansion board is added. For example, when changing the settings of individual expansion boards or when specifying an expansion board while controlling a specific expansion board, operate the keyboard or measuring device to operate the newly added individual expansion board. The user must search for the identification value and recognize the latest identification value of the extension board before setting the extension board, which is very complicated for the user and requires a lot of work time. It was easy to make mistakes.

Further, in the extension board configuration changing method disclosed in Japanese Patent Application Laid-Open No. H11-3309, the number of signal lines for setting identification values is two.
In the case where the basic configuration is a logic element circuit (one inverter element and one AND element, two pull-ups) at the time of a bit, for example, a signal line is +1 bit, +2
When expanding the board with a bit and a multi-bit configuration, when the configuration is 3 bits, there are two inverter elements, one AND element, one OR element, and one EOR element, and when the configuration is four bits, 2 inverter elements, 2 AND elements, 3 OR elements, 1 EOR element
In this case, not only the number and the number of the logic elements constituting the circuit are irregularly increased so that the number of the logic elements and the number of the NOR element become one, but also the number of connected pull-up resistors increases to +1 and +2. Further, in the circuit configuration, in addition to the basic configuration, the number of logic elements to be added is greatly increased with the increase in the number of bits of the signal line, and the wiring configuration for a circuit incorporating the logic element in the basic configuration is also increased. , One of the signal lines
It became complicated with every bit increase. As a result, it takes a long time to create a circuit, a design error is likely to occur, and this has been a factor of increasing the manufacturing cost.

The present invention has been made in view of the above-mentioned conventional problems, and one object of the present invention is to provide an identification unit added to an existing extension unit when an extension unit board is added to a basic unit board. By fixing the number and making it easy to identify the identification number, it is possible to easily prevent setting mistakes, and use the same element with a small number of circuit configurations, and use regular wiring with the increase of expansion boards. An object of the present invention is to provide an automatic identification value setting device that can automatically set the identification value of each expansion board simply by adding two types of elements. Another object of the present invention is to reduce the number of connectors on the basic unit board by connecting the miniaturized basic unit boat and the expansion unit board in a stacked manner using an identification value setting circuit, thereby reducing the number of the connector basic units. An object of the present invention is to provide an automatic identification value setting device which can reduce the area occupied in a board, does not require a bus cable for individual connection, can save the space for equipment, and can reduce the cost.

[0009]

In order to achieve the above object, the present invention provides an automatic identification value setting device 10 for an extension unit board (16a, 16b, 16c...) Connected to a basic unit board 14. Yes, basic unit board 1
4 connected to each extension unit board (16
a, 16b, 16c...) are connected in cascade with each other by n (n ≧ 2) signal lines 18, and the respective extension unit boards (16a, 16b, 16c. The identification value setting circuit (1) for setting the value D
2, 120, 220), and the identification value setting circuit includes a high potential input (42), a basic unit board 14, and respective extension unit boards (16a, 16b, 16c,...).
.), A first exclusive OR circuit 24 for outputting an exclusive OR of the first signal S1 among the signals input corresponding to the number of n signal lines to be connected, Signal S1
And a second exclusive OR circuit 28 for outputting an exclusive OR of the input of the second signal S2, and a high potential input of an expansion unit board (16a, 16b, 16c...) Connected thereto. The automatic identification value setting device 10 of the extension unit board is characterized in that the respective identification values D are added and changed by the setting.

When the number of signal lines is n = 3, the identification value setting circuit 120 takes the logical product of the (n-2) th and (n-1) th signal inputs and outputs the logical product.
And a third exclusive OR circuit 32 for outputting an exclusive OR of the input from the AND circuit 30 and the nth signal input
And a first additional adding circuit 34a composed of the following.

In the case where n> 3, the identification value setting circuit 220 takes the logical product of the signal input immediately before the own signal input and the logical product output of the preceding stage and outputs the logical product. 30 and n−3 second addition circuits 36 each having an exclusive OR circuit 32 for taking an exclusive OR of an output of the AND circuit 30 and its own signal and outputting the result. May be.

[0012] Expansion unit boards (16a, 1
6b, 16c...), The identification value setting circuit according to claim 1.
And the signal line connection connectors (38, 4).
0) is provided at the same position on each board, and the connector units are directly connected to each other to connect the expansion unit boards (16a, 16b, 16c...) In a stacked manner. It comprises an automatic identification value setting device 12 for the unit board.

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention will be described below with reference to the accompanying drawings. FIGS. 1 to 3 show the automatic identification of the extension unit board according to the first embodiment of the present invention in an optical power meter used for, for example, the measurement of space-borne light and the development, manufacture, and inspection of the optical fiber communication field. The example which applied the value setting device 10 is shown. The automatic identification value setting device 10 for the extension unit board is configured such that the extension unit board (16a,
16b, 16c...) Are added and fixed, and the identification values added to the existing expansion units are defined regardless of the expansion unit boards (16a, 16b, 16c. (16a, 1
6b, 16c...), The automatic identification value setting device 1 of the extension unit board in the figure.
0 is a basic unit board 14 and one or more extended unit boards (16
a, 16b, 16c. . . ). The extension unit boards (16a, 16b, 16c...) Are connected in cascade with each other, and each extension unit board has an identification value setting circuit 12.

In FIGS. 1 and 2, the basic unit board 14 of the present embodiment is a
A receiving connector that is a PU board and has a CPU unit having a control function of an optical power meter (not shown) and a storage unit that holds various calculation results and data, and receives a connector for plugging in an expansion unit board as a connector unit. 3
8 are installed. In FIG. 2, the receiving connector 3
8 is provided with extension board connection terminals 38a and 38b, which are pin receiving terminals, as well as address, data, I / O, power supply voltage, and ground terminals, respectively, to which signal lines 18a and 18b are connected. The 2-bit unit select signals S1 and S2 are transmitted to the connected expansion unit board.

On the other hand, the extension unit boards (16a, 16a)
b, 16c,...) are respectively provided with connector portions connected to the basic unit board 14, and each of the connector portions has an insertion connector 40 and a receiving connector 38, respectively. I have. Each of the plug-in connector 40 and the receiving connector 38 is composed of a pin terminal or a pin receiving terminal for holding the connectors 38 and 40 together with an address, data and other control terminals, similarly to the basic unit board. Connection terminals 40a, 4
0b, 38a, and 38b are provided, and the connection terminals 40a and 40b of the extension unit board 16a are connected to the extension board connection terminals 38a and 38 of the basic unit board, respectively.
b connected to the signal lines 18a and 18b connected to the extension unit board 16a.
a and 38b are signal lines 18a connected to the connection terminals 40a and 40b of the second extension unit board 16b,
18b. Then, the insertion connector 4 of the extension unit board (16a, 16b, 16c...)
Each signal input from 0 is processed as it is or after the arithmetic processing in the unit board.
16b, 16c,...) Or the insertion connector 40. Similarly, the signals input from the receiving connectors 38 of the extension unit boards (16a, 16b, 16c,...) Are also used as they are or after the arithmetic processing in the unit boards. ) Is output to the receiving connector 38 or the insertion connector 40. Here, the basic unit board 14 and the extension unit boards 16 are connected in cascade, and the 2-bit unit select signals S1 and S2 have the same potential between the connection terminals of the adjacent boards. In the embodiment, the expansion unit board has two channels of optical power meter functions per board.

One characteristic of the present invention is that each of the extension unit boards 16 connected to the basic unit board 14 is cascade-connected to each other by n (n ≧ 2) signal lines 18 so that The unit boards each have an identification value setting circuit 12 for setting the identification value additively.

In FIG. 3, the identification value setting circuit 12 includes a first exclusive OR circuit 24 and a second exclusive OR circuit 28. The first exclusive logic circuit 24 always outputs the high potential input “1” and the first signal S1 of the signals input corresponding to the number of n signal lines for connecting the extension unit board. This is a two-input one-output logic circuit that receives an input and outputs an exclusive OR thereof, and a pull-up resistor 42 is always input to the first exclusive OR circuit 24 as a high potential input. Second exclusive OR circuit 28
Receives an input of the first signal S1 and an input of the second signal S2 and outputs an exclusive OR thereof.

In the figure, a first exclusive OR circuit 24
And the output of the second exclusive OR circuit 28 determine the identification value of the extension unit board 16a. By the way, in the case of FIG. 3, the first exclusive OR circuit 24 is connected to the first expansion unit board 16a.
And an output from the second exclusive OR circuit 28, an identification value "0, 0" is set.

The second expansion unit board 16b
When expanding the first expansion unit board 16
The signal level of the identification value set by the first extension unit board 16a is transmitted to the insertion connector 40 of the second extension unit board 16b via the receiving connector 38a of the second extension unit board 16b. The identification value setting circuit 12 of 16b calculates and sets the identification value of the second expansion unit board 16b. Hereinafter, similarly, for the third expansion unit board 16c, their identification values are additionally set by the same logical operation.

Next, the operation of the automatic identification value setting device 10 according to the first embodiment of the present invention will be described. FIG.
In FIG. 3 and FIG. 3, the first output signal S1 and the second signal S2 of the basic unit board 14 are always constant, and commonly output the potential level “1”. That is, the identification value of the basic unit board 14 is “1, 1”, and has the maximum value among all the connected unit boards.

Next, when the extension unit board 16a is connected to the basic unit board 14, first, the input "1" of the first signal S1, the input "1" of the second signal S2, and the input of the pull-up resistor 42. Each signal of "1" is input to the identification value setting circuit 12a of the extension unit board 16a. “1” of the high potential input of the pull-up resistor 42 and the first signal S
"1" of 1 is input to the first exclusive OR circuit 24 and is subjected to exclusive OR operation to calculate the identification value "0".
Also, “1” of the first signal S1 and “1” of the second signal S2
"1" is input to the second exclusive OR circuit 28 and operated to calculate "0", whereby the identification value of the expansion unit board 16a that is first expanded and added to the basic unit board 14 is added. Becomes "0,0".

The first expansion unit board 16a
When the second expansion unit board 16b is additionally connected to the first expansion unit board 16a, the input of the signal S1 of the first expansion unit board 16a is "0", and the second signal S2 of the first expansion board 16a is
Are input to the identification value setting circuit 12 of the second expansion unit board 16b. The high-potential input “1” from the pull-up resistor 42 and the input “0” of the first signal S1 correspond to the identification value setting circuit 1 of the second expansion unit board 16b.
2b, input to the first exclusive-OR circuit 24, the exclusive-OR operation is performed, and the identification value "1" is output. Also, "0" of the first signal S1 and "0" of the second signal S2 are input to the second exclusive OR circuit 28, and the exclusive OR operation is performed to output "0". You. Thus, the identification value of the second expansion unit board 16b as the expansion unit board adjacent to the expansion unit board 16a is “0,
The logical operation is performed for the third sheet in the same manner as described above, and "1, 0" is set for each.

As described above, in the first embodiment of the present invention, in the automatic identification value setting device 10, the identification value setting circuit 12 sets the identification value of the basic unit board 14 to the maximum value.
1, 1 ", and the extension unit board 16a which is added to the basic unit board 14 and adjacent thereto has the minimum value" 0, 0 ", and the extension unit board 16b adjacent to the extension unit board 16a has" 0, 1 ". To have 2
The identification values are set by changing the addition in the range of bits.

Further, by using an addition circuit configuration, it is possible to suitably calculate, determine, and grasp the identification value. For example, the user can recognize the identification value of the expansion unit board by calculating n−1, as long as the user knows whether or not the expansion unit board 16 to be connected corresponds to the n-th expansion unit board.

Further, as long as the extension unit board 16 is added to the end, the identification value added to the existing extension unit board is not changed. Even in the existing control program for directly controlling the unit board alone, the user does not affect the operation of the device or the control program without considering the identification value of the existing unit board.

Next, an automatic identification value setting device 10 according to a second embodiment of the present invention will be described with reference to FIG. 4, but the same constituent members as those of the automatic identification value setting device 10 according to the first embodiment will be described. Are denoted by the same reference numerals and description thereof is omitted. In the present embodiment, the basic unit board 14 and each of the extension unit boards 16a, 16b. . . Are cascaded by three signal lines 18a, 18b and 18c, respectively.
An identification value is set by a bit signal. That is, a third signal S3 is further output from the basic unit board 14, and an identification value setting circuit 120 to which an addition circuit 34a is added in addition to the configuration of the identification value setting circuit 12a of the first embodiment is provided. ing. Similarly to the first embodiment, the automatic identification value setting device 10 of the present embodiment also includes a basic unit board 14 (not shown) and an extension unit board (16a, 1a).
6b, 16c,...), And each of the extension unit boards (16a, 16b, 16c,...) Is provided with the identification value setting circuit 120 of the present embodiment.

As shown in FIG. 4, the first exclusive OR circuit 24 of the identification value setting circuit 120 of the present embodiment includes a pull-up resistor 4 similar to the identification value setting circuit 10 of the first embodiment.
2. The exclusive OR is calculated and output in response to the high-potential input by 2 and the input of the first signal S1. Further, the second exclusive OR circuit 28 receives the first signal S1 and the second signal S2, performs a logical operation on the exclusive OR similarly, and outputs the result. The first exclusive OR circuit 24 and the second exclusive OR circuit 28 constitute a basic logic circuit 60.

On the other hand, the addition circuit 34a
AND circuit for calculating the AND of the (n-2) th and (n-1) th signal inputs as the number of signal lines, and an exclusive OR of the input from the AND circuit and the nth signal input And a third exclusive-OR circuit that outputs the first signal S1 and the second exclusive OR circuit 34a.
AND circuit 30 which receives the input of the signal S2 and calculates the logical product thereof and outputs the result, and inputs the output of the logical product circuit 30 and the third signal S3 to calculate and output the exclusive OR of them. And a third exclusive OR circuit 32.

As described above, in the identification value setting circuit 110 of the second embodiment, the first exclusive OR circuit 24, the second exclusive OR circuit 28, and the addition circuit of the basic logic circuit 60 are provided. The respective identification values of the respective extension unit boards are set by the respective logical operation outputs of the third exclusive OR circuit 32 of 34a. Basic unit board 1
4 is connected to the receiving connector 38 and the plug-in connector 40 attached to each board in the same configuration as in the first embodiment, for example. At this point, the output of each logic element is output to the exclusive OR circuits 24 and 28, the AND circuit 30, and the third
, And an identification value of each expansion unit board is set in a 3-bit configuration via each signal line 18a, 18b, 18c.

Next, the operation of the automatic identification value setting apparatus 10 according to the second embodiment of the present invention will be described. In FIG. 4, the signal levels of the signals S1, S2 and S3 of the output of the basic unit board 14 are shown in FIG. 1 "is input to the identification value setting circuit 120 of the first extension unit board 16a.

The basic logic circuit 60 of the first extension unit board 16a includes the pull-up resistor 4 as in the first embodiment.
2 by the input of the high potential input “1” and the signal S1.
The exclusive OR circuit 24 outputs “0”, and receives the first and second signals S1 and S2, and outputs the same “0” from the second exclusive OR circuit 28. On the other hand, the addition and adding circuit 34a receives the input of the AND operation of the first and second signals S1 and S2 by the AND circuit 30 and the input of the third signal S3 to perform the third exclusive operation. Logical OR circuit 32
And outputs the same "0", and sets the identification value of the extension unit board 16a to be added to the first card to "0, 0, 0".

Also, when the second expansion unit board 16b is connected to the expansion unit board 16a, the first logic from the expansion unit board 16a in the basic logic circuit 60 of the identification value setting circuit 12b of the expansion unit board 16b. The input of "0" of the exclusive-OR circuit output signal S1 and "0" of the second exclusive-OR circuit output signal S2 is made to the second input.
The first and second exclusive OR circuits 24 and 28 of the extension unit board 16b receive the signals, and the third exclusive OR circuit 32 of the addition circuit 34a outputs the output "1" of the AND circuit 30.
And the third exclusive-OR circuit 32 of the board 16b receives the input of "1" of the third exclusive-OR circuit output signal S3 of the first extension unit board 16a and outputs "1", and the identification value "0" , 0, 1 "are set.

As shown in FIG. 4B, also in the second embodiment of the present invention, the identification value of the basic unit board 14 has the maximum value "1,1,1" and the first expansion unit The board 16a is set to the minimum value "0,0,0", and the identification value is changed by adding in a 3-bit range such that the second expansion unit board 16b has "0,0,1". Is set. In this embodiment, the number of expansion unit boards that can be added to the number n of input signal lines is seven, and the total number of connected units including the basic unit boards is 2 to the power of n, ie eight.

When a logic circuit of the identification value setting circuit 120 having three input lines is constructed as in the present embodiment, one logical product element is exclusive with respect to the basic logic circuit 60. It is only necessary to add the additional adder circuit 34 having only one OR element, the number of logic elements to be added and their wirings can be reduced, design errors and wiring errors can be suppressed, and the circuit configuration can be simplified.

Next, an automatic identification value setting device 10 according to a third embodiment of the present invention will be described with reference to FIG. 5, but the same constituent members as those of the automatic identification value setting device 10 according to the first embodiment will be described. Are denoted by the same reference numerals and description thereof is omitted. The present embodiment is applied to the case where the number of signal lines is four or more and the identification value of each extension unit board is set in a 4-bit configuration, and the identification value setting circuit of the present embodiment is applied to each extension unit in the first embodiment. The first of the identification value setting circuits of the unit board,
In addition to the basic logic circuit 60 including the second exclusive OR circuits 24 and 28, n-3 second addition circuits 36 are provided. The second addition circuit 36 outputs a signal input immediately before the own signal input and a logical product output of the preceding stage (first and second logical outputs).
A logical product circuit with which a logical product circuit with a signal is taken as a first stage) is output, and an exclusive OR of an output of the logical product circuit 44 and its own signal input is output. And an exclusive OR circuit 46.

The automatic identification value setting device 10 of this embodiment also has a basic unit board 14 and extension unit boards (16a, 16b, 16c) (not shown) as in the above-described embodiment.
..), A receiving connector 38 is provided on the basic unit board 14, and the extension unit boards (16a, 16b,
16c) are provided with a receiving connector 38 and a plug-in connector 40. In particular, an identification value setting circuit 220 is provided on the extension unit board.

In FIG. 5, the identification value setting circuit 220
As with the identification value setting circuit 12 of the first embodiment, the pull-up resistor 42, the first exclusive OR circuit 24, and the second
And a basic logic circuit 60 having the exclusive OR circuit 28 of FIG. Then, the second addition circuit 36 is added to the basic logic circuit 60 in the second embodiment.
Are added in the same connection configuration as the first addition / addition circuit added to. In the case of a 4-bit configuration with four signal lines as in this embodiment, up to 15 expansion unit boards can be added.

In the identification value setting circuit 220 of the automatic identification value setting device according to the third embodiment, the first, second and third expansion unit boards are provided in the same manner as in the second embodiment. Exclusive OR circuits 24, 28, 46a
Output "0", "0", and "0", respectively. Further, the input of the third signal S1 and the AND circuit 44 of the first stage of the addition circuit corresponding to the first board
an input of a logical product circuit 44b for performing a logical product with the input of a;
Upon receiving the input of the fourth signal S4, the exclusive OR circuit 46b of the stage performs an exclusive OR operation, outputs "0", and sets the identification value "0, 0, 0, 0". You. For the second expansion unit board, the first and second exclusive OR circuits 2 of the first expansion unit board are respectively used.
4 and 28 and the first and second stage exclusive OR circuits 46
a, 46b of the output signals S1, S2, S3, S4 of "0,
"0, 0, 0" is input to the identification value setting circuit having the same configuration to set the identification values "0, 0, 0, 1", respectively. , 0, 1, 1 ",..., Are sequentially set for each expansion unit board.

As described above, also in the third embodiment of the present invention, the identification value D is such that the basic unit board 14 has the maximum value "1, 1, 1, 1" and the first expansion unit board 16a Has a minimum value of "0,0,0,0" and the second expansion unit board 16b has a value of "0,0,0,1" such that it is additively changed in a 4-bit range. Is done.

When the logic circuit of the identification value setting circuit 220 having four input lines is constructed as in the present embodiment, the basic logic circuit 60 having two signal lines is used. , One AND element for inputting the first signal S1 and the second signal S2, and only one exclusive OR element for receiving the output of the logical element and the third signal S3 and outputting an exclusive OR In the case where the number of input lines provided with the addition circuit 36a is three, the input of the third signal S3 of the signal immediately before the own signal (that is, the fourth signal S4) and the own circuit ( That is, the additional addition circuit 36 at a stage preceding the additional addition circuit 36b)
The AND circuit 44b of the addition circuit 36b, which outputs the logical product of the inputs from the AND circuit 44a, and the output of the AND circuit 44b and the input of the fourth signal S4, which is its own signal, are mutually exclusive. Exclusive OR circuit 46b that outputs a logical OR
In the case where the number of signal lines is three, only two logic elements are added to the logic circuit when the number of signal lines is three, and the logic elements have the same configuration. Wiring errors can be suppressed, and the circuit configuration can be simplified.

Next, referring to FIG. 6, an extension unit board (16a, 16b, 16c,...) In which the identification value setting circuit of the automatic identification value setting device according to any of the embodiments described above is arranged.
A preferred embodiment of the automatic identification value setting device 500 to which () is applied will be described. In this embodiment, for example, the identification value setting device of the third embodiment will be described. The automatic identification value setting device 500 of this embodiment includes a basic unit board 1
4 and expansion unit boards (16a, 16b, 16c ...
.), The receiving connector 38 is provided on the basic unit board 14, and the receiving connector 38 and the insertion connector 40 are attached to each extension unit board. In this embodiment, five expansion unit boards are added.
Each expansion unit board is composed of a base unit having the same size and shape, and has the same identification value setting circuit 12.

As shown in FIG. 6, the basic unit board 1
The insertion connector 40 of the expansion unit board 16a is inserted into the receiving connector 38 of No. 4 from above and is held. The receiving connector 38 of the extension unit board 16a is connected to the receiving connector 38 of the extension unit board 16b.
0 is inserted, and the expansion unit boards sequentially added are connected in the same manner. In this manner, by directly connecting the connectors to each other and connecting them in a stacked manner, the extension unit boards (16a, 16b, 1) can be placed on the basic unit board 14 without using a bus cable.
6c...) Can be detachably connected.
Further, it is not necessary to provide a large number of receiving connectors 38 in the basic unit board 14 and the basic unit board 1
4 can be specifically realized. As a result, a plurality of extension unit boards (16a, 16b, 16c...) Can be added simply by installing one connector on the basic unit board 14.

Each expansion unit board (16a,
16b, 16c,...) Are provided with a pair of detachable connectors of a male type and a female type.

Further, the area occupied by the receiving connector 38 in the basic unit board 14 is reduced. Thus, the size of the basic unit board 14 itself can be reduced, and the size of the automatic identification value setting device 10 can be reduced.

Also, when the automatic identification value setting device 10 is constructed in a stacked manner without using a bus cable, each extension unit board (16a, 16b, 16
c) can be configured by a simple operation of simply inserting the insertion connector 40 into the receiving connector 38 of the unit board at the preceding stage, and the automatic identification value device 12 can be easily configured. In addition, since the bus cable is not used, device trouble (for example, connection error or contact failure) caused by the bus cable is eliminated, and the reliability of the device can be improved and the manufacturing cost can be reduced.

In addition, by using male and female plug-in connectors which have been mass-produced and distributed in the related art, manufacturing costs can be reduced and maintenance can be facilitated.

The automatic identification value setting device for an expansion unit board of the present invention is not limited to the above-described embodiment, but may be modified in any manner without departing from the spirit of the invention described in the appended claims. Is also good. For example, instead of being applied to an optical power meter, it may be added to a basic unit board such as various measuring instruments and electronic calculators. Also, for example, the identification value setting circuit may use a one-chip IC. In the identification value setting circuit, individual logic circuit elements may be arranged and wired as in the embodiment. In particular, in the present invention, there are few types of logic elements, and therefore, it can be manufactured at low cost using a general-purpose IC.

【The invention's effect】

As described above, according to the automatic identification value setting device of the present invention, the automatic identification value setting device of the extension unit board connected to the basic unit board is provided. The unit boards are cascade-connected to each other by n (n ≧ 2) signal lines, and each of the extension unit boards has an identification value setting circuit for additionally setting the identification value. The exclusive OR of the high-potential input and the first signal of the signals input corresponding to the number of n signal lines connecting the basic unit board and the respective extension unit boards. 1 exclusive OR circuit;
A second exclusive-OR circuit for outputting an exclusive-OR of the input of the first signal and the input of the second signal, and the respective identification values are added by a high potential input of the connected expansion unit board. Since the configuration is changed and set to the same, using the same element with a smaller number of circuit configurations, the regular wiring and the addition of two types of elements are added to the basic unit board as the number of expansion boards increases. As a result, it is possible to easily specify the identification value at low cost, and it is possible to reliably prevent a setting error during the extension work. Further, by cascading the unit boards, the number of connectors for connection on the basic unit board can be reduced, and space saving in the device can be realized. The logic circuit that constitutes the identifier setting circuit is the first logic circuit.
, The second exclusive-OR circuit, the second exclusive-OR circuit, and a pull-up resistor only, so that it can be realized with a simple circuit configuration and circuit wiring, simplifying the structure and reducing the device Cost reduction can be achieved.

Also, when the identification value setting circuit of the automatic identification value setting device of the extension unit board has n = 3 signal lines, the logical product of the (n-2) th and (n-1) th signal inputs is calculated. And a third exclusive OR circuit that outputs an exclusive OR of the input from the AND circuit and the nth signal input. With this configuration, the circuit can be basically composed of only the AND element and the EOR element only by adding an additional addition circuit consisting of only one AND element and one EOR element. Depending on the type of component, for example, a general-purpose IC or the like can be effectively used to ensure low cost effectiveness.

In the case where the identification value setting circuit of the automatic identification value setting device of the extension unit board has n> 3 signal lines, the identification value setting circuit is configured to output a signal input signal immediately before its own signal input and A second AND circuit that outputs a logical product of the logical product output of the preceding stage and an exclusive OR circuit that performs an exclusive OR operation on the output of the AND circuit and its own signal input and outputs the result; By providing a configuration having n-3 additional addition circuits, the additional addition circuit only needs to include an AND circuit and an exclusive OR circuit, and a simple addition of one bit of signal lines is required. And can be realized concretely,
Circuit design, wiring, and creation can be performed reliably. Therefore, an increase in the number of logic elements due to an increase in the number of bits is small, and the number of ICs to be used can be reduced.
In addition, thereby, the number of wirings can be reduced, and design errors and wiring errors can be specifically suppressed. Further, miniaturization of each extension unit board and the automatic identification value setting device itself can be realized.

In the above-described automatic identification value setting apparatus for an extension unit board including the identifier setting circuit, the extension unit board of the same shape is provided with the identification value setting circuit and the signal line connection connector on each board. It is provided at the same position, the connector unit is directly connected to each other, and the expansion unit board is connected in a stacked state, so that the bus cable itself is unnecessary, and furthermore, the connector for connection is a general-purpose male type, By using the female plug-in connector, the manufacturing cost can be reduced, the extension space for the extension unit board can be reduced, and the entire apparatus can be made compact.

[Brief description of the drawings]

1A is a front view of a basic unit board of an automatic identification value setting device according to the present invention, FIG. 1B is a front view of an extension unit board thereof, and FIG. It is a perspective view.

FIG. 2 is an explanatory diagram of a signal transmission path of an identification value setting circuit according to the first embodiment of the present invention.

FIG. 3 is an explanatory diagram of a logic element circuit configuration when a signal line n = 2.

FIG. 4A is an explanatory diagram of a logical element circuit configuration when the number of signal lines is n = 3 in the second embodiment of the present invention, and FIG. 4B is an explanatory diagram of a set identification value of each unit board; is there.

FIG. 5 is an explanatory diagram of a logic element circuit configuration when the number of signal lines is n = 4 in the third embodiment of the present invention.

FIG. 6 is an overall perspective view illustrating a fourth embodiment of the present invention, in which expansion unit boards are installed on a basic unit board in a stacked manner.

FIG. 7 is an explanatory diagram showing a connection configuration of an extension unit board to a conventional basic unit board.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 10 Automatic identification value setting apparatus 12 Identification value setting circuit 14 Basic unit board 16 Expansion unit board 18 Signal line 24 First exclusive OR circuit 28 Second exclusive OR circuit 30 AND circuit 32 Third exclusive circuit OR circuit 34 First addition circuit 36 Second addition circuit S1 First signal S2 Second signal S3 Third signal S4 Fourth signal 120 Identification value setting circuit 220 with n = 3 signal lines Identification value setting circuit with n> 3 signal lines

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 5E023 AA16 BB22 BB24 CC03 CC16 CC22 CC26 HH17 HH28 HH30 5E077 BB26 BB31 CC03 CC22 CC26 GG03 JJ11 JJ20 JJ21

Claims (4)

[Claims] 1. An automatic identification value setting device for an extension unit board connected to a basic unit board, wherein each extension unit board connected to the basic unit board is connected to each other by n (n ≧ 2) signal lines. The extension unit boards are connected in cascade, and each of the extension unit boards has an identification value setting circuit for setting the identification value in an additive manner. The identification value setting circuit connects a high potential input, a basic unit board, and each extension unit board. A first exclusive-OR circuit for outputting an exclusive-OR of a first signal among signals input corresponding to the number of n signal lines to be connected; a first signal and a second signal; A second exclusive-OR circuit for outputting an exclusive-OR of the input of the signal of (a) and (b), wherein the respective identification values are additively changed by a high potential input of the connected expansion unit board. Automatic identification value setting device of the extension unit board, characterized in that to a constant. 2. In the case of n = 3 signal lines, the identification value setting circuit takes a logical product of the (n−2) th and (n−1) th signal inputs and outputs the result. 2. The expansion unit board according to claim 1, further comprising a first additional adder circuit comprising: a third exclusive OR circuit that outputs an exclusive OR of an input from the AND circuit and an nth signal input. Automatic identification value setting device. 3. In the case of n> 3 signal lines, the identification value setting circuit outputs a logical product of a signal input immediately before its own signal input and a logical product output of the preceding stage and outputs the logical product. 2. The circuit according to claim 1, further comprising: n-3 second addition circuits each including a circuit, and an exclusive OR circuit for performing an exclusive OR operation on an output of the AND circuit and an input of the own signal and outputting the result. Automatic identification value setting device for expansion unit boards. 4. An expansion unit board having the same shape.
And a connector for connecting each signal line is provided at the same position on each board together with the identification value setting circuit of the automatic identification value setting device according to any one of (3) to (3), and the connectors are directly connected to each other. An automatic identification value setting device for an extension unit board, wherein the extension unit boards are connected in a stack.