JP2002198564A - Semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device of high performance which is excellent in productivity. SOLUTION: In this semiconductor device, an optical function element 2 which is constituted by laminating an N-type compound semiconductor layer 4 and a P-type compound semiconductor layer 3, and a silicon semiconductor element 6 for controlling driving of the optical function element 2 are arranged in parallel on an upper surface of a substrate 1 composed of single crystal silicon, and a metal layer 7 for electrically connecting the N-type compound semiconductor layer 4 and the silicon semiconductor element 6 is stuck on them. Intermediate layers 8 composed of silicon and/or metal silicide are interposed between the metal layer 7 and the N-type compound semiconductor layer 4, and between the metal layer 7 and the silicon semiconductor element 6. A part of silicon in the intermediate layers 8 is diffused in the metal layer 7, diffusion regions 7a whose silicon content is 20-50% are formed below the metal layer 7, and a contact region 4a whose silicon containing concentration is from 1.0×1019/cm3 to 5.0×1020/cm3 is formed above the N-type compound semiconductor layer 4.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] 1. Field of the Invention [0002] The present invention relates to a semiconductor device having an optical functional element such as a light emitting diode or a photodiode.

[0002]

2. Description of the Related Art In a conventional semiconductor device, an optical functional element in which an n-type compound semiconductor layer and a p-type compound semiconductor layer are stacked on the upper surface of a substrate made of single crystal silicon, and driving of the optical functional element are controlled. And a conductive layer on the optical functional element, and a wiring layer on the silicon semiconductor element, respectively, and lead and stack one end of the conductive layer on the wiring layer. For example, when the optical function element is a light emitting element such as a light emitting diode, the light emitting element is connected via a metal layer and a conductive layer as a silicon semiconductor element is driven. When a predetermined power is applied, electrons are injected into the p-type compound semiconductor layer of the light emitting element, and holes are injected into the n-type compound semiconductor layer of the light-emitting element. Between Together they are recombined in the vicinity of the pn junction made to convert the energy generated during the recombination to the light, to function as a semiconductor device by releasing it to the outside.

The material of the conductive layer is Ni / Au.
Ge or the like was used as the material of the wiring layer, and Al / Si or the like was used.

[0004]

However, in the conventional semiconductor device described above, the conductive layer and the wiring layer are preferably connected to the optical function element and the wiring layer to the silicon semiconductor element in order to achieve good ohmic connection. The layers and the layers are formed of a material that is optimal for each ohmic connection. Therefore, when forming a conductive layer or a wiring layer on the upper surface of the substrate, these must be formed in separate steps, and as a result,
There is a disadvantage that the manufacturing process of the semiconductor device is complicated and the productivity is reduced.

In order to solve the above-mentioned drawbacks, it is conceivable to simplify the manufacturing process of the semiconductor device by forming the conductive layer and the wiring layer with the same material.

However, a common material has not yet been found which can satisfactorily connect the conductive layer to the optical functional element and the wiring layer to the silicon semiconductor element, respectively. There is a strong demand for early realization of semiconductor devices with improved productivity.

The present invention has been made in view of the above-mentioned drawbacks, and has as its object to provide a high-performance semiconductor device having excellent productivity.

[0008]

According to the present invention, there is provided a semiconductor light emitting device comprising: an optical functional element in which an n-type compound semiconductor layer and a p-type compound semiconductor layer are stacked on an upper surface of a substrate made of single crystal silicon; A semiconductor device in which a silicon semiconductor element for controlling driving of a functional element is juxtaposed, and a metal layer for electrically connecting the n-type compound semiconductor layer and the silicon semiconductor element of the optical functional element is adhered. An intermediate layer made of silicon and / or metal silicide is interposed between the metal layer and the n-type compound semiconductor layer and between the metal layer and the silicon semiconductor element, and silicon in the intermediate layer is partially Diffusion into the metal layer, a diffusion region having a silicon content of 20% to 50% below the metal layer, and a silicon content concentration of 1.% above the n-type compound semiconductor layer.
A contact region of 0 × 10 ¹⁹ / cm ^{3 to} 5.0 × 10 ²⁰ / cm ³ is provided.

According to the semiconductor device of the present invention, the n-type compound semiconductor layer of the optical function element and the silicon semiconductor element are electrically connected by a single wiring, that is, a laminate of a metal layer and an intermediate layer. Therefore, the stacked body can be formed collectively in the same process, and the manufacturing process of the semiconductor device can be simplified.

According to the semiconductor device of the present invention, silicon in the intermediate layer is partially diffused below the metal layer to form a diffusion region having a silicon content of 20% to 50% above the n-type compound semiconductor layer. The silicon in the intermediate layer is partially diffused to a silicon concentration of 1.0 × 10 ¹⁹ / cm ^{3 to} 5.0 × 10 ^20.
/ Cm ³ contact areas,
A large number of carriers are secured at the connection between the metal layer and the optical functional element, and the connection between the metal layer and the silicon semiconductor element, and the mobility of these carriers is significantly improved. Ohmic connection can be favorably made to both silicon semiconductor elements. Therefore, the current flows between the optical function element and the silicon semiconductor element extremely well, and a high-performance semiconductor device with low power consumption can be obtained.

[0011]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

FIG. 1 is a cross-sectional view of a semiconductor device according to one embodiment of the present invention, in which 1 is a substrate, 2 is a light emitting element as an optical functional element, 6 is a silicon semiconductor element, 7 is a metal layer, 8
Is an intermediate layer.

The substrate 1 is formed of a single crystal silicon so as to form a rectangular shape. A plurality of light emitting elements 2 and silicon semiconductor elements 6 are provided on the upper surface of the substrate 1 as a supporting base material for supporting them. Function.

The plurality of light emitting elements 2 are linearly arranged on the substrate 1 at a density of, for example, 600 dpi (dot per inch), each of which is a p-type single crystal thin film of a compound semiconductor such as GaAs. The compound semiconductor layer 3 and the n-type compound semiconductor layer 4 are each formed to a thickness of 1,000 to 50,000.
Å, and has a structure in which the metal layer 7 and the intermediate layer 8 are
When a predetermined electric power is applied through the p-type compound semiconductor layer and the n-type compound semiconductor layer, electrons are injected into the p-type compound semiconductor layer, and holes are injected into the n-type compound semiconductor layer. 4, light is emitted at a predetermined wavelength by being recombined in the vicinity of a pn junction formed between them and converting the energy generated at the time of the recombination into light.

Further, the light emitting element 2 has a contact region 4a above the n-type compound semiconductor layer 4.

The contact region 4a is based on GaAs or the like constituting the n-type compound semiconductor layer 4 and contains silicon diffused from the intermediate layer 8 deposited on the upper surface thereof. The density is 1.0 × 1
It is set to ^{0 19 / cm 3 ~5.0 × 10} 2 0 / cm 3.

The contact region 4a has a thickness of n
It is formed so as to have a thickness of 1% to 20% of the type compound semiconductor layer 4 so as to secure a large number of carriers (electrons) between the n type compound semiconductor layer 4 and the intermediate layer 8.

On the other hand, the silicon semiconductor element 6
Electronic circuits such as shift registers, latches, and output transistors are integrated on the upper surface of the substrate 1 at a high density.

The silicon semiconductor element 6 has an internal output transistor connected to the light emitting element 2 via an intermediate layer 8 and a metal layer 7, and turns on and off the output transistor based on an external printing control signal. By switching off, the function of individually controlling the light emission of the light emitting elements 2 is performed.

Then, an intermediate layer 8 and a metal layer 7 are sequentially deposited on the diffusion region 5 and the silicon semiconductor element 6 in the light emitting element 2, and a wiring is formed by a laminate of both.

The metal layer 7 serving as the upper layer of such a laminate is formed in a predetermined pattern with a metal material such as aluminum, and the thickness thereof is set to, for example, 1000 ° to 20000 °. Supply.

Further, an intermediate layer 8 serving as a lower layer of the laminated body
Is formed of, for example, amorphous silicon, metal silicide, or the like to a thickness of 200 to 1000 mm. The silicon is diffused into the layer 7 and the n-type compound semiconductor layer 4, whereby the contact region 4 a is formed on the n-type compound semiconductor
Diffusion region 7a is formed in the lower part of FIG.

The diffusion region 7a is formed so as to have a thickness of 10% to 30% of the thickness of the metal layer 7, and the silicon content inside is set to 20% to 50%. The function of improving the adhesion between the intermediate layer 7 and the intermediate layer 8 and improving the carrier movement characteristics at this portion is achieved.

Incidentally, an insulating layer 10 is interposed between the substrate 1 and the metal layer 7, and the insulating layer 10 electrically insulates the substrate 1 from the metal layer 7.

According to the semiconductor light emitting device of the present embodiment as described above, the n-type compound semiconductor layer 4 and the silicon semiconductor element 6 of the light emitting element 2 are connected to a single wiring, that is, a laminate of the metal layer 7 and the intermediate layer 8. Since the electrical connection is made in this way, the stacked body can be formed collectively in the same process, and the manufacturing process of the semiconductor device can be simplified.

The intermediate layer 8 is provided below the metal layer 7.
20% of silicon content by diffusing some of the silicon inside
The silicon in the intermediate layer 8 is partially diffused in the 50% diffusion region 7a above the n-type compound semiconductor layer 4 of the light emitting element 2 to have a silicon content of 1.0 × 10 ¹⁹ / cm ^{3 to} 5.0.
Since each of the contact regions 4a of × 10 ²⁰ / cm ³ is provided, a large number of carriers are secured at the connection between the metal layer 7 and the light emitting element 2 and at the connection between the metal layer 7 and the silicon semiconductor element 6. In addition, the mobility of these carriers is remarkably improved, and the metal layer 7 can be satisfactorily ohmic-connected to both the light emitting element 2 and the silicon semiconductor element 6. Therefore, the current flows between the light emitting element 2 and the silicon semiconductor element 6 extremely well, and a high-performance semiconductor device with low power consumption can be obtained.

Here, the silicon concentration of the contact region 4a is set to 1.0 × 10 ¹⁹ / cm ^{3 to} 5.0 × 10 ²⁰ / cm.
cm ³ is set if the silicon concentration in the contact region 4a is lower than 1.0 × 10 ¹⁹ / cm ³ .
The number of carriers is insufficient in the contact region 4a, so that the metal layer 7 cannot be satisfactorily ohmic-connected to the light emitting element 2 and the silicon content concentration is higher than 5.0 × 10 ²⁰ / cm ^3. If it is large, a defect occurs in the crystallinity of the n-type compound semiconductor 4 disposed around the contact region 4a, and the light emitting element 2 may cause a light emission failure. Therefore, it is important to set the concentration of silicon in the contact region 4a to 1.0 × 10 ¹⁹ / cm ^{3 to} 5.0 × 10 ²⁰ / cm ³ .

On the other hand, the reason why the silicon content of the diffusion region 7a is set to 20% to 50% is that the diffusion region 7a
If the silicon content of a is less than 20%, the metal layer 7
The mobility of carriers is deteriorated in this portion due to the deterioration of the adhesion between the metal layer 7 and the intermediate layer 8, and the metal layer 7 cannot be satisfactorily ohmic-connected to both the light emitting element 2 and the silicon semiconductor element 6. In addition, when the silicon content rate is 5
If it is larger than 0%, a large amount of silicon is contained in the metal layer 7 near the diffusion region, and the electric resistance of the metal layer 7 itself becomes large. Therefore, the diffusion region 7
It is important to set the silicon content of a to 20% to 50%.

Next, a method of manufacturing the above-described semiconductor device will be described.

(1) First, a substrate 1 made of single-crystal silicon is prepared, and a silicon semiconductor element is formed on the upper surface thereof.

The substrate 1 is formed by forming a single-crystal silicon ingot (lumps) by adopting a conventional peripheral Czochralski method (pulling method), slicing the ingot into a predetermined thickness, and polishing the surface. Produced by

Further, the silicon semiconductor element 6 is formed by integrating electronic circuits such as shift registers, latches, and output transistors on the upper surface of the substrate 1 at a high density by employing a conventionally known semiconductor manufacturing technique.

The reason why the silicon semiconductor element 6 is formed before the light emitting element 2 is that the silicon semiconductor element 6 has a higher heat history than the light emitting element 2.

(2) Next, an insulating mask having a predetermined opening is formed on the upper surface of the silicon substrate 1, and thereafter,
The light emitting element 2 is formed on the upper surface of the substrate 1 exposed in the opening of the insulating mask.

The opening of the insulating mask is formed by processing into a predetermined pattern by employing a conventionally known sputtering method or photolithography technique.

The light emitting element 2 is formed by a conventionally known MOCVD.
(Metal Organic Chemical Vapor Deposition) method and a dislocation reduction method. That is, first, a p-type compound semiconductor 3 and an n-type compound semiconductor 4 composed of a single crystal thin film such as GaAs are sequentially laminated on the upper surface of the substrate 1 exposed at the opening of the insulating mask,
Thereafter, the laminated body is processed into a predetermined shape by etching, and the light emitting element 2 is formed.

(3) Next, an insulating layer 10 having a predetermined opening is formed on the upper surface of the n-type compound semiconductor layer 4 and the silicon semiconductor element 6 of the light emitting element 2. An intermediate layer 8 is formed in the opening.

The insulating layer 10 is made of an insulating material such as silicon nitride by a well-known CVD (Chemical Vapor Deposition).
It is formed in a predetermined pattern by a method or a sputtering method.

The intermediate layer 8 is formed by forming the intermediate layer 8 of amorphous silicon, metal silicide, or the like to a predetermined thickness by employing a conventionally known vacuum deposition method or sputtering method. It is formed by processing into a predetermined fine pattern by the photolithography technology and the etching technology.

(4) Next, a metal layer 7 for electrically connecting the light emitting element 2 and the silicon semiconductor element 6 is formed in a predetermined pattern.

The metal layer 7 is formed of a metal material such as aluminum to a predetermined thickness by employing a conventionally known vacuum evaporation method or a sputtering method, and the metal layer 7 is formed by a conventionally known photolithography technique and etching technique. To form a predetermined fine pattern.

(5) Finally, the contact region 4a and the diffusion region 7a are formed by annealing the metal layer 7 and the intermediate layer 8 at a predetermined temperature.

The contact region 4a and the diffusion region 7a
Is applied to the metal layer 7 and the intermediate layer 8 at a high temperature of 350 ° C. to 500 ° C. in an inert gas atmosphere such as nitrogen gas.
1 to 30 minutes, so that a predetermined amount of silicon in the intermediate layer 8 is diffused into the n-type compound semiconductor layer 4 and the metal layer 7. The semiconductor device shown is completed.

It should be noted that the present invention is not limited to the above-described embodiment, and various changes and improvements can be made without departing from the gist of the present invention.

For example, in the above embodiment, the intermediate layer 8 is partially interposed between the metal layer 7 and the n-type compound semiconductor layer 4 and between the metal layer 7 and the silicon semiconductor element 6. Alternatively, as shown in FIG. 2, an intermediate layer 8 'having the same pattern as that of the metal layer 7' may be interposed in the entire area immediately below the metal layer 7 '. In this case, since the intermediate layer 8 'can be patterned using the same photomask as the metal layer 7', the manufacturing process can be further simplified. The diffusion region 7 '
a is formed over the entire lower portion of the metal layer 7 'located on the intermediate layer 8'.

In the above embodiment, the metal layer 7 is made of aluminum. Alternatively, the metal layer 7 may be made of gold, chromium, titanium, molybdenum,
It may be made of another metal such as nickel.

Further, in the above embodiment, the light emitting element 2 is made of GaAs or the like, but instead of this, the light emitting element is made of, for example, AlGaAs, AlGaInP,
It may be formed of InGaAs, InGaAsP, or the like.

Further, in the above embodiment, the light emitting element 2 is formed by depositing the n-type compound semiconductor layer 4 on the p-type compound semiconductor layer 3;
A p-type compound semiconductor layer may be attached to the type compound semiconductor layer to form a light emitting element. In this case, the p-type compound semiconductor layer is partially provided on the upper surface of the n-type compound semiconductor layer, and the wiring including the metal layer and the intermediate layer is ohmically connected on the n-type compound semiconductor layer without the p-type compound semiconductor layer. .

Further, in the above-described embodiment, the light emitting element 2 such as a light emitting diode is used as the optical functional element. Instead, a light receiving element such as a photodiode is used as the optical functional element. Is also good.

[0050]

According to the semiconductor device of the present invention, silicon in the intermediate layer is partially diffused below the metal layer to form a diffusion region having a silicon content of 20% to 50%, thereby forming an n-type compound semiconductor layer. Part of the silicon in the intermediate layer is diffused to the upper part of the silicon to form a silicon-containing concentration of 1.0 × 10 ¹⁹ / cm ^{3 to} 5.0 × 10
^Since the contact regions of ²⁰ / cm ³ were provided, a large number of carriers were secured at the connection between the metal layer and the optical functional element and the connection between the metal layer and the silicon semiconductor element. The mobility characteristics are significantly improved, and the metal layer can be satisfactorily ohmic-connected to both the optical function element and the silicon semiconductor element.
Therefore, the current flows between the optical function element and the silicon semiconductor element extremely well, and a high-performance semiconductor device with low power consumption can be obtained.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view of a semiconductor device according to one embodiment of the present invention.

FIG. 2 is a cross-sectional view of a semiconductor device according to another embodiment of the present invention.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Substrate, 2 ... Light emitting element (optical functional element), 3
..P-type compound semiconductor layer, 4 ... n-type compound semiconductor layer, 4a ... contact region, 6 ... silicon semiconductor element, 7,7 '... metal layer, 7a, 7'a ... .Diffusion region, 8, 8 ': intermediate layer, 10: insulating layer

──────────────────────────────────────────────────続 き Continued on the front page (51) Int.Cl. ⁷ Identification symbol FI theme coat ゛ (reference) H01L 31/10 H01L 31/10 HF term (reference) 4M104 AA01 AA05 BB01 BB19 BB24 CC01 DD34 DD37 DD78 DD83 DD92 FF13 FF22 GG04 GG05 HH15 5F033 GG02 HH05 HH07 HH08 HH13 HH17 HH18 HH20 HH25 JJ01 JJ05 JJ07 JJ08 JJ13 JJ17 JJ18 JJ20 JJ25 KK03 KK06 LL01 MM05 NN06 PP15 PP19 QQ08 QQ09 QQ73 QQ80 RR06 SS08 SS11 WW04 XX09 5F041 CA33 CA35 CA58 CA72 CA82 CA92 CB33 5F049 MA01 MB07 MB12 NA12 NA14 SE05 SE12 SE20 SS03

Claims (1)

[Claims] 1. The method according to claim 1, wherein n is formed on an upper surface of the substrate made of single crystal silicon.
An optical functional device formed by laminating a type compound semiconductor layer and a p-type compound semiconductor layer, and a silicon semiconductor device for controlling the driving of the optical functional device are juxtaposed, and the n-type compound semiconductor layer of the optical functional device and What is claimed is: 1. A semiconductor device comprising a silicon semiconductor element and a metal layer electrically connecting the silicon layer and the silicon layer, wherein the metal layer and the n-type compound semiconductor layer and the metal layer and the silicon semiconductor element are connected to each other by silicon and / or silicon. An intermediate layer made of a metal silicide is interposed, and silicon in the intermediate layer is partially diffused into the metal layer to form a diffusion region having a silicon content of 20% to 50% below the metal layer. A semiconductor device comprising: a contact region having a silicon-containing concentration of 1.0 × 10 ¹⁹ / cm ^{3 to} 5.0 × 10 ²⁰ / cm ³ provided above a type compound semiconductor layer.