JP2002190596A - Method of manufacturing semiconductor device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method of manufacturing a semiconductor device having a structure that prevents complexity of manufacturing processes and enables application of an anode short structure, even to a low breakdown voltage element comprising a thin substrate. SOLUTION: In the manufacture of the semiconductor device, a P-type layer and an N-type layer, which is to become a collector layer of the anode short structure, are formed as embedded layers in a semiconductor substrate. On a side opposite to the collector side of the semiconductor substrate, a MOS transistor structure is formed. The collector-side surface of the semiconductor substrate is polished, to expose the P-type layer and N-type layer to form the collector layer of the anode short structure.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to an IGB having an anode short structure.
It is suitable as a method for manufacturing T (Insulated Gate Bipolar Transistor).

[0002]

2. Description of the Related Art An anode short structure is known as a means for improving the characteristics of an IGBT. In the anode short structure, the P-type layer is partially formed on the collector side, thereby suppressing the amount of injected holes and improving the trade-off between the ON voltage and the switching speed.

[0003] A method of manufacturing a conventional anode short type IGBT will be described. FIG. 4 is a cross-sectional view showing a structure in a manufacturing process of a conventional method for manufacturing an anode short type IGBT.

In a conventional method of manufacturing an anode short type IGBT, first, as shown in FIG. 4A, an anode short structure serving as a collector is formed on one side of an N ⁻ type semiconductor substrate 1. That is, the N ⁺ -type layer 3 is provided at the center on one side of the N ⁻ -type substrate 1, and the P ^{+
The +} type layer 2 is formed, and the collector side has an anode short structure.

After that, as shown in FIG. 4B, a MOS transistor structure including an emitter layer and a gate on the side opposite to the collector side is formed by a process similar to that of a normal IGBT. That is, the gate insulating film 12 and the gate 11 are laminated on the central surface of the N ⁻ type substrate 1 opposite to the collector side, and the emitters 13 are formed on the substrate surface on both sides of the gate 11.

As described above, in the conventional method of manufacturing an anode short type IGBT, an anode short structure is formed on the collector side of a semiconductor substrate, and then an emitter layer and a gate having a MOS transistor structure are formed on the opposite side of the substrate. .

[0007]

However, in the conventional method of manufacturing an anode short type IGBT, an anode short structure on the collector side is first formed, and then a MOS transistor structure on the opposite side is formed. Since it is difficult to form the MOS transistor structure when the thickness is small, there is a problem that the thickness of the substrate cannot be reduced too much.

On the other hand, in order to reduce the on-state voltage, it is sufficient to secure a sufficient thickness of the substrate to obtain a desired breakdown voltage.
Therefore, the anode short-circuit structure can be applied to a high-breakdown-voltage element which requires a certain thickness of the substrate, but the anode short-circuit structure can be applied to a low-breakdown-voltage element having a thin substrate. It was difficult.

Further, since the collector layer is formed first, it is necessary to protect the collector layer by some means when forming the MOS transistor structure on the opposite side, which complicates the manufacturing process. There was also a problem.

SUMMARY OF THE INVENTION The present invention has been made in view of the above problems, and has as its object to apply the anode short structure to a low-breakdown-voltage element having a small thickness of a substrate while avoiding a complicated manufacturing process. It is an object of the present invention to provide a method of manufacturing a semiconductor device having a configuration capable of performing the above.

[0011]

According to a method of manufacturing a semiconductor device according to the present invention, a P-type layer and an N-type layer serving as an anode short structure collector layer are formed as buried layers in a semiconductor substrate. M on the side opposite to the collector side of
After the OS transistor structure is formed, the collector-side surface of the semiconductor substrate is polished to expose the P-type layer and the N-type layer, thereby forming the anode short structure collector layer.

More specifically, a method of manufacturing a semiconductor device according to the present invention comprises the steps of forming a P-type layer and an N-type layer serving as an anode short structure collector layer on a first semiconductor substrate; A second layer is formed on the mold layer and the N-type layer by crystal growth.
Forming a semiconductor substrate, forming a MOS transistor structure on the second semiconductor substrate, and polishing and removing the first semiconductor substrate to expose the P-type layer and the N-type layer. And a process.

In the above structure of the method of manufacturing a semiconductor device according to the present invention, during the MOS transistor structure forming step, the P-type layer and the N-type layer serving as the anode short structure collector layer are buried in the semiconductor substrate, and Since the thickness is sufficiently large, the anode short structure can be applied to a low-breakdown-voltage element having a thin substrate.

In addition, since means for protecting the P-type layer and the N-type layer serving as the collector layer during the MOS transistor structure forming step is not required, the complexity of the manufacturing process can be avoided.

The method may further comprise, before the step of forming the P-type layer and the N-type layer, implanting oxygen to a predetermined depth near the surface of the first semiconductor substrate to form an oxide insulating film. If the process of exposing the P-type layer and the N-type layer is completed when the oxide insulating film is removed, the polishing amount can be controlled with high accuracy, and the IGBT characteristic variation is suppressed to a very small value. It is possible to do.

Preferably, the crystal growth is an epitaxial growth.

The MOS transistor structure may be a trench gate type MOS transistor structure.

[0018]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Embodiments of a method for manufacturing a semiconductor device according to the present invention will be described below with reference to the drawings.

FIG. 1 is a sectional view showing a structure in a manufacturing process of a method of manufacturing a semiconductor device according to a first embodiment of the present invention.

The method of manufacturing a semiconductor device according to the first embodiment of the present invention is as follows.
BT is manufactured.

First, a P ⁺ -type layer 2 and an N ⁺ -type layer 3 serving as an anode short structure collector are formed on one side of a semiconductor substrate 4 of an arbitrary conductivity type. That is, the N ⁺ -type layer 3 is provided at the center on one side of the substrate 4, and the P ⁺ -type layer 2 is provided on both sides of the N ⁺ -type layer 3.
To form Here, the conductivity type of the semiconductor substrate 4 is made arbitrary because the semiconductor substrate 4 is removed in a subsequent polishing step.

After the formation of the P ⁺ type layer 2 and the N ⁺ type layer 3, FIG.
As shown in (a), on the P ⁺ type layer 2 and the N ⁺ type layer 3,
An N ⁻ type semiconductor substrate 1 having a thickness that can obtain a desired breakdown voltage is formed by epitaxial growth. The thickness of the N ⁻ type substrate 1 is arbitrary, and is formed to a thickness that can obtain a desired low withstand voltage or high withstand voltage. In the subsequent MOS transistor structure forming step, the P ⁺ -type layer 2 and the N ⁺ -type layer 3
In this state, the thickness of the substrate 1 and the thickness of the substrate 4 are combined, and the thickness of the substrate is sufficiently large for forming the MOS transistor structure. As a result, the thickness of the N ⁻ type substrate 1 can be set arbitrarily.

After the N ^- type substrate 1 is formed, as shown in FIG. 1B, a MOS transistor structure including an emitter layer and a gate on the side opposite to the collector side is formed by a process similar to that of a normal IGBT. That is, the gate insulating film 12 and the gate 11 are laminated on the central surface of the N ⁻ type substrate 1 opposite to the collector side, and the emitters 13 are formed on the substrate surface on both sides of the gate 11. In this MOS transistor structure forming step, the P ⁺ -type layer 2 and the N ⁺ -type layer 3 serving as the anode short structure collector layer are buried between the substrate 1 and the substrate 4. Therefore, the P ⁺ type layer 2 and the N ⁺ type layer 3 are hardly affected by the heat treatment or the like in the MOS transistor structure forming step. As a result, means for protecting the P ⁺ -type layer 2 and the N ⁺ -type layer 3 during the MOS transistor structure forming step is not required, so that the complexity of the manufacturing steps can be avoided.

Thereafter, as shown in FIG. 1C, the substrate 4 is polished and removed until the P ⁺ type layer 2 and the N ⁺ type layer 3 are exposed, thereby forming an anode short structure collector layer. Further, when necessary electrode wirings and the like are formed, an anode short type IGBT is completed.

As described above, in the method for manufacturing a semiconductor device according to the first embodiment of the present invention, the P ⁺ type layer and the N ⁻ type layer serving as the anode short structure collector layer are embedded in the semiconductor substrate. After forming a MOS transistor structure on the side opposite to the collector side, the collector side surface of the semiconductor substrate is polished to expose the P-type layer and the N-type layer.

In the step of forming the MOS transistor structure, the P-type layer and the N-type layer serving as the anode short structure collector layer are buried in the substrate. Is sufficiently thick, so that the thickness of the semiconductor substrate can be arbitrarily set.

Further, since means for protecting the P-type layer and the N-type layer serving as the collector layer during the MOS transistor structure forming step is not required, the complexity of the manufacturing process can be avoided.

FIG. 2 is a sectional view showing a structure in a manufacturing process of a method of manufacturing a semiconductor device according to a second embodiment of the present invention.

In the method of manufacturing a semiconductor device according to the second embodiment of the present invention, an MO formed on the side opposite to the collector side is formed.
The difference from the method of manufacturing the semiconductor device according to the first embodiment of the present invention is that the gate of the S transistor structure is a trench gate.

However, the P ⁺ type layer and the N ⁻ type layer which are the anode short structure collector layers are formed as buried layers in the semiconductor substrate, and the MOS transistor structure is formed on the side opposite to the collector side. The feature that the P-type layer and the N-type layer are exposed by polishing the collector side surface is exactly the same as in the first embodiment.

The method of manufacturing a semiconductor device according to the second embodiment of the present invention is as follows.
BT is manufactured.

First, a P.sup. ⁺ Type layer 2 and an N.sup. ⁺ Type layer 3 serving as an anode short structure collector are formed on one side of a semiconductor substrate 4 of an arbitrary conductivity type, and as shown in FIG. , P ⁺ -type layer 2 and N ⁺ -type layer 3 are formed by epitaxial growth with an N ⁻ -type semiconductor substrate 1 having a thickness capable of obtaining a desired breakdown voltage.

After forming the N ^- type substrate 1, as shown in FIG. 2B, a trench gate type including an emitter layer and a trench gate on the side opposite to the collector side is formed by a process similar to that of a normal trench gate type IGBT. A MOS transistor structure is formed. That is, the gate insulating film 2 on the side surface and the bottom surface in the trench at the central portion of the N ⁻ type substrate 1 opposite to the collector side.
2 and a trench gate 21 filling the trench is formed, and an emitter 23 is formed on the substrate surface on both sides of the trench gate 21.

Thereafter, as shown in FIG. 2C, the substrate 4 is polished and removed until the P ⁺ type layer 2 and the N ⁺ type layer 3 are exposed, whereby an anode short structure collector layer is formed. Further, when necessary electrode wirings and the like are formed, an anode short type IGBT having a trench gate structure is completed.

The manufacturing method of the semiconductor device according to the second embodiment of the present invention can obtain exactly the same effects as those of the first embodiment.

FIG. 3 is a sectional view showing a structure in a manufacturing process of a method of manufacturing a semiconductor device according to a third embodiment of the present invention.

In the method of manufacturing a semiconductor device according to the third embodiment of the present invention, oxygen is implanted in advance in the vicinity of one surface of the semiconductor substrate 4 on which the P-type layer and the N-type layer to be the anode short structure collector are formed. The point of the present invention is that when the oxide insulating film is removed by removing the oxide insulating film when the substrate 4 is finally polished to expose the P-type layer and the N-type layer. This is different from the method of manufacturing the semiconductor device according to the first embodiment.

However, the P ⁺ -type layer and the N ⁻ -type layer serving as the collector layer having the anode short structure are formed as buried layers in the semiconductor substrate, and the MOS transistor structure is formed on the side opposite to the collector side. The feature that the P-type layer and the N-type layer are exposed by polishing the collector side surface is exactly the same as in the first embodiment.

The method for fabricating a semiconductor device according to the third embodiment of the present invention is as follows.
BT is manufactured.

First, as shown in FIG. 3A, oxygen (O ₂ ) is implanted in the vicinity of one surface of a semiconductor substrate 4 of an arbitrary conductivity type, and a silicon oxide film (Si0 ₂ ) 5 is formed (see FIG. 3B).

Next, on the side of the substrate 4 on which the silicon oxide film 5 has been formed, the P ⁺ type layer 2 and the N ⁺ type layer 3 which will be the anode short structure collector are formed.

After forming the P ⁺ type layer 2 and the N ⁺ type layer 3, FIG.
As shown in (b), on the P ⁺ type layer 2 and the N ⁺ type layer 3,
An N ⁻ type semiconductor substrate 1 having a thickness that can obtain a desired breakdown voltage is formed by epitaxial growth.

After the N ^- type substrate 1 is formed, as shown in FIG. 3C, a MOS transistor structure including an emitter layer and a gate on the side opposite to the collector side is formed by the same process as that of a normal IGBT. That is, the gate insulating film 12 and the gate 11 are laminated on the central surface of the N ⁻ type substrate 1 opposite to the collector side, and the emitters 13 are formed on the substrate surface on both sides of the gate 11.

Thereafter, as shown in FIG. 3D, the substrate 4 is polished and removed until the P ⁺ type layer 2 and the N ⁺ type layer 3 are exposed.

However, according to the third embodiment of the present invention,
In the method of manufacturing a conductor device, P ⁺Mold layer 2 and N⁺Type
A silicon oxide film at a position in contact with the exposed surface of layer 3
5 are formed. The silicon forming the substrate 4
The etching rate is different from that of the silicon oxide film 5.
As the substrate 4 is polished, the silicon oxide film 5 is polished.
When the etching starts, the etching rate changes. There
Then, the silicon oxide film 5 is removed and the etching rate
Returned to the silicon etching rate again,
End the etching.

The depth at which the silicon oxide film 5 is first formed near the surface on one side of the substrate 4 can be controlled with high precision by the acceleration energy at the time of oxygen implantation. Therefore, the silicon oxide film 5 is formed in advance at a predetermined depth, and the silicon oxide film 5 functions in the same manner as a stopper at the time of etching.
The polishing amount can be controlled with high accuracy. As a result, I
Variations in the characteristics of the GBT can be suppressed to a very small level.

As described above, when the substrate 4 and the silicon oxide film 5 are polished and removed to expose the P ⁺ type layer 2 and the N ⁺ type layer 3, an anode short structure collector layer is formed. Further, when necessary electrode wirings and the like are formed, an anode short type IGBT is completed.

In the method of manufacturing a semiconductor device according to the third embodiment of the present invention, oxygen is previously implanted in the vicinity of one surface of the semiconductor substrate 4 on which the P-type layer and the N-type layer serving as the anode short structure collector are formed. Is performed to form an oxide insulating film, and when the substrate 4 is polished to expose the P-type layer and the N-type layer, it functions in the same manner as a stopper, so that it is completely the same as the first embodiment. Not only can the effect be obtained, but also the characteristic variation of the anode short type IGBT can be suppressed to a very small value.

Incidentally, in the method of manufacturing a semiconductor device according to the third embodiment of the present invention, similarly to the second embodiment, the MOS transistor structure has a trench gate type MO.
It may have an S transistor structure.

[0050]

According to the method of manufacturing a semiconductor device of the present invention, a P-type layer and an N-type layer serving as an anode short structure collector layer are formed as buried layers in a semiconductor substrate. After forming a MOS transistor structure on the opposite side, the collector-side surface of the semiconductor substrate is polished to expose the P-type layer and the N-type layer, thereby forming the anode short structure collector layer. Therefore, in the MOS transistor structure forming step, the P-type layer and the N-type layer serving as the anode short structure collector layer are buried in the substrate.
In order to form the OS transistor structure, the thickness of the substrate is sufficiently large. Therefore, the thickness of the semiconductor substrate can be arbitrarily set, and the anode short structure can be applied to a low-breakdown-voltage element having a small substrate thickness.

Further, since means for protecting the P-type layer and the N-type layer serving as the collector layer during the MOS transistor structure forming step is not required, the complexity of the manufacturing process can be avoided.

In addition to the above structure, before forming the P-type layer and the N-type layer, oxygen is implanted at a predetermined depth near the surface of the semiconductor substrate to form an oxide insulating film. If the polishing for exposing the mold layer and the N-type layer is completed when the oxide insulating film is removed, the polishing amount can be controlled with high accuracy, and the variation in the characteristics of the IGBT is extremely small. Can be suppressed.

[Brief description of the drawings]

FIG. 1 is a sectional view showing a structure in a manufacturing process of a method for manufacturing a semiconductor device according to a first embodiment of the present invention.

FIG. 2 is a sectional view showing a structure in a manufacturing step of a method of manufacturing a semiconductor device according to a second embodiment of the present invention.

FIG. 3 is a sectional view showing a structure in a manufacturing step of a method for manufacturing a semiconductor device according to a third embodiment of the present invention.

FIG. 4 is a cross-sectional view showing a structure in a manufacturing process of a conventional method for manufacturing an anode short type IGBT.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 N ^- type semiconductor substrate 2 P ⁺ layer 3 N ⁺ layer 4 Semiconductor substrate 5 Oxide insulating film (silicon oxide film) 11, 21 Gate 12, 22 Gate insulating film 13, 23 Emitter

Claims (5)

[Claims] 1. An anode short structure collector layer comprising P
Forming a buried layer in the semiconductor substrate, forming a MOS transistor structure on the side opposite to the collector side of the semiconductor substrate, and then polishing the collector side surface of the semiconductor substrate to form the P-type layer and the N-type layer. A method of manufacturing a semiconductor device, comprising: forming an anode short structure collector layer by exposing a mold layer and an N-type layer. A step of forming a P-type layer and an N-type layer serving as an anode short structure collector layer on the first semiconductor substrate; and forming a second layer by crystal growth on the P-type layer and the N-type layer. Forming a semiconductor substrate; forming a MOS transistor structure on the second semiconductor substrate; and polishing and removing the first semiconductor substrate to expose the P-type layer and the N-type layer. And a method for manufacturing a semiconductor device. 3. The method according to claim 1, further comprising, before the step of forming the P-type layer and the N-type layer, implanting oxygen to a predetermined depth near the surface of the first semiconductor substrate to form an oxide insulating film. 3. The method according to claim 2, wherein the step of exposing the P-type layer and the N-type layer is completed when the oxide insulating film is removed. 4. The method according to claim 2, wherein said crystal growth is epitaxial growth. 5. The method of manufacturing a semiconductor device according to claim 1, wherein said MOS transistor structure is a trench gate type MOS transistor structure.